CN117852237A

CN117852237A - Hardware-in-loop test method, test system, electronic equipment and storage medium

Info

Publication number: CN117852237A
Application number: CN202211216743.3A
Authority: CN
Inventors: 全海强; 陈熠; 王晓
Original assignee: Calterah Semiconductor Technology Shanghai Co Ltd
Current assignee: Calterah Semiconductor Technology Shanghai Co Ltd
Priority date: 2022-09-30
Filing date: 2022-09-30
Publication date: 2024-04-09

Abstract

The embodiment of the application relates to the technical field of ring testing and discloses a hardware-in-ring testing method, a testing system, electronic equipment and a storage medium. The hardware-in-loop test method is applied to a test system, the test system comprises a first module and a second module, the first module comprises a simulation algorithm of an algorithm to be tested, the second module comprises a chip with the algorithm to be tested built in, and the method comprises the following steps: the first module acquires radar data; the first module runs a simulation algorithm of the algorithm to be tested according to the radar data to obtain a first test result; the first module receives a second test result, wherein the second test result is obtained by the second module running the algorithm to be tested based on the radar data; the first module compares the first test result with the second test result to determine a target test result. The hardware platform construction difficulty is reduced, the occupied hardware resources are reduced, and the accuracy of the test result is high.

Description

Hardware-in-loop test method, test system, electronic equipment and storage medium

Technical Field

The embodiment of the application relates to the technical field of ring testing, in particular to a hardware-in-ring testing method, a testing system, electronic equipment and a storage medium.

Background

Because the hardware environment during algorithm development is not completely consistent with the hardware environment during actual application of the chip, in order to make the algorithm still have good performance after being transplanted to the chip, not only software on-loop testing is needed for the algorithm, but also hardware on-loop testing is needed for the algorithm.

However, the implementation of the existing hardware-in-loop test method has the problems that the platform construction difficulty is high, the occupied hardware resources are large, the hardware environment after the algorithm is transplanted to the chip is difficult to accurately simulate, the test result is inaccurate, and the like.

Disclosure of Invention

The embodiment of the application aims to provide an in-loop test method, a test system, electronic equipment and a storage medium, so that the hardware platform construction difficulty is reduced, the occupied hardware resources are reduced, and the test result accuracy is high.

According to some embodiments of the present application, an aspect of the embodiments of the present application provides a hardware-in-the-loop test method, which is applied to a test system, where the test system includes a first module and a second module, the first module includes a simulation algorithm of an algorithm to be tested, and the second module includes a chip with the algorithm to be tested built in, and the method includes: the first module acquires radar data; the first module runs a simulation algorithm of the algorithm to be tested according to the radar data to obtain a first test result; the first module receives a second test result, wherein the second test result is obtained by the second module running the algorithm to be tested based on the radar data; the first module compares the first test result with the second test result to determine a target test result.

In some embodiments, the first module acquiring radar data includes: the first module reads the radar data from outside the test system; before the first module receives the second test result, the method further comprises: the first module sends the radar data to the second module, and the second module runs the algorithm to be tested based on the received radar data.

In some embodiments, the first module acquiring radar data includes: the first module receives the radar data sent by the second module.

In some embodiments, before the first module runs the simulation algorithm of the algorithm to be tested according to the radar data and obtains the first test result, the method further includes: the first module monitors whether the radar data of the kth frame sent by the second module is received or not, wherein k=1, 2, … …, N and N are the total frame number of the radar data; the first module runs a simulation algorithm of the algorithm to be tested according to the radar data to obtain a first test result, and the first test result comprises the following steps: and under the condition that the radar data of the kth frame sent by the second module is monitored, the first module calculates a simulation algorithm of the algorithm to be tested according to the radar data of the kth frame to obtain the first test result corresponding to the radar data of the kth frame.

In some embodiments, before the first module compares the first test result and the second test result to determine a target test result, the method further comprises: the first module monitors the second test result corresponding to the radar data of the ith frame sent by the second module, wherein i=1, 2, … …, N and N are the total frame number of the radar data; the first module compares the first test result and the second test result to determine a target test result, including: under the condition that the second test result corresponding to the radar data of the ith frame sent by the second module is monitored, the first module compares the first test result corresponding to the radar data of the ith frame with the second test result to determine the target test result of the radar data of the ith frame.

In some embodiments, the method further comprises: and displaying the target test result.

In some embodiments, the method further comprises: and displaying the first test result and the second test result while displaying the target test result.

According to some embodiments of the present application, another aspect of the embodiments of the present application further provides a hardware-in-the-loop test method, which is applied to a test system, where the test system includes a first module and a second module, the first module includes a simulation algorithm of an algorithm to be tested, and the second module includes a chip with the algorithm to be tested built in, and the method includes: the second module acquires radar data; the second module runs the algorithm to be tested according to the radar data to obtain a second test result; the second module sends the second test result to the first module, so that the first module can determine a target test result by comparing a first test result with the second test result, and the first test result is a test result obtained by the first module running a simulation algorithm of the algorithm to be tested based on the radar data.

In some embodiments, the second module obtains radar data, including: the second module reads the radar data from outside the test system; after the second module acquires radar data, the method further includes: the second module sends the radar data to the first module, and the first module runs a simulation algorithm of the algorithm to be tested based on the received radar data.

In some embodiments, the second module obtains radar data, including: the second module receives the radar data sent by the first module.

In some embodiments, before the second module runs the algorithm to be tested according to the radar data and obtains a second test result, the method further includes: the second module monitors whether the radar data of the kth frame sent by the first module is received or not, wherein k=1, 2, … …, N and N are the total frame number of the radar data; the second module operates the algorithm to be tested according to the radar data to obtain a second test result, and the second test result comprises: and under the condition that the radar data of the kth frame sent by the first module is monitored, the second module calculates the algorithm to be tested according to the radar data of the kth frame to obtain the second test result corresponding to the radar data of the kth frame.

In some embodiments, before the second module sends the second test result to the first module, the method further comprises: the second module monitors the second test result corresponding to the radar data of the ith frame, wherein i=1, 2, … …, N and N are the total frame number of the radar data; the second module sending the second test result to the first module, including: and under the condition that the second test result corresponding to the radar data in the ith frame is monitored, the second module sends the second test result corresponding to the radar data in the ith frame to the first module.

According to some embodiments of the present application, another aspect of the embodiments of the present application further provides a hardware-in-the-loop test method, which is applied to a test system, where the test system includes a first module and a second module, the first module includes a simulation algorithm of an algorithm to be tested, and the second module includes a chip with the algorithm to be tested built in, and the method includes: acquiring radar data; according to the radar data, running a simulation algorithm of the algorithm to be tested in the first module to obtain a first test result; according to the radar data, the algorithm to be tested is operated in the second module, and a second test result is obtained; and comparing the first test result and the second test result to determine a target test result.

In some embodiments, acquiring radar data includes: and acquiring the radar data from the outside of the test system through the first module and sending the radar data to the second module through the first module.

In some embodiments, before running the algorithm under test in the second module to obtain a second test result according to the radar data, the method further includes: monitoring whether the second module receives the radar data of the kth frame sent by the first module, wherein k=1, 2, … …, N and N are the total frame number of the radar data; and running the algorithm to be tested in the second module according to the radar data to obtain a second test result, wherein the second test result comprises the following steps: and under the condition that the second module receives the radar data of the kth frame sent by the first module, running the algorithm to be tested in the second module according to the radar data of the kth frame to obtain the second test result corresponding to the radar data of the kth frame.

In some embodiments, acquiring radar data includes: and acquiring the radar data from the outside of the test system through the second module and sending the radar data to the first module through the second module.

In some embodiments, according to the radar data, running a simulation algorithm of the algorithm to be tested in the first module, and before obtaining a first test result, the method further includes: monitoring whether the first module receives the radar data of the kth frame sent by the second module, wherein k=1, 2, … …, N and N are the total frame number of the radar data; according to the radar data, running a simulation algorithm of the algorithm to be tested in the first module to obtain a first test result, wherein the first test result comprises: and under the condition that the second module receives the radar data of the kth frame sent by the first module, running a simulation algorithm of the algorithm to be tested in the first module according to the radar data of the kth frame to obtain a first test result corresponding to the radar data of the kth frame.

In some embodiments, before comparing the first test result and the second test result to determine a target test result, the method further comprises: monitoring the first test result and the second test result corresponding to the radar data in the ith frame, wherein i=1, 2, … …, N and N are the total frame number of the radar data; comparing the first test result and the second test result to determine a target test result, comprising: and under the condition that the first test result and the second test result corresponding to the radar data in the ith frame are monitored, comparing the first test result and the second test result to determine the target test result.

In some embodiments, monitoring the first test result and the second test result corresponding to the radar data of the i frame includes: monitoring whether the first module receives the second test result corresponding to the radar data of the ith frame sent by the second module or not and monitoring whether the first module obtains the first test result corresponding to the radar data of the ith frame or not; under the condition that the first test result and the second test result corresponding to the radar data in the ith frame are monitored, comparing the first test result and the second test result to determine the target test result, wherein the method comprises the following steps: under the condition that the first module receives the second test result corresponding to the radar data of the ith frame sent by the second module and obtains the first test result corresponding to the radar data of the ith frame, the first test result and the second test result are compared based on the first module, and therefore the target test result is determined.

In some embodiments, the method further comprises: monitoring whether the second module obtains the second test result corresponding to the radar data of the ith frame or not; and under the condition that the second module is monitored to obtain the second test result corresponding to the radar data of the ith frame, the second module sends the second test result corresponding to the radar data of the ith frame to the first module.

According to some embodiments of the present application, there is also provided, in another aspect of embodiments of the present application, a test system, including: the hardware-in-loop test method comprises a first module and a second module, wherein the first module comprises a simulation algorithm of an algorithm to be tested, the second module comprises a chip with the algorithm to be tested built in, and the test system is used for realizing the hardware-in-loop test method according to any one of the above.

In some embodiments, the first module and the second module are connected by a serial interface.

According to some embodiments of the present application, another aspect of embodiments of the present application further provides an electronic device, including: at least one processor; and a memory communicatively coupled to the at least one processor; wherein the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the hardware-in-loop test method of any one of the above.

According to some embodiments of the present application, there is also provided a computer readable storage medium storing a computer program which, when executed by a processor, implements a hardware-in-loop test method as described in any one of the above.

The technical scheme provided by the embodiment of the application has at least the following advantages:

the testing system comprises a first module and a second module, wherein the second module comprises a chip with an algorithm to be tested, namely, a hardware environment in the actual application of the algorithm to be tested is accurately constructed based on the chip with the algorithm to be tested, hardware-in-loop testing is not performed based on a large complex hardware platform, and after radar data are acquired in the testing, a simulation algorithm of the algorithm to be tested is operated in the first module according to the radar data, so that a first testing result is obtained; according to the radar data, running a to-be-tested algorithm in a second module based on a chip with the to-be-tested algorithm, and obtaining a second test result; therefore, the first test result and the second test result are compared to generate the test result of the algorithm to be tested, and the test process is simpler. The method not only can accurately restore the actual application scene of the algorithm, but also reduces the hardware resources required to be used and reduces the difficulty of building the hardware platform. In addition, under the condition of testing based on the second module, the same radar data is subjected to simulation test based on the first platform, so that the evaluation of the test result of the algorithm to be tested can be realized by comparing the difference of the test results of the first module and the second module, and the difficulty of analysis of the test result is reduced.

Drawings

One or more embodiments are illustrated by way of example and not limitation in the figures of the accompanying drawings, in which like references indicate similar elements, and in which the figures of the drawings are not to be taken in a limiting sense, unless otherwise indicated.

FIG. 1 is a flow chart of a hardware-in-loop test method provided in an embodiment of the present application;

FIG. 2 is a flowchart of a hardware-in-the-loop test method including a first module obtaining a corresponding first test result step according to a kth frame of radar data according to another embodiment of the present application;

FIG. 3 is a flowchart of a hardware-in-the-loop test method including a first module monitoring whether there is a second test result step corresponding to a second frame of radar data provided in another embodiment of the present application;

FIG. 4 is a schematic diagram of a result display of a hardware-in-loop test method provided in another embodiment of the present application;

FIG. 5 is a flow chart of a hardware-in-the-loop test method including a step of a second module acquiring radar data provided in another embodiment of the present application;

FIG. 6 is a flowchart of a hardware-in-the-loop test method including a step of a second module monitoring whether a kth frame of radar data sent by a first module is received, as provided in another embodiment of the present application;

FIG. 7 is a flowchart of a hardware-in-the-loop test method including a second module monitoring whether there is a second test result step corresponding to the ith frame of radar data provided in another embodiment of the present application;

FIG. 8 is a flow chart of a hardware-in-the-loop test method including the step of running an algorithm under test in a second module based on radar data provided in another embodiment of the present application;

FIG. 9 is a flowchart of a hardware-in-the-loop test method including the step of monitoring whether a second module receives a kth frame of radar data transmitted by a first module, provided in another embodiment of the present application;

FIG. 10 is a flowchart of a hardware-in-the-loop test method for monitoring whether a first module receives a kth frame of radar data sent by a second module in accordance with another embodiment of the present application;

FIG. 11 is a flowchart of a hardware-in-the-loop test method for monitoring whether there are first and second test results corresponding to ith frame of radar data provided in another embodiment of the present application;

FIG. 12 is a schematic diagram of a first module and a second module interaction provided in another embodiment of the present application;

FIG. 13 is a schematic diagram of a test system provided in another embodiment of the present application;

fig. 14 is a schematic structural view of an electronic device provided in another embodiment of the present application.

Detailed Description

As known in the background, current hardware-in-loop testing typically requires the construction of large, complex hardware platforms.

It was found by analysis that one of the reasons for the occurrence of the above problems is: the current hardware-in-loop test generally uses a real-time processor to run a simulation model to simulate the running state of a controlled object, but the simulation model provides a real running environment not for an algorithm, so that a large complex hardware platform, such as a field programmable gate array (Field Programmable Gate Array, FPGA) motherboard platform, is usually constructed to simulate the real running hardware environment for the algorithm. The large complex hardware platform has complex structure, high construction difficulty and more occupied hardware resources, and the hardware environment after the simulated algorithm is transplanted to the chip still has the problem of inaccuracy, so that the test result is inaccurate.

In order to solve the above problems, the embodiment of the application provides a hardware-in-loop test method, which is applied to a test system, wherein the test system comprises a first module and a second module, and the second module comprises a chip with an algorithm to be tested built in, that is, the hardware environment of the algorithm to be tested in the chip is truly restored based on the chip with the algorithm to be tested in the actual operation, a large amount of hardware resources are not required to be additionally used for simulating the hardware environment of the algorithm to be tested in the chip, the difficulty in building a hardware platform is reduced, the hardware resources required for building the platform are reduced, and the accuracy is higher. Therefore, after radar data is acquired based on hardware-in-loop testing of the testing system, an algorithm to be tested and a simulation algorithm thereof can be respectively operated on the first module and the second module according to the radar data, so as to obtain a first testing result and a second testing result; and then, according to the first test result and the second test result, the test result of the algorithm to be tested is generated, and the test process is more concise and efficient.

For the purpose of making the objects, technical solutions and advantages of the embodiments of the present application more apparent, the embodiments of the present application will be described in detail below with reference to the accompanying drawings. However, as will be appreciated by those of ordinary skill in the art, in the various embodiments of the present application, numerous technical details have been set forth in order to provide a better understanding of the present application. However, the technical solutions claimed in the present application can be implemented without these technical details and with various changes and modifications based on the following embodiments.

The following embodiments are divided for convenience of description, and should not be construed as limiting the specific implementation of the present application, and the embodiments may be mutually combined and referred to without contradiction.

In one aspect, the embodiment of the application provides a hardware-in-the-loop test method, which is applied to a test system, wherein the test system comprises a first module and a second module, the first module comprises a simulation algorithm of an algorithm to be tested, and the second module comprises a chip with the algorithm to be tested. The first module may be a software platform, so that a simulation environment can be provided based on the software platform to run a simulation algorithm of the algorithm to be tested, and the second module may be a hardware platform, i.e. a hardware system built based on a chip with the algorithm to be tested.

The flow of the hardware-in-loop test method is shown in fig. 1, and at least comprises the following steps:

in step 101, a first module acquires radar data.

In this embodiment, the radar data is data collected by the radar in an actual scene, and is used as input of the algorithm to be tested. The radar data may be data acquired by unprocessed radar or processed radar, and in some cases, the radar data may be data processed into point clouds, which will not be described in detail herein.

It will be appreciated that radar data is not generated internally to the test system and therefore needs to be obtained from outside, for a test system having both a first module and a second module, radar data may be read in either by the first module or by the second module.

Based on this, in some embodiments, the first module obtains radar data by: the first module reads radar data from outside the test system. That is, the test system directly acquires radar data through the first module, where the first module may be connected to the storage module of radar data, so that the radar data may be read in real time, or may be connected to a module or device in which radar data is stored in advance, so that the radar data stored in advance may be read. Accordingly, the hardware-in-loop test method further includes, before the first module receives the second test result: the first module sends radar data to the second module, and the second module operates a to-be-detected algorithm based on the received radar data.

In other embodiments, the first module may acquire radar data by: the first module receives radar data sent by the second module. That is, the first module does not directly acquire external radar data, but acquires it through the second module.

It may be further understood that, in the case where the radar data of the first module is obtained by being sent from the second module, the first module may obtain the corresponding first test result based on the obtained radar data only if the corresponding radar data is received. That is, in some embodiments, as shown in fig. 2, the first module runs a simulation algorithm of the algorithm to be tested according to the radar data, and before obtaining the first test result, the hardware-in-loop test method further includes:

step 105, monitoring whether the first module receives the kth frame of radar data sent by the second module. If yes, go to step 102, if no, go to step 105 again.

Accordingly, step 102 is: and the first module calculates a simulation algorithm of the algorithm to be tested according to the kth frame radar data to obtain a first test result corresponding to the kth frame radar data.

In this embodiment, k=1, 2, … …, N is the total frame number of the radar data. The monitoring mode can be realized by setting a watchdog, a monitor and the like.

That is, in this embodiment, the radar data is used as a unit to perform a test to obtain a corresponding test result, so that the problem of the algorithm to be tested can be located at the frame level, so that when the problem of the algorithm to be tested is analyzed, the amount of data to be analyzed is reduced, which is beneficial to more efficiently analyzing and solving the problem.

Step 102, the first module runs a simulation algorithm of the algorithm to be tested according to the radar data to obtain a first test result.

In this embodiment, the algorithm to be tested may be an algorithm that provides related functions based on radar data, such as a target recognition algorithm, an obstacle avoidance algorithm, an autopilot algorithm, and the like. The simulation algorithm of the to-be-tested algorithm is an algorithm for simulating the to-be-tested algorithm, and can be the to-be-tested algorithm itself, and also comprises simulation logics on the basis of the realization logics of the to-be-tested algorithm, for example, in the case that the to-be-tested algorithm is an automobile obstacle avoidance algorithm, the simulation algorithm of the to-be-tested algorithm comprises not only the automobile obstacle avoidance logic, but also the simulation logic of the automobile performance, so that the actual degree of the automobile obstacle avoidance is improved by combining the automobile performance, and the application scene and the like are facilitated to be restored more.

The form of the first test result is not limited in this embodiment, and may be an operation result of a simulation algorithm of the algorithm to be tested, or a result obtained by processing the operation result, or the like.

Step 103, the first module receives a second test result, wherein the second test result is a test result obtained by the second module running the algorithm to be tested based on the radar data.

In this embodiment, the communication connection between the first module and the second module may be implemented through an optical fiber, a serial port communication protocol, etc., which will not be described in detail herein.

In some examples, after the second module obtains the second test result based on the radar data operation, the second test result is sent to the first module, so that the first module receives the second test result. That is, the first module passively receives the second test result sent by the first module.

In other examples, after the first module obtains the first test result, the first module actively requests the corresponding second test result from the second module, so that the second module returns the second test result based on the request, and the first module receives the second test result returned based on the request. That is, the first module actively receives the second test result sent by the first module.

It should be noted that, in this embodiment, the "first" and "second" of the first test result and the second test result are only used to distinguish the sources of the test results, specifically, the first test result is derived from the first module, and the second test result is derived from the second module, which does not include other means.

Step 104, the first module compares the first test result and the second test result to determine a target test result.

In this embodiment, unlike the first test result and the second test result are running results of the to-be-tested algorithm or a simulation algorithm of the to-be-tested algorithm, the target test result is a hardware-in-loop test result of the to-be-tested algorithm.

It is also understood that the determination of the target test result requires the first test result and the second test result to be provided at the same time. Thus, in some embodiments, as shown in fig. 3, the first module compares the first test result and the second test result to determine the target test result before the hardware-in-loop test method further comprises:

and step 106, the first module monitors whether a second test result corresponding to the ith frame of radar data sent by the second module exists. If yes, go to step 104, if no, go to step 106 again.

Step 104 is: the first module compares the first test result and the second test result corresponding to the ith frame of radar data to determine a target test result of the ith frame of radar data.

In this embodiment, i=1, 2, … …, N is the total frame number of the radar data. The monitoring mode can be realized by setting a watchdog, a monitor and the like.

That is, the first module compares the second test result to determine the target test result. Of course, in other embodiments, the first test result may also be monitored, so that after the first test result and the second test result corresponding to the i-th frame radar data are monitored, comparison is performed to determine the target test result.

Additionally, in some embodiments, to present the test results to the user, the hardware-in-loop test method further comprises: and displaying the target test result. Further, in order to better show the test result to the user, the hardware-in-loop test method further comprises: and displaying the first test result and the second test result while displaying the target test result. Taking the algorithm to be tested as a target recognition algorithm as an example, displaying the result shown in fig. 4 to a user, wherein solid round dots are original monitoring points, a circle is a target recognized in a first test result of a first module, a square is a target recognized in a second test result of a second module, and when the circle and the square are completely overlapped, the test results of the first module and the second module are consistent.

The flow of the hardware-in-loop test method is shown in fig. 5, and at least comprises the following steps:

in step 501, the second module obtains radar data.

Based on this, in some embodiments, the second module obtains radar data by: the second module reads radar data from outside the test system. That is, the test system directly acquires radar data through the second module, where the second module may be connected to the storage module of radar data, so that radar data may be read in real time, or may be connected to a module or device in which radar data is stored in advance, so that radar data stored in advance may be read. Correspondingly, after the second module acquires radar data, the hardware-in-loop test method further comprises the following steps: the second module sends radar data to the first module, and the first module runs a simulation algorithm of the algorithm to be tested based on the received radar data.

In other embodiments, the second module may acquire radar data by: the second module receives the radar data sent by the first module. That is, the second module does not directly acquire external radar data, but acquires it through the first module.

It may be further understood that, in the case where the radar data of the second module is obtained by being sent from the first module, only if the corresponding radar data is received, the second module may obtain the corresponding second test result based on the obtained radar data. That is, in some embodiments, as shown in fig. 6, the second module runs the algorithm to be tested according to the radar data, and before obtaining the second test result, the hardware-in-loop test method further includes:

the second module monitors whether the kth frame of radar data sent by the first module is received, step 504. If yes, go to step 502, if no, go to step 504 again.

Accordingly, step 502 is: and the second module calculates a to-be-tested algorithm according to the kth frame radar data to obtain a second test result corresponding to the kth frame radar data.

Step 502, the second module runs the algorithm to be tested according to the radar data to obtain a second test result.

In this embodiment, the algorithm to be tested may be an algorithm that provides related functions based on radar data, such as a target recognition algorithm, an obstacle avoidance algorithm, an autopilot algorithm, and the like.

The form of the second test result is not limited in this embodiment, and may be an operation result of the algorithm to be tested, or a result obtained by processing the operation result, or the like.

In step 503, the second module sends a second test result to the first module, so that the first module can determine a target test result by comparing the first test result with the second test result, where the first test result is a test result obtained by the first module running a simulation algorithm of the algorithm to be tested based on the radar data.

In some examples, the second module sends the second test result to the first module, which may be actively sent after the second module obtains the second test result, e.g., after obtaining the second test result, the second module triggers an action of sending the second test result to the first module.

In other examples, it may also be that the second module receives the request sent by the first module, so that in response to the request, the second module returns a second test result to the first module, i.e. the second module passively sends the second test result to the first module.

It will also be appreciated that the transmission of the second test result may only be performed if the second test result is provided. Thus, in some embodiments, as shown in fig. 7, the hardware-in-loop test method further includes, before the second module sends the second test result to the first module:

in step 505, the second module monitors whether there is a second test result corresponding to the ith frame of radar data. If yes, go to step 503, if no, go to step 505 again.

Accordingly, step 503 is: the second module sends a second test result corresponding to the ith frame of radar data to the first module.

That is, the second module transmits the second test result to the first module if the second test result is provided.

The flow of the hardware-in-loop test method is shown in fig. 8, and at least comprises the following steps:

step 801, radar data is acquired.

It will be appreciated that the drive test data is not internally generated by the test system and therefore needs to be obtained from outside, for a test system having both a first module and a second module, radar data may be read in either by the first module or by the second module.

Based on this, in some embodiments, the test system acquires radar data through the first module, at this time, as shown in fig. 9, the hardware is in the loop test method, and step 801 is: and obtaining drive test data from the outside of the test system through the first module and sending radar data to the second module through the first module.

In this embodiment, the radar data outside the test system may be radar data stored in the database in advance, so that the first module reads in the drive test data by accessing the database; the radar data outside the test system can also be drive test data acquired in real time from an actual environment, so that the first module receives the radar data acquired in real time and the like through connection with the radar for data acquisition in the actual scene, and the real-time acquisition of the radar data and the like are not repeated.

In this embodiment, the first module and the second module may be connected in various manners, for example, based on serial interface protocol connection, through optical fiber connection, etc., so that the first module may send the acquired radar data to the hardware platform through the communication connection between the first module and the second module, so that the second module may further process the received radar data.

Further, in some embodiments, in order to facilitate that the second module can process the radar data in time after receiving the radar data, as shown in fig. 9, before running the algorithm to be tested in the second module to obtain the second test result, the hardware-in-loop test method further includes:

step 805 monitors whether the second module receives the kth frame of radar data sent by the first module. If yes, go to step 803, if no, go to step 805 again.

Accordingly, step 803 is: and according to the kth frame of radar data, running a to-be-tested algorithm in a second module to obtain a second test result corresponding to the kth frame of radar data. Step 804 is: and comparing the first test result and the second test result corresponding to the kth frame of radar data to determine a target test result of the algorithm to be tested based on the kth frame of radar data.

In this embodiment, k=1, 2, … …, N is the total frame number of the radar data.

In this embodiment, the second module keeps monitoring the radar data, which may be implemented by setting a watchdog, a monitor, etc., so that once the drive test data sent by the first module is received, the second module is driven to operate the algorithm to be tested, and thus the operation result is used as the second test result.

It should be noted that, the second module may keep the monitoring state for the radar data all the time, or stop monitoring after the radar data is received and before the processing of the received radar data is completed, and keep monitoring at other times, etc.

In other embodiments, the test system obtains radar test data through the second module, where, as shown in fig. 10, the hardware in the loop test method, step 801 is: and obtaining drive test data from the outside of the test system through the second module and sending radar data to the first module through the second module.

It should be noted that, the radar data outside the test system may be radar data collected in real time from an actual environment, so that the second module receives the radar data collected in real time through connection with the radar for data collection in the actual scene; the radar data outside the test system may also be radar data stored in the upper computer in advance, so that the second module can obtain the radar data by reading the radar data from the upper computer, and the second module will not be described in detail herein.

In this embodiment, the first module and the second module may be connected in various manners, for example, based on a serial interface protocol, through a wire connection, etc., so that the second module can send the acquired radar data to the first module through the communication connection with the first module, so that the first module can further process the received radar data.

Further, in some embodiments, in order to facilitate that the first module can process the radar data in time after receiving the radar data, as shown in fig. 10, according to the radar data, a simulation algorithm of an algorithm to be tested is run in the first module, and before obtaining the first test result, the hardware-in-loop test method further includes:

step 806, monitoring whether the first module receives the kth frame of radar data sent by the second module. If yes, go to step 802, if no, go to step 806 again.

Step 802 is: and according to the kth frame of radar data, running a simulation algorithm of an algorithm to be tested in the first module to obtain a first test result corresponding to the kth frame of radar data. Step 804 is: and comparing the first test result and the second test result corresponding to the kth frame of radar data to determine a target test result of the algorithm to be tested based on the kth frame of radar data.

In this embodiment, the first module keeps monitoring the radar data, and the implementation manner may be that a watchdog, a monitor, etc. are set, so that once the radar data sent by the second module is received, the first module is driven to operate a simulation algorithm of the algorithm to be tested, and thus an operation result is used as a first test result.

It should be noted that, the first module may keep the monitoring state on the radar data all the time, or stop the monitoring after the radar data is received and before the processing of the received radar data is completed, and keep the monitoring at other times, etc.

Step 802, according to the radar data, running a simulation algorithm of the algorithm to be tested in the first module to obtain a first test result.

In this embodiment, a simulation algorithm of the algorithm to be tested is set on the first module, after the first module obtains radar data, the first module starts to run the simulation algorithm of the algorithm to be tested with the radar data as input, and outputs the simulation algorithm as a first test result.

And 803, running a to-be-tested algorithm in a second module according to the radar data to obtain a second test result.

In this embodiment, the second module includes a chip with an algorithm to be tested built in, and after the second module obtains radar data, the algorithm to be tested in the chip is called with the radar data as input, and is output as a second test result.

Step 804, comparing the first test result and the second test result to determine a target test result of the algorithm to be tested.

In this embodiment, the first test result and the second test result are obtained in the first module and the second module based on the same radar data, respectively, so when the algorithm to be tested has the same function as it has on the first module on the second module, the first test result and the second test result should be the same, conversely, when the algorithm to be tested has a different function as it has on the first module on the second module, that is, when the algorithm to be tested has a problem of compatibility with hardware, the first test result and the second test result are different. That is, a target test result of the algorithm under test may be generated based on the comparison between the first test result and the second test result.

It should be noted that, according to different test requirements, the generated test results may be different, in some examples, the test results of the to-be-tested algorithm may be intuitive test passing or test failing results, that is, when the first test result and the second test result are the same, the test passing test result is generated, and when the first test result and the second test result are different, the test failing test result is generated; in other examples, the test result of the algorithm to be tested may also be a presentation of the first test result and the second test result, so that the user may perform the analysis autonomously.

It will be appreciated that the comparison of the first test result and the second test result can only be achieved if both the first test result and the second test result are present. Based on this, in some embodiments, as shown in fig. 11, the hardware-in-loop test method further includes, before comparing the first test result and the second test result to determine the target test result:

step 807, monitoring whether there is a first test result and a second test result corresponding to the ith frame of radar data. If yes, go to step 804, if no, go to step 807 again.

Step 804 is: and comparing the first test result and the second test result corresponding to the ith frame of radar data to determine a target test result corresponding to the ith frame of radar data.

In this embodiment, i=1, 2, … …, N is the total frame number of the radar data.

It can be understood that the first test result is generated in the first module, and the second test result is generated in the second module, so that the first test result and the second test result need to be set at the same position, i.e. the first module or the second module, in order to generate the test result of the algorithm to be tested according to the first test result and the second test result. Considering that the first module is generally more complete than the second module, otherwise, the difficulty of building the second module is increased, and thus, in some embodiments, the target test result of the algorithm to be tested is generated based on the first module, and at this time, the hardware-in-loop test method further includes sending the second test result to the software platform through the hardware platform. Accordingly, monitoring whether there is a first test result and a second test result corresponding to the ith frame of radar data may be achieved by: and monitoring whether the first module receives a second test result corresponding to the ith frame of radar data sent by the second module and whether the first module obtains a first test result corresponding to the ith frame of radar data. Meanwhile, under the condition that a first test result and a second test result corresponding to the ith frame of radar data are monitored, the first test result and the second test result corresponding to the ith frame of radar data are compared to determine a target test result corresponding to the ith frame of radar data, and the method can be realized by the following steps: under the condition that the first module is monitored to receive a second test result corresponding to the ith frame of radar data and a first test result corresponding to the ith frame of radar data, which are sent by the second module, the first module is used for comparing the first test result corresponding to the ith frame of radar data with the second test result so as to determine a target test result corresponding to the ith frame of radar data. Correspondingly, the second module sends the second test result to the first module by the following way: monitoring whether a second module obtains a second test result corresponding to the ith frame of radar data; and under the condition that the second module is monitored to obtain a second test result corresponding to the ith frame of radar data, the second module sends the second test result corresponding to the ith frame of radar data to the first module.

In order to facilitate the understanding of the interaction between the first module and the second module by those skilled in the art, the following description will be made with respect to the case where the test system reads radar data from the outside through the first module, as shown in fig. 12, after the first module obtains the external radar data, the first module operates the simulation algorithm of the algorithm to be tested inside to obtain the first test result, and sends the radar data to the second module through the serial port, so that the second module operates the algorithm to be tested based on the received radar data, and returns the second test result to the second module, and thus, the first module processes the first test result and the second test result and outputs the target test result of the algorithm to be tested.

In particular, in order to facilitate better analysis of the results by the user, the first test result and the second test result in the target test result of the algorithm to be tested may be presented simultaneously in different forms on the display area of the first module, respectively. Therefore, the first test result and the second test result are presented in different forms, so that a user can more easily distinguish and compare the first test result and the second test result, and the analysis efficiency is improved.

It should be further noted that, the second test result may be a test result obtained by the second module based on all the acquired radar data, and at this time, the first test result and the second test result are test results of complete radar data, so that overall analysis can be performed globally; the second test result can also acquire partial radar data based on the test result obtained by the second module, at this time, the analysis efficiency is improved, the test is not required to be completed based on all acquired radar data, and the analysis based on the partial test result is convenient, particularly, when the second test result is inconsistent with the first test result, the actual scene can be quickly restored based on the partial radar data corresponding to the current second test result, the reason that the problem occurs when the algorithm to be tested is applied based on the partial radar data is further analyzed, the position of the radar data with the problem in all acquired radar data is not required to be positioned, and the debugging and the problem investigation of the algorithm to be tested are convenient.

In order to facilitate the understanding of the foregoing hardware-in-the-loop test method by those skilled in the art, a scenario in which a first module is a software platform, a second module is a hardware platform connected with a real vehicle, a radar sensor is deployed on the real vehicle, and the hardware platform can acquire radar data in real time will be described below as an example.

The hardware platform acquires radar drive test data from the real vehicle in real time, wherein the radar drive test data is data acquired by the millimeter wave radar when the real vehicle normally travels in an actual road. And then, the hardware platform sends the acquired radar drive test data to the software platform through a serial port communication protocol. And once the software platform receives the radar drive test data, the software platform monitors the radar drive test data, and operates a simulation algorithm of the algorithm to be tested according to the received radar drive test data to obtain a first test result. And meanwhile, the hardware platform operates a to-be-tested algorithm according to the radar drive test data to obtain a second test result. Once the hardware platform completes the test based on one frame of radar data, namely, a second test result corresponding to one frame of radar drive test data is monitored, the second test result obtained by the current frame of radar drive test data is sent to the software platform. And then, after the software platform receives the second test result, the first test result and the second test result are used as test results of the algorithm to be tested.

Therefore, the hardware platform in the test system is connected with the real vehicle, so that the drive test data can be acquired in real time, the real vehicle state data can be acquired in real time, the hardware platform is not required to model and predict the vehicle running state, the running of the algorithm to be tested in the actual application scene is restored more truly, the hardware environment is not only, but also the application scene can be combined, and therefore the test accuracy is improved.

The above steps of the methods are divided, for clarity of description, and may be combined into one step or split into multiple steps when implemented, so long as they include the same logic relationship, and they are all within the protection scope of this patent; it is within the scope of this patent to add insignificant modifications to the algorithm or flow or introduce insignificant designs, but not to alter the core design of its algorithm and flow.

Another aspect of the embodiments of the present application further provides a test system, as shown in fig. 13, a test system 1000 includes: a first module 100 and a second module 200, the first module including a simulation algorithm of an algorithm to be tested, the second module 200 including a chip 210 having the algorithm to be tested built in.

It should be noted that, the test system 1000 provided in this embodiment is used to implement the hardware-in-loop test method according to any of the foregoing embodiments.

In some examples, the first module 100 and the second module 200 are connected by a serial interface.

It is to be noted that this embodiment is a system embodiment corresponding to the method embodiment, and this embodiment may be implemented in cooperation with the method embodiment. The related technical details mentioned in the method embodiment are still valid in this embodiment, and in order to reduce repetition, they are not described here again. Accordingly, the related technical details mentioned in the present embodiment may also be applied in the method embodiment.

It should be noted that, each module involved in this embodiment is a logic module, and in practical application, one logic unit may be one physical unit, or may be a part of one physical unit, or may be implemented by a combination of multiple physical units. In addition, in order to highlight the innovative part of the present application, elements that are not so close to solving the technical problem presented in the present application are not introduced in the present embodiment, but it does not indicate that other elements are not present in the present embodiment.

Another aspect of the embodiments of the present application further provides an electronic device, as shown in fig. 14, including: at least one processor 1401; and a memory 1402 communicatively coupled to the at least one processor 1401; wherein the memory 1402 stores instructions executable by the at least one processor 1401, the instructions being executable by the at least one processor 1401 to enable the at least one processor 1401 to perform the hardware-in-loop test method described in any of the method embodiments described above.

Where memory 1402 and processor 1401 are connected by a bus, the bus may comprise any number of interconnected buses and bridges, the buses connecting the various circuits of the one or more processors 1401 and memory 1402 together. The bus may also connect various other circuits such as peripherals, voltage regulators, and power management circuits, which are well known in the art, and therefore, will not be described any further herein. The bus interface provides an interface between the bus and the transceiver. The transceiver may be one element or may be a plurality of elements, such as a plurality of receivers and transmitters, providing a means for communicating with various other apparatus over a transmission medium. The data processed by the processor 1401 is transmitted over a wireless medium via an antenna, which in turn receives the data and transmits the data to the processor 1401.

The processor 1401 is responsible for managing the bus and general processing and may provide various functions including timing, peripheral interfaces, voltage regulation, power management, and other control functions. And memory 1402 may be used to store data used by processor 1401 in performing operations.

Another aspect of the embodiments of the present application also provides a computer-readable storage medium storing a computer program. The computer program, when executed by a processor, implements the hardware-in-loop test method described in any of the method embodiments described above.

That is, it will be understood by those skilled in the art that implementing all or part of the steps in the methods of the embodiments described above may be accomplished by a program stored in a storage medium, including several instructions for causing a device (which may be a single-chip microcomputer, a chip or the like) or a processor (processor) to perform all or part of the steps of the methods of the embodiments described herein. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.

It will be understood by those of ordinary skill in the art that the foregoing embodiments are specific embodiments in which the present application is implemented and that various changes in form and details may be made therein without departing from the spirit and scope of the present application.

Claims

1. The hardware-in-loop test method is characterized by being applied to a test system, wherein the test system comprises a first module and a second module, the first module comprises a simulation algorithm of an algorithm to be tested, the second module comprises a chip with the algorithm to be tested built in, and the method comprises the following steps:

The first module acquires radar data;

the first module runs a simulation algorithm of the algorithm to be tested according to the radar data to obtain a first test result;

the first module receives a second test result, wherein the second test result is obtained by the second module running the algorithm to be tested based on the radar data;

the first module compares the first test result with the second test result to determine a target test result.

2. The hardware-in-the-loop test method of claim 1, wherein the first module acquiring radar data comprises:

the first module reads the radar data from outside the test system;

before the first module receives the second test result, the method further comprises:

the first module sends the radar data to the second module, and the second module runs the algorithm to be tested based on the received radar data.

3. The hardware-in-the-loop test method of claim 1, wherein the first module acquiring radar data comprises:

the first module receives the radar data sent by the second module.

4. The hardware-in-the-loop test method of claim 3, wherein the first module runs a simulation algorithm of the algorithm under test according to the radar data, and before obtaining a first test result, the method further comprises:

the first module monitors whether the radar data of the kth frame sent by the second module is received, wherein k=1, 2, … …, N and N are the total frame number of the radar data;

the first module runs a simulation algorithm of the algorithm to be tested according to the radar data to obtain a first test result, and the first test result comprises the following steps:

and under the condition that the radar data of the kth frame sent by the second module is monitored, the first module calculates a simulation algorithm of the algorithm to be tested according to the radar data of the kth frame to obtain the first test result corresponding to the radar data of the kth frame.

5. The hardware-in-the-loop test method of any one of claims 1-4, wherein the first module compares the first test result and the second test result to determine a target test result, the method further comprising:

the first module monitors whether the second test result corresponding to the radar data of the ith frame sent by the second module is provided, wherein i=1, 2, … …, N and N are the total frame number of the radar data;

The first module compares the first test result and the second test result to determine a target test result, including:

under the condition that the second test result corresponding to the radar data of the ith frame sent by the second module is monitored, the first module compares the first test result corresponding to the radar data of the ith frame with the second test result to determine the target test result of the radar data of the ith frame.

6. The hardware-in-the-loop test method of any one of claims 1-4, further comprising:

and displaying the target test result.

7. The hardware-in-the-loop test method of claim 6, further comprising:

and displaying the first test result and the second test result while displaying the target test result.

8. The hardware-in-loop test method is characterized by being applied to a test system, wherein the test system comprises a first module and a second module, the first module comprises a simulation algorithm of an algorithm to be tested, the second module comprises a chip with the algorithm to be tested built in, and the method comprises the following steps:

The second module acquires radar data;

the second module runs the algorithm to be tested according to the radar data to obtain a second test result;

the second module sends the second test result to the first module, so that the first module can determine a target test result by comparing a first test result with the second test result, and the first test result is a test result obtained by the first module running a simulation algorithm of the algorithm to be tested based on the radar data.

9. The hardware-in-the-loop test method of claim 8, wherein the second module acquiring radar data comprises:

the second module reads the radar data from outside the test system;

after the second module acquires radar data, the method further includes:

the second module sends the radar data to the first module, and the first module runs a simulation algorithm of the algorithm to be tested based on the received radar data.

10. The hardware-in-the-loop test method of claim 8, wherein the second module acquiring radar data comprises:

the second module receives the radar data sent by the first module.

11. The hardware-in-the-loop test method of claim 10, wherein the second module runs the algorithm under test according to the radar data, and before obtaining a second test result, the method further comprises:

the second module monitors whether the radar data of the kth frame sent by the first module is received, wherein k=1, 2, … …, N and N are the total frame number of the radar data;

the second module operates the algorithm to be tested according to the radar data to obtain a second test result, and the second test result comprises:

and under the condition that the radar data of the kth frame sent by the first module is monitored, the second module calculates the algorithm to be tested according to the radar data of the kth frame to obtain the second test result corresponding to the radar data of the kth frame.

12. The hardware-in-the-loop test method of any one of claims 8-11, wherein before the second module sends the second test result to the first module, the method further comprises:

the second module monitors whether the second test result corresponding to the radar data in the ith frame exists or not, wherein i=1, 2, … …, N and N are the total frame number of the radar data;

The second module sending the second test result to the first module, including:

and under the condition that the second test result corresponding to the radar data in the ith frame is monitored, the second module sends the second test result corresponding to the radar data in the ith frame to the first module.

13. The hardware-in-loop test method is characterized by being applied to a test system, wherein the test system comprises a first module and a second module, the first module comprises a simulation algorithm of an algorithm to be tested, the second module comprises a chip with the algorithm to be tested built in, and the method comprises the following steps:

acquiring radar data;

according to the radar data, running a simulation algorithm of the algorithm to be tested in the first module to obtain a first test result;

according to the radar data, the algorithm to be tested is operated in the second module, and a second test result is obtained;

and comparing the first test result and the second test result to determine a target test result.

14. The hardware-in-the-loop test method of claim 13, wherein obtaining radar data comprises:

and acquiring the radar data from the outside of the test system through the first module and sending the radar data to the second module through the first module.

15. The hardware-in-the-loop test method of claim 14, wherein, based on the radar data, running the algorithm under test in the second module, before obtaining a second test result, the method further comprises:

monitoring whether the second module receives the radar data of the kth frame sent by the first module, wherein k=1, 2, … …, N and N are the total frame number of the radar data;

and running the algorithm to be tested in the second module according to the radar data to obtain a second test result, wherein the second test result comprises the following steps:

and under the condition that the second module receives the radar data of the kth frame sent by the first module, running the algorithm to be tested in the second module according to the radar data of the kth frame to obtain the second test result corresponding to the radar data of the kth frame.

16. The hardware-in-the-loop test method of claim 13, wherein obtaining radar data comprises:

and acquiring the radar data from the outside of the test system through the second module and sending the radar data to the first module through the second module.

17. The hardware-in-the-loop test method of claim 16, wherein running a simulation algorithm of the algorithm under test in the first module based on the radar data, before obtaining a first test result, the method further comprises:

Monitoring whether the first module receives the radar data of the kth frame sent by the second module, wherein k=1, 2, … …, N and N are the total frame number of the radar data;

according to the radar data, running a simulation algorithm of the algorithm to be tested in the first module to obtain a first test result, wherein the first test result comprises:

and under the condition that the second module receives the radar data of the kth frame sent by the first module, running a simulation algorithm of the algorithm to be tested in the first module according to the radar data of the kth frame to obtain a first test result corresponding to the radar data of the kth frame.

18. The hardware-in-the-loop test method of any of claims 13-17, wherein prior to comparing the first test result and the second test result to determine a target test result, the method further comprises:

monitoring whether the first test result and the second test result corresponding to the radar data of the ith frame exist or not, wherein i=1, 2, … …, N and N are the total frame number of the radar data;

comparing the first test result and the second test result to determine a target test result, comprising:

And under the condition that the first test result and the second test result corresponding to the radar data in the ith frame are monitored, comparing the first test result and the second test result corresponding to the radar data in the ith frame to determine the target test result corresponding to the radar data in the ith frame.

19. The hardware-in-the-loop test method of claim 18, wherein monitoring whether there is the first test result and the second test result corresponding to the radar data for an i-th frame comprises:

monitoring whether the first module receives the second test result corresponding to the radar data of the ith frame sent by the second module and whether the first module obtains the first test result corresponding to the radar data of the ith frame;

under the condition that the first test result and the second test result corresponding to the radar data in the ith frame are monitored, comparing the first test result and the second test result corresponding to the radar data in the ith frame to determine the target test result corresponding to the radar data in the ith frame, wherein the method comprises the following steps:

under the condition that the first module receives the second test result corresponding to the radar data of the ith frame and the first test result corresponding to the radar data of the ith frame, which are sent by the second module, the first module is used for comparing the first test result corresponding to the radar data of the ith frame with the second test result based on the first module, so that the target test result corresponding to the radar data of the ith frame is determined.

20. The hardware-in-the-loop test method of claim 19, wherein the method further comprises:

monitoring whether the second module obtains the second test result corresponding to the radar data of the ith frame;

and under the condition that the second module is monitored to obtain the second test result corresponding to the radar data of the ith frame, the second module sends the second test result corresponding to the radar data of the ith frame to the first module.

21. A test system, comprising: a first module and a second module, wherein the first module comprises a simulation algorithm of an algorithm to be tested, the second module comprises a chip with the algorithm to be tested built in, and the test system is used for realizing the hardware-in-loop test method according to any one of claims 1 to 7, or realizing the hardware-in-loop test method according to any one of claims 8 to 12, or realizing the hardware-in-loop test method according to any one of claims 13 to 20.

22. The test system of claim 21, wherein the first module and the second module are connected by a serial interface.

23. An electronic device, comprising:

At least one processor; the method comprises the steps of,

a memory communicatively coupled to the at least one processor; wherein,

the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the hardware-in-loop test method of any one of claims 1 to 7, or to perform the hardware-in-loop test method of any one of claims 8 to 12, or to perform the hardware-in-loop test method of any one of claims 13 to 20.

24. A computer readable storage medium storing a computer program, wherein the computer program when executed by a processor implements the hardware-in-loop test method of any one of claims 1 to 7, or implements the hardware-in-loop test method of any one of claims 8 to 12, or implements the hardware-in-loop test method of any one of claims 13 to 20.