CN117811580A - Method for setting initial value of capture capacitor array control word in all-digital phase-locked loop - Google Patents
Method for setting initial value of capture capacitor array control word in all-digital phase-locked loop Download PDFInfo
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- CN117811580A CN117811580A CN202410207500.6A CN202410207500A CN117811580A CN 117811580 A CN117811580 A CN 117811580A CN 202410207500 A CN202410207500 A CN 202410207500A CN 117811580 A CN117811580 A CN 117811580A
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- capacitor array
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- initial value
- locked loop
- digital phase
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- 239000003990 capacitor Substances 0.000 title claims abstract description 73
- 238000000034 method Methods 0.000 title claims abstract description 35
- 230000010355 oscillation Effects 0.000 claims description 6
- 238000004088 simulation Methods 0.000 claims description 2
- 230000000875 corresponding effect Effects 0.000 description 6
- 230000002596 correlated effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000012544 monitoring process Methods 0.000 description 2
- 238000003491 array Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
- H03L2207/50—All digital phase-locked loop
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- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
The invention discloses a method for setting initial values of capture capacitor array control words in an all-digital phase-locked loop. In order to solve the technical problem that the full digital phase-locked loop in the prior art cannot cover a larger temperature range, the invention counts the reference clock through the temperature sensor, and the obtained count value is in direct proportion to the temperature; setting the initial value of the control word of the capture capacitor array as an initial value C according to the obtained count value; starting an all-digital phase-locked loop; the initial value C is a value satisfying (C-C L )/(C H ‑C L ) And (T-T) L )/(T H ‑T L ) Capture capacitor array control word with the difference closest to 0, C L And C H Respectively a minimum control word and a maximum control word of the capture capacitor array, T is the temperature corresponding to the obtained count value, T L And T H The rated minimum operating temperature and the rated maximum operating temperature, respectively. The invention dynamically captures the ambient temperature and stores the ambient temperatureThe optimal initial value C is set, so that the technical problem that the coverage temperature range of the all-digital phase-locked loop is narrow is solved, and the chip can adapt to wider temperature coverage range.
Description
Technical Field
The invention relates to the field of integrated circuits, in particular to a method for setting initial values of a capture capacitor array in an all-digital phase-locked loop through a temperature sensor with one-time correction.
Background
The all-digital Phase-locked Loop (All Digital Phase Lock Loop, ADPLL) refers to a circuit module for locking the reference clock frequency and the Phase realized by the all-digital Loop except for a voltage-controlled oscillator (Voltage Controlled Oscillator, VCO), and is a kind of Phase-locked Loop (PLL), which is mainly used in the field of clock and data interfaces.
The oscillator in the all-digital phase-locked loop includes a process capacitor array (Process Capacitor Bank, PCB), a capture capacitor array (Acquire Capacitor Bank, ACB), a tracking capacitor array (Track Capacitor Bank, TCB). The process capacitor array mainly covers frequency change caused by process deviation, the capture capacitor array is mainly used for covering frequency change caused by temperature change, and the tracking capacitor array is used for tracking loop locking.
In an all-digital phase-locked loop, in order to meet the frequency oscillation range of the whole voltage-controlled oscillator, a digital control word with 6-7 bits is generally adopted and is applied to a capture capacitor array to cover the temperature change.
In the prior art, the initial value of the capture capacitor array is usually set at an intermediate value, and when the all-digital phase-locked loop is started at different temperatures, half of the capture capacitor array is used for covering the temperature change. For example, when the full digital phase-locked loop is started at low temperature, the upper half area of the capture capacitor array is used for covering the frequency change caused by the temperature change; when the full digital phase-locked loop is started at a high temperature, the lower half area of the capture capacitor array is used for covering frequency change caused by temperature change; when the full digital phase-locked loop is started at medium temperature, the control words near the middle of the capture capacitor array are used to cover the frequency change caused by the temperature change.
When the full digital phase-locked loop is started at high temperature or low temperature, the capturing capacitor array can only cover the influence of frequency change caused by temperature change by using half of control words. At high and low temperatures, the capacity of the capture capacitor array to cover the temperature range will be halved. For manufacturing processes in which temperature changes have a great influence on frequency changes, it is difficult in the prior art to meet the influence of the frequency coverage large temperature change range of the capture capacitor array control on the frequency changes.
In other words, for applications of the voltage controlled oscillator frequency oscillation range with a larger temperature range, the oscillator frequency range controllable by the 6-7 bit capture capacitor array control word is difficult to cover the range of-40 ℃ to 125 ℃.
Based on the method, the invention provides a method for capturing the initial value of the capacitor array control word in the setting all-digital phase-locked loop, which can cover a large temperature range.
Disclosure of Invention
In order to alleviate or partially alleviate the above technical problem, the solution of the present invention is as follows:
a method for setting an initial value of a capture capacitor array control word in an all-digital phase-locked loop, comprising the steps of: counting a reference clock by a temperature sensor, wherein the obtained count value is in direct proportion to the temperature; setting the initial value of the control word of the capture capacitor array as an initial value C according to the obtained count value; starting an all-digital phase-locked loop; and the initial value C is a value satisfying (C-C L )/(C H -C L ) And (T-T) L )/(T H -T L ) A capture capacitor array control word with a difference closest to 0, where C L To capture the minimum control word of the capacitor array, C H To capture the maximum control word of the capacitor array, T is the temperature corresponding to the obtained count value, T L For rated minimum operating temperature, T H Is rated as the highest operating temperature.
In an embodiment, before using the temperature sensor to count the reference clock, the method further comprises the steps of: correcting the temperature sensor.
In an embodiment, the temperature sensor comprises a ring oscillator.
In one embodiment, the 25MHz reference clock is counted by the ring oscillator in the temperature sensor at 25 ℃ and compared to the simulated value, and the comparison is fed back to the ring oscillator and the ring oscillator tail current is adjusted to adjust the ring oscillator oscillation frequency.
In one embodiment, the calibration step is completed by writing the ring oscillator tail current control word into a lookup table according to the ring oscillator tail current and programming the programming configuration once.
In one embodiment, the temperature sensor is turned off after the capture capacitor array control word initial value is set.
In one embodiment, the nominal minimum operating temperature T L -40 ℃, said nominal maximum operating temperature T H =125℃。
In one embodiment, the initial value C is the minimum control word for the capture capacitor array when at the nominal minimum operating temperature.
In one embodiment, the initial value C is the maximum control word of the capture capacitor array at the nominal maximum operating temperature.
In one embodiment, the all-digital phase-locked loop is applied to a clock and data interface chip.
The technical scheme of the invention has one or more of the following beneficial technical effects:
(1) The temperature sensor is used for monitoring the temperature of a chip when the all-digital phase-locked loop is started, and different initial values of control words of the capture capacitor array are configured according to the corresponding temperatures, so that the maximization of the frequency coverage utilization rate corresponding to the capture capacitor array is ensured;
(2) Correcting the temperature sensor at normal temperature, and ensuring that the accuracy of all process corner chip temperature sensors meets the requirement;
(3) The temperature sensor correction value finishes solidifying the tail current of the temperature sensor by one-time programming, so that the temperature sensor does not need to be corrected in the subsequent chip use process;
(4) The ring oscillator is used as a temperature sensor, so that the reference clock is simply and reliably counted, and the counting and conversion between the counting value and the control word of the capture capacitor array are facilitated.
Furthermore, other advantageous effects that the present invention has will be mentioned in the specific embodiments.
Drawings
FIG. 1 is a flow chart of a method of setting initial values of a capture capacitor array control word in an all-digital phase-locked loop;
fig. 2 is a schematic block diagram of a temperature sensor correction scheme.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is apparent that the described embodiments are some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The all-digital phase-locked loop is applied to clock and data interface chips.
Referring to fig. 1, a flow chart for setting the initial value of the capture capacitor array by a temperature sensor is presented. The method comprises the following steps:
step S1: correcting the temperature sensor.
The calibration temperature sensor usually occurs when the chip leaves the factory, and is a disposable calibration program, once calibration is completed, the chip does not need to be repeatedly calibrated in the subsequent use process, and the step S2 is directly entered.
Because the chips have process deviation and different chip temperature sensors have differences, when the chips leave the factory, the temperature sensor is corrected, and all the chips can be ensured to have the same temperature sensor.
Preferably, the temperature sensor is implemented with a ring oscillator that is positively correlated to temperature, which is proportional to the oscillation frequency of the ring oscillator.
Referring to fig. 2, the method for correcting the temperature sensor includes the steps of:
step S101: for example, the chip is electrified at the normal temperature of 25 ℃, a ring oscillator which is positively correlated with the temperature in a temperature sensor is used for counting a reference clock of 25MHz and comparing the reference clock with a simulation value, then the comparison result is fed back to the ring oscillator, and the tail current of the ring oscillator is adjusted so as to adjust the oscillation frequency of the ring oscillator;
step S102: and obtaining the tail current of the ring oscillator for correction according to the correction process, writing the tail current control word of the ring oscillator into a lookup table, and completing the one-time correction through one-time programming and programming configuration. In the subsequent use process, the chip will not repeatedly calibrate the temperature sensor.
Step S2: the temperature sensor counts a reference clock.
During the general use of the chip, according to different chip use temperatures, the ring oscillator in the temperature sensor counts the reference clock and obtains a count value, and the count value is proportional to the temperature.
Step S3: setting the initial value of the control word of the capture capacitor array.
The initial value is also referred to herein as an initial value. After step S2, the initial value of the capture capacitor array is then set according to the count value proportional to the temperature. Specifically, the temperature (T) corresponding to the obtained count value is set at the rated minimum operating temperature (T L ) And rated maximum operating temperature (T) H ) The position between the ranges (T-T L )/(T H -T L ) And the initial value (C) of the control word of the capture capacitor array is set at the minimum control word (C L ) And a maximum control word (C) of the capture capacitor array H ) Positions between the ranges (C-C L )/(C H -C L ) Equal or closest.
In other words, the initial value C is a value satisfying (C-C L )/(C H -C L ) And (T-T) L )/(T H -T L ) A capture capacitor array control word with a difference closest to 0, where C L To capture the minimum control word of the capacitor array, C H To capture the maximum control word of the capacitor array, T is the temperature corresponding to the obtained count value, T L For rated minimum operationTemperature, T H Is rated as the highest operating temperature.
For example, the initial values of different capture capacitor arrays are set according to different count values, and may be: when a chip with the temperature of-40 ℃ (rated minimum working temperature) is started, the initial value of the capture capacitor array is set to be the minimum value by the temperature sensor, so that the upper half area of the whole capture capacitor array can be used for covering frequency change caused by temperature; when the chip is started at 125 ℃ (rated highest working temperature), the temperature sensor sets the initial value of the control word of the capture capacitor array at the maximum value, so that the lower half area of the whole capture capacitor array can be used for covering frequency change caused by temperature.
By the method, the influence of frequency change caused by temperature change can be effectively covered by the control word used by the capture capacitor array.
Further, after the initial value setting/setting of the capacitor array to be captured is completed, the temperature sensor module is turned off, that is, the temperature sensor does not introduce extra noise and power consumption.
Step S4: an all-digital phase-locked loop is started.
The step is a step of starting the all-digital phase-locked loop conventionally, and the all-digital phase-locked loop can start to work normally and can cover the temperature change to the maximum extent.
The temperature sensor is used for monitoring the temperature, and the control word with the corresponding temperature is configured for the capture capacitor array, so that the maximization of the frequency coverage temperature range of the capture capacitor array can be ensured.
Numerous specific details are set forth in the above description in order to provide a better illustration of the invention. It will be understood by those skilled in the art that the present invention may be practiced without some of these specific details. In some instances, well known methods, procedures, components, and circuits have not been described in detail so as not to obscure the present invention.
The foregoing is merely illustrative of the present invention, and the present invention is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. A method for setting an initial value of a capture capacitor array control word in an all-digital phase-locked loop, comprising the steps of:
counting a reference clock by a temperature sensor, wherein the obtained count value is in direct proportion to the temperature;
setting the initial value of the control word of the capture capacitor array as an initial value C according to the obtained count value;
starting an all-digital phase-locked loop;
and the initial value C is a value satisfying (C-C L )/(C H -C L ) And (T-T) L )/(T H -T L ) A capture capacitor array control word with a difference closest to 0, where C L To capture the minimum control word of the capacitor array, C H To capture the maximum control word of the capacitor array, T is the temperature corresponding to the obtained count value, T L For rated minimum operating temperature, T H Is rated as the highest operating temperature.
2. The method for setting the initial value of the capture capacitor array control word in an all-digital phase-locked loop of claim 1, wherein:
before using the temperature sensor to count the reference clock, the method further comprises the following steps:
correcting the temperature sensor.
3. The method for setting the initial value of the capture capacitor array control word in an all-digital phase-locked loop of claim 2, wherein:
the temperature sensor includes a ring oscillator.
4. A method of setting an initial value of a capture capacitor array control word in an all-digital phase-locked loop as claimed in claim 3, wherein:
the reference clock of 25MHz is counted by a ring oscillator in the temperature sensor at 25 ℃, and compared with a simulation value, and then the comparison result is fed back to the ring oscillator, and the tail current of the ring oscillator is adjusted to adjust the oscillation frequency of the ring oscillator.
5. The method for setting the initial value of the capture capacitor array control word in an all-digital phase-locked loop of claim 4, wherein:
and writing a ring oscillator tail current control word into a lookup table according to the ring oscillator tail current, and completing the correction step through one-time programming configuration.
6. The method for setting the initial value of the capture capacitor array control word in an all-digital phase-locked loop of claim 5, wherein:
and after the initial value of the control word of the capture capacitor array is set, closing the temperature sensor.
7. The method for setting the initial value of the capture capacitor array control word in an all-digital phase-locked loop of claim 6, wherein:
said nominal minimum operating temperature T L -40 ℃, said nominal maximum operating temperature T H =125℃。
8. The method of setting an initial value of a capture capacitor array control word in an all-digital phase-locked loop of claim 7, wherein:
at rated minimum operating temperature T L And when the initial value C is the minimum control word of the capture capacitor array.
9. The method of setting a capture capacitor array control word initial value in an all-digital phase-locked loop of claim 8, wherein:
at the rated maximum operating temperature, the initial value C is the maximum control word for the capture capacitor array.
10. The method of setting an initial value of a capture capacitor array control word in an all-digital phase-locked loop of claim 9, wherein:
the all-digital phase-locked loop is applied to a clock and data interface chip.
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