CN117805535A - Input offset voltage test circuit and method for high-speed comparator - Google Patents
Input offset voltage test circuit and method for high-speed comparator Download PDFInfo
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Abstract
The invention discloses a circuit and a method for testing input offset voltage of a high-speed comparator, wherein the circuit comprises a device under test DUT; the non-inverting input end of the DUT is connected with the voltage Vin; the inverting input end of the DUT is respectively connected with the input end of the first buffer BUF, one end of the capacitor C and one end of the feedback resistor R; the other end of the capacitor C is connected with one end of the discharge resistor R' and grounded; the other end of the discharging resistor R' is connected with one end of a feedback resistor R through a switch K, and the other end of the feedback resistor R is connected with an output end Vout1 of a device under test DUT; the output terminal of the first buffer BUF is connected to one terminal of the first resistor RI. The invention can accurately test the input offset voltage of the high-speed comparator; the requirement on equipment capacity is greatly reduced, the method is suitable for development of various integrated circuit test systems, and automatic mass production test can be conveniently realized.
Description
Technical Field
The invention belongs to the field of high-speed comparator testing, and particularly relates to a circuit and a method for testing input offset voltage of a high-speed comparator.
Background
The input offset voltage of the high-speed comparator is generally tested by adopting a scanning method, one input end of the comparator is fixed to a certain regulated voltage, the other input end is scanned in a step mode, when the output voltage just jumps, two positive and negative threshold points are measured, and the average value of the positive and negative threshold points is calculated, namely the input offset voltage is obtained.
The test precision of the existing method is completely dependent on the equipment precision, if the equipment precision is not high, the test result precision is not high, and high-precision program control source equipment is required to be used to ensure the test result precision. However, the high-precision program control source equipment has high requirements on environment, needs professional maintenance, has high manufacturing cost and is not beneficial to industrialization.
Disclosure of Invention
In order to solve the problems in the prior art, the invention provides a high-speed comparator input offset voltage test circuit and a high-speed comparator input offset voltage test method, which are used for solving the problems in the background art.
In order to achieve the above purpose, the present invention provides the following technical solutions:
a high-speed comparator input offset voltage test circuit comprises a device under test DUT;
the non-inverting input end of the DUT is connected with voltage Vin; the inverting input end of the DUT is respectively connected with the input end of the first buffer BUF, one end of the capacitor C and one end of the feedback resistor R;
the other end of the capacitor C is connected with one end of the discharge resistor R' and grounded; the other end of the discharging resistor R' is connected with one end of a feedback resistor R through a switch K, and the other end of the feedback resistor R is connected with an output end Vout1 of a device under test DUT;
the output end of the first buffer BUF is connected with one end of the first resistor RI; the other end of the first resistor RI is connected with the inverting input end of the differential operational amplifier OPA; the non-inverting input end of the differential operational amplifier OPA is respectively connected with the other end of the second resistor RI and one end of the first loop resistor RF, and one end of the second resistor RI is connected with the output end of the second buffer BUF; the input end of the second buffer BUF is connected with the voltage Vin; the other end of the first loop resistor RF is grounded; the inverting input and output of the differential operational amplifier OPA are connected in parallel with a second loop resistor RF.
Preferably, the first resistor RI and the second resistor RI are high-precision resistors.
Preferably, the resistances of the first resistor RI and the second resistor RI are the same.
Preferably, the formula of the voltage Vin is: vin=1/2×vcc1.
Preferably, the capacitance C has a capacitance in the range of 5uF to 50uF.
Preferably, the resistance value of the feedback resistor R ranges from 10kΩ to 100kΩ.
A method for testing input offset voltage of high-speed comparator comprises,
and connecting the non-inverting input end of the DUT with the voltage Vin, outputting triangular waves by the output end of the differential operational amplifier OPA when the pressure difference between the non-inverting input end and the inverting input end of the DUT enters the periodical change, measuring a plurality of period average values Vout2, and calculating according to the triangular wave plurality of period average values Vout2 to obtain offset voltage Vos.
Preferably, the DUT feeds back the output high level to the capacitor C of the inverting input end through the feedback resistor R, the capacitor C is charged, the voltage of the inverting input end is linearly increased, compared with the input voltage of the non-inverting input end, when the voltage difference between the non-inverting input end and the inverting input end reaches a negative threshold value, the output jumps to be low level, the capacitor C is discharged at the moment, the voltage of the inverting input end is linearly reduced, when the input voltage difference reaches a positive threshold value, the output jumps back to be high level, the voltage difference between the non-inverting input end and the inverting input end always changes in a periodical triangle within the threshold value range, and the average value of the periodical waveform is the input offset voltage.
Preferably, the offset voltage Vos formula is:
Vos＝Vout2/G
wherein G is the differential operational amplifier OPA loop amplification factor.
Further, the formula of the differential operational amplifier OPA loop amplification factor G is:
G＝(RF+RI)/RI。
compared with the prior art, the invention has the following beneficial technical effects:
the invention provides a method for testing input offset voltage of a high-speed comparator, which is characterized in that the input differential voltage of the comparator is just clamped in a threshold voltage range by utilizing the charge and discharge characteristics of a capacitor, and then amplified and measured by a differential amplifying circuit, so that the offset voltage is finally calculated. The invention has low requirement on equipment precision, can be conveniently applied to various integrated circuit test systems, and realizes mass production test. The invention can accurately test the input offset voltage of the high-speed comparator; the requirement on equipment capacity is greatly reduced, the method is suitable for development of various integrated circuit test systems, and automatic mass production test can be conveniently realized.
Drawings
Fig. 1 is a schematic diagram of a offset voltage test.
FIG. 2 is a schematic diagram of offset voltage definition.
Detailed Description
The invention will now be described in further detail with reference to specific examples, which are intended to illustrate, but not to limit, the invention.
Examples
As shown in FIG. 1, the input offset voltage test circuit of the high-speed comparator comprises a device under test DUT, a first buffer BUF, a capacitor C, a feedback resistor R, a discharge resistor R', a first resistor RI, a differential operational amplifier OPA, a second resistor RI, a second buffer BUF, a first loop resistor RF and a second loop resistor RF.
The non-inverting input end of the DUT is connected with the voltage Vin; the inverting input end of the DUT is respectively connected with the input end of the first buffer BUF, one end of the capacitor C and one end of the feedback resistor R.
The other end of the capacitor C is connected with one end of the discharge resistor R' and grounded; the other end of the discharging resistor R' is connected with one end of the feedback resistor R through the switch K, and the other end of the feedback resistor R is connected with the output end Vout1 of the DUT.
The output end of the first buffer BUF is connected with one end of the first resistor RI; the other end of the first resistor RI is connected with the inverting input end of the differential operational amplifier OPA; the non-inverting input end of the differential operational amplifier OPA is respectively connected with the other end of the second resistor RI and one end of the first loop resistor RF, and one end of the second resistor RI is connected with the output end of the second buffer BUF; the input end of the second buffer BUF is connected with the voltage Vin; the other end of the first loop resistor RF is grounded; the inverting input and output of the differential operational amplifier OPA are connected in parallel with a second loop resistor RF.
The invention relates to a method for testing input offset voltage of a high-speed comparator, which comprises the following steps,
and connecting the non-inverting input end of the DUT with the voltage Vin, outputting triangular waves by the output end of the differential operational amplifier OPA when the pressure difference between the non-inverting input end and the inverting input end of the DUT enters the periodical change, measuring a plurality of period average values Vout2, and calculating according to the triangular wave plurality of period average values Vout2 to obtain offset voltage Vos.
Specifically, the DUT feeds back the output high level to the capacitor C of the inverting input end through the feedback resistor R, the capacitor C is charged, the voltage of the inverting input end is linearly increased, compared with the input voltage of the non-inverting input end, when the voltage difference between the non-inverting input end and the inverting input end reaches a negative threshold value, the output jumps to the low level, the capacitor C is discharged at the moment, the voltage of the inverting input end is linearly reduced, when the input voltage difference reaches a positive threshold value, the output jumps back to the high level, the voltage difference between the non-inverting input end and the inverting input end always changes in a periodical triangle within the threshold value range, and the average value of the periodical waveform is the input offset voltage.
Aiming at the defects of the existing test method, the invention designs a set of test method with high feasibility. The method ingeniously utilizes the charge and discharge characteristics of the capacitor, clamps the input differential voltage of the comparator within the threshold range, and then uses the differential amplifying circuit to amplify and measure, and finally calculates the offset voltage. The method has low requirements on equipment precision, and can be very conveniently applied to various integrated circuit test systems to realize mass production test.
The method comprises the steps of fixing a non-inverting input end of a high-speed comparator to a specified direct-current voltage, feeding an output high level back to an inverting input end through a resistor to ground a capacitor, charging the capacitor, linearly increasing the voltage of the inverting port, comparing with the input voltage of the other end, jumping the output to a low level when the voltage difference of the two input ends just reaches a negative threshold value, discharging the capacitor, linearly reducing the voltage of the inverting input end, jumping the output to the high level when the voltage difference of the input end reaches a positive threshold value, enabling the voltage difference of the two input ends to always change in a periodical triangle within the threshold value range, enabling the average value of the periodical waveform to be the input offset voltage, forming a differential amplifying circuit by using a high-precision operational amplifier and a buffer, amplifying differential signals of the two input ends, measuring amplified signals, and calculating to obtain the input offset voltage.
The invention relates to an operation scheme of a high-speed comparator input offset voltage testing method,
1. connecting lines according to FIG. 1 to form a high-speed comparator offset voltage test line;
2. and (3) normally supplying power to a circuit, applying a specified direct-current voltage Vin to the non-inverting input end of the DUT, and when the voltage difference of the two input ends of the high-speed comparator is periodically changed, outputting a triangular wave by the test differential amplification part OPA for a plurality of period average values Vout2, and calculating offset voltage Vos according to a formula (1).
Vos=vout 2/G equation (1)
In the formula (1), G is the differential operational amplifier OPA loop amplification factor, g= (rf+ri)/RI.
3. After the line is powered down, the switch K is closed, and the capacitor C is discharged.
4. And (3) carrying out automatic processing on the steps 1, 2 and 3 based on an integrated circuit testing system.
Specifically, in the high-speed comparator input offset voltage test circuit in this embodiment, the buffer BUF and the differential operational amplifier OPA must be of high bandwidth, so as to prevent distortion of the test result; the buffer BUF in this embodiment is preferably BUF634, and the differential operational amplifier OPA is preferably OP37A.
The differential operational amplifier OPA has ultralow offset (tens of uV), the loop resistor RF and the first resistor RI use high-precision resistors, and the circuit test precision is improved; in this embodiment, the resistance of the loop resistor RF is preferably 100deg.C, and the resistance of the first resistor RI is calculated according to the multiple G.
The leakage current of the capacitor C is small, the feedback resistor R is universal, and the resistance value of the resistor R' for discharging is small, generally tens of ohms. In this embodiment, the capacitance C is preferably 5uF to 50uF, and the feedback resistance R is preferably 10KΩ to 100KΩ.
The frequency of the input end sawtooth wave can be controlled by adjusting the feedback resistor R and the capacitor C, and the frequency of the input end sawtooth wave cannot exceed the bandwidths of the buffer BUF and the differential operational amplifier OPA.
The offset voltage of the high-speed comparator is in mV level generally, the influence of the OPA offset voltage of the ultra-low offset operational amplifier can be ignored, the loop multiple G is set reasonably, and the voltage after calculation and amplification according to the DUT offset voltage tolerance of the tested device is required to be in the operational linear output range so as to ensure the accuracy of the test result.
The input voltage of the high-speed comparator is changed in a periodical triangle during testing, and the average value of a plurality of periods of the waveform is the offset voltage (see fig. 2). Therefore, the average value Vout2 of the differential operational amplifier OPA output is measured, and the offset voltage Vos can be calculated according to the formula (1).
If the high-bandwidth ultralow-offset differential operational amplifier OPA is not found in actual test development, an operational amplifier with larger offset voltage can be used, but the actual offset voltage value of the differential operational amplifier OPA must be measured, and the offset voltage value is calculated and removed in a test result.
The invention clamps the input voltage of the tested device within the threshold range and periodically changes to obtain a stable signal. The differential operational amplifier is used for amplifying the input signal for measurement, so that the requirement on equipment precision is greatly reduced. The specific embodiment of the invention can realize the test of the input offset voltage of the high-speed comparator, can be very conveniently prolonged to the test of common mode rejection ratio, power supply voltage rejection ratio and other parameters related to the offset voltage test, and is also the point to be protected.
The invention describes the method for testing the input offset voltage of the high-speed comparator in more detail, but the method is not limited by the scope of the invention. It should be noted that it is possible for a person skilled in the art to make several variants and modifications without departing from the concept of the invention, which fall within the scope of protection of the invention. Accordingly, the scope of the invention should be assessed as that of the appended claims.
While the fundamental and principal features of the invention and advantages of the invention have been shown and described, it will be apparent to those skilled in the art that the invention is not limited to the details of the foregoing exemplary embodiments, but may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Furthermore, it should be understood that although the present disclosure describes embodiments, not every embodiment is provided with a separate embodiment, and that this description is provided for clarity only, and that the disclosure is not limited to the embodiments described in detail below, and that the embodiments described in the examples may be combined as appropriate to form other embodiments that will be apparent to those skilled in the art. The above is only for illustrating the technical idea of the present invention, and the protection scope of the present invention is not limited by this, and any modification made on the basis of the technical scheme according to the technical idea of the present invention falls within the protection scope of the claims of the present invention.
Claims (10)
1. A high-speed comparator input offset voltage test circuit is characterized by comprising a device under test DUT;
the non-inverting input end of the DUT is connected with voltage Vin; the inverting input end of the DUT is respectively connected with the input end of the first buffer BUF, one end of the capacitor C and one end of the feedback resistor R;
the other end of the capacitor C is connected with one end of the discharge resistor R' and grounded; the other end of the discharging resistor R' is connected with one end of a feedback resistor R through a switch K, and the other end of the feedback resistor R is connected with an output end Vout1 of a device under test DUT;
the output end of the first buffer BUF is connected with one end of the first resistor RI; the other end of the first resistor RI is connected with the inverting input end of the differential operational amplifier OPA; the non-inverting input end of the differential operational amplifier OPA is respectively connected with the other end of the second resistor RI and one end of the first loop resistor RF, and one end of the second resistor RI is connected with the output end of the second buffer BUF; the input end of the second buffer BUF is connected with the voltage Vin; the other end of the first loop resistor RF is grounded; the inverting input and output of the differential operational amplifier OPA are connected in parallel with a second loop resistor RF.
2. The high-speed comparator input offset voltage test circuit according to claim 1, wherein the first resistor RI and the second resistor RI are high-precision resistors.
3. The circuit of claim 1, wherein the first resistor RI and the second resistor RI have the same resistance.
4. The high-speed comparator input offset voltage test circuit of claim 1, wherein the formula of the voltage Vin is: vin=1/2×vcc1.
5. The circuit for testing input offset voltage of high-speed comparator according to claim 1, wherein the capacitance of the capacitor C ranges from 5uF to 50uF.
6. The circuit for testing input offset voltage of high-speed comparator according to claim 1, wherein the resistance value of the feedback resistor R ranges from 10KΩ to 100KΩ.
7. A method for testing input offset voltage of a high-speed comparator is characterized by comprising the steps of,
and connecting the non-inverting input end of the DUT with the voltage Vin, outputting triangular waves by the output end of the differential operational amplifier OPA when the pressure difference between the non-inverting input end and the inverting input end of the DUT enters the periodical change, measuring a plurality of period average values Vout2, and calculating according to the triangular wave plurality of period average values Vout2 to obtain offset voltage Vos.
8. The method for testing input offset voltage of high-speed comparator according to claim 7, wherein the DUT feeds back the output high level to the capacitor C of the inverting input terminal through the feedback resistor R, the capacitor C is charged, the voltage of the inverting input terminal is linearly increased, compared with the input voltage of the non-inverting input terminal, when the voltage difference between the non-inverting input terminal and the inverting input terminal reaches the negative threshold value, the output jumps to the low level, the voltage of the inverting input terminal is linearly decreased, when the input voltage difference reaches the positive threshold value, the output jumps back to the high level, the voltage difference between the non-inverting input terminal and the inverting input terminal is periodically triangular within the threshold value all the time, and the average value of the periodic waveform is the input offset voltage.
9. The method for testing input offset voltage of high-speed comparator according to claim 7, wherein the offset voltage Vos formula is:
Vos＝Vout2/G
wherein G is the differential operational amplifier OPA loop amplification factor.
10. The method for testing input offset voltage of high-speed comparator according to claim 9, wherein the formula of the differential operational amplifier OPA loop amplification factor G is:
G＝(RF+RI)/RI。
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