CN117784143A - Detection circuit, detection method and detection device thereof - Google Patents

Detection circuit, detection method and detection device thereof Download PDF

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Publication number
CN117784143A
CN117784143A CN202211148077.4A CN202211148077A CN117784143A CN 117784143 A CN117784143 A CN 117784143A CN 202211148077 A CN202211148077 A CN 202211148077A CN 117784143 A CN117784143 A CN 117784143A
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China
Prior art keywords
electrode
detection
circuit
acquisition circuit
signal
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CN202211148077.4A
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Chinese (zh)
Inventor
王玉波
李扬冰
崔亮
赵宇鹏
马媛媛
佟月
曹永刚
王雷
勾越
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BOE Technology Group Co Ltd
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BOE Technology Group Co Ltd
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Priority to CN202211148077.4A priority Critical patent/CN117784143A/en
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Abstract

Detection circuit, detection method and detection device thereof, and relates to the technical field of detection. The detection circuit includes: the device comprises an ultrasonic sensor, a first acquisition circuit, a second acquisition circuit and a conversion processing module; wherein the ultrasonic sensor comprises a first electrode and a second electrode configured to convert a received ultrasonic signal into an electrical signal; the first acquisition circuit is connected with the first electrode and the conversion processing module and is configured to acquire an electric signal on the first electrode and output the first electric signal to the conversion processing module; the second acquisition circuit is connected with the second electrode and the conversion processing module and is configured to acquire the electric signal on the second electrode and output the second electric signal to the conversion processing module; and the conversion processing module is configured to amplify the difference value of the first electric signal and the second electric signal and perform analog-to-digital conversion processing on the amplified result so as to output a detection signal.

Description

Detection circuit, detection method and detection device thereof
Technical Field
The disclosure relates to the technical field of detection, and in particular relates to a detection circuit, a detection method and a detection device thereof.
Background
Ultrasonic waves are widely applied to the fields of industrial nondestructive inspection, distance measurement and thickness measurement, agricultural ultrasonic breeding, ultrasonic seeding and ultrasonic induced spawning, biomedical diagnosis and operation, fingerprint identification in consumer electronics products and the like.
Disclosure of Invention
The present disclosure provides a detection circuit comprising: the device comprises an ultrasonic sensor, a first acquisition circuit, a second acquisition circuit and a conversion processing module;
wherein the ultrasonic sensor comprises a first electrode and a second electrode configured to convert a received ultrasonic signal into an electrical signal;
the first acquisition circuit is connected with the first electrode and the conversion processing module, and is configured to acquire an electric signal on the first electrode and output the first electric signal to the conversion processing module;
the second acquisition circuit is connected with the second electrode and the conversion processing module and is configured to acquire the electric signal on the second electrode and output a second electric signal to the conversion processing module;
the conversion processing module is configured to amplify the difference value between the first electric signal and the second electric signal, and perform analog-to-digital conversion processing on the amplified result to output a detection signal.
In some alternative embodiments, the first acquisition circuit and the second acquisition circuit have the same circuit structure.
In some alternative embodiments, the conversion processing module includes a differential amplification circuit and an analog-to-digital conversion circuit;
the positive phase input end of the differential amplifying circuit is connected with the first acquisition circuit, the negative phase input end of the differential amplifying circuit is connected with the second acquisition circuit, and the output end of the differential amplifying circuit is connected with the analog-to-digital conversion circuit.
In some alternative embodiments, the analog-to-digital conversion circuit includes a differential analog-to-digital converter, and two input ends of the differential analog-to-digital converter are respectively connected to different output ends of the differential amplifying circuit.
In some alternative embodiments, the first acquisition circuit and the second acquisition circuit each comprise:
the reset module is respectively connected with a first voltage end, a first node and an electrode of the ultrasonic sensor and is configured to write a first voltage signal input by the first voltage end into the first node and the electrode of the ultrasonic sensor; and
the output module is respectively connected with the first node, the first control end, the second voltage end and the conversion processing module, and is configured to respond to a first control signal input by the first control end, generate a current signal according to the voltage signal of the first node and a second voltage signal input by the second voltage end, and output the current signal to the conversion processing module, wherein the current signal is the first electric signal or the second electric signal.
In some alternative embodiments, the reset module includes:
and the first electrode of the diode is connected with the first voltage end, and the second electrode of the diode is connected with the first node and the electrode of the ultrasonic sensor.
In some alternative embodiments, the reset module includes:
the control electrode of the first transistor is connected with the second control end, the first electrode is connected with the first voltage end, and the second electrode is connected with the first node and the electrode of the ultrasonic sensor; the second control end is used for inputting a second control signal.
In some alternative embodiments, the output module includes a second transistor and a third transistor;
the control electrode of the second transistor is connected with the first node, the first electrode of the second transistor is connected with the second voltage end, and the second electrode of the second transistor is connected with the first electrode of the third transistor;
and the control electrode of the third transistor is connected with the first control end, and the second electrode of the third transistor is connected with the conversion processing module.
In some alternative embodiments, the output module further comprises:
and the first polar plate is connected with the grid electrode of the second transistor, and the second polar plate is connected with the fixed voltage end.
In some alternative embodiments, the first acquisition circuit and the second acquisition circuit further comprise:
and the blocking module is respectively connected with the third control end, the electrode of the ultrasonic sensor and the first node and is configured to respond to a third control signal input by the third control end to conduct or break the connection between the electrode of the ultrasonic sensor and the first node.
In some alternative embodiments, the barrier module comprises:
and a control electrode of the fourth transistor is connected with the third control end, a first electrode of the fourth transistor is connected with an electrode of the ultrasonic sensor, and a second electrode of the fourth transistor is connected with the first node.
The present disclosure provides a detection device comprising a detection circuit as described in any one of the embodiments.
In some alternative embodiments, the detection device includes a detection substrate including:
a substrate;
a transistor layer disposed on one side of the substrate and including at least one of the first acquisition circuit, the second acquisition circuit, and the conversion processing module;
a first electrode layer disposed on a side of the transistor layer facing away from the substrate, the first electrode layer including a plurality of first electrodes spaced apart from each other;
The piezoelectric material layer is arranged on one side of the first electrode layer, which is away from the substrate; and
the second electrode layer is arranged on one side of the piezoelectric material layer, which is away from the substrate, and comprises a plurality of second electrodes which are mutually separated;
wherein orthographic projections of the first electrode layer, the piezoelectric material layer, and the second electrode layer on the substrate respectively overlap at least partially.
In some alternative embodiments, the detection device includes: a detection substrate and a driving chip connected with the detection substrate;
the ultrasonic sensor, the first acquisition circuit and the second acquisition circuit are arranged in the detection substrate, and the conversion processing module is arranged in the detection substrate and/or the driving chip.
In some alternative embodiments, the detection device comprises a plurality of detection units;
a plurality of the detection units each independently include the detection circuit; or,
the plurality of detection units each independently comprise the ultrasonic sensor, the first acquisition circuit and the second acquisition circuit, and share the conversion processing module.
In some alternative embodiments, the detection device further comprises at least one of:
A sound source device configured to emit an ultrasonic signal;
an imaging device configured to generate an ultrasound image from the detection signal; and
and a display device configured to display the ultrasound image.
The present disclosure provides a detection method applied to the detection circuit according to any one of the embodiments, the detection method including:
transmitting an ultrasonic signal to a target object so that the ultrasonic sensor receives the ultrasonic signal reflected by the target object;
the control signals are provided for the first acquisition circuit and the second acquisition circuit, so that the first acquisition circuit acquires the electric signals on the first electrode and outputs the first electric signals to the conversion processing module, the second acquisition circuit acquires the electric signals on the second electrode and outputs the second electric signals to the conversion processing module, and the conversion processing module amplifies the difference value between the first electric signals and the second electric signals and performs analog-to-digital conversion processing on the amplified result to output detection signals.
In some alternative embodiments, when the first acquisition circuit and the second acquisition circuit have the same circuit structure, the control signals provided to the first acquisition circuit and the second acquisition circuit are the same.
In some alternative embodiments, when the first acquisition circuit and the second acquisition circuit each include the reset module and the output module, and the reset module is respectively connected to a first voltage terminal, a first node, and an electrode of the ultrasonic sensor, and the output module is respectively connected to the first node, a first control terminal, a second voltage terminal, and the conversion processing module, the step of providing control signals to the first acquisition circuit and the second acquisition circuit includes:
in a resetting stage, controlling the resetting module to be started so as to write a first voltage signal input by the first voltage end into the first node and an electrode of the ultrasonic sensor;
in a sampling stage, controlling the reset module to be closed so as to enable an electric signal generated by an electrode of the ultrasonic sensor to be written into the first node;
in the output stage, a first control signal capable of starting the output module is provided for the first control end, so that the output module generates a current signal according to the voltage signal of the first node and the second voltage signal input by the second voltage end, and the current signal is output to the conversion processing module, wherein the current signal is the first electric signal or the second electric signal.
In some alternative embodiments, when the first acquisition circuit and the second acquisition circuit further include a blocking module, and the blocking module is connected to a third control terminal, an electrode of the ultrasonic sensor, and the first node, respectively, the step of providing control signals to the first acquisition circuit and the second acquisition circuit further includes:
providing a third control signal capable of starting the blocking module to the third control end in the resetting stage and the sampling stage so that the blocking module conducts connection between the electrode of the ultrasonic sensor and the first node;
after the sampling phase, a third control signal capable of closing the blocking module is provided to the third control terminal, so that the blocking module breaks the connection between the electrode of the ultrasonic sensor and the first node.
The foregoing description is merely an overview of the technical solutions of the present disclosure, and may be implemented according to the content of the specification in order to make the technical means of the present disclosure more clearly understood, and in order to make the above and other objects, features and advantages of the present disclosure more clearly understood, the following specific embodiments of the present disclosure are specifically described.
Drawings
In order to more clearly illustrate the embodiments of the present disclosure or the technical solutions in the related art, a brief description will be given below of the drawings required for the embodiments or the related technical descriptions, and it is obvious that the drawings in the following description are some embodiments of the present disclosure, and other drawings may be obtained according to the drawings without any inventive effort for a person of ordinary skill in the art. It should be noted that the scale in the drawings is merely schematic and does not represent actual scale.
Fig. 1 schematically shows a schematic structure of a detection circuit;
fig. 2 schematically shows a schematic structure of an ultrasonic sensor for receiving an ultrasonic signal;
fig. 3 schematically shows a schematic configuration of a first example of the detection circuit;
FIG. 4 schematically illustrates a signal timing diagram provided to a first example detection circuit;
fig. 5 schematically shows a schematic configuration of a second example of the detection circuit;
FIG. 6 schematically illustrates a timing diagram of signals provided to a second example detection circuit;
fig. 7 schematically shows a schematic configuration of a third example of the detection circuit;
FIG. 8 schematically illustrates a signal timing diagram provided to a third example detection circuit;
Fig. 9 schematically shows an application scenario of a detection device;
fig. 10 schematically shows a schematic cross-sectional structure of a probe substrate;
fig. 11 schematically shows a schematic structural view of a detection device;
fig. 12 schematically shows a schematic structure of an ultrasonic sensor for transmitting an ultrasonic signal.
Detailed Description
For the purposes of making the objects, technical solutions and advantages of the embodiments of the present disclosure more apparent, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present disclosure, and it is apparent that the described embodiments are some embodiments of the present disclosure, but not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art without inventive effort, based on the embodiments in this disclosure are intended to be within the scope of this disclosure.
The present disclosure provides a detection circuit, and a schematic structural diagram of the detection circuit provided by the present disclosure is schematically shown with reference to fig. 1, as shown in fig. 1, the detection circuit includes: an ultrasonic sensor 11, a first acquisition circuit 12, a second acquisition circuit 13 and a conversion processing module 14.
Wherein the ultrasonic sensor 11, comprising a first electrode 111 and a second electrode 112, is configured to convert the received ultrasonic signal into an electrical signal.
The first acquisition circuit 12 is connected to the first electrode 111 and the conversion processing module 14, and is configured to acquire an electrical signal on the first electrode 111 and output a first electrical signal i1 to the conversion processing module 14.
The second acquisition circuit 13 is connected to the second electrode 112 and the conversion processing module 14, and is configured to acquire an electrical signal on the second electrode 112 and output a second electrical signal i2 to the conversion processing module 14.
The conversion processing module 14 is configured to amplify the difference between the first electrical signal i1 and the second electrical signal i2, and perform analog-to-digital conversion processing on the amplified result to output a detection signal.
The ultrasonic sensor 11 may be a piezoelectric film ultrasonic sensor (as shown in fig. 2), a capacitive C-type micromachined ultrasonic transducer (Capacitive Micromachined Ultrasonic Transducers, CMUT), or other types of ultrasonic sensors, which is not limited in this disclosure.
Referring to fig. 2, a schematic structural diagram of a piezoelectric film ultrasonic sensor for receiving ultrasonic signals is shown. As shown in fig. 2, the ultrasonic sensor 11 includes a first electrode 111, a second electrode 112, which are disposed opposite to each other, and a piezoelectric material layer 113 disposed between the first electrode 111 and the second electrode 112 in a stacked manner.
In the actual detection process, referring to fig. 2, an ultrasonic signal may be first emitted to a target object, and the ultrasonic signal is reflected on the surface of the target object and reflected to the ultrasonic sensor 11. When the ultrasonic sensor 11 receives an ultrasonic signal, the piezoelectric material layer 113 therein can convert the received ultrasonic signal into an electrical signal and output through the first electrode 111 and the second electrode 112. Thereafter, referring to fig. 1, the first acquisition circuit 12 may be controlled to acquire an electrical signal on the first electrode 111 and output a first electrical signal i1, and the second acquisition circuit 13 may be controlled to acquire an electrical signal on the second electrode 112 and output a second electrical signal i2.
Since the first acquisition circuit 12 and the second acquisition circuit 13 are subjected to substantially the same external interference, it can be considered that the first electrical signal i1 and the second electrical signal i2 are superimposed with common-mode interference signals (i.e., interference signals having the same frequency, the same amplitude, and the same phase). In addition, the conversion processing module 14 amplifies the difference value between the first electrical signal i1 and the second electrical signal i2, and the difference value between the first electrical signal i1 and the second electrical signal i2 can eliminate the common-mode interference signal, so that the detection circuit provided by the disclosure can inhibit common-mode interference, has stronger anti-interference (such as electromagnetic interference) capability, and can improve the signal-to-noise ratio of the detection signal.
Since the information of the valleys and ridges of the finger can be determined from the detection signal, the detection circuit provided by the present disclosure can be applied to fingerprint detection.
In addition, since the medical ultrasound image can also be generated from the detection signal, the detection circuit provided by the present disclosure can also be applied to medical ultrasound detection.
In some embodiments, as shown in fig. 1, the conversion processing module 14 includes a differential amplification circuit OP and an analog-to-digital conversion circuit ADC. The positive phase input end of the differential amplifying circuit OP is connected with the first acquisition circuit 12, the negative phase input end of the differential amplifying circuit OP is connected with the second acquisition circuit 13, and the output end of the differential amplifying circuit OP is connected with the analog-to-digital conversion circuit ADC.
As shown in fig. 1, the first electrical signal i1 output by the first acquisition circuit 12 is input to the positive phase input terminal of the differential amplifier circuit OP, and the second electrical signal i2 output by the second acquisition circuit 13 is input to the negative phase input terminal of the differential amplifier circuit OP. Because the differential amplifying circuit OP can amplify the difference value of the input signals of the two ends (i.e., the positive phase input end and the negative phase input end), the common-mode interference signals in the first electrical signal i1 and the second electrical signal i2 can be offset through the two ends, so as to achieve the effect of inhibiting the common-mode interference.
In some embodiments, as shown in fig. 1, the analog-to-digital conversion circuit ADC includes a differential analog-to-digital converter, and two input terminals of the differential analog-to-digital converter are respectively connected to different output terminals of the differential amplifying circuit OP.
As shown IN fig. 1, the differential amplifying circuit OP includes two output terminals OUT1 and OUT2, respectively, and the differential analog-to-digital converter includes two input terminals IN1 and IN2, respectively, wherein the output terminal OUT1 of the differential amplifying circuit is connected to the input terminal IN1 of the differential analog-to-digital converter, and the output terminal OUT2 of the differential amplifying circuit is connected to the input terminal IN2 of the differential analog-to-digital converter.
The full-differential amplifying circuit OP and the differential analog-to-digital converter are adopted to carry out back-end processing on the first electric signal i1 and the second electric signal i2, so that the whole link signal can be transmitted in a differential mode, and the noise suppression capability and the anti-interference capability of the detection circuit are effectively improved.
In some embodiments, as shown in fig. 3, 5 or 7, the first acquisition circuit 12 and the second acquisition circuit 13 have the same circuit structure. During actual detection, the same control signals can be provided for the first acquisition circuit 12 and the second acquisition circuit 13, so that the circuit design can be simplified, the number of wires in the detection substrate can be reduced, and the process can be simplified.
In some embodiments, as shown in fig. 3 or 5, the first acquisition circuit 12 and the second acquisition circuit 13 each include a reset module 31 and an output module 32.
The reset module 31 is connected to the first voltage terminal Vbias, the first node N1, and the electrode of the ultrasonic sensor 11, and configured to write the first voltage signal input by the first voltage terminal Vbias to the first node N1 and the electrode of the ultrasonic sensor 11.
The electrode of the ultrasonic sensor 11 is a first electrode 111 or a second electrode 112. As shown in fig. 3 or 5, the ultrasonic sensor electrode connected to the reset module 31 in the first acquisition circuit 12 is the first electrode 111, and the ultrasonic sensor electrode connected to the reset module 31 in the second acquisition circuit 13 is the second electrode 112.
The output module 32 is connected to the first node N1, the first control terminal Gate, the second voltage terminal AP, and the conversion processing module 14, and is configured to generate a current signal according to the voltage signal of the first node N1 and the second voltage signal input by the second voltage terminal AP in response to the first control signal input by the first control terminal Gate, and output the current signal to the conversion processing module 14.
The current signal is a first electrical signal i1 or a second electrical signal i2. As shown in fig. 3 or fig. 5, the current signal output by the output module 32 in the first acquisition circuit 12 is a first electrical signal i1, and the current signal output by the output module 32 in the second acquisition circuit 13 is a second electrical signal i2.
In the actual detection process, the control of the detection circuit can be divided into a reset phase, a sampling phase and an output phase. In the reset phase, the reset module 31 may be controlled to be turned on to write the first voltage signal input by the first voltage terminal Vbias into the first node N1 and the electrode of the ultrasonic sensor 11; in the sampling phase, the reset module 31 can be controlled to be closed so that the electric signal generated by the electrode of the ultrasonic sensor 11 is written into the first node N1; in the output stage, a first control signal capable of turning on the output module 32 may be provided to the first control terminal Gate, so that the output module 32 generates a current signal according to the voltage signal of the first node N1 and the second voltage signal input by the second voltage terminal AP, and outputs the current signal to the conversion processing module 14.
In some embodiments, as shown in fig. 3, the reset module 31 includes a first transistor M1, a control electrode of the first transistor M1 is connected to the second control terminal Vrst, a first electrode of the first transistor M1 is connected to the first voltage terminal Vbias, and a second electrode of the first transistor M1 is connected to the first node N1 and an electrode of the ultrasonic sensor 11. The second control terminal Vrst is used for inputting a second control signal.
In some embodiments, as shown in fig. 5, the reset module 31 includes a diode D, a first pole of the diode D is connected to the first voltage terminal Vbias, and a second pole of the diode D is connected to the first node N1 and an electrode of the ultrasonic sensor 11.
In some embodiments, as shown in fig. 3 or 5, the output module 32 includes a second transistor M2 and a third transistor M3. The control electrode of the second transistor M2 is connected to the first node N1, the first electrode of the second transistor M2 is connected to the second voltage terminal AP, and the second electrode of the second transistor M2 is connected to the first electrode of the third transistor M3. The control electrode of the third transistor M3 is connected to the first control terminal Gate, and the second electrode of the third transistor M3 is connected to the conversion processing module 14.
In some embodiments, as shown in fig. 3 or 5, the output module 32 further includes a capacitor C, a first plate of which is connected to the gate of the second transistor M2, and a second plate of which is connected to the fixed voltage terminal GND. The capacitor C is used to store the voltage signal of the gate of the second transistor M2 or the first node N1. Illustratively, as shown in fig. 3 or 5, the fixed voltage terminal GND is at ground potential.
Next, a detection process of the detection circuit shown in fig. 3 will be described with reference to the timing chart shown in fig. 4, assuming that the first transistor M1, the second transistor M2, and the third transistor M3 in fig. 3 are all N-type transistors. RX in FIG. 4 represents the ultrasonic signal reflected to the ultrasonic sensor 11, vrst represents the second control signal input by the second control terminal Vrst, vbias represents the first voltage signal input by the first voltage terminal Vbias, AP represents the second voltage signal input by the second voltage terminal AP, and Gate represents the first control signal input by the first control terminal Gate.
In the reset phase (i.e., the phase t0-t1 in fig. 4), the first control signal Gate is at a low level, the second control signal Vrst is at a high level, and thus the first transistor M1 is turned on, the second transistor M2 and the third transistor M3 are turned off, and the first voltage signal Vbias at a high level is written into the first node N1, the first electrode 111 and the second electrode 112.
In the sampling phase (i.e. the phase t1-t2 in fig. 4), the first control signal Gate and the second control signal Vrst are both at low level, so that the first transistor M1, the second transistor M2 and the third transistor M3 are turned off, the electric signal generated by the first electrode 111 is written into the first node N1 in the first acquisition circuit 12, and the electric signal generated by the second electrode 112 is written into the first node N1 in the second acquisition circuit 13.
In the hold phase (i.e., the phase t2-t3 in fig. 4), the first control signal Gate and the second control signal Vrst are both low, and thus, the first transistor M1, the second transistor M2 and the third transistor M3 are turned off to reduce the leakage current.
In the output stage (i.e., stage t3-t4 in fig. 4), the first control signal Gate is at a high level, the second control signal Vrst is at a low level, and therefore, the first transistor M1 is turned off, the second transistor M2 and the third transistor M3 are turned on, and the voltage signal of the first node N1 is converted into a current signal and output to the conversion processing module 14. The current signal output by the first acquisition circuit 12 is a first electrical signal i1, and the current signal output by the second acquisition circuit 13 is a second electrical signal i2.
Next, a detection process of the detection circuit shown in fig. 5 will be described with reference to the timing chart shown in fig. 6, assuming that the second transistor M2 and the third transistor M3 in fig. 5 are both N-type transistors. RX in FIG. 6 represents an ultrasonic signal reflected to the ultrasonic sensor 11, vbias represents a first voltage signal input by the first voltage terminal Vbias, AP represents a second voltage signal input by the second voltage terminal AP, and Gate represents a first control signal input by the first control terminal Gate.
In the reset phase (i.e., the phase t0-t1 in fig. 6), the first control signal Gate is at a low level, the first voltage signal Vbias is at a high level, and therefore, the diode D is turned on, the second transistor M2 and the third transistor M3 are turned off, and the first voltage signal Vbias at a high level is written into the first node N1, the first electrode 111 and the second electrode 112.
In the sampling phase (i.e. the phase t1-t2 in fig. 6), the first control signal Gate is at a low level, the first voltage signal Vbias is at a low level, and therefore, the diode D, the second transistor M2 and the third transistor M3 are turned off, the electric signal generated by the first electrode 111 is written into the first node N1 in the first acquisition circuit 12, and the electric signal generated by the second electrode 112 is written into the first node N1 in the second acquisition circuit 13.
In the hold phase (i.e., the phase t2-t3 in fig. 6), the first control signal Gate is low, the first voltage signal Vbias is low, and therefore, the diode D, the second transistor M2 and the third transistor M3 are turned off to reduce the leakage current.
In the output stage (i.e., stage t3-t4 in fig. 6), the first control signal Gate is at a high level, the first voltage signal Vbias is at a low level, and therefore, the diode D is turned off, the second transistor M2 and the third transistor M3 are turned on, and the voltage signal at the first node N1 is converted into a current signal and output to the conversion processing module 14. The current signal output by the first acquisition circuit 12 is a first electrical signal i1, and the current signal output by the second acquisition circuit 13 is a second electrical signal i2.
In some embodiments, as shown in fig. 7, the first acquisition circuit 12 and the second acquisition circuit 13 further include a blocking module 71, where the blocking module 71 is connected to the third control terminal Vclose, the electrode of the ultrasonic sensor 11, and the first node N1, and is configured to switch on or off the connection between the electrode of the ultrasonic sensor 11 and the first node N1 in response to the third control signal input by the third control terminal Vclose.
As shown in fig. 7, the ultrasonic sensor electrode connected to the blocking module 71 in the first acquisition circuit 12 is a first electrode 111, and the ultrasonic sensor electrode connected to the blocking module 71 in the second acquisition circuit 13 is a second electrode 112.
In the actual detection process, a third control signal capable of starting the blocking module 71 can be provided to the third control terminal Vclose in a reset phase and a sampling phase, so that the connection between the electrode of the ultrasonic sensor 11 and the first node N1 is conducted; after the sampling phase, a third control signal capable of closing the blocking module 71 is provided to the third control terminal Vclose, thereby disconnecting the electrode of the ultrasonic sensor 11 from the first node N1. In this way, the electric signal generated by the ultrasonic sensor 11 after the sampling stage can be prevented from affecting the voltage of the first node N1, so that the voltage of the first node N1 is kept stable, and the accuracy of the detection signal is improved.
In the detection circuits shown in fig. 3 and 5, the blocking module 71 is not provided, so that the voltage holding performance of the first node N1 is relatively poor, and the detection circuit is suitable for a small sensor array with a short holding time, and the circuit occupation area can be saved.
In some embodiments, as shown in fig. 7, the blocking module 71 includes a fourth transistor M4, the control electrode of the fourth transistor M4 is connected to the third control terminal Vclose, the first electrode of the fourth transistor M4 is connected to the electrode of the ultrasonic sensor 11, and the second electrode of the fourth transistor M4 is connected to the first node N1.
Next, a detection process of the detection circuit shown in fig. 7 will be described with reference to the timing chart shown in fig. 8, assuming that the first transistor M1, the second transistor M2, the third transistor M3, and the fourth transistor M4 in fig. 7 are all N-type transistors. RX in FIG. 8 represents an ultrasonic signal reflected to the ultrasonic sensor 11, vclose represents a third control signal input by a third control terminal Vclose, vrst represents a second control signal input by a second control terminal Vrst, vbias represents a first voltage signal input by a first voltage terminal Vbias, AP represents a second voltage signal input by a second voltage terminal AP, and Gate represents a first control signal input by a first control terminal Gate.
In the reset phase (i.e., the t0-t1 phase in fig. 8), the first control signal Gate is at a low level, the second control signal Vrst is at a high level, and the third control signal Vclose is at a high level, so that the first transistor M1 and the fourth transistor M4 are turned on, the second transistor M2 and the third transistor M3 are turned off, and the high-level first voltage signal Vbias is written into the first node N1, the first electrode 111 and the second electrode 112.
In the sampling phase (i.e. the phase t1-t2 in fig. 8), the first control signal Gate and the second control signal Vrst are both at low level, the third control signal Vclose input by the third control terminal Vclose is at high level, so that the first transistor M1, the second transistor M2 and the third transistor M3 are turned off, the fourth transistor M4 is turned on, the electric signal generated by the first electrode 111 is written into the first node N1 in the first acquisition circuit 12, and the electric signal generated by the second electrode 112 is written into the first node N1 in the second acquisition circuit 13.
In the hold phase (i.e., the phase t2-t3 in fig. 8), the first control signal Gate, the second control signal Vrst and the third control signal Vclose are all low, and thus, the first transistor M1, the second transistor M2, the third transistor M3 and the fourth transistor M4 are turned off to reduce leakage current.
In the output stage (i.e., stage t3-t4 in fig. 8), the first control signal Gate is at a high level, the second control signal Vrst and the third control signal Vclose are both at a low level, so that the first transistor M1 and the fourth transistor M4 are turned off, the second transistor M2 and the third transistor M3 are turned on, and the voltage signal at the first node N1 is converted into a current signal and output to the conversion processing module 14. The current signal output by the first acquisition circuit 12 is a first electrical signal i1, and the current signal output by the second acquisition circuit 13 is a second electrical signal i2.
Note that any one of the first transistor M1, the second transistor M2, the third transistor M3, and the fourth transistor M4 may be an N-type transistor or a P-type transistor. The N-type transistor is turned on under the action of a high-level signal and turned off under the action of a low-level signal. The P-type transistor is turned off under the action of a high-level signal and turned on under the action of a low-level signal.
Note that any one of the first transistor M1, the second transistor M2, the third transistor M3, and the fourth transistor M4 may be a thin film transistor (TFT, thin Film Transistor), a Metal-Oxide-Semiconductor field effect transistor (MOS), or the like, which is not limited in this disclosure.
In a specific implementation, the first pole of the transistor can be used as the source electrode and the second pole can be used as the drain electrode according to the type of the transistor and the signal of the control pole; alternatively, the first pole of the switching transistor is used as its drain and the second pole is used as its source, which is not limited by the present disclosure.
The present disclosure provides a detection device comprising a detection circuit as provided in any one of the embodiments.
It will be appreciated by those skilled in the art that the detection means has the advantages of the detection circuit described above.
The detection device provided by the disclosure can comprise medical detection equipment such as a B-ultrasonic detector, or products or components with fingerprint identification functions such as mobile phones, notebook computers, fingerprint locks and the like.
The detection device provided by the present disclosure may include a detection substrate 100, referring to fig. 9, the detection substrate 100 may be a flexible integrated structure, so that the detection substrate may entirely cover a human tissue surface, such as a region of a belly, an arm, a thigh, etc., to implement high-precision, large-area, multidimensional real-time imaging.
In some embodiments, as shown in fig. 10, the probe substrate 100 includes: a substrate 101; a transistor layer 102 disposed on one side of the substrate 101 and including at least one of a first acquisition circuit 12, a second acquisition circuit 13, and a conversion processing module 14; a first electrode 111 layer disposed on a side of the transistor layer 102 facing away from the substrate 101, including a plurality of first electrodes 111 spaced apart from each other; a layer 113 of piezoelectric material disposed on a side of the layer of first electrode 111 facing away from the substrate 101; and a second electrode 112 layer disposed on a side of the piezoelectric material layer 113 facing away from the substrate 101, including a plurality of second electrodes 112 spaced apart from each other.
The first electrode 111 is connected to the first acquisition circuit 12, and the second electrode 112 is connected to the second acquisition circuit 13. Referring to fig. 10, when the second collecting circuit 13 is located in the transistor layer 102, the second electrode 112 and the second collecting circuit 13 may be connected through the via H.
As shown in fig. 10, the orthographic projections of the first electrode 111 layer, the piezoelectric material layer 113, and the second electrode 112 layer, respectively, on the substrate 101 overlap at least partially. The first electrode 111, the piezoelectric material layer 113, and the second electrode 112, which are stacked, constitute the ultrasonic sensor 11.
Illustratively, as shown in fig. 10, the orthographic projections of the first electrode 111 layer and the second electrode 112 layer, respectively, on the substrate 101 completely overlap.
As shown in fig. 10, the front projection of the piezoelectric material layer 113 onto the substrate 101 covers the front projection of the first electrode 111 layer or the second electrode 112 layer onto the substrate 101. The piezoelectric material layer 113 may be a unitary structure (as shown in fig. 10), or may include a plurality of piezoelectric patterns spaced apart from each other, which is not limited in this disclosure.
In some embodiments, the detection device comprises: a probe substrate 100 (shown in fig. 10) and a driving chip connected to the probe substrate 100.
Wherein the ultrasonic sensor 11, the first acquisition circuit 12, and the second acquisition circuit 13 are disposed in the detection substrate 100.
The conversion processing module 14 may be disposed in the probe substrate 100 and/or the driving chip, i.e., the conversion processing module 14 may be disposed in the probe substrate 100, or the driving chip, or partially disposed in the probe substrate 100, and partially disposed in the driving chip, which is not limited in this disclosure.
In the present disclosure, the detection device may include a plurality of detection units. The plurality of detection units may each independently include a detection circuit, that is, the plurality of detection units each independently include the ultrasonic sensor 11, the first acquisition circuit 12, the second acquisition circuit 13, and the conversion processing module 14. Alternatively, the plurality of detection units may each independently include the ultrasonic sensor 11, the first acquisition circuit 12, and the second acquisition circuit 13, sharing the conversion processing module 14. Illustratively, the plurality of detection units may time-division multiplex the conversion processing module 14.
In some embodiments, referring to fig. 11, the detection device may further include a sound source device 200, the sound source device 200 being configured to emit an ultrasonic signal. The sound source device 200 may be provided separately from the detection substrate 100 (as shown in fig. 11) or built in the detection substrate 100, which is not limited in the present disclosure.
In some embodiments, since lead zirconate titanate piezoelectric ceramic (lead zirconate titanate piezoelectric ceramics, PZT) sound source emission energy is large, the sound source device 200 may emit an ultrasonic signal using the PZT piezoelectric ceramic sound source, as shown in fig. 11.
In other embodiments, the ultrasonic sensor 11 may be multiplexed into the sound source device 200. Referring to fig. 12, a schematic structural diagram of a piezoelectric film ultrasonic sensor emitting an ultrasonic signal is shown. As shown in fig. 12, an electrical signal is applied to the first electrode 111 and the second electrode 112, and the piezoelectric material layer 113 between the first electrode 111 and the second electrode 112 is deformed, thereby generating ultrasonic waves to be transmitted.
In implementation, an air chamber may also be disposed on a side of the ultrasonic sensor 11 (e.g., a side of the second electrode 112 facing away from the first electrode 111), which is advantageous for enhancing and propagating ultrasonic waves.
In the present disclosure, the piezoelectric material layer 113 may include, for example, a polyvinylidene fluoride (polyvinylidene difluoride, PVDF) film type piezoelectric material, or an inorganic or organic piezoelectric material including aluminum nitride, PZT, and zinc oxide.
In some embodiments, the detection device may further comprise an imaging device configured to generate an ultrasound image from the detection signal.
In some embodiments, the detection device may further comprise a display device configured to display the ultrasound image. By way of example, the display device may include a cell phone, tablet, television, display, notebook, digital photo frame, navigator, or any product or component having a display function.
The present disclosure provides a detection method applied to a detection circuit as provided in any one of the embodiments, referring to fig. 1 to 8, the detection method includes:
step S01: an ultrasonic signal is emitted toward the object so that the ultrasonic sensor 11 receives the ultrasonic signal reflected by the object.
Step S02: the control signals are provided to the first acquisition circuit 12 and the second acquisition circuit 13, so that the first acquisition circuit 12 acquires the electric signal on the first electrode 111 and outputs the first electric signal i1 to the conversion processing module 14, the second acquisition circuit 13 acquires the electric signal on the second electrode 112 and outputs the second electric signal i2 to the conversion processing module 14, and the conversion processing module 14 amplifies the difference between the first electric signal i1 and the second electric signal i2 and performs analog-digital conversion processing on the amplified result to output the detection signal.
In some embodiments, as shown in fig. 3, 5 or 7, when the first acquisition circuit 12 and the second acquisition circuit 13 have the same circuit configuration, the control signals provided to the first acquisition circuit 12 and the second acquisition circuit 13 are the same. The control signals being identical means that the control signals have the same level and timing.
In some embodiments, as shown in fig. 3 or fig. 5, when the first acquisition circuit 12 and the second acquisition circuit 13 each include a reset module 31 and an output module 32, and the reset module 31 is respectively connected to the first voltage terminal Vbias, the first node N1, and the electrode of the ultrasonic sensor 11, and the output module 32 is respectively connected to the first node N1, the first control terminal Gate, the second voltage terminal AP, and the conversion processing module 14, in step S02, the step of providing control signals to the first acquisition circuit 12 and the second acquisition circuit 13 includes:
step S11: in the reset phase (i.e., phase t0-t1 in fig. 4 or 6), the reset module 31 is controlled to be turned on to write the first voltage signal input by the first voltage terminal Vbias to the first node N1 and the electrode of the ultrasonic sensor 11.
Step S12: during the sampling phase (i.e. phase t1-t2 in fig. 4 or 6), the reset module 31 is controlled to be turned off so that the electrical signal generated by the electrode of the ultrasonic sensor 11 is written into the first node N1.
Step S13: in the output stage (i.e. stage t3-t4 in fig. 4 or fig. 6), a first control signal capable of turning on the output module 32 is provided to the first control terminal Gate, so that the output module 32 generates a current signal according to the voltage signal of the first node N1 and the second voltage signal input by the second voltage terminal AP, and outputs the current signal to the conversion processing module 14, where the current signal is the first electrical signal i1 or the second electrical signal i2.
In some embodiments, as shown in fig. 7, when the first acquisition circuit 12 and the second acquisition circuit 13 further include a blocking module 71, and the blocking module 71 is connected to the third control terminal Vclose, the electrode of the ultrasonic sensor 11, and the first node N1, in step S02, the step of providing control signals to the first acquisition circuit 12 and the second acquisition circuit 13 further includes:
step S21: in the reset phase (i.e. phase t0-t1 in fig. 8) and the sampling phase (i.e. phase t1-t2 in fig. 8), a third control signal capable of turning on the blocking module 71 is provided to the third control terminal Vclose, so that the blocking module 71 turns on the connection between the electrode of the ultrasonic sensor 11 and the first node N1.
Step S22: after the sampling phase (i.e. phase t2-t4 in fig. 8), a third control signal capable of closing the blocking module 71 is provided to the third control terminal Vclose, so that the blocking module 71 breaks the connection between the electrode of the ultrasonic sensor 11 and the first node N1.
It should be noted that the detection method may further include more steps, which may be determined according to actual requirements, which is not limited in this disclosure. For detailed description and technical effects of the detection method, reference is made to the description of the detection circuit hereinabove, and no further description is given here.
In the present disclosure, the meaning of "a plurality of" means two or more, and the meaning of "at least one" means one or more, unless specifically defined otherwise.
In the present disclosure, the orientation or positional relationship indicated by the terms "upper", "lower", etc. are based on the orientation or positional relationship shown in the drawings, and are merely for convenience of description and to simplify the description, rather than to indicate or imply that the apparatus or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present disclosure.
In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim.
In this document, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article or apparatus that comprises the element.
The foregoing has outlined rather broadly the principles and embodiments of the present disclosure in order that the detailed description of the disclosure that follows may be better understood, and in order that the present invention may be better understood.
In this specification, each embodiment is described in a progressive manner, and each embodiment is mainly described by differences from other embodiments, and identical and similar parts between the embodiments are all enough to be referred to each other.
Reference herein to "one embodiment," "an embodiment," or "one or more embodiments" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present disclosure. Furthermore, it is noted that the word examples "in one embodiment" herein do not necessarily all refer to the same embodiment.
In the description provided herein, numerous specific details are set forth. However, it is understood that embodiments of the disclosure may be practiced without these specific details. In some instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.
This disclosure is intended to cover any adaptations, uses, or adaptations of the disclosure following the general principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.

Claims (20)

1. A detection circuit, comprising: the device comprises an ultrasonic sensor, a first acquisition circuit, a second acquisition circuit and a conversion processing module;
wherein the ultrasonic sensor comprises a first electrode and a second electrode configured to convert a received ultrasonic signal into an electrical signal;
the first acquisition circuit is connected with the first electrode and the conversion processing module, and is configured to acquire an electric signal on the first electrode and output the first electric signal to the conversion processing module;
the second acquisition circuit is connected with the second electrode and the conversion processing module and is configured to acquire the electric signal on the second electrode and output a second electric signal to the conversion processing module;
the conversion processing module is configured to amplify the difference value between the first electric signal and the second electric signal, and perform analog-to-digital conversion processing on the amplified result to output a detection signal.
2. The detection circuit of claim 1, wherein the first acquisition circuit and the second acquisition circuit have the same circuit structure.
3. The detection circuit of claim 1, wherein the conversion processing module comprises a differential amplification circuit and an analog-to-digital conversion circuit;
the positive phase input end of the differential amplifying circuit is connected with the first acquisition circuit, the negative phase input end of the differential amplifying circuit is connected with the second acquisition circuit, and the output end of the differential amplifying circuit is connected with the analog-to-digital conversion circuit.
4. A detection circuit according to claim 3, wherein the analog-to-digital conversion circuit comprises a differential analog-to-digital converter, the two inputs of the differential analog-to-digital converter being connected to different outputs of the differential amplifying circuit, respectively.
5. The detection circuit of any one of claims 1 to 4, wherein the first acquisition circuit and the second acquisition circuit each comprise:
the reset module is respectively connected with a first voltage end, a first node and an electrode of the ultrasonic sensor and is configured to write a first voltage signal input by the first voltage end into the first node and the electrode of the ultrasonic sensor; and
The output module is respectively connected with the first node, the first control end, the second voltage end and the conversion processing module, and is configured to respond to a first control signal input by the first control end, generate a current signal according to the voltage signal of the first node and a second voltage signal input by the second voltage end, and output the current signal to the conversion processing module, wherein the current signal is the first electric signal or the second electric signal.
6. The detection circuit of claim 5, wherein the reset module comprises:
and the first electrode of the diode is connected with the first voltage end, and the second electrode of the diode is connected with the first node and the electrode of the ultrasonic sensor.
7. The detection circuit of claim 5, wherein the reset module comprises:
the control electrode of the first transistor is connected with the second control end, the first electrode is connected with the first voltage end, and the second electrode is connected with the first node and the electrode of the ultrasonic sensor; the second control end is used for inputting a second control signal.
8. The detection circuit of claim 5, wherein the output module comprises a second transistor and a third transistor;
The control electrode of the second transistor is connected with the first node, the first electrode of the second transistor is connected with the second voltage end, and the second electrode of the second transistor is connected with the first electrode of the third transistor;
and the control electrode of the third transistor is connected with the first control end, and the second electrode of the third transistor is connected with the conversion processing module.
9. The detection circuit of claim 8, wherein the output module further comprises:
and the first polar plate is connected with the grid electrode of the second transistor, and the second polar plate is connected with the fixed voltage end.
10. The detection circuit of claim 5, wherein the first acquisition circuit and the second acquisition circuit further comprise:
and the blocking module is respectively connected with the third control end, the electrode of the ultrasonic sensor and the first node and is configured to respond to a third control signal input by the third control end to conduct or break the connection between the electrode of the ultrasonic sensor and the first node.
11. The detection circuit of claim 10, wherein the blocking module comprises:
and a control electrode of the fourth transistor is connected with the third control end, a first electrode of the fourth transistor is connected with an electrode of the ultrasonic sensor, and a second electrode of the fourth transistor is connected with the first node.
12. A detection apparatus comprising a detection circuit as claimed in any one of claims 1 to 11.
13. The probe apparatus of claim 12, wherein the probe apparatus comprises a probe substrate comprising:
a substrate;
a transistor layer disposed on one side of the substrate and including at least one of the first acquisition circuit, the second acquisition circuit, and the conversion processing module;
a first electrode layer disposed on a side of the transistor layer facing away from the substrate, the first electrode layer including a plurality of first electrodes spaced apart from each other;
the piezoelectric material layer is arranged on one side of the first electrode layer, which is away from the substrate; and
the second electrode layer is arranged on one side of the piezoelectric material layer, which is away from the substrate, and comprises a plurality of second electrodes which are mutually separated;
wherein orthographic projections of the first electrode layer, the piezoelectric material layer, and the second electrode layer on the substrate respectively overlap at least partially.
14. The detection apparatus according to claim 12, wherein the detection apparatus includes: a detection substrate and a driving chip connected with the detection substrate;
the ultrasonic sensor, the first acquisition circuit and the second acquisition circuit are arranged in the detection substrate, and the conversion processing module is arranged in the detection substrate and/or the driving chip.
15. The detection apparatus according to claim 12, wherein the detection apparatus includes a plurality of detection units;
a plurality of the detection units each independently include the detection circuit; or,
the plurality of detection units each independently comprise the ultrasonic sensor, the first acquisition circuit and the second acquisition circuit, and share the conversion processing module.
16. The detection apparatus according to any one of claims 12 to 15, wherein the detection apparatus further comprises at least one of:
a sound source device configured to emit an ultrasonic signal;
an imaging device configured to generate an ultrasound image from the detection signal; and
and a display device configured to display the ultrasound image.
17. A detection method applied to the detection circuit according to any one of claims 1 to 11, the detection method comprising:
transmitting an ultrasonic signal to a target object so that the ultrasonic sensor receives the ultrasonic signal reflected by the target object;
the control signals are provided for the first acquisition circuit and the second acquisition circuit, so that the first acquisition circuit acquires the electric signals on the first electrode and outputs the first electric signals to the conversion processing module, the second acquisition circuit acquires the electric signals on the second electrode and outputs the second electric signals to the conversion processing module, and the conversion processing module amplifies the difference value between the first electric signals and the second electric signals and performs analog-to-digital conversion processing on the amplified result to output detection signals.
18. The detection method of claim 17, wherein the control signals provided to the first acquisition circuit and the second acquisition circuit are the same when the first acquisition circuit and the second acquisition circuit have the same circuit structure.
19. The detection method according to claim 17 or 18, wherein when the first acquisition circuit and the second acquisition circuit each include the reset module and the output module, and the reset module is connected to a first voltage terminal, a first node, and an electrode of the ultrasonic sensor, respectively, the output module is connected to the first node, a first control terminal, a second voltage terminal, and the conversion processing module, respectively, the step of providing control signals to the first acquisition circuit and the second acquisition circuit includes:
in a resetting stage, controlling the resetting module to be started so as to write a first voltage signal input by the first voltage end into the first node and an electrode of the ultrasonic sensor;
in a sampling stage, controlling the reset module to be closed so as to enable an electric signal generated by an electrode of the ultrasonic sensor to be written into the first node;
In the output stage, a first control signal capable of starting the output module is provided for the first control end, so that the output module generates a current signal according to the voltage signal of the first node and the second voltage signal input by the second voltage end, and the current signal is output to the conversion processing module, wherein the current signal is the first electric signal or the second electric signal.
20. The detection method of claim 19, wherein when the first and second acquisition circuits further comprise a blocking module, and the blocking module is connected to a third control terminal, an electrode of the ultrasonic sensor, and the first node, respectively, the step of providing control signals to the first and second acquisition circuits further comprises:
providing a third control signal capable of starting the blocking module to the third control end in the resetting stage and the sampling stage so that the blocking module conducts connection between the electrode of the ultrasonic sensor and the first node;
after the sampling phase, a third control signal capable of closing the blocking module is provided to the third control terminal, so that the blocking module breaks the connection between the electrode of the ultrasonic sensor and the first node.
CN202211148077.4A 2022-09-20 2022-09-20 Detection circuit, detection method and detection device thereof Pending CN117784143A (en)

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