CN117714247B - Time delay alignment method and device - Google Patents
Time delay alignment method and device Download PDFInfo
- Publication number
- CN117714247B CN117714247B CN202410162789.4A CN202410162789A CN117714247B CN 117714247 B CN117714247 B CN 117714247B CN 202410162789 A CN202410162789 A CN 202410162789A CN 117714247 B CN117714247 B CN 117714247B
- Authority
- CN
- China
- Prior art keywords
- delay
- time domain
- value
- coarse
- time
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims abstract description 71
- 230000006870 function Effects 0.000 claims description 48
- 238000004590 computer program Methods 0.000 claims description 4
- 238000004422 calculation algorithm Methods 0.000 abstract description 10
- 238000004891 communication Methods 0.000 abstract description 8
- 230000007547 defect Effects 0.000 abstract description 2
- 238000012545 processing Methods 0.000 description 16
- 238000010586 diagram Methods 0.000 description 13
- 238000005070 sampling Methods 0.000 description 10
- 230000000875 corresponding effect Effects 0.000 description 9
- 238000007792 addition Methods 0.000 description 6
- 238000004364 calculation method Methods 0.000 description 6
- 238000012549 training Methods 0.000 description 6
- 230000008569 process Effects 0.000 description 5
- 238000012360 testing method Methods 0.000 description 5
- 101100440934 Candida albicans (strain SC5314 / ATCC MYA-2876) CPH1 gene Proteins 0.000 description 4
- 101100273252 Candida parapsilosis SAPP1 gene Proteins 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 4
- 230000003111 delayed effect Effects 0.000 description 4
- 230000003321 amplification Effects 0.000 description 3
- 230000008901 benefit Effects 0.000 description 3
- 230000001419 dependent effect Effects 0.000 description 3
- 238000003780 insertion Methods 0.000 description 3
- 230000037431 insertion Effects 0.000 description 3
- 238000003199 nucleic acid amplification method Methods 0.000 description 3
- 238000002360 preparation method Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 230000010363 phase shift Effects 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 238000009825 accumulation Methods 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 230000021615 conjugation Effects 0.000 description 1
- 238000012937 correction Methods 0.000 description 1
- 230000002596 correlated effect Effects 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 238000003874 inverse correlation nuclear magnetic resonance spectroscopy Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000000047 product Substances 0.000 description 1
- 230000003595 spectral effect Effects 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 239000013589 supplement Substances 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
Landscapes
- Amplifiers (AREA)
Abstract
The application provides a time delay alignment method and device, and relates to the technical field of wireless communication. The method comprises the following steps: determining a coarse delay value based on the first time domain delay amount and the memory depth parameter; and performing coarse delay alignment on the forward signal and the feedback signal based on the coarse delay value. The time delay alignment method and the time delay alignment device can solve the defect of slow convergence speed of DPD in the prior art, and improve the efficiency of a digital predistortion algorithm.
Description
Technical Field
The present application relates to the field of wireless communications technologies, and in particular, to a delay alignment method and apparatus.
Background
Digital Predistortion (DPD) algorithms are commonly used in the industry to calibrate power amplifier nonlinearities. When digital predistortion is performed, firstly, time delay alignment is required, namely, time delay alignment is performed on a forward signal and a feedback signal. The delay alignment scheme widely used in the industry at present consists of two parts, namely coarse delay alignment and fine delay alignment.
The coarse time delay alignment mostly adopts a time domain correlation method, and firstly, the time domain correlation is carried out through a forward signal and a feedback signal; then, traversing to find the time domain delay quantity when the time domain correlation value takes the maximum value as a coarse time delay value; finally, the forward signal is delayed based on the coarse delay value. The conventional coarse delay alignment method does not consider the influence of the memory depth parameter in the DPD, so that the convergence speed of the DPD is lower.
Disclosure of Invention
The application provides a time delay alignment method and a time delay alignment device, which are used for solving the defect of slow convergence speed of DPD in the prior art and improving the efficiency of a digital predistortion algorithm.
In a first aspect, an embodiment of the present application provides a delay alignment method, including:
determining a coarse delay value based on the first time domain delay amount and the memory depth parameter;
and performing coarse delay alignment on the forward signal and the feedback signal based on the coarse delay value.
In one embodiment, the delay alignment method further comprises:
Determining a first fine delay value based on the first time domain delay amount and a window function order;
Determining filter coefficients based on the first refined delay value and a window function generation value;
And aligning the forward signal after coarse delay alignment with the feedback signal after coarse delay alignment based on the filter coefficient.
In one embodiment, the determining the coarse delay value based on the first time domain delay amount and the memory depth parameter comprises:
determining a second time domain delay amount based on the first time domain delay amount, and determining a time domain delay amount weighting value based on the memory depth parameter;
the coarse delay value is determined based on the second time domain delay amount and the time domain delay amount weighting value.
In one embodiment, the determining a second time domain delay amount based on the first time domain delay amount includes:
Amplifying based on the first time domain delay amount to obtain a plurality of time domain delay amounts;
the second time domain delay amount is determined based on the plurality of time domain delay amounts.
In one embodiment, the delay alignment method further comprises:
Performing time domain correlation on the forward signal and the feedback signal to obtain the first time domain delay amount; the first time domain delay amount is the time domain delay amount corresponding to the time domain when the correlation value obtained by performing time domain correlation is maximum.
In one embodiment, the determining the first fine delay value based on the first time domain delay amount and a window function order includes:
determining a second fine delay value based on the first time domain delay amount;
the first fine delay value is determined based on the second fine delay value and the window function order.
In one embodiment, the determining the filter coefficients based on the first refined delay value and a window function generation value comprises:
determining the window function generation value based on the window function order and window function type;
The filter coefficients are determined based on the first refined time delay value and the window function generation value.
In one embodiment, the fine delay alignment of the coarse delay aligned forward signal and the coarse delay aligned feedback signal based on the filter coefficients includes:
Convolving the filter coefficient with the feedback signal after coarse delay alignment;
and performing fine time delay alignment on the forward signal after coarse time delay alignment and the feedback signal after coarse time delay alignment based on a convolution operation result.
In a second aspect, an embodiment of the present application provides a delay alignment apparatus, including:
the direction judging module is used for determining a coarse delay value based on the first time domain delay amount and the memory depth parameter;
And the coarse delay alignment module is used for performing coarse delay alignment on the forward signal and the feedback signal based on the coarse delay value.
In a third aspect, the application also provides an electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the method of the first aspect when executing the program.
In a fourth aspect, the application also provides a non-transitory computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements the method according to the first aspect.
According to the time delay alignment method and device provided by the embodiment of the application, the first time domain delay amount is further processed and corrected by combining the memory depth in the DPD model parameters, so that the coarse time delay value is obtained, and the forward signal and the feedback signal are subjected to coarse time delay alignment based on the coarse time delay value, so that the convergence speed of the DPD can be increased, the convergence time is effectively reduced, and the efficiency of the digital predistortion algorithm is improved.
Drawings
In order to more clearly illustrate the application or the technical solutions of the prior art, the following description will briefly explain the drawings used in the embodiments or the description of the prior art, and it is obvious that the drawings in the following description are some embodiments of the application, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a digital predistortion method provided by the present application;
fig. 2 is a schematic flow chart of a time delay alignment method provided by the application;
Fig. 3 is a block diagram of a delay alignment method provided by the present application;
fig. 4 is a schematic diagram of a coarse delay alignment module in the delay alignment method provided by the application;
Fig. 5 is a schematic calculation diagram of a direction judging module in the coarse delay alignment module provided by the application;
fig. 6 is a schematic diagram of a testing environment of the time delay alignment method provided by the application;
FIG. 7 is a schematic diagram of a first time domain delay amount acquisition method according to the present application;
Fig. 8 is a schematic diagram of a precise time delay alignment module in the time delay alignment method provided by the application;
FIG. 9 is a schematic diagram of fine delay value correction provided by the present application;
fig. 10 is a schematic structural view of a delay alignment device provided by the present application;
Fig. 11 is a schematic structural diagram of an electronic device provided by the present application.
Detailed Description
In order to obtain a greater output signal power, the power amplifier is typically operated in an operating range near the saturation point. The nonlinear distortion of the power amplifier can cause it to generate new frequency components that can adversely affect the useful signal whether they fall within or outside the passband. The nonlinear distortion not only can eliminate the advantage of high frequency spectrum efficiency caused by the application of a linear modulation method, but also can cause a series of performance indexes of a transmitting end such as sidelobe suppression, signal distortion and the like to be poor. This nonlinear distortion is further exacerbated by the addition of the peak-to-average bit nature of current high efficiency spectral modulations such as orthogonal frequency division multiplexed (Orthogonal Frequency Division Multiplexing, OFDM) signals.
To solve the above problem, digital Predistortion (DPD) algorithm is currently used in the industry to calibrate the nonlinearity of the power amplifier. The block diagram of DPD is shown in fig. 1, where x (n) represents the source, z (n) represents the forward signal, y (n) represents the feedback signal, G represents the gain of the rf power amplifier, e represents the error between the output of the predistorter (training) and the forward signal z (n) (the final purpose of the training is to minimize the error e), the predistorter represents the operation of equation 1, and the predistorter (training) represents the operation after replacing x (n) in equation 1 with y (n). A common DPD model is a generalized memory polynomial (Generalized Memory Polynomial, GMP) model, as shown in equation 1:
(equation 1)
Wherein z (n) represents a forward signal, ka represents a polynomial order parameter, la represents a memory depth parameter,Represents polynomial coefficients, y (n) represents a feedback signal, ||represents a modulo operation, x (n) represents a source, kb represents a polynomial order parameter, lb represents a memory depth parameter, mb represents a cross memory depth parameter,/>Represents polynomial coefficients, kc represents polynomial order parameters, lc represents memory depth parameters, mc represents cross memory depth parameters,/>Representing polynomial coefficients.
In digital predistortion, delay alignment is first required, i.e., the forward signal z (n) is delay aligned with the feedback signal y (n). The delay alignment scheme widely used in the industry at present consists of two parts, namely coarse delay alignment and fine delay alignment.
The coarse delay alignment mostly adopts a time domain correlation method, as shown in formula 2:
(equation 2)
Wherein,Representing a time domain correlation value, M representing a time domain delay amount, the magnitude of the M value being determined from an empirical value of the time delay between the whole transmission to the receiving chain, |represents a modulo operation, N represents a subscript of the signal in a value range of [1, N ], N represents a sample length of the forward or feedback signal, y (N) represents the feedback signal, H superscript represents a signal conjugation operation,Representing delaying the forward signal as a whole m samples backward from the time domain.
Namely, firstly, performing time domain correlation through a forward signal z (n) and a feedback signal y (n); then, M is used as a coarse delay value when the time domain correlation value d is the maximum value by traversing the M value, the value range of M is [0, M ], and the size of the M value is determined according to the delay experience value between the whole transmission link and the receiving link; finally, the forward signal is delayed, i.e., the forward signal is delayed by m samples from the time domain in its entirety (the feedback signal may also be advanced by m samples from the time domain in its entirety).
There are generally two methods for fine time delay alignment:
(1) Interpolation. Firstly, respectively inserting the forward and feedback signals with the aligned coarse delays by D times, and then performing filtering treatment to treat the mirror image brought by the upper insertion. At this time, the sampling rate of the signal also becomes correspondingly D times before the upper insertion; then, the two groups of signals after the upper insertion are continuously subjected to coarse time delay alignment; and finally, extracting the two groups of signals after alignment by D times, namely, the sampling rate of the signals is restored to the sampling rate before up-inserting. The precision of precise time delay alignment in the method is 1/D sample points;
(2) Frequency domain alignment. The phase of the fourier transform of the time domain correlation of the forward and feedback signals is linear within the passband of the signal, and the slope of the phase curve within the passband is then the fractional delay, i.e. the fine delay value. According to the theory, the forward signal and the feedback signal are firstly transferred to the frequency domain through fast Fourier transform (Fast Fourier Transform, FFT); then, the frequency domains of the two are correlated, and the phase offset value which enables the correlation value of the frequency domain to be the largest is found by traversing the phase offset value, and then the value is the fine delay value; then, the feedback signal is subjected to phase shift designated by a phase shift value; finally, the feedback signal is reconverted to the time domain by inverse fast fourier transform (INVERSE FAST Fourier Transform, IFFT). The alignment accuracy of the method depends on the traversing steps of the phase, and the smaller the steps are, the higher the accuracy is.
The above delay alignment method has certain drawbacks, as follows:
(1) The influence of a memory depth parameter in DPD is not considered in a conventional coarse delay alignment algorithm, so that the convergence speed of the DPD is slower;
(2) The interpolation method is adopted for precise time delay alignment, the digital sampling rate needs to be improved, and the requirement on clocks is high. If the alignment accuracy of 0.1 sample is to be achieved, 10 times of up-inserting is needed, namely the sampling rate is 10 times of that before up-inserting, and the clock rate > =sampling rate, so that higher clock rate support is needed, and larger power consumption is brought to the chip;
(3) The frequency domain alignment method is adopted to perform precise time delay alignment, FFT/IFFT operation is needed, the operation is complex, and when the number of samples is large, larger operation time and resources are needed to be consumed.
In view of this, the present application proposes a new delay alignment method, which is applied to DPD algorithm. The above-described drawbacks of the time delay alignment method can be overcome.
For the purpose of making the objects, technical solutions and advantages of the present application more apparent, the technical solutions of the present application will be clearly and completely described below with reference to the accompanying drawings, and it is apparent that the described embodiments are some embodiments of the present application, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
Fig. 2 is a flowchart of a delay alignment method according to an embodiment of the present application. Referring to fig. 2, an embodiment of the present application provides a time delay alignment method, where an execution body may be an electronic device, for example, may be a delayer, and the method may include:
step 210, determining a coarse delay value based on the first time domain delay amount and the memory depth parameter;
step 220, coarse delay alignment is performed on the forward signal and the feedback signal based on the coarse delay value.
The digital predistortion requires time delay alignment, as shown in fig. 3, which can be divided into two modules, coarse time delay alignment and fine time delay alignment. As shown in fig. 4, in step 210, the delayer may time-domain correlate the digitally pre-distorted forward signal z (n) with the feedback signal y (n), determine a first time-domain delay amount m based on the result of the time-domain correlation, and record m as n_max. The delayer may obtain the memory depth parameter in the DPD model. The direction judging module in the delayer can further process the first time domain delay n_max and calculate a coarse delay value inter_delay by combining the memory depth parameter. It should be noted that the coarse delay value inter_delay is a positive integer.
As shown in fig. 4, in step 220, the delayer may perform coarse delay alignment on the forward signal z (n) and the feedback signal y (n) based on the coarse delay value obtained in step 210, that is, perform integral multiple delay alignment on the digitally pre-distorted forward signal z (n) and the feedback signal y (n), to obtain an aligned forward signal z_ coa _align (n) and feedback signal y_ coa _align (n). Coarse delay alignment may take the form of delaying the forward signal z (n) entirely from the time domain back by inter delay samples or advancing the feedback signal y (n) entirely from the time domain forward by inter delay samples. In this embodiment, the forward signal z (n) may be time-domain delayed, and the delay unit may supplement inter_delay data 0 before z (n) and discard consecutive inter_delay data at the end of z (n) to obtain the forward signal z_ coa _align (n) after coarse delay alignment. The delay may output the coarse delay-aligned forward signal z_ coa _align (n) and the feedback signal y_ coa _align (n) (y_ coa _align (n) =y (n)), followed by fine delay alignment.
According to the time delay alignment method provided by the embodiment of the application, the first time domain delay amount is further processed and corrected by combining the memory depth in the DPD model parameters, so that a coarse time delay value is obtained, and the forward signal and the feedback signal are subjected to coarse time delay alignment based on the coarse time delay value, so that the convergence speed of the DPD can be increased, the convergence time is effectively reduced, and the efficiency of a digital predistortion algorithm is improved.
In one embodiment, determining the coarse delay value based on the first time domain delay amount and the memory depth parameter includes:
determining a second time domain delay amount based on the first time domain delay amount, and determining a time domain delay amount weighting value based on the memory depth parameter;
a coarse delay value is determined based on the second time domain delay amount and the time domain delay amount weighting value.
As shown in fig. 5, the direction determining module in the delayer may obtain the first time domain delay n_max and the memory depth parameter mem_depth in the DPD model, perform mathematical computation based on the first time domain delay n_max to obtain the second time domain delay loc, perform mathematical computation based on the memory depth parameter to obtain the time domain delay weighted value mem_dif, and determine the coarse delay value inter_delay based on the second time domain delay loc and the time domain delay weighted value mem_dif. The coarse delay value inter_delay may be determined by directly adding the second time domain delay value loc and the time domain delay value mem_dif, or may be calculated based on weighted addition of the two, for example, the second time domain delay value loc takes weight 1.00001, the time domain delay value mem_dif takes weight 0.99999, and then added, as shown in formula 3:
(equation 3)
Wherein,Representing a coarse delay value, round () representing a rounding operation,/>Representing a second time domain delay amount,/>Weight value representing second time domain delay amount,/>Representing the time-domain delay amount weighting value,A weight value representing the time domain delay amount weight value.
As shown in fig. 6,1 represents a test source, the test source is a TDD 100M NR (New Radio,5G air interface standard) standard source, and the modulation mode is 256QAM;2 is a digital front end chip (Digital Front End, DFE) in which the DPD algorithm is contained; 3 is a radio frequency (transciever) chip; 4 is a power amplifier, the test frequency point is 2565MHz, and the air interface power is 24dBm;5 denotes a radio frequency filter; 6 denotes an antenna; 7, a spectrometer is used to record an adjacent channel power ratio (Adjacent Channel Power Ratio, ACPR) index after DPD calibration, and the result shows that: adopting a coarse delay alignment scheme commonly used in the industry, wherein DPD calibration needs 3 iterations, and an ACPR value can reach a convergence value; by adopting the scheme used by the application, the ACPR can collect the value only by 2 iterations of DPD calibration. That is, the convergence time is reduced by about 33%.
According to the time delay alignment method provided by the embodiment of the application, the coarse time delay value is determined by considering the common influence of the second time delay amount and the time delay amount weighting value, and compared with the method of directly taking the first time delay amount as the coarse time delay value, the method not only further processes the first time delay amount, but also further corrects the first time delay amount by using the memory depth parameter, and the coarse time delay value is determined in such a way, so that the convergence speed of DPD can be effectively accelerated, and the convergence time is saved.
In one embodiment, determining the second time domain delay amount based on the first time domain delay amount includes:
amplifying based on the first time domain delay amount to obtain a plurality of time domain delay amounts;
A second time domain delay amount is determined based on the plurality of time domain delay amounts.
As shown in fig. 5, after the delay device acquires the first time domain delay amount n_max, the delay device may further process the first time domain delay amount n_max to obtain a second time domain delay amount loc. For example, the delayer may amplify based on the first time domain delay amount n_max to obtain a plurality of time domain delay amounts, for example: n_max-3, n_max-2, n_max-1, n_max, n_max+1, n_max+2, and n_max+3, then substituting n_max-3, n_max-2, n_max-1, n_max, n_max+1, n_max+2, n_max+3 into equation 2 yields d (n_max-3), d (n_max-2), d (n_max-1), d (n_max), d (n_max+1), d (n_max+2), and then obtaining the intermediate parameters m and m 1 by equations 4, 5: (equation 4)
Where m represents an intermediate parameter, || represents an absolute value operation, and d (n_max+1), d (n_max-1), d (n_max+2), and d (n_max-2) represent time domain correlation values.
(Equation 5)
Where m 1 represents an intermediate parameter, || represents an absolute value operation, d (n_max), d (n_max-2), d (n_max+1), d (n_max-3) represent time domain correlation values.
The delayer may determine the second time-domain delay amount loc by judging the positive and negative conditions of the intermediate parameters m and m 1. If "m <0 and m 1 > 0" is satisfied, outputting a second time domain delay amount loc, and loc=n_max-1; otherwise, loc is output, and loc=n_max. It can be seen that the second time domain delay amount loc is equal to or less than the first time domain delay amount n_max.
Shi Yanqi can also determine the time domain delay amount weighting value mem_dif by memorizing the depth parameter mem_depth. When manual_adj_en (Manual debug mode enable signal) is 0, indicating that the automatic debug mode is entered, when mem_dif is determined by equation 6 from externally input mem_depth:
(equation 6)
Wherein,Representing the time domain delay amount weighting value, ceil () represents discarding the decimal place in the data, leaving only the integer digits, mem_depth represents the memory depth parameter.
If the manual_adj_en is 1, the Manual debug mode is entered, and the delayer can directly acquire the externally input parameter mem_dif.
The time delay alignment method provided by the embodiment of the application describes the specific mode of calculating the second time domain delay amount and the time domain delay amount weighted value in detail, and can ensure the smooth acquisition of the time delay parameter, thereby ensuring the smooth execution of the coarse time delay alignment step.
In one embodiment, the delay alignment method further comprises:
Performing time domain correlation on the forward signal and the feedback signal to obtain a first time domain delay amount; the first time domain delay amount is a time domain delay amount corresponding to the time domain when the correlation value obtained by performing time domain correlation is maximum.
The delay may time-domain correlate the forward signal z (n) with the feedback signal y (n) to obtain a first time-domain delay n_max. As shown in fig. 7, the delay may select N consecutive points ahead of the forward signal z (N) and the feedback signal y (N), respectively; then, in the range of [ 0M ], the forward signal Z (n) is subjected to traversal delay processing, namely, Z -1、Z-2、...、Z-M in the corresponding graph. Delay processing refers to the addition of 0 at the forefront of Z (n), the number of 0 additions being dependent on the Z superscript (e.g., Z -1 for 1 addition of 0, Z -M for M additions of 0), and the dropping of a consecutive number of data at the end of Z (n) (the number of drops being dependent on the Z superscript, e.g., Z -1 for the last drop, and Z -M for the last consecutive M data).
Secondly, the delayer can perform conjugate signals of M z (n) sequences after traversing delay processing and feedback signals respectively) Performing point multiplication accumulation on the sequence (as shown in a formula 2) to obtain a sequence d (0), d (1), d (2), d (M) in the corresponding diagram) with the length of 'M+1';
Finally, the delayer searches the maximum value d (n_max) in d and the index value n_max (the first time domain delay amount: the time domain delay amount corresponding to the maximum correlation value obtained by performing time domain correlation) corresponding to Max in the corresponding graph, and can output d (n_max-3), d (n_max-2), d (n_max-1), d (n_max), d (n_max+1), d (n_max+2) and d (n_max+3) to enter a direction judging module of the delayer for further processing.
The time delay alignment method provided by the embodiment of the application describes the calculation method of the first time domain delay amount in detail. The first time domain delay amount is obtained to provide data preparation for final calculation of the coarse delay value, and smooth execution of the coarse delay step is ensured.
In one embodiment, the delay alignment method further comprises:
determining a first fine delay value based on the first time domain delay amount and the window function order;
Determining filter coefficients based on the first refined delay value and the window function generation value;
And performing fine time delay alignment on the forward signal after coarse time delay alignment and the feedback signal after coarse time delay alignment based on the filter coefficient.
As shown in fig. 3, the delay alignment may also include a fine delay alignment. As shown in fig. 8, the delayer may obtain a first time domain delay amount n_max and a preset window function order fil_ord (fil_ord is a positive integer, which may be set according to practical needs, and the application does not specifically limit this), determine, by using a filter coefficient generating module, a first fine delay value n_frac_corr based on the first time domain delay amount n_max and the window function order fil_ord, then further process the first fine delay value n_frac_corr, and generate, by combining with a window function generating value win_ coe, a filter coefficient filter_ coe by using a filter generating function. The delayer may perform fine delay alignment of the coarse delay-aligned forward signal z_ coa _align (n) with the coarse delay-aligned feedback signal y_ coa _align (n), i.e., perform fractional delay alignment of the coarse delay-aligned forward signal z_ coa _align (n) with the feedback signal y_ coa _align (n), based on the filter coefficients filter_ coe.
According to the time delay alignment method provided by the embodiment of the application, the filter coefficient is determined through the first time domain delay amount, the window function order and the window function generation value, and the forward signal after coarse time delay alignment and the feedback signal are subjected to fine time delay alignment based on the filter coefficient, so that a brand new fine time delay alignment method is provided, and the time delay alignment effect can be optimized. In addition, the technical scheme also has the following advantages:
(1) Interpolation is not needed, so that a higher clock rate is not needed, and power consumption is saved. The interpolation scheme adopted in the industry is to interpolate the sampling rate of the signal to a higher value, for example, the interpolation can obtain the time delay precision of 0.5 sample points by two times (the sampling rate becomes 2 times before interpolation), and the interpolation can obtain the time delay precision of 0.25 sample points by 4 times (the sampling rate becomes 4 times before interpolation). The application can obtain the time delay precision of 0.1 sample point, but the sampling rate is only 1/10 of the interpolation scheme, and the corresponding clock rate is only 1/10 of the interpolation scheme. The clock speed is in direct proportion to the power consumption of the chip, and the power consumption obtained by the scheme is only 1/10 of that of the interpolation scheme;
(2) And FFT/IFFT operation is not needed, so that operation resources are saved, and operation time is reduced. The frequency domain alignment scheme adopted in the current industry needs to convert the forward signal and the feedback signal into the frequency domain through FFT operation, and then convert the forward signal and the feedback signal into the time domain through IFFT after time delay alignment. The application can save the resources required by one FFT operation and one IFFT operation and the operation time required by FFT/IFFT.
In one embodiment, determining the first fine delay value based on the first time domain delay amount and the window function order comprises:
determining a second fine delay value based on the first time domain delay amount;
the first fine delay value is determined based on the second fine delay value and the window function order.
As shown in fig. 8, after obtaining the first time domain delay n_max, the delayer may obtain d (n_max-2), d (n_max-1), d (n_max), d (n_max+1), d (n_max+2) in the coarse delay alignment by calculating based on the fine delay value calculation module through formula 2, and then calculate the second fine delay value n_frac (the second fine delay value is a fraction) by using formula 7:
(equation 7)
Wherein,Representing intermediate parameters, d (n_max-2), d (n_max-1), d (n_max), d (n_max+1), d (n_max+2) representing time-domain correlation values,/>Representing intermediate parameters,/>Representing a second refined time delay value.
As shown in fig. 9, the delayer may obtain a preset window function order fil_ord, and then correct the second fine delay value n_frac based on the window function order fil_ord to obtain a first fine delay value n_frac_corr, where the specific calculation is as shown in formula 8:
(equation 8)
Wherein,Representing intermediate parameters,/>Representing window function order,/>Representing intermediate parameters, ceil () represents discarding the decimal place in the data, leaving only the integral digits,/>Representing intermediate parameters,/>Representing a first refined time delay value,/>Representing a second refined time delay value.
The time delay alignment method provided by the embodiment of the application describes the specific method for determining the first fine time delay value based on the first time domain delay amount and the window function order in detail, provides necessary data preparation for fine time delay alignment, and ensures smooth implementation of the fine time delay alignment step.
In one embodiment, determining the filter coefficients based on the first refined delay value and the window function generation value comprises:
determining a window function generation value based on the window function order and the window function type;
the filter coefficients are determined based on the first refined delay value and the window function generation value.
Window function generation requires two parameters to be provided: window function order filjord and window function type win_type. The delayer may generate the window function generation value win_ coe according to the window function order fil_ord and the window function type win_type.
The window function type win_type may be selected from several types commonly used in mathematics, as shown in the following table (including but not limited to the table entry). In practical application, the window function type corresponding to the best performance can be obtained according to the system selection performance of practical test (the index for representing the performance is adjacent channel power ratio ACPR, error vector magnitude (Error Vector Magnitude, EVM)).
The filter coefficient generation module in the delayer may obtain the first fine delay value n_frac_corr, and determine the filter coefficient filter_ coe based on the first fine delay value n_frac_corr and the window function generation value win_ coe, as shown in formula 9:
(equation 9)
Wherein,Representing intermediate parameters,/>Representing a first refined time delay value,/>Representing the filter coefficients,/>Representing window function generation values.
The time delay alignment method provided by the embodiment of the application describes the specific mode of determining the filter coefficient based on the first fine time delay value and the window function generation value in detail, the fine time delay alignment provides necessary data preparation, and the smooth implementation of the fine time delay alignment step is ensured.
In one embodiment, fine time delay alignment of the coarse time delay aligned forward signal with the coarse time delay aligned feedback signal based on filter coefficients comprises:
convolving the feedback signal after the filter coefficient is aligned with the coarse delay;
And performing fine time delay alignment on the forward signal after coarse time delay alignment and the feedback signal after coarse time delay alignment based on a convolution operation result.
The delayer may perform convolution calculation on the generated filter_ coe and the feedback signal y_ coa _align (n) after coarse delay alignment, to obtain y_align (n). The delayer may perform fine delay alignment on the coarse delay aligned forward signal and the feedback signal based on y_align (n), and output the fine delay aligned feedback signal y_align (n) and the forward signal z_align (n), where z_align (n) =z_ coa _align (n) (the coarse delay aligned forward signal).
The time delay alignment method provided by the embodiment of the application describes the specific process of performing the fine time delay alignment on the forward signal and the feedback signal after the coarse time delay alignment based on the filter coefficient in detail, which is a necessary step of the fine time delay alignment, and the step ensures the smooth implementation of the fine time delay alignment.
The method of the above embodiment is further described below by way of several specific examples:
[ example 1]
1) Transmitting a 5G NR modulation signal through an information source 1, wherein the bandwidth is 100MHz, and the modulation mode is 256QAM;
2) The signal enters the DFE, and enters digital up-conversion (Digital Up Converter, DUC) and crest factor reduction (Crest Factor Reduction, CFR) in sequence for processing;
3) Sending the signals processed by the CFR to DPD for processing;
4) DPD collects forward signal z (n) and feedback signal y (n) sent by transciever chip 2 feedback link;
5) Performing time delay alignment processing on z (n) and y (n), and sending the aligned signals to a predistorter (training) shown in fig. 1 for processing; wherein, the value of M in coarse delay alignment is 1000, the manual_adj_en in fine delay is 1, and the DPD model parameter mem_depth is 4;
6) The signal processed by the predistortion processor shown in fig. 1 is sent to the radio frequency chip 3 to complete the conversion of the digital intermediate frequency signal into the radio frequency signal, the frequency point is 2565MHz, and the air interface power is 24dbm;
7) The radio frequency signal is sent to a power amplifier 4 for power amplification;
8) The amplified signal is processed by a radio frequency filter 5;
9) And finally transmitted via the antenna 6.
[ Example 2]
1) Transmitting a 5G NR modulation signal through an information source 1, wherein the bandwidth is 100MHz, and the modulation mode is 256QAM;
2) The signal enters the DFE, and enters the DUC and the CFR in sequence for processing;
3) Sending the signals processed by the CFR to DPD for processing;
4) DPD collects forward signal z (n) and feedback signal y (n) sent by transciever chip 2 feedback link;
5) Performing time delay alignment processing on z (n) and y (n), and sending the aligned signals to a predistorter (training) shown in fig. 1 for processing; wherein, the value of M in coarse delay alignment is 500, the manual_adj_en in fine delay is 0, and the mem_dif is 1;
6) The signal processed by the predistortion processor shown in fig. 1 is sent to the radio frequency chip 3 to complete the conversion of the digital intermediate frequency signal into the radio frequency signal, the frequency point is 2565MHz, and the air interface power is 24dbm;
7) The radio frequency signal is sent to a power amplifier 4 for power amplification;
8) The amplified signal is processed by a radio frequency filter 5;
9) And finally transmitted via the antenna 6.
[ Example 3]
1) Transmitting a 5G NR modulation signal through an information source 1, wherein the bandwidth is 100MHz, and the modulation mode is 256QAM;
2) The signal enters the DFE, and enters the DUC and the CFR in sequence for processing;
3) Sending the signals processed by the CFR to DPD for processing;
4) DPD collects forward signal z (n) and feedback signal y (n) sent by transciever chip 2 feedback link;
5) Performing time delay alignment processing on z (n) and y (n), and sending the aligned signals to a predistorter (training) shown in fig. 1 for processing; wherein, the value of M in coarse delay alignment is 200, the manual_adj_en in fine delay is 0, and the mem_dif is 3;
6) The signal processed by the predistortion processor shown in fig. 1 is sent to the radio frequency chip 3 to complete the conversion of the digital intermediate frequency signal into the radio frequency signal, the frequency point is 2565MHz, and the air interface power is 24dbm;
7) The radio frequency signal is sent to a power amplifier 4 for power amplification;
8) The amplified signal is processed by a radio frequency filter 5;
9) And finally transmitted via the antenna 6.
The time delay alignment device provided by the application is described below, and the time delay alignment device and the time delay alignment method described above can be referred to correspondingly.
Fig. 10 is a schematic structural diagram of a delay alignment device according to an embodiment of the present application. Referring to fig. 10, the delay alignment device provided by the embodiment of the present application may include:
a direction determination module 1010, configured to determine a coarse delay value based on the first time domain delay amount and the memory depth parameter;
A coarse delay alignment module 1020, configured to perform coarse delay alignment on the forward signal and the feedback signal based on the coarse delay value.
According to the delay alignment device provided by the embodiment of the application, the first time domain delay amount is further processed and corrected by combining the memory depth in the DPD model parameters, so that a coarse delay value is obtained, and the forward signal and the feedback signal are subjected to coarse delay alignment based on the coarse delay value, so that the convergence speed of the DPD can be increased, the convergence time is effectively reduced, and the efficiency of a digital predistortion algorithm is improved.
Fig. 11 illustrates a physical structure diagram of an electronic device, as shown in fig. 11, which may include: processor 1110, communication interface Communications Interface 1120, memory 1130, and communication bus 1140, wherein processor 1110, communication interface 1120, memory 1130 perform communication with each other through communication bus 1140. Processor 1110 may call logic instructions in memory 1130 to perform a latency alignment method, including, for example:
determining a coarse delay value based on the first time domain delay amount and the memory depth parameter;
and performing coarse delay alignment on the forward signal and the feedback signal based on the coarse delay value.
Further, the logic instructions in the memory 1130 described above may be implemented in the form of software functional units and sold or used as a stand-alone product, stored on a computer-readable storage medium. Based on this understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, comprising several instructions for causing a computer device (which may be a personal computer, a server, a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a usb disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
In another aspect, the present application also provides a non-transitory computer readable storage medium having stored thereon a computer program which, when executed by a processor, is implemented to perform the steps of the delay alignment method provided by the methods described above, for example, comprising:
determining a coarse delay value based on the first time domain delay amount and the memory depth parameter;
and performing coarse delay alignment on the forward signal and the feedback signal based on the coarse delay value.
The apparatus embodiments described above are merely illustrative, wherein the elements illustrated as separate elements may or may not be physically separate, and the elements shown as elements may or may not be physical elements, may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art will understand and implement the present invention without undue burden.
From the above description of the embodiments, it will be apparent to those skilled in the art that the embodiments may be implemented by means of software plus necessary general hardware platforms, or of course may be implemented by means of hardware. Based on this understanding, the foregoing technical solution may be embodied essentially or in a part contributing to the prior art in the form of a software product, which may be stored in a computer readable storage medium, such as ROM/RAM, a magnetic disk, an optical disk, etc., including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the method described in the respective embodiments or some parts of the embodiments.
In addition, it should be noted that: the terms "first," "second," and the like in embodiments of the present application are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the application are capable of operation in sequences other than those illustrated or otherwise described herein, and that the "first" and "second" distinguishing between objects generally are not limited in number to the extent that the first object may, for example, be one or more.
In the embodiment of the application, the term "and/or" describes the association relation of the association objects, which means that three relations can exist, for example, a and/or B can be expressed as follows: a exists alone, A and B exist together, and B exists alone. The character "/" generally indicates that the context-dependent object is an "or" relationship.
In the embodiment of the application, the "determining B based on a" means that a is considered when determining B. Not limited to "B can be determined based on A alone", it should also include: "B based on A and C", "B based on A, C and E", "C based on A, further B based on C", etc. Additionally, a may be included as a condition for determining B, for example, "when a satisfies a first condition, B is determined using a first method"; for another example, "when a satisfies the second condition, B" is determined, etc.; for another example, "when a satisfies the third condition, B" is determined based on the first parameter, and the like. Of course, a may be a condition in which a is a factor for determining B, for example, "when a satisfies the first condition, C is determined using the first method, and B is further determined based on C", or the like.
The term "plurality" in embodiments of the present application means two or more, and other adjectives are similar.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present application, and are not limiting; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application.
Claims (8)
1. A method of time delay alignment, comprising:
determining a coarse delay value based on the first time domain delay amount and the memory depth parameter;
aligning the forward signal with the feedback signal in a coarse delay based on the coarse delay value;
the determining the coarse delay value based on the first time domain delay amount and the memory depth parameter includes:
determining a second time domain delay amount based on the first time domain delay amount, and determining a time domain delay amount weighting value based on the memory depth parameter;
determining the coarse delay value based on the second time domain delay amount and the time domain delay amount weighting value;
the method further comprises the steps of:
Performing time domain correlation on the forward signal and the feedback signal to obtain the first time domain delay amount; the first time domain delay amount is the time domain delay amount corresponding to the time domain when the correlation value obtained by performing time domain correlation is maximum.
2. The time delay alignment method of claim 1, further comprising:
Determining a first fine delay value based on the first time domain delay amount and a window function order;
Determining filter coefficients based on the first refined delay value and a window function generation value;
And aligning the forward signal after coarse delay alignment with the feedback signal after coarse delay alignment based on the filter coefficient.
3. The time delay alignment method of claim 1 wherein said determining a second time domain delay amount based on said first time domain delay amount comprises:
Amplifying based on the first time domain delay amount to obtain a plurality of time domain delay amounts;
the second time domain delay amount is determined based on the plurality of time domain delay amounts.
4. The delay alignment method of claim 2, wherein the determining a first refined delay value based on the first time domain delay amount and a window function order comprises:
determining a second fine delay value based on the first time domain delay amount;
the first fine delay value is determined based on the second fine delay value and the window function order.
5. The delay alignment method of claim 2, wherein the determining filter coefficients based on the first refined delay value and a window function generated value comprises:
determining the window function generation value based on the window function order and window function type;
The filter coefficients are determined based on the first refined time delay value and the window function generation value.
6. The delay alignment method of claim 2, wherein said fine delay aligning the coarse delay aligned forward signal with the coarse delay aligned feedback signal based on the filter coefficients comprises:
Convolving the filter coefficient with the feedback signal after coarse delay alignment;
and performing fine time delay alignment on the forward signal after coarse time delay alignment and the feedback signal after coarse time delay alignment based on a convolution operation result.
7. A time delay alignment apparatus, comprising:
the direction judging module is used for determining a coarse delay value based on the first time domain delay amount and the memory depth parameter;
the coarse delay alignment module is used for performing coarse delay alignment on the forward signal and the feedback signal based on the coarse delay value;
the direction judging module is specifically used for:
determining a second time domain delay amount based on the first time domain delay amount, and determining a time domain delay amount weighting value based on the memory depth parameter;
determining the coarse delay value based on the second time domain delay amount and the time domain delay amount weighting value;
the direction judging module is further used for:
Performing time domain correlation on the forward signal and the feedback signal to obtain the first time domain delay amount; the first time domain delay amount is the time domain delay amount corresponding to the time domain when the correlation value obtained by performing time domain correlation is maximum.
8. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements the time delay alignment method of any of claims 1 to 6 when the program is executed by the processor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410162789.4A CN117714247B (en) | 2024-02-05 | 2024-02-05 | Time delay alignment method and device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410162789.4A CN117714247B (en) | 2024-02-05 | 2024-02-05 | Time delay alignment method and device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN117714247A CN117714247A (en) | 2024-03-15 |
| CN117714247B true CN117714247B (en) | 2024-06-18 |
Family
ID=90151999
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202410162789.4A Active CN117714247B (en) | 2024-02-05 | 2024-02-05 | Time delay alignment method and device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN117714247B (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102984099A (en) * | 2012-11-23 | 2013-03-20 | 陕西理工学院 | Algorithm for digital predistortion fraction time delay estimation and signal alignment and achievement thereof |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105516051A (en) * | 2015-11-26 | 2016-04-20 | 西安电子科技大学 | Digital pre-distortion fractional delay estimation and signal alignment algorithm and system |
| CN107911178B (en) * | 2017-11-14 | 2020-01-14 | 京信通信***（中国）有限公司 | Channel calibration method and device |
| CN109462562B (en) * | 2018-11-02 | 2021-10-12 | 三维通信股份有限公司 | Digital pre-distortion processing method applied to multi-mode RRU |
| CN110601665B (en) * | 2019-08-23 | 2023-05-23 | 海南电网有限责任公司 | Digital predistorter design method and device based on power amplifier model clipping |
| CN114726727A (en) * | 2020-12-21 | 2022-07-08 | 深圳市中兴微电子技术有限公司 | Time delay adjusting method and device, storage medium and electronic device |
| CN112787601B (en) * | 2020-12-28 | 2022-05-20 | 北京邮电大学 | High-efficiency predistortion method for hundred megahertz signal bandwidth power amplifier |
| CN112838995B (en) * | 2020-12-31 | 2023-02-03 | 北京新岸线移动多媒体技术有限公司 | Broadband digital predistortion method and digital predistorter |
| WO2023226444A1 (en) * | 2022-05-27 | 2023-11-30 | 华为技术有限公司 | Digital pre-distortion circuit, and digital pre-distortion method and device |
| CN115278746B (en) * | 2022-07-28 | 2023-03-28 | 北京邮电大学 | Self-adaptive fast error correction digital predistortion method for 5G broadband power amplifier |
| CN115842566B (en) * | 2022-11-28 | 2023-09-15 | 哈尔滨工程大学 | CNN-Bi-LSTM-based self-interference digital cancellation method for jammers |
| CN117240671A (en) * | 2023-10-07 | 2023-12-15 | 中电科思仪科技股份有限公司 | Digital predistortion method for improving memory polynomial model based on FFT convolution correlation function |
-
2024
- 2024-02-05 CN CN202410162789.4A patent/CN117714247B/en active Active
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102984099A (en) * | 2012-11-23 | 2013-03-20 | 陕西理工学院 | Algorithm for digital predistortion fraction time delay estimation and signal alignment and achievement thereof |
Non-Patent Citations (1)
| Title |
|---|
| 基于循环平稳特性的欠采样宽带数字预失真研究;兰榕;胡欣;邹峰;王刚;罗积润;;电子与信息学报;20200515(第05期);全文 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN117714247A (en) | 2024-03-15 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP4284630B2 (en) | Distortion compensation amplifier | |
| US7873116B2 (en) | Transmitter | |
| CN103685111B (en) | Calculating method of digital pre-distortion parameters and pre-distortion system | |
| CN100566312C (en) | Be used for the digital pre-distortion that linearisation has the power amplifier of asymmetrical characteristic | |
| EP3416340A1 (en) | Method and system for baseband predistortion linearization in multi-channel wideband communication systems | |
| US20060078065A1 (en) | Digital pre-distortion technique using nonlinear filters | |
| CN106911624B (en) | Channel compensation calibration method and system | |
| KR102141257B1 (en) | Method and system for aligning signals widely spaced in frequency for wideband digital predistortion in wireless communication systems | |
| CN112838995B (en) | Broadband digital predistortion method and digital predistorter | |
| US8451055B2 (en) | Distortion compensating apparatus, transmitting apparatus, and distortion compensating method | |
| CN102075469B (en) | Estimation method for signal delay time of digital pre-distortion system | |
| KR20140096126A (en) | System linearization | |
| US9614634B2 (en) | Method and device for cancelling a narrow band interference in a single carrier signal and computer program | |
| WO2012066380A1 (en) | Joint process estimator with variable tap delay line for use in power amplifier digital predistortion | |
| US9143091B2 (en) | Distortion compensating apparatus, transmitter, distortion compensating method, and transfer function calculating method | |
| WO2011104955A1 (en) | Signal processing circuit and communication device containing said circuit | |
| EP2437452A1 (en) | Adaptive clipping of symbols based on signal quality | |
| CN117714247B (en) | Time delay alignment method and device | |
| US10298366B2 (en) | Circuit and method for predistortion | |
| CN110581817A (en) | service data processing method and device | |
| JP2009224922A (en) | Peak suppression apparatus, wireless transmitter, and window function generating apparatus | |
| TW201503580A (en) | Pre-distortion method, pre-distortion apparatus and machine readable medium | |
| CN107070413B (en) | Method and device for adjusting input voltage of power amplifier | |
| KR20100092597A (en) | Method of estimating frequency offset in an ofdm system using a pilot symbol | |
| JP5004823B2 (en) | Transmitter |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant |