CN117707988A

CN117707988A - Method and device for recycling memory

Info

Publication number: CN117707988A
Application number: CN202310998357.2A
Authority: CN
Inventors: 王红照
Original assignee: Honor Device Co Ltd
Current assignee: Honor Device Co Ltd
Priority date: 2023-08-08
Filing date: 2023-08-08
Publication date: 2024-03-15

Abstract

The application provides a method and a device for recycling a memory, wherein the method comprises the following steps: setting recovery time intervals of each class in a plurality of classes according to the size of the memory block type (class), wherein the recovery time intervals of at least two classes in the classes are different; and according to the recovery time interval of the plurality of class, performing periodic memory check recovery on the plurality of class. According to the scheme, proper recovery time intervals are set for each class mainly at class granularity, so that more proper recovery time intervals are set for classes with different sizes, and the technical problem that recovery is not timely due to the fact that all classes are uniform and fixed time intervals in the prior art is effectively solved.

Description

Method and device for recycling memory

Technical Field

The present disclosure relates to the field of memory recovery technologies, and in particular, to a method and apparatus for recovering a memory.

Background

scudo is a very widely used native memory allocator, and each application program execution service needs to apply and release memory through scudo. From the viewpoint of an operating system, the memory held by the scudo is monopolized by a process executing the service and cannot be reused by other processes, when the process does not use the memory any more, the fewer and the better the active memory held by the process are, so that more memory space is made for other processes to use, but the scudo is taken as an active memory allocator, and the memory released by the service (free) is not totally released to the operating system but a part of the memory is reserved as a cache. scudo realizes memory reclamation through both daily memory reclamation (garbage collection, GC) and forced GC, releasing the memory reclamation to the operating system. Daily GC is recovered at a fixed time interval by default, but this recovery method does not take into account the different recovery requirements of different services of different applications, resulting in an unsatisfactory recovery effect. The forced GC triggers the reclamation by actively calling the forced GC interface, but this approach may cause improper reclamation timing, for example, for a certain foreground application, it is likely that the memory needs to be reapplied immediately after the forced GC is completed, resulting in a large performance loss.

In short, the existing memory recovery mechanism has the problems that the memory recovery is not timely or the recovery time is not proper, so that the recovery effect is poor.

Disclosure of Invention

The application provides a method and a device for recovering a memory, which can improve the memory recovery effect.

In a first aspect, a method for reclaiming memory is provided, the method comprising: setting recovery time intervals of each class in a plurality of classes according to the size of the memory block type (class), wherein the recovery time intervals of at least two classes in the classes are different; and according to the recovery time interval of the plurality of class, performing periodic memory check recovery on the plurality of class.

In the technical scheme, mainly at class granularity, set up suitable recovery time interval for it to every class for all have more suitable recovery time interval to the class of equidimension difference, thereby effectively improved the untimely technical problem of recovery that traditional all classes are unified fixed time interval and lead to. In addition, compared with the traditional forced recovery mechanism, the recovery is carried out according to the recovery time interval, so that the technical problem that the recovery time is unsuitable due to forced recovery can be avoided.

With reference to the first aspect, in certain implementations of the first aspect, the plurality of class includes a first class and a second class; the recovery time interval of the first class is greater than the recovery time interval of the second class; the size of the first class is smaller than the size of the second class. That is, the larger the size of the class, the shorter the recovery time interval setting, whereas the smaller the size of the class, the longer the recovery time interval setting. It should be understood that the first class and the second class are any class of the plurality of classes, as long as the relative relationship of the reclamation time interval and the class size is satisfied.

The smaller block memory (i.e., the larger class) is more applicable and more frequently used. Therefore, the probability of memory release can be increased by setting a smaller recovery time interval for a larger class, so that the cached memory is prevented from being released without opportunity because the cached memory is not used for a longer time, and for a smaller class, the cached memory is frequently checked and released after being used because the cached memory is frequently used, and a shorter recovery time interval is not required to be set. In addition, the cache size of larger class will be higher, so setting shorter reclamation time interval can ensure that the memory can be released as much as possible.

With reference to the first aspect, in certain implementation manners of the first aspect, when performing periodic memory check recovery on the plurality of class according to a recovery time interval of the plurality of class, the method may include: for any one class of the plurality of classes, performing memory check on the class every the recovery time interval of the any one class; and when the checking result shows that the number of the idle memory blocks meets the preset condition, recovering and releasing the idle memory to the operating system. That is, for each class, a memory check may be performed every other reclamation time interval. Instead of checking and reclaiming each release, a memory check is performed every reclaiming time interval while releasing. Each release will generate some free memory blocks, when the free memory blocks reach a certain number, they will become free pages, when the number of free pages reaches the age set by the preset condition, they can trigger recovery. So for each class, the memory check is performed every other recovery time interval of the class, and when the number of idle memory blocks is found to meet the preset condition, the idle memory can be released to the operating system according to the idle page.

With reference to the first aspect, in certain implementation manners of the first aspect, the method further includes: setting a recycling threshold of each class in a plurality of classes, wherein the recycling threshold of at least two classes in the classes is different; and for any class in the plurality of classes, when the capacity of the memory to be released of the any class is greater than or equal to the reclamation threshold value of the class, reclaiming the memory to be released of the class and releasing the memory to the operating system.

The reclamation threshold is set at class granularity, and for each class, when the capacity of the memory that is not released (i.e., the free memory block) is greater than or equal to the reclamation threshold for that class, the memory reclamation may be triggered even if the reclamation time interval is not reached. It should be understood that this approach adds an additional threshold starting reclamation mechanism based on the reclamation of the reclamation time interval customized individually, so that the number of additional triggered reclamation times is increased, and the memory cache is reduced.

With reference to the first aspect, in certain implementation manners of the first aspect, the plurality of class includes a third class and a fourth class, and the method further includes: and periodically triggering the memory check recovery of the fourth class according to the transverse check time interval during the periodic memory check recovery of the third class, wherein the transverse check time interval is a positive integer multiple of the recovery time interval of the third class.

The transverse checking mechanism is added, so that the checked frequency of class can be increased, the probability that the memory is released to the operating system is further improved, and the cached memory is reduced. It should be understood that the third class and the fourth class are at least classes among the classes, and there are no other limitations, that is, the third class may be the same class as the first class or the second class, and the fourth class may be the same class as the first class or the second class. It should be appreciated that this approach adds a lateral checking mechanism based on the recovery of the recovery time interval customized for the individual, so that the number of additional triggered recovery times is increased, and the memory cache is reduced.

In one example, the size of the third class is smaller than the size of the fourth class. Considering that smaller class uses more frequently, and therefore triggers a free more frequently, one or more larger class can be checked laterally across smaller class.

In another example, each third class corresponds to one or two fourth classes. In order to make the transverse checking mechanism more reasonable, one or two fourth class are corresponding to each third class, that is, one or two fourth class which are paired with each third class are checked and recycled once every other transverse checking time interval. In this example, the task of non-matching lateral inspection is as uniform as possible, so that the probability of being checked laterally is increased for all the class relatively uniformly, and the processing efficiency is improved.

With reference to the first aspect, in certain implementation manners of the first aspect, the plurality of class includes class0 and at least one regular class, the class0 is used to represent a managed class, the regular class is used to represent an unmanaged class, and the method further includes: at least one regular class is polled in class0 according to a scanning period to determine the recycling opportunity of the at least one regular class, and the scanning period of each class in the at least one regular class is a positive integer multiple of the recycling time interval of the class. class0 is a management node of the memory allocator, and allocation release of other classes triggers allocation release of class0, so that memory release of other classes (i.e., regular class, or non-managed class) can be triggered by the release behavior of class 0. In order to reduce the performance influence, other class can be scanned in a polling mode, and scanning is carried out at intervals of recovery time of one or more other classes, the current scanning class is recorded in class0, and the current scanning position and the scanning step length information are recorded in the corresponding class so as to determine the recovery time of the other classes. It will be appreciated that this approach adds an additional scanning mechanism to the recovery based on a personalized recovery time interval, so that additional recovery opportunities are added, i.e. the likelihood of triggering recovery increases.

In one example, the size of the at least one regular class is greater than or equal to a preset class size threshold. That is, instead of scanning all conventional class, only larger class is scanned, which considers that larger class results in more cache memory with greater likelihood, smaller class is more frequently used, memory release is more timely, and the number of generated cache memory is relatively smaller, while larger class is less used, memory release is not timely enough, and the number of generated cache memory is relatively larger. Therefore, the scanning is only carried out for larger class, and the resource occupation caused by scanning can be reduced on the premise of further improving the memory release opportunity.

In a second aspect, there is provided an apparatus for reclaiming memory, the apparatus comprising means for performing any one of the methods of the first aspect, comprised of software and/or hardware.

In a third aspect, there is provided an electronic device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, which when executed by the processor enables the electronic device to implement any one of the methods of the first aspect.

In a fourth aspect, there is provided a chip comprising a processor for reading and executing a computer program stored in a memory, which when executed by the processor enables an electronic device in which the chip is located to carry out any one of the methods of the first aspect.

Optionally, the chip further comprises a memory, the memory being electrically connected to the processor.

Optionally, the chip may further comprise a communication interface.

In a fifth aspect, a computer readable storage medium is provided, the computer readable storage medium storing a computer program, the computer program being capable of implementing any one of the methods of the first aspect when executed by an electronic device.

In a sixth aspect, a computer program product is provided, the computer program product comprising a computer program capable of implementing any one of the methods of the first aspect when the computer program is executed by an electronic device.

Drawings

FIG. 1 is a schematic diagram of an implementation of memory reclamation using scudo.

Fig. 2 is a schematic diagram of an idle chain of scudo.

Fig. 3 is a schematic diagram of the daily recovery of scudo in a conventional scheme.

Fig. 4 is a schematic flow chart of a method for reclaiming memory according to an embodiment of the present application. The steps of fig. 4 are described below.

Fig. 5 is a schematic diagram illustrating an execution process of a method for reclaiming memory according to an embodiment of the present application.

FIG. 6 is an exemplary diagram of a junction pair case of a lateral inspection mechanism of an embodiment of the present application.

FIG. 7 is a schematic diagram of a scan reclamation of large blocks of class by class0 in an embodiment of the present application.

Fig. 8 is a schematic diagram of an apparatus for reclaiming memory according to an embodiment of the application.

Fig. 9 is a schematic hardware structure of an electronic device according to an embodiment of the present application.

Fig. 10 is a schematic diagram of a hardware structure of another electronic device according to an embodiment of the present application.

Detailed Description

The following describes embodiments of the present application with reference to the drawings.

FIG. 1 is a schematic diagram of an implementation of memory reclamation using scudo. As shown in fig. 1, an application program (app) of the application layer sends dynamic memory allocation (memory allocation, malloc) information to a memory allocator scudo of the local frame layer (active layer) to use the memory, and after the use is completed, a memory release (free) that is no longer needed is released to the scudo, recovered by the scudo, and the recovered memory is released to a memory management unit (i.e., mm module in fig. 1) of the system layer (kernel layer), that is, to an Operating System (OS), that is, a call through mmap and a mulmap/madview interface shown in fig. 1 to release the memory.

In the process of recovering the memory, the memory held by the scudo is exclusive to the process of the app and cannot be reused by other processes. Therefore, when the process is not used any more, the fewer and the better the active memory held by the process, so as to make more memory space available for other processes. However, scudo is used as a type of active memory allocator, the memory of the service free is not completely released to the OS, and a part of the memory is reserved as a cache.

scudo releases memory to the OS through both daily memory reclamation (garbage collection, GC) and forced GC.

Daily GC (lazy GC): when the service calls the free interface to release the memory, the daily GC (synchronous operation) of scudo is triggered. However, not every free triggers the GC, which causes performance problems each time it traverses the free linked list and sorts the free pages before releasing them to the OS. For this purpose, scudo sets a recovery time interval, and the current default recovery time interval is 1 second(s), i.e. when free, it is checked whether the memory block (block) of this size is more than 1s from the last recovery, and if not, it is not recovered. The size (size) of one free page (page) is 4 kilobytes (k).

Forced GC (force GC): scudo provides a mandatory GC interface mallopt (m_purge) that does not set a reclamation trigger condition, releasing the free pages to the OS to the maximum. The interface needs to be actively invoked, but this requires a high level of traffic, such as how to choose the mandatory GC occasion, and not all traffic can choose a proper occasion. For foreground applications, it is likely that the GC has just been completed and memory needs to be reapplied, which can result in performance loss.

Aiming at the problems, the application provides a novel memory recycling method, and different memory block types (classes) are provided with different recycling time intervals, so that the recycling effect is effectively improved, and the memory can be more reasonably recycled to an operating system. Different services can call different specific classes, and the recovery time interval is set according to class granularity (hierarchy), so that the individuation and flexible customization of the recovery memory of the service are realized, the execution performance of the service is better considered, and the resource occupation of a system is optimized.

For a better understanding of the present application, scudo is further described below in conjunction with fig. 2 and 3.

Fig. 2 is a schematic diagram of an idle chain of scudo. As shown in fig. 2, the memory block in scudo is divided into 39 memory block types (class) with different sizes, the minimum class is 32 bytes, the maximum class is 392 kbytes, different idle chains (freelist) are stored in different sizes, and when the memory is released, the memory block of the class is hung on the corresponding freelist. Taking class3 as an example, each batch (transfer) of each free chain may include a plurality of memory blocks (blocks), which may also be referred to as blocks.

Fig. 3 is a schematic diagram of the daily recovery of scudo in a conventional scheme. The bolded arrows represent checkpoints (which can be understood as recovery points) with a time interval of 1s between checkpoints. The small, non-bolded arrows indicate the free at each time. Each free generates some idle blocks, and when the blocks are accumulated to reach the preset page number, namely the page threshold value, the blocks are released to the operating system. That is, it is counted when the free of each check point is reached, if the number of pages of the free block which can be recycled is reached, the number is recycled, and if the number is not reached, the number is not recycled. And the last 1s is due to the failure to reach the recovery interval, i.e. the last free occurs when the 1s interval has not yet been reached. Therefore, idle blocks within the last second interval are buffered. In the last 1s interval, if a large amount of memory is released, this results in a relatively large number of buffers in scudo. That is, at the end of a process, if more memory is released in the last second interval, the cache is left in the scudo because no more memory is being recycled, and if too much cache is left, the hope that the fewer caches will not be satisfied is not satisfied.

For example, in a test trial, three size blocks 96K, 128K, 392K of the layer synthesizer (surfacefringer) process cached 6 megam, 8M and 24M memory, respectively, as shown in table 1.

TABLE 1

ClassId	Size(B)	Size in freelist(KB)
			33	98320	6248
34	131088	8328
			38	393232	24968

As can be seen from Table 1, blocks of class33 (i.e., size 96k, i.e., 98320 in Table 1) are buffered 6M, blocks of class34 (i.e., size 128k, i.e., 131088 in Table 1) are buffered 8M, and blocks of class38 (i.e., size 392k, i.e., 393232 in Table 1) are buffered 24M. These memories cached in scudo cannot be used by other processes. The present application aims to reduce the memory cached in the scudo by more reasonably reclaiming the memory, that is, to reduce the memory occupation of the scudo.

S401, setting recovery time intervals of each class in the plurality of classes according to the sizes of the classes.

In an embodiment of the present application, the recovery time intervals for at least two of the plurality of class are different.

As described above, there are 39 class for scudo, so the multiple class here is at least two of the 39 class. If the scheme of the embodiment of the present application is applied to other memory allocators, the plurality of class herein is at least two class of the other memory allocator clock.

In one implementation, the plurality of class includes a first class and a second class; the recovery time interval of the first class is greater than the recovery time interval of the second class; the size of the first class is smaller than the size of the second class. That is, the larger the size of the class, the shorter the recovery time interval setting, whereas the smaller the size of the class, the longer the recovery time interval setting. For example, the recovery time interval for class2 may be set to 1 second, the recovery time interval for class36 may be set to 0.5 second, and so on. It should be understood that the first class and the second class are any class of the plurality of classes, as long as the relative relationship of the reclamation time interval and the class size is satisfied. It should be understood that the above values of specific time intervals are only examples, and in practical application, the values may be obtained according to actual requirements, so long as the time intervals are set according to the size of the class, and the time intervals satisfying the larger class are smaller.

The smaller block memory (i.e., the larger class) is more applicable and more frequently used. Therefore, the probability of memory release can be increased by setting a smaller recovery time interval for a larger class, so that the cached memory is prevented from being released without opportunity because the cached memory is not used for a longer time, and for a smaller class, the cached memory is frequently checked and released after being used because the cached memory is frequently used, and a shorter recovery time interval is not required to be set. In addition, the cache size of larger class is higher, for example, as shown in the above examples in table 1, which indicates that the cache size of larger class is higher, so setting a shorter reclamation time interval can ensure that memory is released as much as possible. Whereas for smaller class the inventory is relatively low, so a relatively long recovery time interval can be set. For example, for a 128 kbyte class, statistics at 1s reclamation intervals find that the last 1s of unretractable memory would result in an 8M cache, and when reclaimed at 0.5s reclamation intervals, the last 0.5s of unretractable memory would result in a 4M cache or the like significantly below 8M. For a class of 64 bytes, according to the reclamation time interval of 1s, statistics finds that the memory which cannot be reclaimed in the last 1s only causes 30 bytes of cache, and the reclamation time interval is not required to be shortened for the 30 bytes of memory, so that the processing burden of the electronic equipment is increased.

S402, periodically checking and recycling the memory of the plurality of class according to the recycling time interval of the plurality of class.

That is, after the recovery time intervals of the different class are set, the periodic inspection and recovery can be performed at the own recovery time interval of each class.

In one implementation, step S402 may include: for any one class of the plurality of classes, performing memory check on the class every the recovery time interval of the any one class; and when the checking result is that the number of the idle memory blocks (blocks) meets the preset condition, recovering and releasing the idle memory to the operating system. That is, for each class, a memory check may be performed every other reclamation time interval. Instead of checking and reclaiming each release, a memory check is performed every reclaiming time interval while releasing. Each release will generate some free memory blocks, when the free memory blocks reach a certain number, they will become free pages, when the number of free pages reaches the age set by the preset condition, they can trigger recovery. So for each class, the memory check is performed every other recovery time interval of the class, and when the number of idle memory blocks is found to meet the preset condition, the idle memory can be released to the operating system according to the idle page.

In one implementation, the method further includes:

s403, setting a recovery threshold of each class in a plurality of classes, wherein the recovery threshold of at least two classes in the classes is different;

s404, for any one class of the plurality of classes, when the capacity of the memory to be released of the any one class is greater than or equal to the recycling threshold of the class, recycling the memory to be released of the class and releasing the memory to be released of the class to the operating system.

In one implementation, the plurality of clips includes a third clip and a fourth clip, and the method further includes:

s405, periodically triggering the memory check recovery of the fourth class according to the transverse check time interval while periodically checking and recovering the third class, wherein the transverse check time interval is a positive integer multiple of the recovery time interval of the third class.

Considering that smaller class uses more frequently, and therefore triggers a free more frequently, one or more larger class can be checked laterally across smaller class.

In one example, the size of the third class is smaller than the size of the fourth class.

It should be appreciated that for a lateral inspection interval that is a positive integer multiple of the recovery interval, it is understood that a lateral inspection is performed every other recovery interval or intervals. For example, if the recovery time interval of a class is 0.5 seconds and the transverse checking time interval is 0.5×10=5 seconds, then the transverse checking is performed every 5 seconds, and the checking of the class itself is performed every 0.5 seconds, or it is understood that in this class, the memory of the class is checked every 0.5 seconds and whether recovery to the operating system is required, and the memory of one or more other classes paired with the class is checked every 5 seconds and whether recovery to the operating system is required.

In another example, the number of third and fourth class is allocated according to the number of all class, and the number of third class is less than or equal to the number of fourth class. Taking scudo as an example, there are fewer third class than fourth class, and each third class corresponds to one or more fourth class.

In order to make the transverse checking mechanism more reasonable, one or two fourth class are corresponding to each third class, that is, one or two fourth class which are paired with each third class are checked and recycled once every other transverse checking time interval. In this example, the task of non-matching lateral inspection is as uniform as possible, so that the probability of being checked laterally is increased for all the class relatively uniformly, and the processing efficiency is improved.

In another example, it is also contemplated that larger class will tend to produce more memory, smaller class will be used with a relatively higher probability, with the smallest class paired with the largest class paired with the next largest class paired, and so on. Further increasing the chance of releasing the memory and reducing the cache.

In yet another example, frequency of use may also be considered, as the type of application installed is relatively stable for an electronic device, and the offloading or addition of individual applications does not introduce excessive differences. It is possible to rank all the classes by use frequency from high to low by counting the use frequency of each class over a period of time, and to use class with use frequency greater than or equal to the preset frequency threshold as the third class and class with use frequency less than the preset frequency threshold as the fourth class. In this example, the more frequently the memory is checked and recovered, the lower the probability that the memory of the cache cannot be released, by using the class with higher use frequency, so that in the case of checking such class, the number of times of memory release of the class with lower use frequency can be effectively increased by laterally checking other classes with lower use frequency, and the cache of the class with lower use frequency can be reduced.

In one implementation, the plurality of class includes class0 and at least one regular class, class0 being used to represent a managed class, regular class being used to represent an unmanaged class, the method further comprising:

s406, carrying out polling scanning on at least one conventional class in class0 according to a scanning period to determine the recycling time of the at least one conventional class, wherein the scanning period of each class in the at least one conventional class is a positive integer multiple of the recycling time interval of the class. class0 is a management node of the memory allocator, and allocation release of other classes triggers allocation release of class0, so that memory release of other classes (i.e., regular class, or non-managed class) can be triggered by the release behavior of class 0. In order to reduce the performance influence, other class can be scanned in a polling mode, and scanning is carried out at intervals of recovery time of one or more other classes, the current scanning class is recorded in class0, and the current scanning position and the scanning step length information are recorded in the corresponding class so as to determine the recovery time of the other classes. It will be appreciated that this approach adds an additional scanning mechanism to the recovery based on a personalized recovery time interval, so that additional recovery opportunities are added, i.e. the likelihood of triggering recovery increases.

The method shown in fig. 4 mainly sets a proper recovery time interval for each class in the class granularity, so that the recovery time interval is more proper for the classes with different sizes, and the technical problem of untimely recovery caused by the fact that all the classes are uniform and fixed time intervals in the prior art is effectively solved. In addition, the recovery method according to the recovery time interval is adopted, and only the setting of the time interval is optimized, so that compared with the method directly adopting a traditional forced recovery mechanism, the method for carrying out recovery according to the recovery time interval is reserved, and the technical problem that recovery time is unsuitable due to forced recovery can be avoided. In the traditional scheme, the recovery time intervals are globally uniform, namely the granularity of the class is not considered, all the class uses the same fixed time interval which is 1 second, and the recovery time intervals are set more finely for larger class and smaller class, and the appropriate recovery time intervals are set according to the size of each class, so that a better recovery effect is achieved.

Fig. 5 is a schematic diagram illustrating an execution process of a method for reclaiming memory according to an embodiment of the present application. Fig. 5 can be seen as an example of the method shown in fig. 4. Fig. 5 is exemplified by a plurality of clips including two clips of 32 bytes and a clip of 256k bytes, and for convenience of description, the clip of 32 bytes will be referred to as clip 1 and the clip of 256k bytes will be referred to as clip 37 hereinafter.

As can be seen from FIG. 5, the recovery time interval for class1 is 1s and the recovery time interval for class37 is 0.5s. class1 may be considered an example of a first class and class37 may be considered an example of a second class. In fig. 5, N1 and N2 are both positive integers. The meanings and associated descriptions of arrows and free etc. may refer to fig. 3 and are not repeated.

All the caches formed by the idle blocks before the actual recovery can be released to the memory of the Operating System (OS), and the caches can be released to the operating system when the operating system returns to the first time, but the caches have no opportunity to be released.

FIG. 5 also shows that when the corresponding free is recycled for the N1 st cycle of class1, the cross recycling check between different classes is triggered, that is, the memory check and recycling for class37 is triggered, and since the memory with the release opportunity is released to the operating system when the memory is recycled according to the recycling time interval check of class itself, the cross recycling check is mainly for the memory without the release opportunity, that is, the cached memory. During the lateral inspection, class1 was taken as the third class and class37 was taken as the fourth class.

As is evident from fig. 5, the likelihood of the memory of class37 being released increases after setting the different reclamation time intervals, and the cached memory also decreases because the cached memory occurs in less than 0.5 seconds after the last reclamation. Therefore, the cache memory can be effectively reduced by setting different recovery time intervals for different class according to the size of the class. In addition, the addition of the transverse checking mechanism further increases the checking and recycling of the cache memory which is not released in the class37, so that the cache memory can be further reduced.

Fig. 5 can be considered as an example of the execution of one specific example of steps S401 to S402 and S405 in the method shown in fig. 4.

FIG. 6 is an exemplary diagram of a junction pair case of a lateral inspection mechanism of an embodiment of the present application. As shown in fig. 6, one or two larger class per smaller class is taken as an example. It should be understood that fig. 6 is only exemplary, and not limiting, and only illustrates a portion of class junction pairs, and how to give class junction pairs in actual application may be set according to actual requirements.

In fig. 6, 15 smaller class (third class), 24 larger class (fourth class), a class of 32 bytes is illustrated as a class pair with a class of 392k (393232) bytes and 256k (262160) bytes, i.e., a class of 32 bytes is taken as the third class, and a class of 392k bytes and 256 bytes is taken as the two fourth classes corresponding to the third class. Class of 48 bytes is paired with class of 192k (196624) bytes and 160k (163856) bytes, i.e., class of 48 bytes is taken as the third class and class of 192k bytes and 160k bytes is taken as the two fourth classes corresponding to the third class. Class of 64 bytes is paired with class of 128k bytes and 96k bytes, namely class of 64 bytes is taken as the third class, class of 128k (131088) bytes and class of 96k (98320) bytes is taken as the two fourth classes corresponding to the third class. Class of 800 bytes is paired with class of 1104 bytes and 1648 bytes, i.e. class of 800 bytes is taken as the third class and class of 1104 bytes and 1648 bytes is taken as the two fourth classes corresponding to the third class. Other classes are not exemplified one by one.

FIG. 7 is a schematic diagram of a scan reclamation of large blocks of class by class0 in an embodiment of the present application. That is, FIG. 7 is an example of a scanning mechanism that scans only larger class. As shown in fig. 7, each class corresponds to one scanning cycle, and polling scanning is performed in class0 in accordance with the scanning cycle of each class. Here, a class larger than or equal to 1104 bytes is taken as an example, that is, a class size threshold value preset in the above is taken as 1104 as an example.

The foregoing description of the method of the embodiments of the present application is provided primarily with reference to the accompanying drawings. It should be understood that, although the steps in the flowcharts related to the embodiments described above are shown in order, these steps are not necessarily performed in the order shown in the figures. The steps are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders. Moreover, at least some of the steps in the flowcharts described in the above embodiments may include a plurality of steps or a plurality of stages, which are not necessarily performed at the same time, but may be performed at different times, and the order of the steps or stages is not necessarily performed sequentially, but may be performed alternately or alternately with at least some of the other steps or stages. The apparatus according to the embodiments of the present application will be described below with reference to the accompanying drawings.

Fig. 8 is a schematic diagram of an apparatus for reclaiming memory according to an embodiment of the application. As shown in fig. 8, the apparatus 2000 includes a setting unit 2001 and a recovery unit 2002. The device 2000 may be integrated in an electronic device such as a mobile phone, a tablet computer, a touch screen notebook computer, a server, etc.

The apparatus 2000 can be configured to perform the steps performed by the first device in any of the methods for reclaiming memory described above. For example, the setting unit 2001 may be used to perform step S401, and the recovery unit 2002 may be used to perform step S402. For another example, the setting unit 2001 may be used to perform step S403, and the recovery unit 2002 may be used to perform step S404. For another example, the reclamation unit 2002 may be used to perform steps S405 and S406.

In one implementation, the apparatus 2000 may further include a storage unit to store related data. The memory unit may be integrated in any one of the above units, or may be a unit independent of all the above units.

Fig. 9 is a schematic hardware structure of an electronic device according to an embodiment of the present application. As shown in fig. 9, the electronic apparatus 3000 includes: at least one processor 3001 (only one shown in fig. 9), a memory 3002, and a computer program 3003 stored in the memory 3002 and executable on the at least one processor 3001, the processor 3001 implementing steps in any one of the methods described above when executing the computer program 3003.

It will be appreciated by those skilled in the art that fig. 9 is merely an example of an electronic device and is not meant to be limiting, and that in practice an electronic device may include more or fewer components than shown, or may combine certain components, or different components, such as may also include input-output devices, network access devices, etc.

The processor 3001 may be a central processing unit (central processing unit, CPU), other general purpose processor, digital signal processor (digital signal processor, DSP), application specific integrated circuit (application specific integrated circuit, ASIC), off-the-shelf programmable gate array (field-programmable gate array, FPGA) or other programmable logic device, discrete gate or transistor logic device, discrete hardware components, or the like. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.

Memory 3002 may be an internal storage unit of electronic device 3000 in some embodiments, such as a hard disk or memory of electronic device 3000. The memory 3002 may also be an external storage device of the electronic device 3000 in other embodiments, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) card, a flash card (flash card) or the like, which are provided on the electronic device 3000. Optionally, the memory 3002 may also include both internal storage units and external storage devices of the electronic device 3000. The memory 3002 is used for storing an operating system, application programs, boot loader programs, data, and other programs, etc., such as program codes of the computer programs. The memory 3002 may also be used to temporarily store data that has been output or is to be output.

Fig. 10 is a schematic diagram of a hardware structure of an electronic device according to an embodiment of the present application. As shown in fig. 10, the electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (universal serial bus, USB) interface 130, a charge management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, a sensor module 180, keys 190, a motor 191, an indicator 192, a camera 193, a display 194, a user identification module (subscriber identification module, SIM) card interface 195, and the like. The sensor module 180 may include a pressure sensor 180A, a gyroscope sensor 180B, an air pressure sensor 180C, a magnetic sensor 180D, an acceleration sensor 180E, a distance sensor 180F, a proximity sensor 180G, a fingerprint sensor 180H, a temperature sensor 180J, a touch sensor 180K, an ambient light sensor 180L, a bone conduction sensor 180M, and the like.

It is to be understood that the structure illustrated in the embodiments of the present application does not constitute a specific limitation on the electronic device 100. In other embodiments of the present application, electronic device 100 may include more or fewer components than shown, or certain components may be combined, or certain components may be split, or different arrangements of components. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

Illustratively, the processor 110 shown in FIG. 10 may include one or more processing units, such as: the processor 110 may include an application processor (application processor, AP), a modem processor, a graphics processor (graphics processing unit, GPU), an image signal processor (image signal processor, ISP), a controller, a memory, a video codec, a digital signal processor (digital signal processor, DSP), a baseband processor, and/or a neural network processor (neural-network processing unit, NPU), etc. Wherein the different processing units may be separate devices or may be integrated in one or more processors.

The controller may be a neural hub and a command center of the electronic device 100, among others. The controller can generate operation control signals according to the instruction operation codes and the time sequence signals to finish the control of instruction fetching and instruction execution.

A memory may also be provided in the processor 110 for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. The memory may hold instructions or data that the processor 110 has just used or recycled. If the processor 110 needs to reuse the instruction or data, it can be called directly from the memory. Repeated accesses are avoided and the latency of the processor 110 is reduced, thereby improving the efficiency of the system.

In some embodiments, the processor 110 may include one or more interfaces. The interfaces may include an integrated circuit (inter-integrated circuit, I2C) interface, an integrated circuit built-in audio (inter-integrated circuit sound, I2S) interface, a pulse code modulation (pulse code modulation, PCM) interface, a universal asynchronous receiver transmitter (universal asynchronous receiver/transmitter, UART) interface, a mobile industry processor interface (mobile industry processor interface, MIPI), a general-purpose input/output (GPIO) interface, a subscriber identity module (subscriber identity module, SIM) interface, and/or a universal serial bus (universal serial bus, USB) interface, among others.

In some embodiments, the I2C interface is a bi-directional synchronous serial bus including a serial data line (SDA) and a serial clock line (derail clock line, SCL). The processor 110 may contain multiple sets of I2C buses. The processor 110 may be coupled to the touch sensor 180K, charger, flash, camera 193, etc., respectively, through different I2C bus interfaces. For example, the processor 110 may couple the touch sensor 180K through an I2C interface, causing the processor 110 to communicate with the touch sensor 180K through an I2C bus interface, implementing the touch function of the electronic device 100.

In some embodiments, the I2S interface may be used for audio communication. The processor 110 may contain multiple sets of I2S buses. The processor 110 may be coupled to the audio module 170 via an I2S bus to enable communication between the processor 110 and the audio module 170.

In some embodiments, the audio module 170 may transmit an audio signal to the wireless communication module 160 through the I2S interface, to implement a function of answering a call through the bluetooth headset.

In some embodiments, the PCM interface may also be used for audio communication, sampling, quantizing and encoding analog signals. The audio module 170 and the wireless communication module 160 may be coupled through a PCM bus interface.

In some embodiments, the audio module 170 may also transmit audio signals to the wireless communication module 160 through the PCM interface to implement a function of answering a call through the bluetooth headset. It should be appreciated that both the I2S interface and the PCM interface may be used for audio communication.

In some embodiments, the UART interface is a universal serial data bus for asynchronous communications. The bus may be a bi-directional communication bus. It converts the data to be transmitted between serial communication and parallel communication. UART interfaces are typically used to connect the processor 110 with the wireless communication module 160. For example, the processor 110 communicates with a bluetooth module in the wireless communication module 160 through a UART interface to implement a bluetooth function. In some embodiments, the audio module 170 may transmit an audio signal to the wireless communication module 160 through a UART interface, to implement a function of playing music through a bluetooth headset.

In some embodiments, a MIPI interface may be used to connect the processor 110 with peripheral devices such as a display 194, a camera 193, and the like. The MIPI interfaces include camera serial interfaces (camera serial interface, CSI), display serial interfaces (display serial interface, DSI), and the like. Processor 110 and camera 193 communicate through a CSI interface to implement the photographing function of electronic device 100. The processor 110 and the display 194 communicate via a DSI interface to implement the display functionality of the electronic device 100.

In some embodiments, the GPIO interface may be configured by software. The GPIO interface may be configured as a control signal or as a data signal. GPIO interfaces may be used to connect processor 110 with camera 193, display 194, wireless communication module 160, audio module 170, sensor module 180, and the like. The GPIO interface may also be configured as an I2C interface, an I2S interface, a UART interface, an MIPI interface, etc.

Illustratively, the USB interface 130 is an interface conforming to the USB standard specification, and may specifically be a Mini USB interface, a Micro USB interface, a USB Type C interface, or the like. The USB interface 130 may be used to connect a charger to charge the electronic device 100, and may also be used to transfer data between the electronic device 100 and a peripheral device. And can also be used for connecting with a headset, and playing audio through the headset. The interface may also be used to connect other electronic devices, such as AR devices, etc.

It should be understood that the interfacing relationship between the modules illustrated in the embodiments of the present application is only illustrative, and does not limit the structure of the electronic device 100. In other embodiments of the present application, the electronic device 100 may also use different interfacing manners, or a combination of multiple interfacing manners in the foregoing embodiments.

The charge management module 140 is configured to receive a charge input from a charger. The charger can be a wireless charger or a wired charger. In some wired charging embodiments, the charge management module 140 may receive a charging input of a wired charger through the USB interface 130. In some wireless charging embodiments, the charge management module 140 may receive wireless charging input through a wireless charging coil of the electronic device 100. The charging management module 140 may also supply power to the electronic device through the power management module 141 while charging the battery 142.

The power management module 141 is used for connecting the battery 142, and the charge management module 140 and the processor 110. The power management module 141 receives input from the battery 142 and/or the charge management module 140 and provides power to the processor 110, the internal memory 121, the external memory, the display 194, the camera 193, the wireless communication module 160, and the like. The power management module 141 may also be configured to monitor battery capacity, battery cycle number, battery health (leakage, impedance) and other parameters. In other embodiments, the power management module 141 may also be provided in the processor 110. In other embodiments, the power management module 141 and the charge management module 140 may be disposed in the same device.

The wireless communication function of the electronic device 100 may be implemented by the antenna 1, the antenna 2, the mobile communication module 150, the wireless communication module 160, a modem processor, a baseband processor, and the like.

The antennas 1 and 2 are used for transmitting and receiving electromagnetic wave signals. Each antenna in the electronic device 100 may be used to cover a single or multiple communication bands. Different antennas may also be multiplexed to improve the utilization of the antennas. For example, the antenna 1 may be multiplexed into a diversity antenna of a wireless local area network. In other embodiments, the antenna may be used in conjunction with a tuning switch.

The mobile communication module 150 may provide a solution for wireless communication applied on the electronic device 100, such as at least one of the following: second generation (2th generation,2G) mobile communications solutions, third generation (3 g) mobile communications solutions, fourth generation (4th generation,5G) mobile communications solutions, fifth generation (5th generation,5G) mobile communications solutions. The mobile communication module 150 may include at least one filter, switch, power amplifier, low noise amplifier (low noise amplifier, LNA), etc. The mobile communication module 150 may receive electromagnetic waves from the antenna 1, perform processes such as filtering and amplifying the received electromagnetic waves, and then transmit the electromagnetic waves to a modem processor for demodulation. The mobile communication module 150 may further amplify the signal modulated by the modem processor, and the amplified signal is converted into electromagnetic waves by the antenna 1 and radiated. In some embodiments, at least some of the functional modules of the mobile communication module 150 may be disposed in the processor 110. In some embodiments, at least some of the functional modules of the mobile communication module 150 may be provided in the same device as at least some of the modules of the processor 110.

The modem processor may include a modulator and a demodulator. The modulator is used for modulating the low-frequency baseband signal to be transmitted into a medium-high frequency signal. The demodulator is used for demodulating the received electromagnetic wave signal into a low-frequency baseband signal. The demodulator then transmits the demodulated low frequency baseband signal to the baseband processor for processing. The low frequency baseband signal is processed by the baseband processor and then transferred to the application processor. The application processor outputs sound signals through an audio device (not limited to the speaker 170A, the receiver 170B, etc.), or displays images or video through the display screen 194. In some embodiments, the modem processor may be a stand-alone device. In other embodiments, the modem processor may be provided in the same device as the mobile communication module 150 or other functional module, independent of the processor 110.

The wireless communication module 160 may provide solutions for wireless communication including wireless local area network (wireless local area networks, WLAN) (e.g., wireless fidelity (wireless fidelity, wi-Fi) network), bluetooth (BT), global navigation satellite system (global navigation satellite system, GNSS), frequency modulation (frequency modulation, FM), near field wireless communication technology (near field communication, NFC), infrared technology (IR), etc., applied to the electronic device 100. The wireless communication module 160 may be one or more devices that integrate at least one communication processing module. The wireless communication module 160 receives electromagnetic waves via the antenna 2, modulates the electromagnetic wave signals, filters the electromagnetic wave signals, and transmits the processed signals to the processor 110. The wireless communication module 160 may also receive a signal to be transmitted from the processor 110, frequency modulate it, amplify it, and convert it to electromagnetic waves for radiation via the antenna 2.

In some embodiments, antenna 1 of electronic device 100 is coupled to mobile communication module 150 and antenna 2 of electronic device 100 is coupled to wireless communication module 160 such that electronic device 100 may communicate with networks and other electronic devices via wireless communication techniques. The wireless communication technology may include at least one of the following communication technologies: global system for mobile communications (global system for mobile communications, GSM), general packet radio service (general packet radio service, GPRS), code division multiple access (code division multiple access, CDMA), wideband code division multiple access (wideband code division multiple access, WCDMA), time division code division multiple access (time-division code division multiple access, TD-SCDMA), long term evolution (long term evolution, LTE), BT, GNSS, WLAN, NFC, FM, IR technologies. The GNSS may include at least one of the following positioning techniques: global satellite positioning system (global positioning system, GPS), global navigation satellite system (global navigation satellite system, GLONASS), beidou satellite navigation system (beidou navigation satellite system, BDS), quasi zenith satellite system (quasi-zenith satellite system, QZSS), satellite based augmentation system (satellite based augmentation systems, SBAS).

The electronic device 100 implements display functions through a GPU, a display screen 194, an application processor, and the like. The GPU is a microprocessor for image processing, and is connected to the display 194 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. Processor 110 may include one or more GPUs that execute program instructions to generate or change display information.

The display screen 194 is used to display images, videos, and the like. The display 194 includes a display panel. The display panel may employ a liquid crystal display (liquid crystal display, LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (flex-emitting diode), mini-Led, micro-OLED, a quantum dot light-emitting diode (QLED), or the like. In some embodiments, the electronic device 100 may include 1 or N display screens 194, N being a positive integer greater than 1.

The electronic device 100 may implement photographing functions through an ISP, a camera 193, a video codec, a GPU, a display screen 194, an application processor, and the like.

The ISP is used to process data fed back by the camera 193. For example, when photographing, the shutter is opened, light is transmitted to the camera photosensitive element through the lens, the optical signal is converted into an electric signal, and the camera photosensitive element transmits the electric signal to the ISP for processing and is converted into an image visible to naked eyes. ISP can also perform algorithm optimization on noise and brightness of the image. The ISP can also optimize parameters such as exposure, color temperature and the like of a shooting scene. In some embodiments, the ISP may be provided in the camera 193.

The camera 193 is used to capture still images or video. The object generates an optical image through the lens and projects the optical image onto the photosensitive element. The photosensitive element may be a charge coupled device (charge coupled device, CCD) or a Complementary Metal Oxide Semiconductor (CMOS) phototransistor. The photosensitive element converts the optical signal into an electrical signal, which is then transferred to the ISP to be converted into a digital image signal. The ISP outputs the digital image signal to the DSP for processing. The DSP converts the digital image signal into an image signal in a standard RGB, YUV, or the like format. In some embodiments, electronic device 100 may include 1 or N cameras 193, N being a positive integer greater than 1.

The digital signal processor is used for processing digital signals, and can process other digital signals besides digital image signals. For example, when the electronic device 100 selects a frequency bin, the digital signal processor is used to fourier transform the frequency bin energy, or the like.

Video codecs are used to compress or decompress digital video. The electronic device 100 may support one or more video codecs. In this way, the electronic device 100 may play or record video in a variety of encoding formats, such as: dynamic picture experts group (moving picture experts group, MPEG) 1, MPEG2, MPEG3, MPEG4, etc.

The NPU is a neural-network (NN) computing processor, and can rapidly process input information by referencing a biological neural network structure, for example, referencing a transmission mode between human brain neurons, and can also continuously perform self-learning. Applications such as intelligent awareness of the electronic device 100 may be implemented through the NPU, for example: image recognition, face recognition, speech recognition, text understanding, etc.

The external memory interface 120 may be used to connect an external memory card, such as a Secure Digital (SD) card, to enable expanding the memory capabilities of the electronic device 100. The external memory card communicates with the processor 110 through an external memory interface 120 to implement data storage functions. For example, files such as music, video, etc. are stored in an external memory card.

The internal memory 121 may be used to store computer executable program code including instructions. The processor 110 executes various functional applications of the electronic device 100 and data processing by executing instructions stored in the internal memory 121. The internal memory 121 may include a storage program area and a storage data area. The storage program area may store an application program (such as a sound playing function, an image playing function, etc.) required for at least one function of the operating system, etc. The storage data area may store data created during use of the electronic device 100 (e.g., audio data, phonebook, etc.), and so on. In addition, the internal memory 121 may include a high-speed random access memory, and may further include a nonvolatile memory such as at least one magnetic disk storage device, a flash memory device, a universal flash memory (universal flash storage, UFS), and the like.

The electronic device 100 may implement audio functions through an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, an application processor, and the like. Such as music playing, recording, etc.

The audio module 170 is used to convert digital audio information into an analog audio signal output and also to convert an analog audio input into a digital audio signal. The audio module 170 may also be used to encode and decode audio signals. In some embodiments, the audio module 170 may be disposed in the processor 110, or a portion of the functional modules of the audio module 170 may be disposed in the processor 110.

The speaker 170A, also referred to as a "horn," is used to convert audio electrical signals into sound signals. The electronic device 100 may listen to music, or to hands-free conversations, through the speaker 170A.

A receiver 170B, also referred to as a "earpiece", is used to convert the audio electrical signal into a sound signal. When electronic device 100 is answering a telephone call or voice message, voice may be received by placing receiver 170B in close proximity to the human ear.

Microphone 170C, also referred to as a "microphone" or "microphone", is used to convert sound signals into electrical signals. When making a call or transmitting voice information, the user can sound near the microphone 170C through the mouth, inputting a sound signal to the microphone 170C. The electronic device 100 may be provided with at least one microphone 170C. In other embodiments, the electronic device 100 may be provided with two microphones 170C, and may implement a noise reduction function in addition to collecting sound signals. In other embodiments, the electronic device 100 may also be provided with three, four, or more microphones 170C to enable collection of sound signals, noise reduction, identification of sound sources, directional recording functions, etc.

The earphone interface 170D is used to connect a wired earphone. The headset interface 170D may be a USB interface 130 or a 3.5mm open mobile electronic device platform (open mobile terminal platform, OMTP) standard interface, a american cellular telecommunications industry association (cellular telecommunications industry association of the USA, CTIA) standard interface.

The pressure sensor 180A is used to sense a pressure signal, and may convert the pressure signal into an electrical signal. In some embodiments, the pressure sensor 180A may be disposed on the display screen 194. The pressure sensor 180A is of various types, such as a resistive pressure sensor, an inductive pressure sensor, a capacitive pressure sensor, and the like. The capacitive pressure sensor may be a capacitive pressure sensor comprising at least two parallel plates with conductive material. The capacitance between the electrodes changes when a force is applied to the pressure sensor 180A. The electronic device 100 determines the strength of the pressure from the change in capacitance. When a touch operation is applied to the display screen 194, the electronic apparatus 100 detects the touch operation intensity according to the pressure sensor 180A. The electronic device 100 may also calculate the location of the touch based on the detection signal of the pressure sensor 180A. In some embodiments, touch operations that act on the same touch location, but at different touch operation strengths, may correspond to different operation instructions. For example, when a touch operation with a touch operation intensity smaller than a first pressure threshold acts on the short message application icon, an instruction to view the short message is executed. And executing an instruction for newly creating the short message when the touch operation with the touch operation intensity being greater than or equal to the first pressure threshold acts on the short message application icon.

The gyro sensor 180B may be used to determine a motion gesture of the electronic device 100. In some embodiments, the angular velocity of electronic device 100 about three axes (i.e., x, y, and z axes) may be determined by gyro sensor 180B. The gyro sensor 180B may be used for photographing anti-shake. Illustratively, when the shutter is pressed, the gyro sensor 180B detects the shake angle of the electronic device 100, calculates the distance to be compensated by the lens module according to the angle, and makes the lens counteract the shake of the electronic device 100 through the reverse motion, thereby realizing anti-shake. The gyro sensor 180B may also be used for navigating, somatosensory game scenes.

The air pressure sensor 180C is used to measure air pressure. In some embodiments, electronic device 100 calculates altitude from barometric pressure values measured by barometric pressure sensor 180C, aiding in positioning and navigation.

The magnetic sensor 180D includes a hall sensor. The electronic device 100 may detect the opening and closing of the flip cover using the magnetic sensor 180D. In some embodiments, when the electronic device 100 is a flip machine, the electronic device 100 may detect the opening and closing of the flip according to the magnetic sensor 180D; and setting the characteristics of automatic unlocking of the flip cover and the like according to the detected opening and closing state of the leather sheath or the detected opening and closing state of the flip cover.

The acceleration sensor 180E may detect the magnitude of acceleration of the electronic device 100 in various directions (typically three axes). The magnitude and direction of gravity may be detected when the electronic device 100 is stationary. The electronic equipment gesture recognition method can also be used for recognizing the gesture of the electronic equipment, and is applied to horizontal and vertical screen switching, pedometers and other applications.

The distance sensor 180F is used to measure a distance. The electronic device 100 may measure the distance by infrared or laser. In some embodiments, the electronic device 100 may range using the distance sensor 180F to achieve quick focus.

The proximity light sensor 180G may include, for example, a light-emitting diode (LED) and a light detector, such as a photodiode. The light emitting diode may be an infrared light emitting diode. The electronic device 100 emits infrared light outward through the light emitting diode. The electronic device 100 detects infrared reflected light from nearby objects using a photodiode. When sufficient reflected light is detected, it may be determined that there is an object in the vicinity of the electronic device 100. When insufficient reflected light is detected, the electronic device 100 may determine that there is no object in the vicinity of the electronic device 100. The electronic device 100 can detect that the user holds the electronic device 100 close to the ear by using the proximity light sensor 180G, so as to automatically extinguish the screen for the purpose of saving power. The proximity light sensor 180G may also be used in holster mode, pocket mode to automatically unlock and lock the screen.

The ambient light sensor 180L is used to sense ambient light level. The electronic device 100 may adaptively adjust the brightness of the display 194 based on the perceived ambient light level. The ambient light sensor 180L may also be used to automatically adjust white balance when taking a photograph. Ambient light sensor 180L may also cooperate with proximity light sensor 180G to detect whether electronic device 100 is in a pocket to prevent false touches.

The fingerprint sensor 180H is used to collect a fingerprint. The electronic device 100 may utilize the collected fingerprint feature to unlock the fingerprint, access the application lock, photograph the fingerprint, answer the incoming call, etc.

The temperature sensor 180J is for detecting temperature. In some embodiments, the electronic device 100 performs a temperature processing strategy using the temperature detected by the temperature sensor 180J. For example, when the temperature reported by temperature sensor 180J exceeds a threshold, electronic device 100 performs a reduction in the performance of a processor located in the vicinity of temperature sensor 180J in order to reduce power consumption to implement thermal protection. In other embodiments, when the temperature is below another threshold, the electronic device 100 heats the battery 142 to avoid the low temperature causing the electronic device 100 to be abnormally shut down. In other embodiments, when the temperature is below a further threshold, the electronic device 100 performs boosting of the output voltage of the battery 142 to avoid abnormal shutdown caused by low temperatures.

The touch sensor 180K, also referred to as a "touch panel". The touch sensor 180K may be disposed on the display screen 194, and the touch sensor 180K and the display screen 194 form a touch screen, which is also called a "touch screen". The touch sensor 180K is for detecting a touch operation acting thereon or thereabout. The touch sensor may communicate the detected touch operation to the application processor to determine the touch event type. Visual output related to touch operations may be provided through the display 194. In other embodiments, the touch sensor 180K may also be disposed on the surface of the electronic device 100 at a different location than the display 194.

The bone conduction sensor 180M may acquire a vibration signal. In some embodiments, bone conduction sensor 180M may acquire a vibration signal of a human vocal tract vibrating bone pieces. The bone conduction sensor 180M may also contact the pulse of the human body to receive the blood pressure pulsation signal. In some embodiments, bone conduction sensor 180M may also be provided in a headset, in combination with an osteoinductive headset. The audio module 170 may analyze the voice signal based on the vibration signal of the sound portion vibration bone block obtained by the bone conduction sensor 180M, so as to implement a voice function. The application processor may analyze the heart rate information based on the blood pressure beat signal acquired by the bone conduction sensor 180M, so as to implement a heart rate detection function.

The keys 190 include a power-on key, a volume key, etc. The keys 190 may be mechanical keys. Or may be a touch key. The electronic device 100 may receive key inputs, generating key signal inputs related to user settings and function controls of the electronic device 100.

The motor 191 may generate a vibration cue. The motor 191 may be used for incoming call vibration alerting as well as for touch vibration feedback. For example, touch operations acting on different applications (e.g., photographing, audio playing, etc.) may correspond to different vibration feedback effects. The motor 191 may also correspond to different vibration feedback effects by touching different areas of the display screen 194. Different application scenarios (such as time reminding, receiving information, alarm clock, game, etc.) can also correspond to different vibration feedback effects. The touch vibration feedback effect may also support customization.

The indicator 192 may be an indicator light, may be used to indicate a state of charge, a change in charge, a message indicating a missed call, a notification, etc.

The SIM card interface 195 is used to connect a SIM card. The SIM card may be inserted into the SIM card interface 195, or removed from the SIM card interface 195 to enable contact and separation with the electronic device 100. The electronic device 100 may support 1 or N SIM card interfaces, N being a positive integer greater than 1. The SIM card interface 195 may support Nano SIM cards, micro SIM cards, and the like. The same SIM card interface 195 may be used to insert multiple cards simultaneously. The types of the plurality of cards may be the same or different. The SIM card interface 195 may also be compatible with different types of SIM cards. The SIM card interface 195 may also be compatible with external memory cards. The electronic device 100 interacts with the network through the SIM card to realize functions such as communication and data communication. In some embodiments, the electronic device 100 employs esims, i.e.: an embedded SIM card. The eSIM card can be embedded in the electronic device 100 and cannot be separated from the electronic device 100.

It should be noted that, because the content of information interaction and execution process between the above devices/units is based on the same concept as the method embodiment of the present application, specific functions and technical effects thereof may be referred to in the method embodiment section, and will not be described herein again.

It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-described division of the functional units and modules is illustrated, and in practical application, the above-described functional distribution may be performed by different functional units and modules according to needs, i.e. the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-described functions. The functional units and modules in the embodiment may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit, where the integrated units may be implemented in a form of hardware or a form of a software functional unit. In addition, specific names of the functional units and modules are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present application. The specific working process of the units and modules in the above system may refer to the corresponding process in the foregoing method embodiment, which is not described herein again.

The embodiment of the application also provides electronic equipment, which comprises: at least one processor, a memory, and a computer program stored in the memory and executable on the at least one processor, which when executed by the processor causes the electronic device to perform the steps of any of the methods described above.

Embodiments of the present application also provide a computer-readable storage medium storing a computer program that, when executed by an electronic device, can implement the steps in the above-described method embodiments.

The present application provides a computer program product comprising a computer program for performing the steps of the method embodiments described above when the computer program is executed by an electronic device.

The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the present application implements all or part of the flow of the method of the above embodiments, and may be implemented by a computer program to instruct related hardware, where the computer program may be stored in a computer readable storage medium, where the computer program, when executed by a processor, may implement the steps of each of the method embodiments described above. Wherein the computer program comprises computer program code which may be in source code form, object code form, executable file or some intermediate form etc. The computer readable medium may include at least: any entity or device capable of carrying computer program code to a photographing device/electronic apparatus, recording medium, computer memory, read-only memory (ROM), random access memory (random access memory, RAM), electrical carrier signals, telecommunications signals, and software distribution media. Such as a U-disk, removable hard disk, magnetic or optical disk, etc. In some jurisdictions, computer readable media may not be electrical carrier signals and telecommunications signals in accordance with legislation and patent practice.

In the foregoing embodiments, the descriptions of the embodiments are emphasized, and in part, not described or illustrated in any particular embodiment, reference is made to the related descriptions of other embodiments.

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

In the embodiments provided in the present application, it should be understood that the disclosed apparatus/device and method may be implemented in other manners. For example, the apparatus/device embodiments described above are merely illustrative, e.g., the division of the modules or units is merely a logical functional division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection via interfaces, devices or units, which may be in electrical, mechanical or other forms.

The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

It should be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

It should also be understood that the term "and/or" as used in this specification and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes such combinations.

As used in this specification and the appended claims, the term "if" may be interpreted as "when..once" or "in response to a determination" or "in response to detection" depending on the context. Similarly, the phrase "if a determination" or "if a [ described condition or event ] is detected" may be interpreted in the context of meaning "upon determination" or "in response to determination" or "upon detection of a [ described condition or event ]" or "in response to detection of a [ described condition or event ]".

In addition, in the description of the present application and the appended claims, the terms "first," "second," "third," and the like are used merely to distinguish between descriptions and are not to be construed as indicating or implying relative importance.

Reference in the specification to "one embodiment" or "some embodiments" or the like means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," and the like in the specification are not necessarily all referring to the same embodiment, but mean "one or more but not all embodiments" unless expressly specified otherwise. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless expressly specified otherwise.

The above embodiments are only for illustrating the technical solution of the present application, and are not limiting; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application, and are intended to be included in the scope of the present application.

Claims

1. A method for reclaiming memory, comprising:

setting recovery time intervals of each class in a plurality of classes according to the sizes of the memory block types, wherein the recovery time intervals of at least two classes in the classes are different;

and according to the recovery time intervals of the plurality of class, performing periodic memory check recovery on the plurality of class.

2. The method of claim 1, wherein the plurality of clips comprises a first clip and a second clip; the recovery time interval of the first class is greater than the recovery time interval of the second class; the size of the first class is smaller than the size of the second class.

3. The method of claim 1, wherein periodically performing memory check reclamation on the plurality of class according to the reclamation time interval of the plurality of class comprises:

for any one of the plurality of class, performing memory check on the class every the recovery time interval of the any one class;

and when the checking result shows that the number of the idle memory blocks meets the preset condition, recovering and releasing the idle memory to the operating system.

4. The method according to claim 1, wherein the method further comprises:

Setting a recycling threshold of each class of the plurality of classes, wherein the recycling threshold of at least two classes of the plurality of classes is different;

and for any one class of the plurality of classes, when the capacity of the memory to be released of the any one class is greater than or equal to the reclamation threshold value of the class, reclaiming the memory to be released of the class and releasing the memory to be released of the class to an operating system.

5. The method of any one of claims 1 to 4, wherein the plurality of clips comprises a third clip and a fourth clip, the method further comprising:

and periodically triggering the memory check recovery of the fourth class according to a transverse check time interval during the periodic memory check recovery of the third class, wherein the transverse check time interval is a positive integer multiple of the recovery time interval of the third class.

6. The method of claim 5, wherein the size of the third class is smaller than the size of the fourth class.

7. The method of claim 5 or 6, wherein each of the third class corresponds to one or two of the fourth class.

8. The method of any one of claims 1 to 7, wherein the plurality of class includes class0 and at least one regular class, the class0 being used to represent a managed class and the regular class being used to represent an unmanaged class, the method further comprising:

And carrying out polling scanning on the at least one conventional class in the class0 according to a scanning period to determine the recycling time of the at least one conventional class, wherein the scanning period of each class in the at least one conventional class is a positive integer multiple of the recycling time interval of the class.

9. The method of claim 8, wherein the size of the at least one regular class is greater than or equal to a preset class size threshold.

10. An apparatus for reclaiming memory, comprising:

the setting unit is used for setting the recovery time interval of each class in a plurality of classes according to the size of the memory block type class, wherein the recovery time interval of at least two classes in the plurality of classes is different;

and the recovery unit is used for carrying out periodic memory check recovery on the plurality of clips according to the recovery time intervals of the plurality of clips.

11. An electronic device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that the processor, when executing the computer program, causes the electronic device to implement the method of any one of claims 1 to 9.

12. A computer readable storage medium storing a computer program, characterized in that the computer program, when executed by an electronic device, implements the method according to any one of claims 1 to 9.