CN117687805A - Multithreading data synchronization method and system applied to PLC and device - Google Patents

Multithreading data synchronization method and system applied to PLC and device Download PDF

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Publication number
CN117687805A
CN117687805A CN202311709267.3A CN202311709267A CN117687805A CN 117687805 A CN117687805 A CN 117687805A CN 202311709267 A CN202311709267 A CN 202311709267A CN 117687805 A CN117687805 A CN 117687805A
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China
Prior art keywords
data
memory area
independent memory
independent
thread
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CN202311709267.3A
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Chinese (zh)
Inventor
张伟
蔡龙
赵涌
李建光
姜海军
何敏
王栋
刘轲
姜晓
钟文根
徐闱卿
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Nanjing Nari Water Conservancy And Hydropower Technology Co ltd
State Grid Xinyuan Group Co ltd
JIANGXI HONGPING PUMPED STORAGE CO LTD
Nari Technology Co Ltd
Original Assignee
Nanjing Nari Water Conservancy And Hydropower Technology Co ltd
State Grid Xinyuan Group Co ltd
JIANGXI HONGPING PUMPED STORAGE CO LTD
Nari Technology Co Ltd
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Application filed by Nanjing Nari Water Conservancy And Hydropower Technology Co ltd, State Grid Xinyuan Group Co ltd, JIANGXI HONGPING PUMPED STORAGE CO LTD, Nari Technology Co Ltd filed Critical Nanjing Nari Water Conservancy And Hydropower Technology Co ltd
Priority to CN202311709267.3A priority Critical patent/CN117687805A/en
Publication of CN117687805A publication Critical patent/CN117687805A/en
Pending legal-status Critical Current

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Abstract

The invention discloses a multithreading data synchronization method and a system applied to a PLC and a device, wherein the method comprises the following steps: dividing all data used by multithreading into three types of one-write multi-use, multi-write multi-use and public use; according to the relation between the thread and the memory, an independent memory area is allocated; locking each independent memory area; data of each independent memory area are synchronized at fixed time; each thread operates according to the corresponding independent memory area, and the program operation result is put into the independent memory area; updating the data of the actual memory at regular time; and repeating the process of timing synchronization of the data of each independent memory area to the data of the real memory to realize the running of the whole program and the updating of the data. For a complex system with more threads and requiring data synchronization, the invention can greatly reduce the system call overhead of various locks and simultaneously fully utilize the multi-core resources of the processor to realize the parallel synchronous operation of multiple threads, thereby achieving the purposes of improving the efficiency of program operation and the real-time performance of the system.

Description

Multithreading data synchronization method and system applied to PLC and device
Technical Field
The present invention relates to a data synchronization method and system, and more particularly, to a multi-thread data synchronization method and system applied to a PLC and a device.
Background
In the PLC and the device, a large number of threads run, and each thread independently accesses common data, and in order to ensure the consistency of the data, various synchronous locks such as semaphores, mutexes, file locks and the like are used.
When one thread needs to access data, the lock is used for acquiring and locking the use right of the resource, and the lock is released for other threads to use after the use is completed. If one thread attempts to acquire a resource, the other thread has locked the resource, and the thread cannot use until the other thread releases the resource. As in FIG. 1, thread 1 continues to run with resources acquired at time T1, thread 2 fails to acquire resources at time T2, and thread 2 cannot continue to execute until thread 1 releases resources at time T3.
The lock mechanism well solves the problem of multithreading resource competition, but in the device with multiple threads, multiple competition and high real-time requirement in the PLC, the lock mechanism brings about the problem of efficiency.
The common practice is to use a large lock for all resources, when one thread needs a certain part of resources, the lock is used to lock the use rights of all the resources, and after the control is completed, the resources are released for other threads to use. Although the method is simple and is not easy to make mistakes, the final operation effect is equivalent to single-thread operation or single-core operation, and the operation capability of the CPU multi-core cannot be exerted. The other way is to divide the resources into a plurality of small blocks, and lock each small block, and the thread only needs to lock a part of the resources needed by the thread. This approach seems reasonable, but in practice, since the resources are cut down, a lot of threads have a lot of lock requests and release work, and the lock operation is a system level call, which means that the program will switch from user state to system state and back to user state during execution, and this overhead is huge compared with the normal program execution, and as a result, the thread execution time is greatly increased in this way, as shown in fig. 2.
Disclosure of Invention
The invention aims to: the invention aims to provide a multithreading data synchronization method and a multithreading data synchronization system applied to a PLC and a device, so that the system overhead of data synchronization is greatly reduced, and the real-time performance of the whole equipment is improved.
The technical scheme is as follows: the invention comprises the following steps: dividing all data used by multithreading into three types of one-write multi-use, multi-write multi-use and public use; according to the relation between the thread and the memory, an independent memory area is allocated; locking each independent memory area; data of each independent memory area are synchronized at fixed time; each thread operates according to the corresponding independent memory area, and the program operation result is put into the independent memory area; updating the data of the actual memory at regular time; and repeating the process of timing synchronization of the data of each independent memory area to the data of the real memory to realize the running of the whole program and the updating of the data.
The basis for the classification of the data is how many threads the data is written to: the data is written by only one thread and is a write-multipurpose class, the data is written by several threads and is a write-multipurpose class, and the rest data is a common class.
The independent memory area is allocated according to the relation between the thread and the memory, and the specific allocation method comprises the following steps: establishing an independent memory area for a thread corresponding to a write-once multipurpose memory; establishing an independent memory area for a plurality of threads corresponding to the multi-write and multi-purpose memory; an independent memory area is established for the remaining threads.
The locking of each independent memory area is specifically as follows: the memory used independently for a single thread is not locked; local lock is added to the independent memory area shared by multiple threads; global locks are applied to public data.
And when the data of each independent memory area are synchronized at fixed time, synchronizing the data of one-write multi-use and multi-write multi-use to each independent memory area, and not synchronizing the public data.
And when the data of each independent memory area are synchronized at fixed time, the data in the actual memory are repeatedly written into the independent memory according to the direction of the arrow of the read data.
When the data of the actual memory is updated at fixed time, the data in each allocated independent memory is written into the actual memory in sequence, and only the part of each thread or a plurality of threads responsible for writing is written in.
And when the data of the actual memory is updated at fixed time, the data of the independent memory are respectively written into the corresponding actual memory area according to the arrow direction of the data writing.
A multi-thread data synchronization system applied to a PLC and a device is used for realizing a multi-thread data synchronization method applied to the PLC and the device.
A computer readable storage medium having stored thereon a computer program for execution by a processor to implement a multi-threaded data synchronization method as described above for use with a PLC and device.
The beneficial effects are that: for a complex system with more threads and requiring data synchronization, the invention can fully utilize the multi-core resources of the processor to realize the parallel synchronous operation of multiple threads while greatly reducing the system call overhead of various locks in the traditional synchronization mode, thereby achieving the purposes of improving the efficiency of program operation and the real-time performance of the system.
Drawings
FIG. 1 is a schematic diagram of the prior art when a thread needs to access data;
FIG. 2 is a schematic diagram of a prior art resource classification process;
FIG. 3 is a schematic diagram of a multi-threaded data synchronization method according to the present invention.
Detailed Description
The invention is further described below with reference to the accompanying drawings.
The invention discloses a multithreading data synchronization method applied to a PLC and a device, which comprises the following steps:
step 1, dividing all data used by the multithreading into three types of one-write multi-use, multi-write multi-use and public, wherein the data classification is based on how many threads write the data. The data is written by only one thread to be a write-multi-purpose class, the data is written by several threads (the number of the threads can be determined by a user according to actual needs) to be a multi-write-multi-purpose class, and the rest data is a common class.
Step 2, distributing independent memory areas according to the relation between threads and memory: establishing an independent memory area for a thread corresponding to a write-once multipurpose memory; establishing an independent memory area for a plurality of threads corresponding to the multi-write and multi-purpose memory; an independent memory area is established for the remaining threads.
Step 3, unlocking the memory independently used by the single thread; local lock is added to the independent memory area shared by multiple threads; global locks are applied to public data.
And step 4, synchronizing the data of the independent memory areas at fixed time, and synchronizing the write-once multi-purpose and the write-many-purpose data to the independent memory areas without synchronizing the common data.
And 5, each thread operates according to the corresponding independent memory area, and the program operation result is put into the independent memory area.
And 6, updating the data of the actual memory at fixed time, and sequentially writing the data in the independent memories distributed in the step 2 into the actual memory when synchronizing, wherein only each thread or the parts of a plurality of threads responsible for writing are written when writing.
And 7, repeating the steps 4, 5 and 6 to realize the running of the whole PLC or device program and the updating of data.
The invention also comprises a multithreading data synchronization system applied to the PLC and the device, which is used for realizing the multithreading data synchronization method applied to the PLC and the device.
Examples
The multithreading data synchronization method applied to the PLC and the device of the embodiment comprises the following steps:
and step 1, dividing all data used by the multithreading into three types of one-write multi-use, multi-write multi-use and public use. As shown in fig. 3, the data is divided into 7 blocks, wherein D1, D2, D3, D4 are write-once multipurpose data, D5, D6 are write-many multipurpose data, and D7 is common data.
Step 2, distributing independent memory areas according to the relation between threads and memory: establishing an independent memory area for a thread corresponding to a write-once multipurpose memory; establishing an independent memory area for a plurality of threads corresponding to the multi-write and multi-purpose memory; an independent memory area is established for the remaining threads.
7 independent memory areas are built for all 11 threads, namely independent memories 1-7. The independent memories 1 to 4 are respectively used by the threads T1 to T4, the independent memories 5 are used by the threads T5 and T6, the independent memories 6 are used by the threads T7, T8 and T9, and the independent memories 7 are used by the threads T10 and T11.
Step 3, unlocking the memory independently used by the single thread; local lock is added to the independent memory area shared by multiple threads; global locks are applied to public data.
The independent memories 1 to 4 are not locked; adding a local lock 1 to the D5 data of the independent memory 5, wherein the local lock 1 is only used by threads T5 and T6; adding a local lock 2 to the D6 data of the independent memory 6, wherein the local lock 2 is only used by threads T7, T8 and T9; and adding a global lock to the public data D7 in the actual memory for all threads to use.
And step 4, synchronizing the data of the independent memory areas at fixed time, and synchronizing the write-once multi-purpose and the write-many-purpose data to the independent memory areas without synchronizing the common data. During synchronization, the data of D1-D6 in the actual memory are repeatedly written into the independent memories 1-7 according to the arrow direction of the read data.
And 5, each thread operates according to the corresponding independent memory area, and the program operation result is put into the independent memory area.
The threads T1-T4 directly interact data with the corresponding independent memories 1-4; threads T5 and T6 directly interact data with D1, D2, D3, D4 and D6 in the independent memory 5, and interaction with the D5 through a local lock mechanism is needed when the threads interact data; threads T7, T8 and T9 directly interact data with D1, D2, D3, D4 and D5 in the independent memory 6, and interaction with the D6 through a local lock mechanism is needed when the threads interact data; all threads interact through a global lock mechanism when using D7 data.
And 6, updating the data of the actual memory at fixed time, and sequentially writing the data in the independent memories distributed in the step 2 into the actual memory when synchronizing, wherein only each thread or the parts of a plurality of threads responsible for writing are written when writing.
During synchronization, D1 of the independent memory 1 is written into D1 of the actual memory area according to the arrow direction of writing data, D2 of the independent memory 2 is written into D2 of the actual memory area, and D6 of the independent memory 6 is written into D6 of the actual memory area by … …, so that updating of the actual memory is completed.
And 7, repeating the steps 4-6 to realize the running of the whole PLC or device program and the updating of data.
It will be appreciated by those skilled in the art that embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The computer storage media of embodiments of the invention may take the form of any combination of one or more computer-readable media. The computer readable medium may be a computer readable signal medium or a computer readable storage medium. The computer readable storage medium can be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the foregoing. More specific examples (a non-exhaustive list) of the computer-readable storage medium would include the following: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In this document, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

Claims (10)

1. A method for multi-threaded data synchronization for a PLC and a device, comprising: dividing all data used by multithreading into three types of one-write multi-use, multi-write multi-use and public use; according to the relation between the thread and the memory, an independent memory area is allocated; locking each independent memory area; data of each independent memory area are synchronized at fixed time; each thread operates according to the corresponding independent memory area, and the program operation result is put into the independent memory area; updating the data of the actual memory at regular time; and repeating the process of timing synchronization of the data of each independent memory area to the data of the real memory to realize the running of the whole program and the updating of the data.
2. The method of claim 1, wherein the data classification is based on how many threads the data is written to: the data is written by only one thread and is a write-multipurpose class, the data is written by several threads and is a write-multipurpose class, and the rest data is a common class.
3. The method for synchronizing multithread data applied to a PLC and a device according to claim 2, wherein the allocating independent memory areas according to the relationship between threads and memory is as follows: establishing an independent memory area for a thread corresponding to a write-once multipurpose memory; establishing an independent memory area for a plurality of threads corresponding to the multi-write and multi-purpose memory; an independent memory area is established for the remaining threads.
4. A method for synchronizing multithreaded data for use in a PLC and a device according to claim 3, wherein the locking each independent memory region is specifically: the memory used independently for a single thread is not locked; local lock is added to the independent memory area shared by multiple threads; global locks are applied to public data.
5. The method of claim 3, wherein when the data of each independent memory area is synchronized at regular time, the data of one-write-multiple-use and multiple-write-multiple-use are synchronized to each independent memory area, and the common data are not synchronized.
6. The method for synchronizing multithreaded data for use in a PLC and a device according to claim 5, wherein when the data in each independent memory area is synchronized at a fixed time, the data in the actual memory is repeatedly written into the independent memory in the direction of the read data arrow.
7. The method for synchronizing multithreading data for use in a PLC and a device according to claim 5, wherein when the data in the real memory is updated at the fixed time, the data in each allocated independent memory is written into the real memory in sequence, and only each thread or a portion of the plurality of threads responsible for writing is written.
8. The method for synchronizing multithreading data for use in a PLC and a device according to claim 7, wherein when the data in the real memory is updated at regular intervals, the data in the independent memory are written into the corresponding real memory area according to the arrow direction of the write data, respectively.
9. A multi-thread data synchronization system applied to a PLC and a device, wherein the system is used for implementing a multi-thread data synchronization method applied to a PLC and a device according to any one of claims 1 to 8.
10. A computer readable storage medium having a computer program stored thereon, wherein the computer program is executed by a processor to implement a multi-threaded data synchronization method applied to a PLC and a device according to any one of claims 1 to 8.
CN202311709267.3A 2023-12-13 2023-12-13 Multithreading data synchronization method and system applied to PLC and device Pending CN117687805A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311709267.3A CN117687805A (en) 2023-12-13 2023-12-13 Multithreading data synchronization method and system applied to PLC and device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311709267.3A CN117687805A (en) 2023-12-13 2023-12-13 Multithreading data synchronization method and system applied to PLC and device

Publications (1)

Publication Number Publication Date
CN117687805A true CN117687805A (en) 2024-03-12

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