CN117634164A - Laser parameter optimization method, laser and laser preparation method - Google Patents

Laser parameter optimization method, laser and laser preparation method Download PDF

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CN117634164A
CN117634164A CN202311542669.9A CN202311542669A CN117634164A CN 117634164 A CN117634164 A CN 117634164A CN 202311542669 A CN202311542669 A CN 202311542669A CN 117634164 A CN117634164 A CN 117634164A
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layer
laser
electrode
waveguide
area
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沈超
王军飞
胡俊辉
易淑兰
关超文
孙雷皓
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Fudan University
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Fudan University
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Abstract

The application discloses a laser parameter optimization method, a laser and a laser preparation method, and belongs to the field of semiconductor optoelectronic devices. According to the method, the epitaxial structure of the laser is optimized by adjusting the thickness of the lower waveguide layer, the thickness of the upper waveguide layer, the thicknesses of the quantum wells and the quantum barriers, the number of the quantum wells and the thickness of the electron blocking layer, so that the differential gain of the laser is improved, the transmission loss of the laser is reduced, the slope efficiency of the laser is improved while the threshold current density is reduced, the relaxation resonance frequency of the laser is improved, and the modulation bandwidth of the laser is further improved. The laser obtained after optimization by the laser parameter optimization method has high modulation bandwidth and meets the requirement of high-speed communication. The laser process flow is further optimized, and the narrow-ridge wide-cavity short-cavity long laser is prepared through photoetching and cleavage. The narrow ridge width and the short cavity length are beneficial to improving the differential gain of the laser, so that the relaxation resonance frequency of the laser is improved, and the modulation bandwidth of the laser is improved.

Description

Laser parameter optimization method, laser and laser preparation method
Technical Field
The present disclosure relates to the field of semiconductor optoelectronic devices, and in particular, to a method for optimizing parameters of a laser, and a method for manufacturing a laser.
Background
The visible light communication technology is a wireless communication technology for data transmission based on a visible light wave band. The visible light communication technology uses visible light as a carrier to transmit information under the illumination condition.
With the increasing demand of people for communication rate in the internet era, the existing wireless communication technology cannot meet the demand of people for high-speed communication rate in certain fields. The visible light communication technology is considered as a powerful support for a new generation of communication technology because it is safe and reliable, has ultra-wide spectrum resources, and does not require band permission. The GaN-based semiconductor laser is used as an important light source for the visible light communication technology, and has higher modulation bandwidth, better collimation performance and higher light conversion efficiency compared with an LED. Therefore, gaN-based semiconductor lasers are an indispensable and important component of a new generation of communication technology. The-3 dB modulation bandwidth of the existing GaN-based commercial blue laser does not exceed 2GHz, and the high-speed visible light communication requirement cannot be met. Therefore, how to increase the modulation bandwidth of the laser is a technical problem that needs to be solved currently by those skilled in the art.
Disclosure of Invention
The purpose of the application is to provide a laser parameter optimization method, a laser and a laser preparation method, so that the modulation bandwidth of the laser is improved.
To achieve the above object, the present application provides a method for optimizing parameters of a laser, including:
constructing a laser structure model; the laser structure model comprises an epitaxial structure, an insulating medium layer, an N electrode layer and a P electrode layer; the epitaxial structure includes a substrate; the surface of the substrate is sequentially provided with an N electrode contact layer, a lower cladding layer, a lower waveguide layer, an active region, an upper waveguide layer, an electronic barrier layer, an upper cladding layer and a P electrode contact layer along the thickness direction; the active region comprises at least one layer of quantum barrier and at least one layer of quantum well which are alternately arranged along the thickness direction; the surface of the epitaxial structure facing away from the substrate comprises a groove area and a ridge waveguide area; the N electrode layer is arranged in the groove area and is contacted with the N electrode contact layer; the P electrode layer is arranged in the ridge waveguide area and is contacted with the P electrode contact layer; the insulating medium layer is arranged in a region which is not covered by the N electrode layer and the P electrode layer;
the thickness of the lower waveguide layer and the thickness of the upper waveguide layer, the thickness of the quantum wells and the thickness of the quantum barriers, the number of quantum wells, and the thickness of the electron blocking layer are adjusted so that the relaxation resonance frequency of the laser structural model reaches a target relaxation resonance frequency to determine the optimized thickness of the lower waveguide layer and the optimized thickness of the upper waveguide layer, the optimized thickness of the quantum wells and the optimized thickness of the quantum barriers, the optimized number of quantum wells, and the optimized thickness of the electron blocking layer.
Optionally, the optimized thickness of the lower waveguide layer is 20nm-100nm, and the thickness includes values of two ends; the upper waveguide layer has an optimized thickness of 50nm-300nm and includes values at both ends.
Optionally, the quantum barrier has an optimized thickness of 3nm-7nm and includes values at both ends; the quantum well has an optimized thickness of 2.5nm-3.5nm and includes values at both ends.
Optionally, the optimized active region includes three layers of the quantum barrier and two layers of the quantum well alternately arranged along the thickness direction.
Optionally, the electron blocking layer has an optimized thickness of 5nm to 20nm and includes values at both ends.
Optionally, the material composition of the lower waveguide layer is In including n-type doping element k Ga 1-k N, wherein k is 0-0.05 and comprises values of two ends; the lower waveThe doping concentration of the guiding layer is more than 2 multiplied by 10 18 cm -3
The material composition of the upper waveguide layer is In k Ga 1-k N, k is 0-0.05 and includes values at both ends.
Optionally, the material component of the quantum barrier is unintentionally doped GaN;
the material composition of the quantum well is In x Ga 1-x N, wherein x is 0.18-0.25 and includes values at both ends.
Optionally, the material composition of the electron blocking layer is Al containing p-type doping element y Ga 1-y N, wherein y is 0.1-0.3 and comprises values of two ends; the doping concentration of the electron blocking layer is more than 5 multiplied by 10 18 cm -3
To achieve the above object, the present application further provides a laser including: the epitaxial structure, the insulating dielectric layer, the N electrode layer and the P electrode layer;
the epitaxial structure includes a substrate; the surface of the substrate is sequentially provided with an N electrode contact layer, a lower cladding layer, a lower waveguide layer, an active region, an upper waveguide layer, an electronic barrier layer, an upper cladding layer and a P electrode contact layer along the thickness direction; the active region comprises at least one layer of quantum barrier and at least one layer of quantum well which are alternately arranged along the thickness direction; the surface of the epitaxial structure facing away from the substrate comprises a groove and a ridge waveguide;
the N electrode layer is arranged in the area where the groove is located and is contacted with the N electrode contact layer; the P electrode layer is arranged in the area where the ridge waveguide is located and is contacted with the P electrode contact layer;
the insulating medium layer is arranged in a region which is not covered by the N electrode layer and the P electrode layer;
the lower waveguide layer, the upper waveguide layer, the quantum well, the quantum barrier and the electron blocking layer are optimized by the laser parameter optimization method described in any one of the above.
In order to achieve the above object, the present application further provides a method for preparing a laser, including:
sequentially growing an N electrode contact layer, a lower cladding layer, a lower waveguide layer, an active region, an upper waveguide layer, an electron blocking layer, an upper cladding layer and a P electrode contact layer on the surface of a substrate along the thickness direction to obtain an initial epitaxial wafer; the active region comprises at least one layer of quantum barrier and at least one layer of quantum well which are alternately arranged along the thickness direction; the lower waveguide layer, the upper waveguide layer, the quantum well, the quantum barrier and the electron blocking layer are optimized by the laser parameter optimization method according to any one of the above;
photoetching the surface of the initial epitaxial wafer, which is away from the substrate, to determine a ridge waveguide area;
after the ridge waveguide area is determined, removing the initial epitaxial wafer with the preset thickness of the non-ridge waveguide area, and forming a ridge waveguide in the ridge waveguide area;
removing the initial epitaxial wafer in a preset groove area to expose the N electrode contact layer after the backbone waveguide is formed, and forming a groove in the preset groove area to obtain an epitaxial wafer with an epitaxial structure;
Depositing an insulating medium layer on the surface of the epitaxial wafer with the epitaxial structure, which is away from the substrate;
removing the insulating medium layer of the preset P electrode layer open pore area and the preset N electrode layer open pore area after the insulating medium layer is deposited; the preset P electrode layer area is arranged in the area where the ridge waveguide is located; the preset N electrode layer area is arranged in the area where the groove is;
after removing the insulating medium layer, preparing a P electrode layer and an N electrode layer respectively in the P electrode layer open pore area and the N electrode layer open pore area to obtain a target epitaxial wafer;
and cleaving the target epitaxial wafer to obtain a single laser.
Optionally, the removing the initial epitaxial wafer with a preset thickness of the non-ridge waveguide region further includes, before the ridge waveguide region forms a ridge waveguide:
pd is formed on the surface of the initial epitaxial wafer, which is away from the substrate, through magnetron sputtering or electron beam evaporation, and the Pd layer of the non-ridge waveguide area is stripped through a stripping process.
According to the laser parameter optimization method, the epitaxial structure of the laser is optimized by adjusting the thickness of the lower waveguide layer, the thickness of the upper waveguide layer, the thicknesses of the quantum wells and the quantum barriers, the number of the quantum wells and the thickness of the electron blocking layer, so that the differential gain of the laser is improved, the transmission loss of the laser is reduced, the slope efficiency of the laser is improved while the threshold current density is reduced, the relaxation resonance frequency of the laser is improved, and the modulation bandwidth of the laser is further improved. The application also provides a laser, which has high modulation bandwidth after being optimized by the laser parameter optimization method, and meets the requirement of high-speed communication. The application also provides a laser preparation method, which further optimizes the laser process flow on the basis of optimizing the laser structure by adopting a laser parameter optimization method, and prepares the narrow-ridge-width and short-cavity-length laser through photoetching and cleavage, thereby realizing the lasing of the narrow-ridge-width and short-cavity-length laser. The narrow ridge width and the short cavity length are beneficial to improving the differential gain of the laser, so that the relaxation resonance frequency of the laser is improved, and the modulation bandwidth of the laser is improved.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present application, and that other drawings may be obtained according to the provided drawings without inventive effort to a person skilled in the art.
Fig. 1 is a flowchart of a method for optimizing parameters of a laser according to an embodiment of the present application;
fig. 2 is a schematic structural diagram of a laser according to an embodiment of the present application;
fig. 3 is a flowchart of a method for preparing a laser according to an embodiment of the present application;
FIG. 4 is a schematic illustration of a reticle-ridge waveguide reticle provided in an embodiment of the present application;
FIG. 5 is a schematic diagram of a reticle of a second-deep etch region of the reticle provided in an embodiment of the present disclosure;
FIG. 6 is a schematic diagram of a patterned three-P electrode layer region dielectric layer opening in accordance with an embodiment of the present disclosure;
FIG. 7 is a schematic diagram of a lithographic plate with openings in an insulating dielectric layer in a four-N electrode layer region of the lithographic plate according to an embodiment of the present application;
FIG. 8 is a schematic diagram of a five-N, P metal electrode reticle provided in an embodiment of the present application;
FIG. 9 is an overall thumbnail of a reticle provided in an embodiment of the present application;
FIG. 10 is a schematic block diagram of a reticle according to an embodiment of the present disclosure;
FIG. 11 is a graph showing the output optical power-current-voltage (LIV) characteristics of a laser according to an embodiment of the present application;
fig. 12 is a graph of a laser modulation response provided in an embodiment of the present application.
The reference numerals are explained as follows:
1-a substrate; a 2-N electrode contact layer; 3-lower cladding; 4-a lower waveguide layer; 5-active region; 6-an upper waveguide layer; 7-an electron blocking layer; 8-upper cladding; a 9-P electrode contact layer; 10-an insulating medium layer; 11-N electrode layer, 12-P electrode layer; l1-width of the spinal waveguide; spacing of the L2-P electrode layer and the N electrode layer.
Detailed Description
For the purposes of making the objects, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.
Referring to fig. 1, fig. 1 is a flowchart of a method for optimizing parameters of a laser according to an embodiment of the present application, where the method may include:
s101: constructing a laser structure model; the laser structure model comprises an epitaxial structure, an insulating dielectric layer, an N electrode layer and a P electrode layer; the epitaxial structure includes a substrate; the surface of the substrate is sequentially provided with an N electrode contact layer, a lower cladding layer, a lower waveguide layer, an active region, an upper waveguide layer, an electron blocking layer, an upper cladding layer and a P electrode contact layer along the thickness direction; the active region comprises at least one quantum barrier layer and at least one quantum well layer which are alternately arranged along the thickness direction; the surface of the epitaxial structure facing away from the substrate comprises a groove region and a ridge waveguide region; the N electrode layer is arranged in the groove area and is contacted with the N electrode contact layer; the P electrode layer is arranged in the ridge waveguide area and is contacted with the P electrode contact layer; the insulating dielectric layer is disposed in a region not covered by the N electrode layer and the P electrode layer.
The embodiment is not limited to a specific kind of substrate, and the specific kind of substrate may be determined according to actual requirements, for example, the substrate may be a GaN self-supporting substrate. When the substrate is a GaN self-supporting substrate, the N electrode contact layer, the lower cladding layer, the lower waveguide layer, the active region, the upper waveguide layer, the electron blocking layer, the upper cladding layer, and the P electrode contact layer are disposed on the c-plane of the GaN self-supporting substrate.
The N electrode contact layer is used to form ohmic contact with the N electrode, and at the same time, plays a role of buffering to reduce dislocation density in the subsequent epitaxy.
The present embodiment is not limited to a specific material composition of the N electrode contact layer, for example, the material composition of the N electrode contact layer may be GaN including an N-type doping element; the doping concentration of the N electrode contact layer can be more than 2×10 18 cm -3
The present embodiment is not limited to a specific kind of the n-type doping element, and the specific kind of the n-type doping element may be determined according to actual conditions, for example, the n-type doping element may be Si element.
The embodiment is not limited to a specific thickness of the N electrode contact layer, for example, the thickness of the N electrode contact layer may be 500nm to 5000nm, and includes values of both ends.
The present embodiment is not limited to the followingSpecific material composition of the cladding layer, for example, the material composition of the lower cladding layer may be Al including an n-type doping element m Ga 1-m N, m is 0.05-0.1 and includes values at both ends; the doping concentration of the lower cladding layer can be more than 3×10 18 cm -3 . It should be noted that the introduction of the Al component is to achieve better confinement of carriers and photons in the active region while forming a refractive wave waveguide structure, and also to ensure that a large number of dislocations and defects are not generated due to lattice mismatch.
The present embodiment is not limited to a specific kind of the n-type doping element, and the specific kind of the n-type doping element may be determined according to actual conditions, for example, the n-type doping element may be Si element.
The embodiment is not limited to a specific thickness of the lower cladding layer, and for example, the thickness of the lower cladding layer may be 500nm to 2000nm, and includes values of both ends.
The present embodiment is not limited to a specific material composition of the lower waveguide layer, for example, the material composition of the lower waveguide layer is In including an n-type doping element k Ga 1-k N, k is 0-0.05 and includes values at both ends; the doping concentration of the lower waveguide layer is more than 2×10 18 cm -3 . It should be noted that the lower waveguide layer serves to limit the optical field and to raise the limiting factor. The introduction of the In component can create a large refractive index difference with the cladding. The In composition is generally selected to be 5% or less because it is also necessary to ensure carrier injection and dislocation density control. The increase of the optical field limiting factor can reduce differential loss, improve photon density of an active region, improve stimulated radiation probability and increase differential gain.
The present embodiment is not limited to a specific kind of the n-type doping element, and the specific kind of the n-type doping element may be determined according to actual conditions, for example, the n-type doping element may be Si element. It should be noted that, the n-type doping of the lower waveguide layer can greatly reduce the series resistance of the device, and meanwhile, excessive defects are not introduced to cause the increase of loss.
The quantum barrier of the active region serves to confine carriers in the quantum well and to increase the carrier concentration. The carrier concentration in the quantum well is greatly improved, and spontaneous radiation and stimulated radiation are generated. The energy of photons generated by stimulated radiation is the same, the directions are consistent, and the coherence is very strong.
The present embodiment is not limited to a specific material composition of the quantum barrier and a specific material composition of the quantum well, for example, the material composition of the quantum barrier may be unintentionally doped GaN; the material composition of the quantum well may be In x Ga 1-x N, x is 0.18-0.25 and includes values at both ends. In the multi-quantum well structure, doping is not generally performed, and defects caused by doping are avoided. Different In compositions may be selected according to different lasing wavelengths.
The present embodiment is not limited to a specific material composition of the upper waveguide layer, for example, the material composition of the upper waveguide layer may be In k Ga 1-k N, k is 0-0.05 and includes values at both ends. The upper waveguide layer also serves to limit the optical field. However, the upper and lower waveguides are not designed as a symmetrical structure because the optical field expands more toward the substrate. The upper waveguide layer structure is typically thin and the lower waveguide layer structure. The upper waveguide layer is not doped. Since p-type doping introduces more defects, differential loss is increased.
The present embodiment is not limited to a specific material composition of the electron blocking layer, for example, the material composition of the electron blocking layer is Al including a p-type doping element y Ga 1-y N, y is 0.1-0.3 and includes values at both ends; the doping concentration of the electron blocking layer is more than 5 multiplied by 10 18 cm -3 . It should be noted that, the effective mass of electrons is smaller than that of holes, and in order to better confine electrons in the active region, the electron blocking layer may use a higher Al composition to obtain a larger forbidden bandwidth. A high potential barrier is formed between the active region and the upper cladding layer, so that electrons can be prevented from entering the upper cladding layer, and recombination occurs on the upper cladding layer.
The embodiment is not limited to a specific kind of the p-type doping element, and the specific kind of the p-type doping element may be determined according to actual situations, for example, the p-type doping element may be Mg element.
The embodiment is not limited to a specific material composition of the upper cladding layer, for example, the material composition of the upper cladding layer may be A including a p-type doping elementl n Ga 1-n N, N is 0.05-0.1 and includes values at both ends; the doping concentration of the upper cladding layer can be more than 5×10 18 cm -3 . The introduction of the Al component can inject holes into the active region, and the refractive wave waveguide structure is formed while better confining carriers and photons.
The embodiment is not limited to a specific kind of the p-type doping element, and the specific kind of the p-type doping element may be determined according to actual situations, for example, the p-type doping element may be Mg element.
The embodiment is not limited to a specific thickness of the upper cladding layer, and for example, the thickness of the upper cladding layer may be 100nm to 1000nm, and includes values of both ends.
The present embodiment is not limited to a specific material composition of the P-electrode contact layer, for example, the material composition of the P-electrode contact layer may be GaN including a P-type doping element; the doping concentration of the P electrode contact layer can be more than 1×10 19 cm -3 . The P-contact layer is used to form a good ohmic contact with the metal electrode. The doping concentration of the P-electrode contact layer is thus higher.
The embodiment is not limited to a specific kind of the p-type doping element, and the specific kind of the p-type doping element may be determined according to actual situations, for example, the p-type doping element may be Mg element.
The embodiment is not limited to a specific thickness of the P electrode contact layer, for example, the thickness of the P electrode contact layer may be 50nm to 300nm, and includes values of both ends.
S102: the thickness of the lower waveguide layer, the thickness of the upper waveguide layer, the thickness of the quantum wells, the thickness of the quantum barriers, the number of the quantum wells and the thickness of the electron blocking layer are adjusted to enable the relaxation resonance frequency of the laser structure model to reach the target relaxation resonance frequency, so that the optimized thickness of the lower waveguide layer and the optimized thickness of the upper waveguide layer, the optimized thickness of the quantum wells and the optimized thickness of the quantum barriers, the optimized number of the quantum wells and the optimized thickness of the electron blocking layer are determined.
The embodiment is not limited to the specific thickness of the optimized lower waveguide layer and the specific thickness of the optimized upper waveguide layer, as long as the relaxation resonance frequency of the laser structure model can reach the target relaxation resonance frequency, for example, the thickness of the optimized lower waveguide layer can be 20nm-100nm and includes values of two ends; the upper waveguide layer may have an optimized thickness of 50nm to 300nm and includes values at both ends.
The specific thickness of the optimized quantum barrier and the specific thickness of the optimized quantum well are not limited in the embodiment, so long as the relaxation resonance frequency of the laser structure model can reach the target relaxation resonance frequency, for example, the thickness of the optimized quantum barrier can be 3nm-7nm and comprises values at two ends; the quantum well optimized thickness may be 2.5nm-3.5nm and include values at both ends.
The present embodiment is not limited to a specific number of quantum wells as long as it is ensured that the relaxation resonance frequency of the laser structural model can be brought to the target relaxation resonance frequency, for example, the optimized active region may include three layers of quantum barriers and two layers of quantum wells alternately arranged in the thickness direction.
The specific number of quantum wells is not limited in this embodiment, as long as the relaxation resonance frequency of the laser structure model can be guaranteed to reach the target relaxation resonance frequency, for example, the thickness of the electron blocking layer after optimization is 5nm-20nm, and the values of both ends are included.
Based on the above embodiment, the epitaxial structure of the laser is optimized by adjusting the thickness of the lower waveguide layer and the thickness of the upper waveguide layer, the thicknesses of the quantum wells and the quantum barriers, the number of the quantum wells and the thickness of the electron blocking layer, so as to improve the differential gain of the laser, reduce the transmission loss of the laser, and improve the slope efficiency while reducing the threshold current density, thereby improving the relaxation resonance frequency and further improving the modulation bandwidth of the laser.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a laser according to an embodiment of the present application, where the laser may include: the epitaxial structure, the insulating dielectric layer 10, the N electrode layer 11 and the P electrode layer 12;
the epitaxial structure comprises a substrate 1; the surface of the substrate 1 is provided with an N electrode contact layer 2, a lower cladding layer 3, a lower waveguide layer 4, an active region 5, an upper waveguide layer 6, an electron blocking layer 7, an upper cladding layer 8 and a P electrode contact layer 9 in sequence along the thickness direction; the active region 5 includes at least one quantum barrier layer and at least one quantum well layer alternately arranged in the thickness direction; the surface of the epitaxial structure facing away from the substrate 1 comprises grooves and ridge waveguides;
the N electrode layer 11 is arranged in the area where the groove is located and is contacted with the N electrode contact layer 2; the P electrode layer 12 is arranged in the area where the ridge waveguide is positioned and is contacted with the P electrode contact layer 9;
The insulating dielectric layer 10 is provided in a region not covered by the N electrode layer 11 and the P electrode layer 12;
the lower waveguide layer 4, the upper waveguide layer 6, the quantum well, the quantum barrier and the electron blocking layer 7 are the lower waveguide layer 4, the upper waveguide layer 6, the quantum well, the quantum barrier and the electron blocking layer 7 optimized by the laser parameter optimization method described above.
It should be noted that, the types of the substrate 1, and the thicknesses, material compositions, doping element types, doping concentrations, etc. of the N electrode contact layer 2, the lower cladding layer 3, the lower waveguide layer 4, the active region 5, the upper waveguide layer 6, the electron blocking layer 7, the upper cladding layer 8, and the P electrode contact layer 9 have been described in the above embodiments of the laser parameter optimization method, and are not repeated here.
Based on the embodiment, the laser parameter optimization method has high modulation bandwidth after optimization, and meets the requirement of high-speed communication.
Referring to fig. 3, fig. 3 is a flowchart of a method for preparing a laser according to an embodiment of the present application, where the method may include:
s201: sequentially growing an N electrode contact layer, a lower cladding layer, a lower waveguide layer, an active region, an upper waveguide layer, an electron blocking layer, an upper cladding layer and a P electrode contact layer on the surface of a substrate along the thickness direction to obtain an initial epitaxial wafer; the active region comprises at least one quantum barrier layer and at least one quantum well layer which are alternately arranged along the thickness direction; the lower waveguide layer, the upper waveguide layer, the quantum well, the quantum barrier and the electron blocking layer are optimized by the laser parameter optimization method.
The embodiment does not limit the specific manner of growing the N electrode contact layer, the lower cladding layer, the lower waveguide layer, the active region, the upper waveguide layer, the electron blocking layer, the upper cladding layer and the P electrode contact layer, adopts the Metal-organic chemical vapor deposition (Metal-organic Chemical Vapor Deposition, MOCVD) technology, selects corresponding growth conditions and gas sources according to different epitaxial layer requirements, and sequentially grows the N electrode contact layer, the lower cladding layer, the lower waveguide layer, the active region, the upper waveguide layer, the electron blocking layer, the upper cladding layer and the P electrode contact layer on the surface of the substrate along the thickness direction. The types of the substrate, and thicknesses, material compositions, doping element types, doping concentrations, etc. of the N electrode contact layer, the lower cladding layer, the lower waveguide layer, the active region, the upper waveguide layer, the electron blocking layer, the upper cladding layer, and the P electrode contact layer are described in the embodiments of the above-mentioned laser parameter optimization method, and are not repeated here. When the substrate is a GaN self-supporting substrate, the substrate can be prepared by: and (3) adopting MOCVD technology on the c-plane of the GaN substrate, taking trimethyl gallium as a gallium source, taking ammonia as a nitrogen source, taking mixed gas of hydrogen and nitrogen as carrier gas, loading reactants into a reaction cavity, heating to a certain temperature to react, generating GaN molecular groups on the GaN substrate, and adsorbing, nucleating and growing on the surface of the GaN substrate to obtain the GaN self-supporting substrate.
Further, in order to avoid impurities remaining on the surface of the substrate, the embodiment may further perform an organic cleaning on the substrate before step S201. The embodiment is not limited to a specific mode of organic cleaning, and only needs to ensure that the impurities remained on the surface of the substrate can be removed, for example, the substrate is subjected to first ultrasonic cleaning by using acetone; carrying out second ultrasonic cleaning on the substrate by using ethanol; thirdly, washing the substrate with deionized water; after three flushes, the substrate was dried using nitrogen.
S202: and photoetching the surface of the initial epitaxial wafer, which is away from the substrate, to determine a ridge waveguide region.
The embodiment is not limited to a specific photolithography mode, and only needs to ensure that a ridge waveguide region can be defined, for example, a first photolithography mask can be used to perform negative photoresist photolithography on the surface of the initial epitaxial wafer, which is away from the substrate; the hollowed-out area of the first photoetching plate corresponds to the ridge waveguide area. Further, in this embodiment, the first photolithography mask may be used to perform negative photoresist lithography on the surface of the initial epitaxial wafer facing away from the substrate by using ultraviolet light.
The specific width of the ridge waveguide region (i.e., the specific width of the hollowed-out region of the first reticle) is not limited in this embodiment, and may be determined according to the ridge waveguide width requirement. The specific spacing between adjacent ridge waveguide regions (i.e., the specific spacing between adjacent hollow regions of the first reticle) is not limited in this embodiment, and may be adjusted according to the electrode width requirement, for example, the spacing between adjacent ridge waveguide regions may be 100 μm to 1000 μm and include values of both ends.
Further, in order to avoid impurities remaining on the surface of the initial epitaxial wafer, the embodiment may further perform organic cleaning on the initial epitaxial wafer before step S202. The embodiment is not limited to a specific mode of organic cleaning, and only needs to ensure that impurities remained on the surface of the initial epitaxial wafer can be removed, for example, the initial epitaxial wafer is subjected to first ultrasonic cleaning by using acetone; performing second ultrasonic cleaning on the initial epitaxial wafer by using alcohol; thirdly, washing the initial epitaxial wafer with deionized water; and after three times of flushing, using nitrogen to blow-dry the initial epitaxial wafer.
S203: after the ridge waveguide area is determined, removing the initial epitaxial wafer with the preset thickness of the non-ridge waveguide area, and forming the ridge waveguide in the ridge waveguide area.
The embodiment is not limited to a specific manner of removing the initial epitaxial wafer, so long as the initial epitaxial wafer in the non-ridge waveguide region can be removed, for example, the ridge waveguide is formed in the ridge waveguide region by etching to remove the initial epitaxial wafer with a preset thickness in the non-ridge waveguide region. The embodiment is not limited to a specific etching manner, as long as the removal of the initial epitaxial wafer in the non-ridge waveguide region is ensured, for example, the pre-set thickness of the initial epitaxial wafer in the non-ridge waveguide region may be removed by inductively coupled plasma-reactive ion etching (Inductive coupled plasma-Reactive Ion Etching, ICP-RIE). The embodiment is not limited to a specific etching depth (i.e. a specific preset thickness), and the corresponding etching depth may be selected according to different epitaxial structures, and usually needs to be etched to the upper cladding layer.
Furthermore, in this embodiment, before the initial epitaxial wafer with the preset thickness of the non-ridge waveguide region is removed by etching, a Pd layer may be formed on the surface of the initial epitaxial wafer facing away from the substrate by magnetron sputtering or electron beam evaporation, and the Pd layer in the non-ridge waveguide region may be stripped by a stripping process. It should be noted that Pd is used as a mask, and may serve as a ridge waveguide etching mask, and may also serve as a metal material in ohmic contact with the P electrode contact layer. In addition, it should be noted that, in this embodiment, the non-hollowed-out area of the first reticle corresponds to the ridge waveguide area.
S204: and after the backbone waveguide is formed, removing the initial epitaxial wafer in the preset groove area until the N electrode contact layer is exposed, and forming a groove in the preset groove area to obtain the epitaxial wafer with the epitaxial structure.
The embodiment is not limited to a specific manner of forming the groove, and only needs to ensure that the groove can be formed, for example, after the backbone waveguide is formed, photoetching is performed on the surface of the initial epitaxial wafer, which is away from the substrate, so as to determine a groove region; after the groove area is determined, the initial epitaxial wafer in the groove area is removed until the N electrode contact layer is exposed, and a groove is formed in the groove area.
The embodiment is not limited to a specific photolithography mode, and only needs to ensure that a groove region can be defined, for example, a second photolithography mask can be used to perform positive photoresist photolithography on the surface of the initial epitaxial wafer, which is away from the substrate; the hollowed-out area of the second photoetching plate corresponds to the groove area. The specific width of the groove region (i.e., the specific width of the hollowed-out region of the second photolithography mask) is not limited in this embodiment, and may be determined according to the electrode width requirement.
The embodiment is not limited to a specific manner of removing the initial epitaxial wafer, so long as the initial epitaxial wafer capable of removing the groove area is ensured, for example, the initial epitaxial wafer capable of removing the groove area can be etched until the N electrode contact layer is exposed, and the groove is formed in the groove area. The embodiment is not limited to a specific etching manner, so long as the initial epitaxial wafer in the recess area can be removed, for example, the initial epitaxial wafer in the recess area can be removed by inductively coupled plasma-reactive ion etching to expose the N electrode contact layer.
Furthermore, in this embodiment, before the initial epitaxial wafer with the groove area removed by etching is exposed to the N electrode contact layer, a Cr layer may be formed on the surface of the initial epitaxial wafer facing away from the substrate by magnetron sputtering or electron beam evaporation, and the Cr layer in the groove area may be stripped by a stripping process. Note that this step is performed to an etch depth on the order of μm, and thus a hard mask is generally selected. In addition, it should be noted that, in this embodiment, the non-hollowed-out area of the second reticle corresponds to the groove area.
S205: and depositing an insulating medium layer on the surface of the epitaxial wafer with the epitaxial structure, which is away from the substrate.
After the backbone waveguide and the groove are formed, the formed laser side wall is required to be passivated, the side wall damage is repaired, and the surface state density of the side wall is reduced.
The embodiment is not limited to a specific kind of insulating dielectric layer, as long as the insulating dielectric layer is ensured to play an insulating role in the subsequent process, for example, the insulating dielectric layer may be a silicon oxide dielectric film or a silicon nitride dielectric film. The specific thickness of the insulating dielectric layer is not limited in this embodiment, as long as the dielectric layer can cover the side wall of the laser and modify the surface, and plays an insulating role in the subsequent process, and is generally selected to be between 50nm and 200 nm.
The embodiment is not limited to a specific manner of depositing the insulating medium layer, as long as the insulating medium layer can be formed on the surface of the epitaxial wafer facing away from the substrate, for example, the insulating medium layer can be deposited on the surface of the epitaxial wafer facing away from the substrate, which has an epitaxial structure, by adopting a plasma enhanced chemical vapor deposition (Plasma Enhanced Chemical Vapor Deposition, PECVD) technology.
S206: removing the insulating medium layer of the preset P electrode layer open pore area and the preset N electrode layer open pore area after the insulating medium layer is deposited; the preset P electrode layer open pore area is arranged in the area where the ridge waveguide is positioned; the preset N electrode layer open pore area is arranged in the area where the groove is located.
After the insulating dielectric layer is deposited, the metal electrode portion needs to be perforated.
The embodiment does not limit the specific mode of removing the insulating medium layer, and only needs to ensure that the insulating medium layer of the preset P electrode layer open pore area and the preset N electrode layer open pore area can be removed, for example, after the insulating medium layer is deposited, photoetching is performed on the surface of the epitaxial wafer with the epitaxial structure, which is away from the substrate, and a photoresist reflow process is adopted to determine the P electrode layer open pore area; after determining the opening area of the P electrode layer, removing the insulating medium layer of the opening area of the P electrode layer; removing the insulating medium layer of the P electrode layer open area, and then photoetching the surface of the epitaxial wafer with the epitaxial structure, which is away from the substrate, to determine the N electrode layer open area; and after determining the opening area of the N electrode layer, removing the insulating medium layer of the opening area of the N electrode layer. After the photoresist reflow process, the ridge waveguide region can be precisely selected, so as to determine the P electrode layer open pore region.
The embodiment is not limited to a specific photolithography mode, as long as the P electrode layer opening area and the N electrode layer area can be defined, for example, a third photolithography mask may be used to perform positive photoresist photolithography on the surface of the epitaxial wafer having the epitaxial structure, which is away from the substrate; the hollowed-out area of the third photoetching plate corresponds to the P electrode layer open area; a fourth photoetching plate can be adopted to carry out positive photoresist photoetching on the surface, away from the substrate, of the epitaxial wafer with the epitaxial structure; the hollowed-out area of the fourth photoetching plate corresponds to the opening area of the N electrode layer.
The specific width of the P electrode layer opening area (i.e., the specific width of the hollowed-out area of the third photolithography mask) is not limited in this embodiment, and may be determined according to the electrode width requirement. The embodiment does not limit the specific width of the N electrode layer opening area (i.e., the specific width of the hollowed-out area of the fourth photolithography mask), and the specific width of the N electrode layer opening area may be determined according to the electrode width requirement. It should be noted that, the specific position of the N electrode layer opening area is not limited in this embodiment, so long as the N electrode layer opening area is located in the groove area and the width of the N electrode layer opening area cannot be larger than the width of the groove area, and the width of the hollowed-out area of the corresponding fourth photolithography mask cannot be larger than the width of the hollowed-out area of the second photolithography mask.
The embodiment is not limited to a specific manner of removing the insulating dielectric layer, as long as the insulating dielectric layer in the P electrode layer opening area and the insulating dielectric layer in the N electrode layer opening area can be removed, for example, the insulating dielectric layer in the P electrode layer opening area can be removed by etching; and removing the insulating medium layer in the opening area of the N electrode layer by etching. The embodiment is not limited to a specific etching mode, and only needs to ensure that the insulating dielectric layer in the P electrode layer opening area and the insulating dielectric layer in the N electrode layer opening area can be removed, for example, the insulating dielectric layer in the P electrode layer opening area can be removed by inductively coupled plasma-reactive ion etching or wet etching; and removing the insulating dielectric layer in the open area of the N electrode layer by inductively coupled plasma-reactive ion etching or wet etching.
S207: and after removing the insulating medium layer, preparing a P electrode layer and an N electrode layer respectively in the P electrode layer open pore area and the N electrode layer open pore area to obtain the target epitaxial wafer.
The embodiment is not limited to a specific manner of preparing the P electrode layer and the N electrode layer, as long as the P electrode layer and the N electrode layer can be formed in the P electrode layer opening area and the N electrode layer opening area respectively, for example, after removing the insulating medium layer, photoetching the surface of the epitaxial wafer with the epitaxial structure, which is away from the substrate, to determine the P electrode layer area and the N electrode layer area; after the P electrode layer area and the N electrode layer area are determined, metal is evaporated on the surface, away from the substrate, of the epitaxial wafer with the epitaxial structure, and the metal in the non-P electrode layer area and the non-N electrode layer area is stripped through a stripping process, so that a P electrode layer and an N electrode layer are respectively formed in the P electrode layer area and the N electrode layer area, the P electrode layer covers the P electrode layer open pore area, and the N electrode layer covers the N electrode layer open pore area.
The present embodiment is not limited to a specific kind of metal, and for example, the metal may be Cr, pt, or Au.
The embodiment is not limited to a specific photolithography mode, and only needs to ensure that a P electrode layer region and an N electrode layer region can be defined, for example, a fifth photolithography mask can be used to perform negative photoresist photolithography on the surface of the epitaxial wafer with the epitaxial structure, which is away from the substrate; the fifth photoetching plate comprises first non-hollowed-out areas and second non-hollowed-out areas which are alternately arranged; the first non-hollowed-out area corresponds to the P electrode layer area, and the second non-hollowed-out area corresponds to the N electrode layer area.
The specific width of the P electrode layer region and the specific width of the N electrode layer region (the specific width of the first non-hollowed-out region and the specific width of the second non-hollowed-out region) are not limited, so long as the P electrode layer can cover the P electrode layer opening region, the N electrode layer can cover the N electrode layer opening region, the width of the corresponding first non-hollowed-out region cannot be smaller than the width of the hollowed-out region of the third photolithography plate, the width of the second non-hollowed-out region cannot be smaller than the width of the hollowed-out region of the fourth photolithography plate, for example, the width of the P electrode layer region can be larger than 100 μm; the width of the N electrode layer region may be greater than 100 μm. The specific value of the distance L2 between the P electrode layer and the N electrode layer (i.e. the distance between the first non-hollowed-out area and the second non-hollowed-out area) is not limited in this embodiment, for example, the distance L2 between the P electrode layer and the N electrode layer may be 10 μm-40 μm, and includes values of both ends.
Further, in order to perform natural cleavage, in this embodiment, after step S207, a thinning process may be performed on the surface of the target epitaxial wafer, which is close to the substrate; polishing is carried out after the thinning process is completed. The thickness of the target epitaxial wafer may be reduced to 100 μm or less by, for example, performing a thinning process on the surface of the target epitaxial wafer near the substrate.
Further, in order to facilitate packaging and testing, in this embodiment, after step S207, an N electrode layer may be further prepared on the surface of the target epitaxial wafer, which is close to the substrate. Furthermore, in order to form good ohmic contact between the electrode layer and the electrode contact layer, after the N electrode layer is prepared, the P electrode layer and the N electrode layer on the surface of the target epitaxial wafer, which is far away from the substrate, and the N electrode layer on the surface of the target epitaxial wafer, which is close to the substrate, may be annealed. The specific temperature of annealing is not limited in this embodiment, as long as it is ensured that the electrode layer and the electrode contact layer can form good ohmic contact.
S208: and cleaving the target epitaxial wafer to obtain a single laser.
The embodiment is not limited to a specific manner of obtaining a single laser, for example, laser cutting is performed on the target epitaxial wafer along a preset cutting path to obtain a laser block; cleaving the laser block to obtain a laser bar; cleaving the laser bars to obtain individual lasers.
Further, in this embodiment, after the laser bar is obtained, a high-reflection film may be further evaporated on the side wall of the laser bar, so that the side wall is used as a laser resonant cavity surface; evaporating a dielectric film on the side wall opposite to the laser resonant cavity surface; the reflectivity of the dielectric film is smaller than that of the high-reflectivity film. The embodiment is not limited to a specific kind of high-reflection film, as long as the reflectance can be ensured to be 99% or more, for example, the high-reflection film may be Al 2 O 3 /Ta 2 O 5 Dielectric film or SiO 2 /Ta 2 O 5 A dielectric film. The present embodiment is not limited to a specific kind of dielectric film, and for example, the reflectivity of the dielectric film may be 60% -80% and include values of both ends. The cleavage means that a notch is firstly cut along the cleavage direction, and then stress is applied in the direction perpendicular to the chip, so that the laser is naturally cleaved, the natural cleavage surface is atomically flat, and high reflectivity can be achieved after film coating, so that the laser can be used as a laser resonant cavity surface.
Based on the embodiment, the laser process flow is further optimized on the basis of optimizing the laser structure by adopting the laser parameter optimization method, and the narrow-ridge-width and short-cavity-length laser is prepared by photoetching and cleavage, so that the laser of the narrow-ridge-width and short-cavity-length laser is realized. The narrow ridge width and the short cavity length are beneficial to improving the differential gain of the laser, so that the relaxation resonance frequency of the laser is improved, and the modulation bandwidth of the laser is improved.
The above-described laser parameter optimization process, laser preparation process, and optimized laser performance are described below in conjunction with specific examples.
Example 1 laser parameter optimization procedure
The embodiment carries out simulation optimization design on the epitaxial structure of the laser based on PICS3D simulation software. The optimal design of the laser epitaxial structure comprehensively considers the light field distribution, the electrical injection and the small signal modulation characteristics of the laser. Based on the theory of laser velocity equation, extracting the intrinsic parameters of the laser, and performing structural optimization according to the intrinsic parameters. The design of epitaxy and process structure mainly considers the mesa width W of the laser s Resonant cavity length L cav Spontaneous radiation coupling factor beta sp The doping concentration of the P region, the number and thickness of the active region, an electron blocking layer structure, a waveguide layer structure and the like. And the influence indexes comprise an optical limiting factor gamma and a relaxation resonance frequency f R Damping factor K, differential gainQuantum efficiency EQE, threshold current I th Etc.
Relaxation resonance frequency f of laser R The expression is:
wherein,is the differential gain, Γ is the optical confinement factor, v g Is the group velocity, q is the meta-charge, V is the active area volume, η i Is injection efficiency, I th Is the threshold current and I is the injection current. From equation (1), it can be seen that increasing the differential gain and decreasing the threshold current are key ways to increase the relaxation resonance frequency of the laser. In this embodiment, the epitaxial structure of the laser is optimized by adjusting the thickness of the lower waveguide layer and the thickness of the upper waveguide layer, the thicknesses of the quantum wells and the quantum barriers, the number of the quantum wells, and the thickness of the electron blocking layer, and the parameters of the optimized epitaxial structure are shown in table 1.
Table 1 parameter table of optimized epitaxial structure
Example 2 laser preparation procedure
1. The GaN self-supporting substrate is firstly ultrasonically cleaned by acetone, ethanol and deionized water, and is transferred into an MOCVD system after being dried by nitrogen.
2. And selecting corresponding growth conditions and gas sources according to different epitaxial layer requirements. An N electrode contact layer, a lower cladding layer, a lower waveguide layer, an active region, an upper waveguide layer, an electron blocking layer, an upper cladding layer and a P electrode contact layer are sequentially grown on a GaN self-supporting substrate, and the process specifically comprises the following steps:
(1) Growing an N electrode contact layer on a GaN self-supporting substrate, wherein the N electrode contact layer is made of GaN material, the doping element is Si element, and the doping concentration is more than 2 multiplied by 10 18 cm -3
(2) Growing a lower cladding layer on the N electrode contact layer, wherein the lower cladding layer adopts 1000 nm-thick Al 0.07 Ga 0.93 N material, doping element is Si element, doping concentration exceeds 3 x 10 18 cm -3
(3) Growing a lower waveguide layer on the lower cladding layer, wherein the lower waveguide layer adopts In with the thickness of 150nm 0.03 Ga 0.97 N material, doping element is Si element, doping concentration is more than 2 x 10 18 cm -3
(4) And growing an active region on the lower waveguide layer, wherein the active region consists of three layers of quantum barriers and two layers of quantum wells. The quantum barrier adopts 5 nm-thick unintentionally doped GaN material, and the quantum well adopts 3 nm-thick In 0.21 Ga 0.79 An N material;
(5) Growing an upper waveguide layer on the active region, wherein the upper waveguide layer adopts In with the thickness of 50nm 0.03 Ga 0.97 An N material;
(6) Growing an electron blocking layer on the upper waveguide layer, wherein the electron blocking layer adopts Al with the thickness of 8nm 0.18 Ga 0.82 N material, doping element is Mg, doping concentration is more than 5 x 10 18 cm -3
(7) Growing an upper cladding layer on the electron blocking layer, wherein the upper cladding layer adopts 300 nm-thick Al 0.07 Ga 0.93 N material, doping element is Mg, doping concentration is more than 5 multiplied by 10 18 cm -3
(8) A P electrode contact layer is grown on the upper cladding layer, the P electrode contact layer is made of GaN material with the thickness of 100nm, the doping element is Mg, and the doping concentration is more than 1 multiplied by 10 19 cm -3
After the epitaxial growth is finished, the epitaxial wafer needs to be annealed at a high temperature to activate the doping element.
3. Firstly, carrying out organic cleaning on an epitaxial wafer, carrying out ultrasonic cleaning by using acetone, then carrying out ultrasonic cleaning by using alcohol, then washing by using deionized water, and drying the initial epitaxial wafer by using nitrogen. Then, ultraviolet lithography was used to define a ridge waveguide region (ridge waveguide width L1 is 1.8 μm, and the space between the two waveguides is 588 μm). A layer of metal Pd is then evaporated, pd being used as a mask. The metal in the area outside the ridge waveguide is stripped off by adopting a stripping process. The first photolithography step uses a plate as shown in fig. 4.
4. And performing inductively coupled plasma-reactive ion etching by adopting the metal ridge mask formed in the previous step. The etch depth is selected based on the different epitaxial structures and typically needs to be etched to the lower cladding layer. The etching depth of the epitaxial wafer is 300nm.
5. After the ridge waveguide is etched, a second step of photolithography is required, where the step of photolithography is to define an n-type electric injection region. This step etches to a depth on the order of μm, so a hard mask is typically chosen. Including but not limited to, using positive photoresist lithography, evaporating Cr metal and then stripping to define the area to be etched. And then, performing inductively coupled plasma-reactive ion etching to deeply etch the N electrode contact layer. The etched areas are defined using the reticle shown in fig. 5.
6. After etching is completed, the side wall of the laser formed by etching needs to be passivated, the damage of the side wall is repaired, and the surface state density of the side wall is reduced. Typically, the insulating dielectric layer is deposited by PECVD techniques to form a silicon oxide dielectric film or a silicon nitride dielectric film. The film thickness is generally chosen between 50nm and 200 nm.
7. After the evaporation of the dielectric layer, the metal electrode portion needs to be perforated. The P electrode opening locations are first defined using photolithography. Since the width L1 of the backbone waveguide is narrow, only 1.8 μm is required, which is close to the limit width of ultraviolet lithography. Therefore, a photoresist reflow process is used for opening the insulating dielectric layer in the region of the P electrode layer. The ridge waveguide is positioned in the middle of the photoresist open hole position, and the size of the open hole is determined according to the reflux characteristic of the photoresist. Since the ridge waveguide is higher than the two sides of the waveguide, only the ridge waveguide can be uncovered by the mask after photoresist reflow. And then carrying out inductively coupled plasma-reactive ion etching to etch the insulating dielectric layer above the ridge waveguide. Wet etching can also be adopted, and only the whole etching of the dielectric layer is required to be ensured. The P electrode layer region was perforated using a photomask as shown in fig. 6.
8. And then carrying out open hole etching on the insulating dielectric layer in the N electrode layer area. The N electrode layer area has larger opening, and meanwhile, the photoetching tolerance is larger, and the opening can be realized only by using a photoresist mask. The N electrode layer region was perforated using a reticle as shown in fig. 7.
9. Followed by the shape of the positive and negative metal electrodes over the photolithographic epitaxial wafer. The metal electrode adopts a negative photoresist stripping process, and stripping is performed after the P electrode metal and the N electrode metal are evaporated. A lithographic plate for vapor deposition of metal electrodes is shown in fig. 8. The P electrode layer and the N electrode layer adopt electrode structures of Cr, pt or Au. Except that a layer of Pd is located under the P electrode layer. After evaporation of the front electrode, a whole-piece thinning process is required. And (3) carrying out a thinning process on the back surface of the epitaxial wafer, and polishing after the thinning is finished. The entire epitaxial wafer is preferably thinned to less than 100 μm to facilitate natural cleavage.
10. And evaporating the back electrode. The back surface is an integral N electrode layer, and the N electrode layer is arranged on the front and back surfaces of the chip of the device prepared by the process, so that the packaging and the testing are convenient. After the metal electrode is evaporated, the metal electrode is annealed rapidly at 600 ℃, and the step is to form good ohmic contact between the electrode layer and the electrode contact layer.
11. After annealing the electrodes, laser cutting of the epitaxial wafer is required. And carrying out laser cutting on the processed epitaxial wafer along the cutting path to obtain a laser block. Then cleaving the laser block to obtain the laser bar. And finally, cleaving the laser bar to obtain a single laser, wherein the cleavage direction is perpendicular to the laser bar direction. The overall layout of the reticle used in this process flow is shown in fig. 9. In this example, a 2 inch epitaxial wafer was used, and therefore a 3 inch reticle was used. The size of the photoetching plate is not required and is larger than that of the epitaxial wafer. The full layout area of the photolithography mask of the present embodiment is divided into 4*5 square areas, and the ridge waveguide width L1 of the laser chip in each area is the same. Reserved between the different laser blocks is a dicing street. The width of the scribe line should be based on the subsequent cutting requirement, and the scribe line in the photolithography mask of this embodiment is about 1.8 mm. The ridge waveguide width L1 is divided into three types, 1.8 μm,3.8 μm and 5.8 μm. The structure in each region is shown in fig. 10. The Y direction is the laser ridge waveguide direction and the X direction is the laser bar direction, and a plurality of identical lasers are arranged on the same laser bar.
After cleaving into laser bars, sidewall coating is also required. High-reflectivity film is required to be evaporated on one side of the resonant cavity, the reflectivity reaches more than 99 percent, and Al can be selected 2 O 3 /Ta 2 O 5 Dielectric film or SiO 2 /Ta 2 O 5 A dielectric film. The dielectric film is also vapor deposited on the other side of the resonant cavity, and the reflectivity is controlled to be in the range of 60% -80%.
Example 3 laser Performance test procedure
The laser manufactured in example 2 was tested under the continuous laser test condition, and the measured laser output optical power-current-voltage (LIV) characteristic curve is shown in fig. 11, in which the abscissa indicates current, the ordinate indicates voltage on the left side, and the ordinate indicates optical power on the right side.
The laser prepared in example 2 above was tested for modulation response using a calibrated vector network analyzer (Vector Network Analyzer, VNA). The direct current bias of the laser and the 1-port signal of the vector network analyzer are combined through a bias device. The combined signal is applied directly to the laser. The laser converts the electrical signal into an optical signal, which propagates to the detector for reception. The optical signal is converted back into an electrical signal and returned to the 2 port of the vector network analyzer. The laser modulation response curve obtained by the test is shown in fig. 12, in which the abscissa indicates the frequency and the ordinate indicates S21 (indicating the insertion loss).
According to the embodiment, the unique laser epitaxial structure and the preparation process flow are designed, so that the differential gain of the laser is improved, the transmission loss of the laser is reduced, and the slope efficiency of the laser is improved while the threshold current density is reduced. Meanwhile, simulation and experimental verification prove that the optimized laser structure design can greatly improve the electrical and optical properties of the laser structure design and meet the requirement of high-speed communication.
The principles and embodiments of the present application are described herein by applying specific examples, and the examples are in progressive relationship, and each example mainly illustrates differences from other examples, where the same similar parts of the examples are mutually referred to. The above description of embodiments is only for aiding in the understanding of the method of the present application and its core ideas. It will be apparent to those skilled in the art that various changes and modifications can be made herein without departing from the principles of the application, which are intended to be covered by the appended claims.
It should also be noted that in this specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises an element.

Claims (11)

1. A method for optimizing parameters of a laser, comprising:
constructing a laser structure model; the laser structure model comprises an epitaxial structure, an insulating medium layer, an N electrode layer and a P electrode layer; the epitaxial structure includes a substrate; the surface of the substrate is sequentially provided with an N electrode contact layer, a lower cladding layer, a lower waveguide layer, an active region, an upper waveguide layer, an electronic barrier layer, an upper cladding layer and a P electrode contact layer along the thickness direction; the active region comprises at least one layer of quantum barrier and at least one layer of quantum well which are alternately arranged along the thickness direction; the surface of the epitaxial structure facing away from the substrate comprises a groove area and a ridge waveguide area; the N electrode layer is arranged in the groove area and is contacted with the N electrode contact layer; the P electrode layer is arranged in the ridge waveguide area and is contacted with the P electrode contact layer; the insulating medium layer is arranged in a region which is not covered by the N electrode layer and the P electrode layer;
the thickness of the lower waveguide layer and the thickness of the upper waveguide layer, the thickness of the quantum wells and the thickness of the quantum barriers, the number of quantum wells, and the thickness of the electron blocking layer are adjusted so that the relaxation resonance frequency of the laser structural model reaches a target relaxation resonance frequency to determine the optimized thickness of the lower waveguide layer and the optimized thickness of the upper waveguide layer, the optimized thickness of the quantum wells and the optimized thickness of the quantum barriers, the optimized number of quantum wells, and the optimized thickness of the electron blocking layer.
2. The method of optimizing laser parameters according to claim 1, wherein the optimized thickness of the lower waveguide layer is 20nm-100nm and includes values at both ends; the upper waveguide layer has an optimized thickness of 50nm-300nm and includes values at both ends.
3. The method of claim 1, wherein the quantum barrier is 3nm-7nm thick and includes values at both ends; the quantum well has an optimized thickness of 2.5nm-3.5nm and includes values at both ends.
4. The method according to claim 1, wherein the optimized active region includes three layers of the quantum barrier and two layers of the quantum well alternately arranged in the thickness direction.
5. The method of claim 1, wherein the electron blocking layer has an optimized thickness of 5nm to 20nm and includes values at both ends.
6. The laser epitaxial wafer of claim 1, wherein the material composition of the lower waveguide layer is In including an n-type doping element k Ga 1-k N, wherein k is 0-0.05 and comprises values of two ends; the doping concentration of the lower waveguide layer is more than 2 multiplied by 10 18 cm -3
The material composition of the upper waveguide layer is In k Ga 1-k N, k is 0-0.05 and includes values at both ends.
7. The laser epitaxial wafer of claim 1, wherein the material composition of the quantum barrier is unintentionally doped GaN;
the material composition of the quantum well is In x Ga 1-x N, wherein x is 0.18-0.25 and includes values at both ends.
8. The laser epitaxial wafer of claim 1, wherein the material composition of the electron blocking layer is Al including a p-type doping element y Ga 1-y N, wherein y is 0.1-0.3 and comprises two endsA value; the doping concentration of the electron blocking layer is more than 5 multiplied by 10 18 cm -3
9. A laser, comprising: the epitaxial structure, the insulating dielectric layer, the N electrode layer and the P electrode layer;
the epitaxial structure includes a substrate; the surface of the substrate is sequentially provided with an N electrode contact layer, a lower cladding layer, a lower waveguide layer, an active region, an upper waveguide layer, an electronic barrier layer, an upper cladding layer and a P electrode contact layer along the thickness direction; the active region comprises at least one layer of quantum barrier and at least one layer of quantum well which are alternately arranged along the thickness direction; the surface of the epitaxial structure facing away from the substrate comprises a groove and a ridge waveguide;
The N electrode layer is arranged in the area where the groove is located and is contacted with the N electrode contact layer; the P electrode layer is arranged in the area where the ridge waveguide is located and is contacted with the P electrode contact layer;
the insulating medium layer is arranged in a region which is not covered by the N electrode layer and the P electrode layer;
the lower waveguide layer, the upper waveguide layer, the quantum well, the quantum barrier, and the electron blocking layer are the lower waveguide layer, the upper waveguide layer, the quantum well, the quantum barrier, and the electron blocking layer optimized by the laser parameter optimization method of any one of claims 1 to 8.
10. A method of manufacturing a laser, comprising:
sequentially growing an N electrode contact layer, a lower cladding layer, a lower waveguide layer, an active region, an upper waveguide layer, an electron blocking layer, an upper cladding layer and a P electrode contact layer on the surface of a substrate along the thickness direction to obtain an initial epitaxial wafer; the active region comprises at least one layer of quantum barrier and at least one layer of quantum well which are alternately arranged along the thickness direction; the lower waveguide layer, the upper waveguide layer, the quantum well, the quantum barrier, and the electron blocking layer are the lower waveguide layer, the upper waveguide layer, the quantum well, the quantum barrier, and the electron blocking layer optimized by the laser parameter optimization method of any one of claims 1 to 8;
Photoetching the surface of the initial epitaxial wafer, which is away from the substrate, to determine a ridge waveguide area;
after the ridge waveguide area is determined, removing the initial epitaxial wafer with the preset thickness of the non-ridge waveguide area, and forming a ridge waveguide in the ridge waveguide area;
removing the initial epitaxial wafer in a preset groove area to expose the N electrode contact layer after the backbone waveguide is formed, and forming a groove in the preset groove area to obtain an epitaxial wafer with an epitaxial structure;
depositing an insulating medium layer on the surface of the epitaxial wafer with the epitaxial structure, which is away from the substrate;
removing the insulating medium layer of the preset P electrode layer open pore area and the preset N electrode layer open pore area after the insulating medium layer is deposited; the preset P electrode layer open pore area is arranged in the area where the ridge waveguide is located; the preset N electrode layer open area is arranged in the area where the groove is;
after removing the insulating medium layer, preparing a P electrode layer and an N electrode layer respectively in the P electrode layer open pore area and the N electrode layer open pore area to obtain a target epitaxial wafer;
and cleaving the target epitaxial wafer to obtain a single laser.
11. The method of claim 10, wherein the removing the initial epitaxial wafer of the predetermined thickness of the non-ridge waveguide region further comprises, prior to forming the ridge waveguide in the ridge waveguide region:
Pd is formed on the surface of the initial epitaxial wafer, which is away from the substrate, through magnetron sputtering or electron beam evaporation, and the Pd layer of the non-ridge waveguide area is stripped through a stripping process.
CN202311542669.9A 2023-11-17 2023-11-17 Laser parameter optimization method, laser and laser preparation method Pending CN117634164A (en)

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