CN117577751A - LED epitaxial chip - Google Patents
LED epitaxial chip Download PDFInfo
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- CN117577751A CN117577751A CN202311185783.0A CN202311185783A CN117577751A CN 117577751 A CN117577751 A CN 117577751A CN 202311185783 A CN202311185783 A CN 202311185783A CN 117577751 A CN117577751 A CN 117577751A
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- emitting layer
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- 230000000903 blocking effect Effects 0.000 claims abstract description 25
- 239000000758 substrate Substances 0.000 claims abstract description 12
- 229910002601 GaN Inorganic materials 0.000 claims description 27
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical group Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 6
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 5
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 claims description 5
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 4
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 claims description 3
- 230000000694 effects Effects 0.000 abstract description 4
- 230000003287 optical effect Effects 0.000 abstract description 3
- 238000004806 packaging method and process Methods 0.000 abstract description 3
- 230000002035 prolonged effect Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 5
- 239000000969 carrier Substances 0.000 description 4
- 238000003912 environmental pollution Methods 0.000 description 3
- 230000006798 recombination Effects 0.000 description 3
- 238000005215 recombination Methods 0.000 description 3
- 230000027756 respiratory electron transport chain Effects 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 2
- 229910002704 AlGaN Chemical group 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 230000005428 wave function Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/08—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a plurality of light emitting regions, e.g. laterally discontinuous light emitting layer or photoluminescent region integrated within the semiconductor body
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
The invention discloses an LED epitaxial chip, which comprises: the light-emitting device comprises a substrate, a buffer layer, a carrier layer, a light-emitting layer, an electron blocking layer and a hole layer; the buffer layer is arranged above the substrate, the carrier layer is arranged above the buffer layer, the light-emitting layer is arranged above the carrier layer, the electron blocking layer is arranged above the light-emitting layer, and the hole layer is arranged above the electron blocking layer; the hole layer comprises a first pGaN layer and a second pGaN layer, the second pGaN layer is arranged above the first pGaN layer, the second pGaN layer is heavily doped p-type GaN, and the first pGaN layer is lightly doped p-type GaN. According to the invention, through the added ohmic contact layer, the miniaturization of the chip can be realized, the packaging is convenient, the ohmic contact point is not required to be added, meanwhile, the luminous effect is realized, the light beam quality is improved, the optical power density is increased, the yield of the LED chip can be improved by a plurality of luminous layers, and the service life of the chip is prolonged.
Description
Technical Field
The invention relates to the technical field of LED epitaxial chips, in particular to an LED epitaxial chip.
Background
In the traditional LED epitaxy, an AlN layer and SL (super lattice structure) are pre-paved on a silicon substrate as a buffer layer for reducing dislocation, a u/nGaN layer provides carriers, an MQW layer belongs to an active region, wave functions of electrons and holes are more overlapped, the recombination efficiency is higher, the size of a forbidden band can be adjusted, the length can be very thin, and the problem of lattice mismatch is solved; pgan_1 provides a hole.
However, the external quantum efficiency (External Quantum Efficiency, EQE) of the conventional LED decreases gradually with time and temperature, which affects the life of the LED and restricts the development of industry, and meanwhile, in (indium element) overflows, which causes environmental pollution, and does not conform to the mainstream trend of environmental protection In China, and meanwhile, the top end of the chip needs to be an ohmic contact point, which is not beneficial to chip miniaturization.
Disclosure of Invention
The invention provides an LED epitaxial chip, which solves the technical problems of low luminous efficiency and overflow of In element along with the change of time and temperature In the prior art.
In order to solve the above technical problems, an embodiment of the present invention provides an LED epitaxial chip, including: the light-emitting device comprises a substrate, a buffer layer, a carrier layer, a light-emitting layer, an electron blocking layer and a hole layer;
the buffer layer is arranged above the substrate, the carrier layer is arranged above the buffer layer, the light-emitting layer is arranged above the carrier layer, the electron blocking layer is arranged above the light-emitting layer, and the hole layer is arranged above the electron blocking layer;
the hole layer comprises a first pGaN layer and a second pGaN layer, the second pGaN layer is arranged above the first pGaN layer, the second pGaN layer is heavily doped p-type GaN, and the first pGaN layer is lightly doped p-type GaN.
Preferably, the light emitting layer includes a first light emitting layer, a second light emitting layer, and a tunnel junction; the tunnel junction is arranged above the first light-emitting layer, and the second light-emitting layer is arranged above the tunnel junction;
the second light-emitting layer is arranged below the electron blocking layer, and the first light-emitting layer is arranged above the carrier layer.
Preferably, the first light emitting layer and the second light emitting layer are both of a multi-layer quantum well structure; the tunnel junction is a heterojunction of InGaAs/GaAs/GaN.
Preferably, the buffer layer is a low temperature/high temperature aluminum nitride structure.
Preferably, the carrier layer is undoped or n-type doped gallium nitride.
Preferably, the electron blocking layer is an aluminum nitride or aluminum gallium nitride structure.
Compared with the prior art, the embodiment of the invention has the following beneficial effects:
according to the technical scheme, through the arrangement of the substrate, the buffer layer, the carrier layer, the light-emitting layer, the electron blocking layer and the hole layer, meanwhile, the heavily doped p-type GaN and the lightly doped p-type GaN are arranged in the hole layer, so that the heavily doped p-type GaN can form an ohmic contact layer on the top layer, further, through the added ohmic contact layer, the miniaturization of the chip can be realized, the packaging is convenient, and an ohmic contact point is not required to be added.
Furthermore, the invention also enables the first luminescent layer and the second luminescent layer to realize electron transfer by adopting a tunnel junction mode through the first luminescent layer and the second luminescent layer In the luminescent layers, and further enables the second luminescent layer and the second luminescent layer to realize luminescent effect, thereby improving the light beam quality, increasing the light power density, simultaneously improving the yield of the LED chip through a plurality of luminescent layers, prolonging the service life of the chip, reducing the environmental pollution, avoiding electron overflow through the tunnel junction, the electron blocking layer and the like, and further avoiding In element overflow.
Drawings
Fig. 1: the structure diagram is that the traditional LED epitaxial chip is present;
fig. 2: the embodiment of the invention provides a structural schematic diagram of an LED epitaxial chip;
fig. 3: the embodiment of the invention provides a specific structure diagram of an LED epitaxial chip;
fig. 4: the energy band diagram of the LED epitaxial chip provided by the embodiment of the invention;
wherein, the reference numerals of the specification drawings are as follows:
a substrate 01, a buffer layer 02, a carrier layer 03, a light-emitting layer 04, an electron blocking layer 05, and a hole layer 06.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 1, in a conventional LED epitaxial chip, when an epitaxial wafer is forward-turned on, a P region (pgan_1 layer) is connected to an anode, an N region (u/N gan_1) is connected to a cathode, the width and height of a depletion region are reduced, the forward voltage damages the original thermal balance, so that the carrier diffusion motion is greater than the drift motion, the fermi levels of the P region and the N region are separated, the barrier is reduced, electrons and holes enter the opposite regions from the N region and the P region through diffusion into a PN junction respectively, the concentration of minority carriers is greatly increased, minority carriers are injected forward, the minority carriers with opposite charges are recombined, pgan_1 and u/N gan_1 are recombined in the MQW region, and energy is emitted in the form of photons to emit light.
Example 1
Referring to fig. 2, an LED epitaxial chip provided in an embodiment of the present invention includes: a substrate 01, a buffer layer 02, a carrier layer 03, a light-emitting layer, an electron blocking layer 05, and a hole layer 06.
The buffer layer is arranged above the substrate 01, the carrier layer 03 is arranged above the buffer layer 02, the light-emitting layer is arranged above the carrier layer 03, the electron blocking layer 05 is arranged above the light-emitting layer, and the hole layer 06 is arranged above the electron blocking layer 05.
As a preferred aspect of the present embodiment, referring to fig. 3, the light emitting layer includes a first light emitting layer (mqw_1), a second light emitting layer (mqw_2), and a tunnel junction; the tunnel junction is disposed over the first light emitting layer, and the second light emitting layer is disposed over the tunnel junction. The second light emitting layer is disposed below the electron blocking layer 05, and the first light emitting layer is disposed above the carrier layer 03.
In this embodiment, as another preferred scheme, a third light-emitting layer or even a plurality of light-emitting layers may be provided, so as to achieve more efficient light-emitting efficiency theoretically, but in the embodiment of the present invention, in order to achieve more than one-time recombination, improve light-emitting efficiency, simply improve yield, and also improve beam quality and increase optical power density, so that an EPI excessive layer is not necessary, and is unfavorable for miniaturization of the LED chip.
The hole layer 06 comprises a first pGaN layer and a second pGaN layer, the second pGaN layer is arranged above the first pGaN layer, the second pGaN layer is heavily doped P-type GaN (p++ GaN), and the first pGaN layer is lightly doped P-type GaN (pgan_1).
As a preferable mode of this embodiment, the first light emitting layer and the second light emitting layer are both a multilayer quantum well structure; the tunnel junction is a heterojunction of InGaAs/GaAs/GaN.
As a preferable aspect of this embodiment, the buffer layer 02 is a low temperature/high temperature aluminum nitride structure.
As a preferable mode of this embodiment, the carrier layer 03 is undoped or n-type doped gallium nitride (u/n gan).
As a preferable solution of this embodiment, the electron blocking layer 05 is an aluminum nitride or aluminum gallium nitride structure.
In this embodiment, compared with the conventional structure, the multi-layer quantum well structure is provided in this embodiment, the buffer layer 02buffer_1 is an HT/LT AlN structure, the light emitting layer MQW is an indium gallium nitride multi-layer quantum well structure, the electron blocking layer 05EBL is an AlN or AlGaN structure, the InGaAs/GaAs/GaN heterojunction is provided in the middle as the tunnel junction TJ, and the InGaAs/GaAs/GaN heterojunction and the AIGalnN are provided as the electron blocking layer EBL, and the ohmic contact layer is laid on the top layer, and meanwhile, the ohmic contact layer is heavily doped with p-type GaN, so that the contact resistance can be reduced, and the hole layer 06 is formed together with the lightly doped p-type GaN, so that electron transfer is commonly realized.
Please refer to fig. 4, which is a schematic diagram of the energy band of the LED epitaxial chip according to the present embodiment, wherein (a) is the energy band when the bias voltage is zero, and (b) is the energy band when the bias voltage is applied. The injected electrons are radiated and combined to generate a photon, then electrons are transited from a conduction band to a valence band, when a tunnel junction is reversely biased, the combined electrons are tunneled and regenerated to a conduction band of a second active region (MQW_1) under the action of an electric field, and radiation and combination are carried out continuously to generate photons. In theory, one electron is injected between the two electrodes, n photons can be generated by recombination in n active regions, preferably n=2 in this embodiment, that is, two active regions corresponding to the first light emitting layer and the second light emitting layer, so that the quantum efficiency can be increased by times, and the limit that the conventional quantum efficiency is less than 1 can be broken through. The yield is improved, the beam quality is improved, and the optical power density is increased.
The implementation of the above embodiment has the following effects:
according to the technical scheme, through the arrangement of the substrate, the buffer layer, the carrier layer, the light-emitting layer, the electron blocking layer 05 and the hole layer, meanwhile, the heavily doped p-type GaN and the lightly doped p-type GaN are arranged in the hole layer, so that the heavily doped p-type GaN can form an ohmic contact layer on the top layer, further, through the added ohmic contact layer, the miniaturization of the chip can be realized, the packaging is convenient, and an ohmic contact point is not required to be added.
Furthermore, the invention also enables the first luminescent layer and the second luminescent layer to realize electron transfer by adopting a tunnel junction mode through the first luminescent layer and the second luminescent layer In the luminescent layers, and further enables the second luminescent layer and the second luminescent layer to realize luminescent effect, thereby improving the light beam quality, increasing the light power density, simultaneously improving the yield of the LED chip through a plurality of luminescent layers, prolonging the service life of the chip, reducing the environmental pollution, avoiding electron overflow through the tunnel junction, the electron blocking layer 05 and the like, and further avoiding In element overflow.
The foregoing embodiments have been provided for the purpose of illustrating the general principles of the present invention, and are not to be construed as limiting the scope of the invention. It should be noted that any modifications, equivalent substitutions, improvements, etc. made by those skilled in the art without departing from the spirit and principles of the present invention are intended to be included in the scope of the present invention.
Claims (6)
1. An LED epitaxial chip, comprising: the light-emitting device comprises a substrate, a buffer layer, a carrier layer, a light-emitting layer, an electron blocking layer and a hole layer;
the buffer layer is arranged above the substrate, the carrier layer is arranged above the buffer layer, the light-emitting layer is arranged above the carrier layer, the electron blocking layer is arranged above the light-emitting layer, and the hole layer is arranged above the electron blocking layer;
the hole layer comprises a first pGaN layer and a second pGaN layer, the second pGaN layer is arranged above the first pGaN layer, the second pGaN layer is heavily doped p-type GaN, and the first pGaN layer is lightly doped p-type GaN.
2. The LED epitaxial chip of claim 1, wherein the light emitting layer comprises a first light emitting layer, a second light emitting layer, and a tunnel junction; the tunnel junction is arranged above the first light-emitting layer, and the second light-emitting layer is arranged above the tunnel junction;
the second light-emitting layer is arranged below the electron blocking layer, and the first light-emitting layer is arranged above the carrier layer.
3. The LED epitaxial chip of claim 2, wherein said first light emitting layer and said second light emitting layer are each a multi-layer quantum well structure; the tunnel junction is a heterojunction of InGaAs/GaAs/GaN.
4. An LED epitaxial chip according to claim 1 wherein the buffer layer is a low temperature/high temperature aluminum nitride structure.
5. An LED epitaxial chip according to claim 1 wherein the carrier layer is undoped or n-doped gallium nitride.
6. An LED epitaxial chip according to claim 1 wherein the electron blocking layer is an aluminum nitride or aluminum gallium nitride structure.
Priority Applications (1)
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CN202311185783.0A CN117577751A (en) | 2023-09-13 | 2023-09-13 | LED epitaxial chip |
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CN202311185783.0A CN117577751A (en) | 2023-09-13 | 2023-09-13 | LED epitaxial chip |
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CN202311185783.0A Pending CN117577751A (en) | 2023-09-13 | 2023-09-13 | LED epitaxial chip |
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2023
- 2023-09-13 CN CN202311185783.0A patent/CN117577751A/en active Pending
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