CN117476800B - Silicon-based photoelectric detector and preparation method thereof - Google Patents
Silicon-based photoelectric detector and preparation method thereof Download PDFInfo
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- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
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Abstract
The invention relates to the field of semiconductor manufacturing, and provides a silicon-based photoelectric detector and a preparation method thereof, wherein the silicon-based photoelectric detector comprises a substrate, a first silicon oxide layer, an epitaxial layer, a second silicon oxide layer, a metal electrode layer and a metal layer; a first silicon oxide layer is deposited on the upper surface of the substrate, and windows are formed on the substrate to expose window areas of epitaxy; the epitaxial layer grows in the window area and is surrounded by the first silicon oxide layer, and the epitaxial layer can be one or a lamination of silicon, germanium or silicon germanium alloy or doped with carbon, tin, lead and other impurities according to the requirement; the second silicon dioxide layer is deposited on the epitaxial layer; the metal electrode layer is exposed on the surface of the second silicon dioxide layer and is connected with the epitaxial layer and the substrate; the metal layer is deposited on the lower surface of the substrate. The invention can effectively reflect the incident light which is not completely absorbed by the absorption layer for recycling, and can increase the responsivity and sensitivity of the detector; the potential of the silicon layer suspension area is controlled by connecting the metal layer with the fixed potential, so that the interference on the behavior of the detector is reduced.
Description
Technical Field
The invention relates to the field of semiconductor manufacturing, in particular to a silicon-based photoelectric detector and a preparation method thereof.
Background
The silicon optical chip technology is a technology for integrating an optoelectronic device on a silicon substrate by a CMOS technology, and combines the characteristics of ultra-large scale and ultra-high precision manufacturing of an integrated circuit technology and the advantages of ultra-high speed and ultra-low power consumption of a photon technology. The silicon optical technology has wide application prospect in the fields of optical communication, data centers, optical interconnection, laser radar, medical health, optical computation and the like, and is widely and deeply researched and developed in the fields of telecommunication, data centers and the like after twenty years of academia and industry. The band gap of silicon is 1.12eV, which determines that the cut-off wavelength of the response of the silicon photodetector is about 1.1 microns, and the germanium material with narrower band gap is epitaxially grown on the silicon substrate to serve as an absorption material, so that the silicon-based germanium photodetector is manufactured, the cut-off wavelength can be increased to about 1.6 microns, and the most important infrared communication wavelengths of 1310nm and 1550nm are covered. Therefore, the silicon-based photodetector can flexibly select and utilize silicon, germanium or silicon germanium alloy as an absorption layer material so as to absorb and detect light with different wavelengths.
Silicon-based photodetectors can be divided into two main categories: one type is a waveguide-type detector, in which light propagates and absorbs in the horizontal direction, typically for high-speed integrated optical circuits (Photonic integrated circuit, PIC); the other is a detector in which light is incident and absorbed in a vertical direction. The silicon-based detector with the vertical structure has the advantages of simple structure and convenient light in-coupling, can be used as a discrete device or flexibly used in array devices and photoelectric integration (such as detector and transimpedance amplifier integration), and has quite wide application. Vertical structured detectors are typically fabricated on silicon-on-insulator (Silicon on Insulator, SOI) substrates, with the buried oxide layer creating two silicon/silicon oxide interfaces, and a portion of the light not fully absorbed by the detector is reflected back to the detector by the interface to enhance absorption, and the buried oxide layer also reduces the substrate parasitics at high frequencies to increase the 3dB electrical bandwidth. However, as shown in fig. 1, such vertical structure detectors often suffer from two types of problems: on the one hand, when the P-type top silicon layer (Top Silicon Layer) of the conventional SOI substrate is used for N-type in-situ doping epitaxy or low-energy ion implantation of N-type impurities, a part of the P-type top silicon layer can be reserved under the N-type doped layer at the bottom of the detector, and becomes a suspension structure, so that charges are easily induced to generate an uncertain potential, and the 13A P-type silicon layer and the 13B N-type silicon layer are formed + Parasitic PN junctions formed by the silicon layers are in a forward bias state or a reverse bias state, so that injection or extraction of carriers is generated, and the behavior of the detector can be interfered, such as changing the series resistance of the detector or the parasitic capacitance of the substrate; on the other hand, no matter how the structure of the vertical detector is designed and matched with the buried oxide layer, it is unavoidable that a part of light in the incident light a is not completely absorbed by the absorption layer, and this part of light leaks to the back surface of the silicon substrate through the buried oxide layer of the SOI, and finally about 70% escapes from the SOI structure, which becomes the optical loss that the detector of this type of vertical structure must faceProblems. This portion of the escaping light is independent of the doping type of the detector, and even waveguide-type detectors that propagate and absorb light horizontally, there is light that leaks into the silicon substrate and escapes through the back surface. If most of the escaping light can be reflected back to the absorption layer for re-absorption and utilization, the responsivity and sensitivity of the detector can be improved.
Disclosure of Invention
The silicon-based photoelectric detector and the preparation method thereof are provided for solving the problems of interference of a top silicon layer suspension area on detector behaviors and light escape loss on the back surface of a substrate in the prior art, and a metal layer is deposited on the back surface of the silicon substrate after the silicon-based detector is manufactured and all steps including metallization and passivation layers are completed. On one hand, the back Metal layer can be used as an effective broadband reflector to reflect most of infrared light back to be absorbed and utilized by the absorption layer again, and on the other hand, the back Metal layer is connected to a fixed potential, and the potential of the floating region of the P-type top silicon layer can be controlled through a Metal-Oxide-Semiconductor (MOS) structure constructed by the silicon substrate-oxygen-buried layer-P-type top silicon layer floating region, so that the interference on the behavior of the detector is reduced.
The first aspect of the invention provides a silicon-based photodetector, comprising a substrate, a first silicon oxide layer, an epitaxial layer, a second silicon oxide layer, a metal electrode layer and a metal layer; the first silicon oxide layer is deposited on the upper surface of the substrate, and the window is etched to expose the substrate for growing the epitaxial layer; the epitaxial layer grows in the window area of the first silicon oxide layer and is surrounded by the first silicon oxide layer; the second silicon dioxide layer is deposited on the epitaxial layer; the metal electrode layer is exposed on the surface of the second silicon dioxide layer and is connected with the epitaxial layer and the substrate; the metal layer is deposited on the lower surface of the substrate.
Further, the metal layer is connected to zero potential or other fixed potential.
Further, the substrate is an SOI (silicon on insulator) substrate or a bulk silicon substrate.
Further, the metal layer is made of a material with good infrared light reflection performance and good ohmic contact performance with silicon.
Further, the metal layer material is aluminum or aluminum alloy.
Further, the thickness of the metal layer is 100-500 nanometers.
Further, the epitaxial layer is one of silicon, germanium or silicon germanium alloy or a lamination of the materials, or is formed by doping carbon, tin, lead and other impurities according to requirements.
The second aspect of the present invention provides a method for manufacturing a silicon-based photodetector, which is used for manufacturing the silicon-based photodetector according to the first aspect of the present invention, and includes:
s1, selecting an SOI substrate;
step S2, etching a ridge waveguide and a strip waveguide on the top silicon layer of the SOI substrate by adopting the combination of photoetching and dry etching, and realizing mesa isolation between detector areas;
s3, preparing a selective epitaxial detector until the metallization process and the opening of the passivation layer are completed;
and S4, sputtering a 150-nanometer aluminum metal layer on the back surface of the silicon substrate, and annealing for half an hour at 350 ℃ in a nitrogen-hydrogen mixed atmosphere to form the silicon-based photoelectric detector.
Further, the metal layer is connected to a zero potential or a non-zero fixed potential.
Further, in step S1, a bulk silicon substrate is used instead of the SOI substrate.
Compared with the prior art, the beneficial effects of adopting the technical scheme are as follows:
1) The metal reflector on the back of the substrate is added, so that incident light which is not completely absorbed by the absorption layer is effectively reflected and recycled, and the responsivity and the sensitivity of the detector can be improved;
2) The metal layer on the back of the substrate is grounded or connected to a certain fixed potential, and the MOS structure formed by the silicon substrate, the oxygen buried layer and the top silicon layer is used for controlling the potential of the suspended area of the top silicon layer, so that the interference on the behavior of the detector is reduced;
3) The device is applicable to a vertical incidence cake-shaped detector and a horizontal optical coupling waveguide-type detector, and can also be used for an avalanche photodiode with a vertical or horizontal structure; the detector is not only suitable for the detector of the SOI substrate, but also suitable for the detector of the bulk silicon substrate, and has flexibility and economy;
4) The back deposition metal material and alloy process is compatible with the CMOS process, and has simple structure and low cost.
Drawings
Fig. 1 is a cross-sectional view of a prior art vertical structure detector on an SOI substrate.
Fig. 2 is a cross-sectional view of a silicon-based detector according to the present invention.
Fig. 3 (a) is a schematic diagram showing the simulation result of the change of the light reflectivity of the back metal reflective layer of the SOI substrate with the thickness of the substrate at a wavelength of 1550nm, and fig. 3 (b) is a schematic diagram showing the simulation result of the change of the light reflectivity of the back metal reflective layer of the SOI substrate with the thickness of the substrate at a wavelength of 1310 nm.
Fig. 4 (a) is a schematic diagram showing the simulation result of the change of the light reflectivity of the back metal reflective layer of the bulk silicon substrate with the thickness of the substrate at a wavelength of 1550nm, and fig. 4 (b) is a schematic diagram showing the simulation result of the change of the light reflectivity of the back metal reflective layer of the bulk silicon substrate with the thickness of the substrate at a wavelength of 1310 nm.
Reference numerals: 1-SOI substrate, 2-first silicon oxide layer, 3-epitaxial layer, 4-second silicon oxide layer, 5-metal electrode layer, 6-metal layer, 7-MOS structure, 11-silicon substrate, 12-buried oxide layer, 13-top silicon layer, 3A-epitaxial I layer, 3B-epitaxial P layer + Layer, 3C-epi P ++ Layer, 5A-positive electrode, 5B-negative electrode, 13A-P type silicon layer, 13B-N + Silicon layer, 13C-N ++ And a silicon layer.
Detailed Description
Embodiments of the present application are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar modules or modules having like or similar functions throughout. The embodiments described below by referring to the drawings are exemplary only for the purpose of explaining the present application and are not to be construed as limiting the present application. On the contrary, the embodiments of the present application include all alternatives, modifications, and equivalents as may be included within the spirit and scope of the appended claims.
Example 1
Aiming at the problems of interference of the floating region of the P-type silicon layer 13A of the top silicon layer on the behavior of the detector and light escape loss of the back surface of the substrate, the embodiment provides a silicon-based photoelectric detector, and a metal layer 6 is deposited on the back surface of the silicon substrate 11 after the silicon-based detector is manufactured and all steps including metallization and passivation layers are completed. The metal layer 6 plays roles of a light reflecting layer and a back electrode, and most of infrared light is reflected back through an effective broadband reflector of the metal layer 6 and is absorbed and utilized by the absorption layer again. In one embodiment, the P-type silicon layer 13A potential is controlled by being connected to zero potential or other fixed potential to reduce interference with detector behavior.
Referring to fig. 2, the silicon-based photodetector includes a substrate, a first silicon oxide layer 2, an epitaxial layer 3, a second silicon oxide layer 4, a metal electrode layer 5, and a metal layer 6. In this embodiment, the substrate is a starting SOI (Silicon-on-insulator) substrate 1 material, which includes a Silicon substrate 11, an oxygen-buried layer 12, and a top Silicon layer 13 from bottom to top. Wherein the top silicon layer 13 comprises a P-type silicon layer 13A, N type doped with the original doping of the SOI substrate top silicon layer from bottom to top and N with gradually increased concentration + Silicon layers 13B and N ++ Silicon layer 13C. In one embodiment, the substrate resistivity is 0.01-10k ohm-cm, preferably a higher resistivity material, to reduce the parasitic effects of the substrate to better benefit the performance of the silicon photochip; the thickness of the buried oxide layer 12 is 0.1-3 micrometers, and SOI materials with thicker buried oxide layer 12 are preferable to improve the radio frequency bandwidth of the detector; the thickness of the top silicon layer 13 is 0.1-3 microns, a certain thickness is needed to grow a high-quality epitaxial layer, and the design and etching processing of the optical waveguide are convenient.
A first silicon oxide layer 2 is deposited on the material of the SOI substrate 1, and is mainly used for defining a selective epitaxial window, the thickness of the first silicon oxide layer is 0.5-2 micrometers, a windowing treatment is performed on the first silicon oxide layer to expose a top silicon layer 13 of the SOI substrate, a windowing area for growing an epitaxial layer is formed, and the epitaxial layer 3 is epitaxially grown in the windowing area and is surrounded by the first silicon oxide layer 2. Wherein the epitaxial layer 3 can be one of silicon, germanium or silicon germanium alloy or a lamination of the materials, and carbon and tin can be doped according to the requirementImpurities such as lead and the like comprise an intrinsic epitaxial I layer 3A and an epitaxial P which is doped with P and has gradually increased concentration from bottom to top + Layer 3B, extension P ++ Layer 3C. In one embodiment, the epitaxial layer 3 has a thickness of 0.5-2 microns and is the same as the first silicon oxide layer 2 to keep the absorber layer flush with the upper portion of the first silicon oxide layer 2.
A second silicon dioxide layer 4 is deposited over the epitaxial layer 3 and serves as a pre-metallization medium, in one embodiment in the range of 0.4-1 micron in thickness.
The metal electrode layer 5 is exposed on the surface of the second silicon oxide layer 4, the metal electrode layer 5 comprises a positive electrode 5A and a negative electrode 5B, the positive electrode 5A is connected with the epitaxial layer 3, and the negative electrode 5B is connected with N in the SOI layer substrate ++ Silicon layer 13C is connected. In one embodiment, the metal electrode layer is of conventional thickness 0.5-1 microns and is composed of pure aluminum or an aluminum alloy containing a small amount of silicon or/and copper components.
The metal layer 6 is deposited on the lower surface of the SOI substrate 1. It should be noted that a metal having good reflectivity to light, capable of reflecting most of infrared light back to the silicon substrate 11, and easily forming excellent ohmic contact with silicon, preferably aluminum or an alloy material containing aluminum as a main component, should be selected; the metal layer 6 has a thickness of 100-500 nm, the lower limit being determined by the effective reflection of light at a sufficient thickness to maintain the minimum thickness for electrode wire bonding, and the upper limit being limited by the destructive effect of stress when the thickness is too great. When the thickness is too thin, the light is easy to penetrate and is not enough to effectively reflect, the bonding of the external electrode by wire bonding is also not facilitated, and when the thickness is too thick, the stress is obviously increased to generate wafer warpage and even stripping.
In the silicon-based detector shown in FIG. 2, the MOS structure 7 is formed by the silicon substrate 11, the buried oxide layer 12 and the top silicon layer 13, and the top silicon layer forms a suspended P-type silicon layer 13A, which is easy to generate charges to generate uncertain potential, so that the suspended P-type silicon layers 13A and N + The parasitic PN junction formed by the silicon layer 13B is in a forward biased or reverse biased state, and injection or extraction of carriers is generated, which may interfere with the behavior of the detector. On the basis of this, after the metal layer 6 is provided on the back surface of the silicon substrate 11, the silicon substrate 11 is connected to a zero potential or a non-zero fixed potential through the metal layer 6, and then suspendedThe potential of P-type silicon layer 13 is also clamped with certainty, thereby being defined by floating P-type silicon layers 13A and N + The parasitic PN junction bias state formed by the silicon layer 13B is more deterministic, so that the interference on the detector behavior can be reduced.
Referring to fig. 1, when the back surface of the silicon substrate 11 has no metal reflective layer, most of the infrared light reaching the back surface of the silicon substrate 11 escapes, and a small portion of the infrared light is reflected back to the silicon substrate 11 (a of fig. 1 1 ) About 30% of the incident light a; after adding a metal reflecting layer on the back surface of the silicon substrate 11, the light reflected back to the silicon substrate 11 is greatly raised to 70-80% (A in FIG. 2) 1 ′ ) I.e. most of the light can also be re-absorbed by the absorbing layer. The specific reflectivity here is dependent on the infrared wavelength and the structure of the individual material layers.
Meanwhile, a metal material with good ohmic contact characteristic with the silicon substrate 11 is selected, the back metal reflecting layer plays a role of a back electrode, is connected to zero potential or other fixed potentials, and can effectively control the potential of a floating region of the P-type top silicon layer 13 through MOS effect, so that the interference of the floating region on the behavior of the detector caused by the change of PN junction bias in the top silicon layer 13 due to the random induced charge is reduced. Thus, both the problems of infrared light escaping from the back side of the substrate and the floating area of the top silicon layer 13 interfering with the behavior of the detector present in the existing silicon-based detector are solved well by adding a metal layer 6 to the back side of the silicon substrate 11 and connecting to a fixed potential.
As shown in fig. 3 (a) and fig. 3 (b), the simulation results of the change of the light reflectivity of the metal reflective layer on the back surface of the SOI substrate 1 along with the thickness of the substrate show periodic fluctuation changes of the light reflectivity of the metal layer 6 on the back surface of the SOI substrate 1 along with the thickness of the substrate no matter the most commonly used infrared communication wavelength is 1550nm or 1310nm, the reflectivity is about 95% at the highest and about 65% at the lowest, and the reflectivity is more than 80% for most of the thickness of the substrate, so that the recycling effect of the escaping light on the back surface of the substrate is very remarkable after the metal reflective layer on the back surface of the substrate is increased.
In another embodiment, the SOI substrate 1 may be replaced by a bulk silicon substrate, and the buried oxide layer 12 is not controlled by MOS effect, but the fixed potential of the connection of the back metal layer 6 directly determines the substrate potential, and the uncertainty of the substrate potential is avoided, and referring to fig. 4 (a) and 4 (b), the simulation results of the light reflectivity of the back metal reflective layer of the bulk silicon substrate under the infrared communication wavelength 1550nm and 1310nm along with the thickness change of the substrate are shown, and it can be seen that the metal layer 6 on the back of the substrate has better light reflectivity.
It should be noted that, in this embodiment, the solution proposed by the present invention is described by taking a silicon-based PIN-type detector with a vertical structure as an example, but it is understood from the device structure and the working principle that the present invention is applicable to both PN-type detectors and avalanche photodiodes (Avalanche Photodiode, APD), and is also applicable to waveguide-type PN, PIN-type detectors and APDs with a horizontal structure; the detector is suitable for not only the detector of the SOI substrate, but also the detector of the bulk silicon substrate. I.e. a method of adding a metal layer 6 to the back side of the substrate to reduce disturbances to the detector behaviour and loss of light escape from the back side of the substrate, can be used in all of the scenarios mentioned above.
Example 2
The embodiment provides a method for preparing a silicon-based photoelectric detector, which is used for preparing the silicon-based photoelectric detector provided in embodiment 1, and comprises the following steps:
and S1, selecting an SOI substrate. In one embodiment, an 8 inch P (100) SOI substrate was selected, the substrate thickness was 725 microns, the resistivity-10 ohm ∙ cm, the buried oxide layer thickness was 2 microns, and the top silicon layer thickness was 0.22 microns.
Step S2, etching a ridge waveguide and a strip waveguide on the top silicon layer of the SOI substrate by adopting the combination of photoetching and dry etching, and realizing mesa isolation between detector areas;
s3, preparing a selective epitaxial detector until the metallization process and the opening of the passivation layer are completed;
and S4, sputtering a 150-nanometer aluminum metal layer on the back surface of the silicon substrate, and annealing for half an hour at 350 ℃ in a nitrogen-hydrogen mixed atmosphere to form the silicon-based photoelectric detector.
When an SOI substrate is adopted, the metal layer is connected with a zero potential to reduce the interference of PN junctions below the detector absorption layer on the detector.
In another embodiment, in step S1, a bulk silicon substrate may be used instead of an SOI substrate. At this time, the metal layer is connected to a fixed potential to reduce the interference of PN on the detector behavior.
Under the working state of the silicon-based photoelectric detector prepared by the SOI substrate, 1310 nanometer infrared light irradiates from the front surface of the detector, the positive electrode 4A is connected with 0 potential, the negative electrode 4B is connected with positive bias potential, the detector is in a negative bias working state, the back metal layer 6 is connected with 0 potential, under the condition, light which is not completely absorbed by the absorption layer is reflected by the back metal layer to be absorbed and utilized again, higher detector response and sensitivity can be obtained, and meanwhile, because the back surface of the silicon substrate is grounded, the suspended P-type silicon layer 13A potential and PN junction bias state are clamped through MOS effect, and interference on the detector behavior is reduced.
It should be noted that, in the description of the embodiments of the present invention, unless explicitly specified and limited otherwise, the terms "disposed," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; may be directly connected or indirectly connected through an intermediate medium. The specific meaning of the above terms in the present invention will be understood in detail by those skilled in the art; the accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention. The components of the embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.
Although embodiments of the present application have been shown and described above, it will be understood that the above embodiments are illustrative and not to be construed as limiting the application, and that variations, modifications, alternatives, and variations may be made to the above embodiments by one of ordinary skill in the art within the scope of the application.
Claims (7)
1. The silicon-based photoelectric detector is characterized by comprising a substrate, a first silicon oxide layer, an epitaxial layer, a second silicon oxide layer, a metal electrode layer and a metal layer; the first silicon oxide layer is deposited on the upper surface of the substrate, and windows are formed on the substrate to expose the substrate to form an epitaxial window area; the epitaxial layer grows in the window area and is surrounded by the first silicon oxide layer; the second silicon dioxide layer is deposited on the epitaxial layer; the metal electrode layer is exposed on the surface of the second silicon dioxide layer and is connected with the epitaxial layer and the substrate; the metal layer is deposited on the lower surface of the substrate; the substrate is a silicon-on-insulator substrate, a silicon substrate-oxygen-buried layer-top silicon layer of the silicon-on-insulator substrate forms a MOS structure, and the top silicon layer forms a suspended P-type silicon layer; the metal layer is connected to zero potential or other non-zero fixed potential, so that the silicon substrate is also connected to zero potential or non-zero fixed potential, and the fixed potential externally connected with the silicon substrate is controlled through the MOS structure, so that the potential of the suspended P-type silicon layer is deterministic.
2. The silicon-based photodetector of claim 1, wherein said metal layer is made of a material having both infrared light reflection properties and ohmic contact properties with silicon.
3. The silicon-based photodetector of claim 1, wherein the metal layer material is aluminum or an aluminum alloy.
4. The silicon-based photodetector of claim 1, wherein the metal layer has a thickness of 100-500 nm.
5. The silicon-based photodetector of claim 1, wherein said epitaxial layer is one of silicon, germanium or a silicon-germanium alloy, or a stack of two or three of silicon, germanium or a silicon-germanium alloy.
6. The silicon-based photodetector device of claim 5, wherein said epitaxial layer is doped with any one of carbon, tin or lead as desired.
7. A method for manufacturing a silicon-based photodetector, for manufacturing a silicon-based photodetector according to any one of claims 1 to 6, comprising:
s1, selecting a silicon-on-insulator substrate;
step S2, etching a ridge waveguide and a strip waveguide on a top silicon layer of a silicon substrate on an insulator by adopting the combination of photoetching and dry etching, and realizing mesa isolation between detector areas;
s3, preparing a selective epitaxial detector until the metallization process and the opening of the passivation layer are completed;
s4, sputtering a 150-nanometer aluminum metal layer on the back surface of the silicon substrate, and annealing for half an hour at 350 ℃ in a nitrogen-hydrogen mixed atmosphere to form a silicon-based photoelectric detector;
the metal layer is connected with zero potential or non-zero fixed potential.
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| JP2018156984A (en) * | 2017-03-15 | 2018-10-04 | 株式会社東芝 | Photo detection element |
| JP7039411B2 (en) * | 2018-07-20 | 2022-03-22 | 株式会社東芝 | Photodetectors, photodetection systems, rider devices and cars |
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| JPH09321333A (en) * | 1996-05-24 | 1997-12-12 | Nikon Corp | Infrared detecting device |
| CN106356419A (en) * | 2016-11-29 | 2017-01-25 | 电子科技大学 | Photoelectric detector containing buried oxide layer structure |
| CN114093899A (en) * | 2021-08-11 | 2022-02-25 | 杨荣 | Detector integrated with solar cell and manufacturing method thereof |
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