CN117290688A - Virtual loop verification method and device, electronic equipment and storage medium - Google Patents
Virtual loop verification method and device, electronic equipment and storage medium Download PDFInfo
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Abstract
The invention discloses a virtual loop checking method, a virtual loop checking device, electronic equipment and a storage medium. The virtual loop checking method comprises the following steps: determining a target substation, and acquiring a system configuration file corresponding to the target substation, wherein the system configuration file comprises device configuration information corresponding to each target device in the target substation; dividing the target devices at intervals according to the device configuration information, and determining a target interval corresponding to each target device; determining actual verification data corresponding to each target device according to the device configuration information; and obtaining standard check data, and performing virtual loop check on the target transformer substation based on the target interval, the actual check data and the standard check data to obtain a loop check result. Based on the technical scheme of the embodiment of the invention, automatic virtual loop verification can be performed based on the divided target intervals, and the efficiency and accuracy of virtual loop verification can be improved.
Description
Technical Field
The present invention relates to the field of intelligent substation technologies, and in particular, to a virtual circuit verification method, a virtual circuit verification device, an electronic device, and a storage medium.
Background
Along with the development of intelligent substations, the requirement on the correctness of the virtual circuit of the substation is higher and higher, and the high-correctness virtual circuit can effectively improve the field working efficiency of the substation, so that the virtual circuit is usually checked in the related field.
At present, a traditional later-stage signal-to-point mode is generally adopted to perform virtual loop verification, but the method needs manual intervention and has a long verification period, the situation that errors exist in the verification in the long-period manual verification process often occurs, and on the whole, the current virtual loop verification method is poor in automation degree, efficiency and accuracy.
Disclosure of Invention
The invention provides a virtual loop checking method, a virtual loop checking device, electronic equipment and a storage medium, which are used for solving the technical problems of poor automation degree, efficiency and accuracy of the current virtual loop checking method.
According to an aspect of the present invention, there is provided a virtual loop checking method, wherein the method includes:
determining a target substation, and acquiring a system configuration file corresponding to the target substation, wherein the system configuration file comprises device configuration information corresponding to each target device in the target substation, and the target devices comprise intelligent terminals and/or protections;
Dividing the target devices at intervals according to the device configuration information, and determining a target interval corresponding to each target device, wherein the target interval comprises at least one of a main transformer interval, a voltage side interval and a low-voltage branch interval;
determining actual verification data corresponding to each target device according to the device configuration information;
and obtaining standard check data, and performing virtual loop check on the target transformer substation based on the target interval, the actual check data and the standard check data to obtain a loop check result.
According to another aspect of the present invention, there is provided a virtual circuit verification apparatus, wherein the apparatus includes:
the file acquisition module is used for determining a target transformer substation and acquiring a system configuration file corresponding to the target transformer substation, wherein the system configuration file comprises device configuration information corresponding to each target device in the target transformer substation, and the target devices comprise intelligent terminals and/or protections;
the interval division module is used for dividing the target devices at intervals according to the device configuration information, and determining a target interval corresponding to each target device, wherein the target interval comprises at least one of a main transformer interval, a voltage side interval and a low-voltage branch interval;
The actual data extraction module is used for determining the actual verification data corresponding to each target device according to the device configuration information;
and the loop checking module is used for acquiring standard checking data, and performing virtual loop checking on the target transformer substation based on the target interval, the actual checking data and the standard checking data to obtain a loop checking result.
According to another aspect of the present invention, there is provided an electronic apparatus including:
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein,
the memory stores a computer program executable by the at least one processor to enable the at least one processor to perform the virtual circuit verification method of any one of the embodiments of the present invention.
According to another aspect of the present invention, there is provided a computer readable storage medium storing computer instructions for causing a processor to implement a virtual circuit verification method according to any one of the embodiments of the present invention when executed.
According to the technical scheme, a system configuration file corresponding to a target substation is obtained through determining the target substation, wherein the system configuration file comprises device configuration information corresponding to each target device in the target substation, and the target devices comprise intelligent terminals and/or protections; dividing the target devices at intervals according to the device configuration information, and determining a target interval corresponding to each target device, wherein the target interval comprises at least one of a main transformer interval, a voltage side interval and a low-voltage branch interval; determining actual verification data corresponding to each target device according to the device configuration information; and obtaining standard check data, and performing virtual loop check on the target transformer substation based on the target interval, the actual check data and the standard check data to obtain a loop check result. The automatic virtual loop verification based on the divided target intervals is realized, and the efficiency and accuracy of virtual loop verification are improved.
It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the invention or to delineate the scope of the invention. Other features of the present invention will become apparent from the description that follows.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a flowchart of a virtual loop checking method according to a first embodiment of the present invention;
FIG. 2 is a scene graph of a target interval partitioning provided in accordance with an embodiment of the invention;
FIG. 3 is a data diagram illustrating correspondence between information characters and configuration information according to an embodiment of the present invention;
fig. 4 is a flowchart of a virtual loop checking method according to a second embodiment of the present invention;
FIG. 5 is an overall flow chart of a virtual circuit verification method provided according to an embodiment of the present invention;
Fig. 6 is a schematic structural diagram of a virtual circuit verification apparatus according to a third embodiment of the present invention;
fig. 7 is a schematic structural diagram of an electronic device implementing a virtual circuit verification method according to an embodiment of the present invention.
Detailed Description
In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Example 1
Fig. 1 is a flowchart of a virtual circuit verification method according to an embodiment of the present invention, where the method may be applied to a data verification case, and the method may be performed by a virtual circuit verification device, where the virtual circuit verification device may be implemented in a form of hardware and/or software, and the virtual circuit verification device may be configured in computer software. As shown in fig. 1, the method includes:
s110, determining a target substation, and acquiring a system configuration file corresponding to the target substation, wherein the system configuration file comprises device configuration information corresponding to each target device in the target substation, and the target devices comprise intelligent terminals and/or protections.
The target substation can be understood as a substation to be subjected to virtual loop verification.
The system configuration file may be understood as a file recording the system configuration of the target substation. In the embodiment of the present invention, the system configuration file may be preset according to the scene requirement, which is not specifically limited herein. The system profile may be a substation configuration description (Substation Configuration Description, SCD) file.
The target device may be understood as a device in the target substation. In the embodiment of the present invention, the target device may be preset according to a scene requirement, which is not specifically limited herein. Alternatively, the target device may be an intelligent electronic device (Intelligent Electronic Device, IED). Optionally, the target device may include a smart terminal and/or protection.
The device configuration information may be understood as configuration information of the target device. Optionally, the device configuration information may include a standard naming and/or a device description corresponding to each of the target devices.
S120, dividing the target devices at intervals according to the device configuration information, and determining a target interval corresponding to each target device, wherein the target interval comprises at least one of a main transformer interval, a voltage side interval and a low-voltage branch interval.
The target interval may be understood as an interval to which the target device currently belongs. Referring to fig. 2, fig. 2 is a scene graph of a target interval division provided according to an embodiment of the present invention.
Optionally, the device configuration information includes standard naming and/or device description, the standard naming includes information characters of a target number, the interval division is performed on the target devices according to the device configuration information, and determining a target interval corresponding to each target device includes:
dividing the interval of the target device based on the information character, and determining the main transformer interval corresponding to the target device, wherein the main transformer interval comprises at least one interval;
For each main transformer interval, dividing the target device according to preset characters, and determining the voltage side interval corresponding to the target device, wherein the voltage side interval comprises at least one of a main transformer main body interval, a high-voltage side interval, a medium-voltage side interval and a low-voltage side interval, and the preset characters are at least one character of the information characters;
and dividing the interval of the target device based on the equipment description aiming at the low-voltage side interval, and determining a low-voltage branch interval corresponding to the target device, wherein the low-voltage branch interval comprises at least one of a single-branch interval, a first branch interval and a second branch interval.
Wherein, the standard naming can be understood as the naming of the standard corresponding to each target device. Optionally, the standard naming includes a target number of information characters. The target number may be preset according to the scene requirement, and is not limited herein, and optionally, the target number may be 8 bits.
Wherein the information character may be understood as a character characterizing configuration information of the target device. Optionally, the information character includes at least one of a device type, a home equipment type, a characterization voltage level, an equipment home number, and a character characterizing an equipment number corresponding to the target device. Illustratively, the informational character may be 0, 1, 2, a or B, etc.
Fig. 3 is a data diagram of correspondence between characterization information characters and configuration information according to an embodiment of the present invention. In the embodiment of the invention, one information character or two information characters can represent configuration information corresponding to one target device.
The main transformer interval may be understood as an interval of a main transformer to which the target device belongs. Specifically, the main transformer to which each target device belongs is determined and divided into intervals of the current main transformer. In an embodiment of the present invention, the target substation may include one or more main transformers, and each main transformer may correspond to one main transformer interval, so the main transformer interval may be one or more. The main transformer interval may be one or more of #1, #2, and #3, for example.
The predetermined character may be understood as a character predetermined to divide the voltage side interval. It is understood that the preset character is at least one character of the information characters. In the embodiment of the present invention, the preset characters may be preset according to the scene requirement, which is not specifically limited herein. Optionally, the preset character may be a character representing a voltage level and/or a device home number corresponding to the target device.
The voltage side interval may be understood as an interval of a voltage side to which the target device currently belongs. Alternatively, the voltage side interval may include at least one of a main transformer body interval, a high side interval, a medium side interval, and a low side interval.
The low-voltage branch interval may be understood as an interval of a low-voltage side branch to which the target device currently belongs. Specifically, in the case where the current low-voltage side interval includes one target device, the low-voltage branch interval corresponding to the current target device is a single-branch interval. In case the current low-voltage side interval comprises at least two of the target devices, then the low-voltage branch interval, i.e. the first branch interval or the second branch interval, to which each of the target devices belongs is determined based on the information character characterizing the home equipment number in the standard nomenclature.
In the embodiment of the invention, the main transformer interval corresponding to each target device is determined; further, for each main transformer interval, determining the voltage side interval corresponding to each target device; further, for a low-voltage side interval, the low-voltage branch interval corresponding to each target device is determined.
S130, determining the actual verification data corresponding to each target device according to the device configuration information.
The actual verification data may be understood as actual verification data corresponding to the target device. Optionally, the actual verification data may include a virtual loop association relationship and/or a bus association relationship.
Optionally, the determining, according to the device configuration information, actual verification data corresponding to each target device includes:
determining virtual loop association relations among all the target devices in the target substation through the device configuration information;
determining bus association relations between each target device and the connected buses through the device configuration information and the virtual loop association relations;
and taking the virtual loop association relationship and the bus association relationship as the actual verification data corresponding to each target device.
Specifically, in the embodiment of the present invention, a virtual circuit association relationship between each target device in the target substation may be directly extracted based on the device configuration information, and a bus association relationship between each target device and a connected bus under the condition of the current virtual circuit association relationship.
And S140, acquiring standard check data, and performing virtual loop check on the target transformer substation based on the target interval, the actual check data and the standard check data to obtain a loop check result.
The standard calibration data may be understood as standard data for verifying the accuracy of the actual calibration data. Optionally, the standard verification data may include a standard device template and/or a standard virtual circuit template.
According to the technical scheme, a system configuration file corresponding to a target substation is obtained through determining the target substation, wherein the system configuration file comprises device configuration information corresponding to each target device in the target substation, and the target devices comprise intelligent terminals and/or protections; dividing the target devices at intervals according to the device configuration information, and determining a target interval corresponding to each target device, wherein the target interval comprises at least one of a main transformer interval, a voltage side interval and a low-voltage branch interval; determining actual verification data corresponding to each target device according to the device configuration information; and obtaining standard check data, and performing virtual loop check on the target transformer substation based on the target interval, the actual check data and the standard check data to obtain a loop check result. The automatic virtual loop verification based on the divided target intervals is realized, and the efficiency and accuracy of virtual loop verification are improved.
Example two
Fig. 4 is a flowchart of a virtual circuit verification method according to a second embodiment of the present invention, where in this embodiment, virtual circuit verification is performed on the target substation based on the target interval, the actual verification data and the standard verification data in the foregoing embodiment. As shown in fig. 4, the method includes:
s210, determining a target substation, and acquiring a system configuration file corresponding to the target substation, wherein the system configuration file comprises device configuration information corresponding to each target device in the target substation, and the target devices comprise intelligent terminals and/or protections.
S220, dividing the target devices at intervals according to the device configuration information, and determining a target interval corresponding to each target device, wherein the target interval comprises at least one of a main transformer interval, a voltage side interval and a low-voltage branch interval.
S230, determining the actual verification data corresponding to each target device according to the device configuration information.
S240, standard check data are acquired.
S250, determining the number of main transformers of the main transformer in the target substation based on the main transformer intervals.
The number of main transformers can be understood as the number of main transformers in the target transformer. In the embodiment of the invention, one main transformer corresponds to one main transformer interval. Thus, the main transformer number can be directly determined based on the main transformer interval.
And S260, under the condition that the number of the main transformers is one, performing virtual loop verification on the target transformer substation directly based on the actual verification data and the standard verification data corresponding to each target device.
Optionally, the standard verification data comprises a standard device template and/or a standard virtual loop template,
the performing virtual loop verification on the target substation directly based on the actual verification data and the standard verification data corresponding to each target device includes:
and carrying out data verification on the actual verification data of each target device based on a standard device template and/or a standard virtual loop template, and determining the loop verification result as success under the condition that the data are consistent, otherwise determining the loop verification result as failure.
And S270, determining low-voltage branch information based on the low-voltage branch interval and performing virtual loop verification on the target transformer substation based on the low-voltage branch information, the actual verification data and the standard verification data when the number of the main transformers is at least two.
The low-voltage branch information may be understood as branch information corresponding to the low-voltage branch interval. Alternatively, the low-voltage branch information may include a branch number of each of the low-voltage branch intervals and a branch number of the low-voltage branch intervals. Optionally, determining low-voltage branch information at the low-voltage branch interval, and performing virtual loop verification on the target substation based on the low-voltage branch information, the actual verification data and the standard verification data, including:
numbering each low-voltage branch interval to obtain low-voltage branch information, wherein the low-voltage branch information comprises a branch number of each low-voltage branch interval and the branch number of the low-voltage branch interval;
and determining virtual loop checking logic based on the branch numbers and the branch numbers, and performing virtual loop checking on the target transformer substation based on the virtual loop checking logic, the actual checking data and the standard checking data, wherein the virtual loop checking logic is a variable-jump logic existing among multiple main transformers.
In the embodiment of the invention, the virtual loop checking logic can be different under the condition that the branch numbers and the branch numbers corresponding to different main transformers are different. In summary, the virtual loop verification logic is determined based on the branch number and the branch number in an individualized way, and the virtual loops with different structures are verified in an individualized way, so that the accuracy of virtual loop verification is ensured.
According to the technical scheme, the number of main transformers of the main transformer in the target transformer substation is determined based on the main transformer interval; under the condition that the number of the main transformers is one, performing virtual loop verification on the target transformer substation directly based on the actual verification data and the standard verification data corresponding to each target device; and under the condition that the number of the main transformers is at least two, determining low-voltage branch information based on the low-voltage branch interval, and performing virtual loop verification on the target transformer substation based on the low-voltage branch information, the actual verification data and the standard verification data. The virtual loop verification method based on the master variable number performs virtual loop verification in an individualized way, and further ensures the accuracy of virtual loop verification and the accuracy of loop verification results.
Fig. 5 is an overall flowchart of a virtual circuit verification method according to a first embodiment of the present invention. As shown in fig. 5, optionally, the overall flow of the virtual loop checking method may be:
1. and (3) importing a target substation SCD file, reading IEDNAME (IED equipment naming, adopting eight-bit standard format naming) of each IED equipment, analyzing IED type, home equipment type, voltage level, home equipment number and IED number information of each IED device according to rules in the following table, and classifying IED equipment of the same equipment type, voltage level and equipment number together (hereinafter referred to as a division interval). And classifying and dividing the IED equipment such as protection, intelligent terminals and the like belonging to the same line, transformer, bus and the like into one interval by taking the interval as a unit.
2. The main transformer interval is subdivided into three sides of high, medium and low of the main transformer and a main transformer body, information in IEDNAME of all protection and intelligent terminals in the main transformer interval is extracted, and which side of the main transformer interval the intelligent terminals belong to is identified through voltage level, equipment number, IED number and the like. When branches exist on the low-voltage side of the main transformer, for the intelligent terminals of the branches of the low-voltage side of the main transformer, identifying the device description of the IED device, and dividing the intelligent terminals into a first branch and a second branch of the low-voltage side of the main transformer through the IED description, and dividing the intelligent terminals belonging to the same branch of the low-voltage side of the main transformer into one branch. For example: when the described middle-low voltage side branch intelligent terminal is the #1 main transformer intelligent terminal, dividing the terminal into the #1 main transformer low voltage side, judging the branch according to the sequence number of the penultimate bit in IEDNAME standard 8-bit format naming, wherein the branch with the small sequence number is one branch, and the branch with the large sequence number is two branches. If the main transformer low-voltage side has no branch, the main transformer low-voltage side is judged to be a single branch. The dividing method is the same for the case of the main transformer high-voltage side band branch.
3. According to the virtual loop connection relation between IED devices, the connection mode of primary system main connection is determined according to a certain rule, wherein the connection mode comprises double bus connection, double bus single-section connection, double bus double-section connection, single bus section connection, three-half connection and the like. The low-voltage side of the main transformer generally adopts a single bus connection mode, and the low-voltage side is divided into a single bus section, a single bus two section, a single bus three section, a single bus five section and other connection modes under the condition of branching. Correspondingly, when the single bus is connected in a segmented mode, the buses at the two ends are named as 1 bus and 2 bus; when the single bus is divided into two sections, the buses are named as 1 bus, 2 bus and 3 bus; when the single bus is segmented, the buses are named as 1 bus, 2 bus, 3 bus (or 5 bus) and 4 bus (or 6 bus); when the single bus is divided into five sections, the buses are named as 1 bus, 2 bus, 3 bus (or 5 bus), 4 bus (or 6 bus), 5 bus (or 8 bus), 6 bus (or 9 bus).
4. And step two, determining the number and the number of branches of the low-voltage side of the main transformer, and extracting the association relation between the branches of the low-voltage side of the main transformer and the buses connected with the branches of the low-voltage side of the primary system according to the connection condition of virtual loops of the intelligent terminals of the branches of the main transformer and the low-voltage side of the main transformer.
5. And determining the association relation among the main transformer branch number, the low-voltage side segment and the bus connected with the low-voltage side segment. The rule is determined according to the number of main transformer configurations in the SCD, and the situation that more than 3 main transformers are needed is not considered.
If only one main transformer exists, the low-voltage side does not have branches and does not need to be considered; if two branches exist, checking can be performed in a standard virtual terminal template and standard virtual loop template mode;
if there are two main transformers, the main transformer names may be #1 and #2 main transformers, or may be #2 and #3 main transformers, and the following correspondence relationship may be provided:
1) When the main transformer of the #1 is not branched and the main transformer of the #2 is not branched, the low-voltage side bus is 1 bus and 2 bus, and the bus is related in a segmented way: 1 mother and 2 mother;
2) When the main transformer #1 has no branch and the main transformer #2 has 2 branches, the low-voltage side bus is 1 bus, 2 bus and 3 bus, and the bus is related in a sectioning way: 1 mother and 2 mother;
3) When the main transformer #2 has 2 branches and the main transformer #3 has no branches, the low-voltage side bus is 1 bus, 2 bus and 5 bus, and the bus is related in a sectioning way: 2 mother and 5 mother;
4) When the main transformer #1 has 2 branches and the main transformer #2 has 2 branches, the low-voltage side buses are 1 bus, 2 bus, 5 bus and 6 bus, and the bus is related in a segmented way: 2 mother and 5 mother.
When three main transformers exist, the main transformer names can be #1, #2, #3 main transformers or #2, #3, #4 main transformers, and the following specific cases are divided:
1) When #1 becomes unbranched, #2 becomes unbranched, and #3 becomes unbranched: the low-voltage side bus is 1 bus+2 bus+3 bus, and the bus is related in a segmented way: 1 master+2 master;
2) When #1 becomes 1 branch+ #2 becomes 2 branch+ #3 becomes 1 branch: the low-voltage side bus is 1 bus+2 bus, 3 bus+5 bus, the section 1 associated bus is 1 bus+2 bus, and the section 2 associated bus is 3 bus+5 bus;
3) #2 branch + #3 branch + 1 branch + 4 branch + 1: the low-voltage side bus is 2 bus, 3 bus+5 bus+6 bus, and the section 1 is associated bus: 3 bus+5 bus, segment 2 associated bus: 5 mother+6 mother;
4) #1 branch+2branch+2branch+3branch 2: the low-voltage side bus is 1 bus, 2 bus+5 bus, 6 bus+8 bus and 9 bus, and the section 1 is related bus: 2 bus+5 bus, segment 2 associated bus: 6 busbar+8 busbar, section 3 associated busbar: 1 master+9 master.
6. And (3) importing a standard virtual terminal template library and a standard virtual loop template library, and checking the part of virtual loops of the circuit, the bus and the conventional main transformer interval virtual loop.
7. Setting a verification mode of a main transformer low-voltage side branch to verify according to an association relation, and verifying a virtual loop of a main transformer protection jump segment according to the following logic:
1. when only 1 main transformer exists, if two branches exist at the low side, virtual connection exists between the main transformer protection jump low-voltage 1 branch subsection and the jump low-voltage 2 branch subsection and the subsection protection, the judgment interval is not wrong, and the correctness of the connection is judged through the principle of connecting a template through a virtual loop;
2. when there are two main transformers:
2.1 when two main transformers are single branches, the main transformer protection jump low-voltage 1 branch is divided into sections with virtual connection;
2.2 when 2 branches and a single branch exist in the two main transformers, judging whether the main transformer A with the small sequence number is the single branch, if so, x in the middle-jump low-voltage x branch sections of the two main transformers is 1; if not, the x in the branch section of the main transformer A with the small sequence number and the jump low voltage x is 2, and the x in the branch section of the main transformer A with the large sequence number and the jump low voltage x is 1;
2.3 when two main transformers have two branches, x in the main transformer protection middle-jump low-voltage x branch section with small sequence number is 2, and x in the main transformer protection middle-jump low-voltage x branch section with large sequence number is 1.
3. When three main transformers exist (the serial number relationship of A.B.C is that A < B < C):
judging whether all three main transformers are 2 branches,
If yes, the main transformer A1 branches to jump the segment 3,2 branches to jump the segment 1;
a main transformer B1 branch jump segment 1 and a main transformer B2 branch jump segment 2;
the main transformer C1 branch-hop segment 2,2 branch-hop segment 3,
if not, judging whether only one main becomes a 2 branch,
if yes, (1) when the main transformer A is a double branch,
main transformer A2 branch jump segment 1
Main transformer B1 branch jump segment 1 and segment 2
Main transformer C1 branch jump segment 2
(2) When main transformer B is 2 branches:
main transformer A1 branch jump segment 1
Main transformer B1 branch jump segment 1,2 branch jump segment 2
Main transformer C1 branch jump segment 2
(3) When the main transformer C is 2 branches:
main transformer A1 branch jump segment 1
Main transformer B1 branch jump segment 2
Main transformer C1 branch jump segment 2
Two main changes become 2 branches, then:
(1) When the main transformer a.b is a double branch,
main transformer A2 branch jump segment 1
Main transformer B1 branch jump segment 1,2 branch jump segment 2
Main transformer C1 branch jump segment 2
(2) When main transformer b.c is 2 branches:
main transformer A1 branch jump segment 1
Main transformer B1 branch jump segment 1,2 branch jump segment 2
Main transformer C1 branch jump segment 2
(3) When the main transformer A.C is 2 branches:
main transformer A2 branch jump segment 1
Main transformer B1 branch jump segment 1 and segment 2
Main transformer C1 branch jump segment 2
Determining a virtual loop meeting the virtual loop checking logic as a virtual loop with a connection specification; and determining the virtual loop which does not meet the virtual loop checking logic as the virtual loop which is not connected in a standard manner.
The invention can automatically check the multi-main-transformer-jump-segment virtual loop of the target transformer substation, greatly reduces the workload of engineering personnel for checking the virtual loop, avoids errors caused by manual check, and can obviously improve the working efficiency of virtual loop check.
Example III
Fig. 6 is a schematic structural diagram of a virtual circuit verification device according to a third embodiment of the present invention. As shown in fig. 6, the apparatus includes: a file acquisition module 310, an interval division module 320, an actual data extraction module 330, and a loop verification module 340; wherein,
a file obtaining module 310, configured to determine a target substation, and obtain a system configuration file corresponding to the target substation, where the system configuration file includes device configuration information corresponding to each target device in the target substation, and the target device includes an intelligent terminal and/or protection; an interval dividing module 320, configured to divide the target devices by intervals according to the device configuration information, and determine a target interval corresponding to each target device, where the target interval includes at least one of a main transformer interval, a voltage side interval, and a low-voltage branch interval; an actual data extraction module 330, configured to determine actual verification data corresponding to each target device according to the device configuration information; and the loop checking module 340 is configured to obtain standard checking data, and perform virtual loop checking on the target substation based on the target interval, the actual checking data and the standard checking data, so as to obtain a loop checking result.
According to the technical scheme, a system configuration file corresponding to a target substation is obtained through determining the target substation, wherein the system configuration file comprises device configuration information corresponding to each target device in the target substation, and the target devices comprise intelligent terminals and/or protections; dividing the target devices at intervals according to the device configuration information, and determining a target interval corresponding to each target device, wherein the target interval comprises at least one of a main transformer interval, a voltage side interval and a low-voltage branch interval; determining actual verification data corresponding to each target device according to the device configuration information; and obtaining standard check data, and performing virtual loop check on the target transformer substation based on the target interval, the actual check data and the standard check data to obtain a loop check result. The automatic virtual loop verification based on the divided target intervals is realized, and the efficiency and accuracy of virtual loop verification are improved.
Optionally, the device configuration information includes a standard naming and/or a device description, where the standard naming includes a target number of information characters, and an interval partitioning module 320 is configured to:
Dividing the interval of the target device based on the information character, and determining the main transformer interval corresponding to the target device, wherein the main transformer interval comprises at least one interval;
for each main transformer interval, dividing the target device according to preset characters, and determining the voltage side interval corresponding to the target device, wherein the voltage side interval comprises at least one of a main transformer main body interval, a high-voltage side interval, a medium-voltage side interval and a low-voltage side interval, and the preset characters are at least one character of the information characters;
and dividing the interval of the target device based on the equipment description aiming at the low-voltage side interval, and determining a low-voltage branch interval corresponding to the target device, wherein the low-voltage branch interval comprises at least one of a single-branch interval, a first branch interval and a second branch interval.
Optionally, the actual data extraction module 330 is configured to:
determining virtual loop association relations among all the target devices in the target substation through the device configuration information;
determining bus association relations between each target device and the connected buses through the device configuration information and the virtual loop association relations;
And taking the virtual loop association relationship and the bus association relationship as the actual verification data corresponding to each target device.
Optionally, the loop checking module 340 includes: the device comprises a main variable number determining unit, a first checking unit and a second checking unit; wherein,
the main variable number determining unit is used for determining the main variable number of the main transformer in the target transformer substation based on the main variable interval;
the first verification unit is configured to perform virtual loop verification on the target substation directly based on the actual verification data and the standard verification data corresponding to each target device when the number of the main transformers is one;
and the second verification unit is used for determining low-voltage branch information based on the low-voltage branch interval and performing virtual loop verification on the target transformer substation based on the low-voltage branch information, the actual verification data and the standard verification data under the condition that the number of the main transformers is at least two.
Optionally, the standard verification data includes a standard device template and/or a standard virtual loop template, and the first verification unit is configured to:
and carrying out data verification on the actual verification data of each target device based on a standard device template and/or a standard virtual loop template, and determining the loop verification result as success under the condition that the data are consistent, otherwise determining the loop verification result as failure.
Optionally, the second verification unit is configured to:
numbering each low-voltage branch interval to obtain low-voltage branch information, wherein the low-voltage branch information comprises a branch number of each low-voltage branch interval and the branch number of the low-voltage branch interval;
and determining virtual loop checking logic based on the branch numbers and the branch numbers, and performing virtual loop checking on the target transformer substation based on the virtual loop checking logic, the actual checking data and the standard checking data, wherein the virtual loop checking logic is a variable-jump logic existing among multiple main transformers.
Optionally, the information character includes at least one of a device type, a home equipment type, a characterization voltage level, an equipment home number, and a character characterizing an equipment number corresponding to the target device.
The virtual loop checking device provided by the embodiment of the invention can execute the virtual loop checking method provided by any embodiment of the invention, and has the corresponding functional modules and beneficial effects of the execution method.
Example IV
Fig. 7 shows a schematic diagram of the structure of an electronic device 10 that may be used to implement an embodiment of the invention. Electronic devices are intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. Electronic equipment may also represent various forms of mobile devices, such as personal digital processing, cellular telephones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the inventions described and/or claimed herein.
As shown in fig. 7, the electronic device 10 includes at least one processor 11, and a memory, such as a Read Only Memory (ROM) 12, a Random Access Memory (RAM) 13, etc., communicatively connected to the at least one processor 11, in which the memory stores a computer program executable by the at least one processor, and the processor 11 may perform various appropriate actions and processes according to the computer program stored in the Read Only Memory (ROM) 12 or the computer program loaded from the storage unit 18 into the Random Access Memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 may also be stored. The processor 11, the ROM 12 and the RAM 13 are connected to each other via a bus 14. An input/output (I/O) interface 15 is also connected to bus 14.
Various components in the electronic device 10 are connected to the I/O interface 15, including: an input unit 16 such as a keyboard, a mouse, etc.; an output unit 17 such as various types of displays, speakers, and the like; a storage unit 18 such as a magnetic disk, an optical disk, or the like; and a communication unit 19 such as a network card, modem, wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information/data with other devices via a computer network, such as the internet, and/or various telecommunication networks.
The processor 11 may be a variety of general and/or special purpose processing components having processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various specialized Artificial Intelligence (AI) computing chips, various processors running machine learning model algorithms, digital Signal Processors (DSPs), and any suitable processor, controller, microcontroller, etc. The processor 11 performs the various methods and processes described above, such as the virtual loop checking method.
In some embodiments, the virtual circuit verification method may be implemented as a computer program tangibly embodied on a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program may be loaded and/or installed onto the electronic device 10 via the ROM 12 and/or the communication unit 19. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of the virtual circuit verification method described above may be performed. Alternatively, in other embodiments, the processor 11 may be configured to perform the virtual loop checking method in any other suitable way (e.g., by means of firmware).
Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuit systems, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), systems On Chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs, the one or more computer programs may be executed and/or interpreted on a programmable system including at least one programmable processor, which may be a special purpose or general-purpose programmable processor, that may receive data and instructions from, and transmit data and instructions to, a storage system, at least one input device, and at least one output device.
A computer program for carrying out methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the computer programs, when executed by the processor, cause the functions/acts specified in the flowchart and/or block diagram block or blocks to be implemented. The computer program may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.
In the context of the present invention, a computer-readable storage medium may be a tangible medium that can contain, or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. The computer readable storage medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. Alternatively, the computer readable storage medium may be a machine readable signal medium. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
To provide for interaction with a user, the systems and techniques described here can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and a pointing device (e.g., a mouse or a trackball) through which a user can provide input to the electronic device. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic input, speech input, or tactile input.
The systems and techniques described here can be implemented in a computing system that includes a background component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such background, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), blockchain networks, and the internet.
The computing system may include clients and servers. The client and server are typically remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, also called a cloud computing server or a cloud host, and is a host product in a cloud computing service system, so that the defects of high management difficulty and weak service expansibility in the traditional physical hosts and VPS service are overcome.
It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present invention may be performed in parallel, sequentially, or in a different order, so long as the desired results of the technical solution of the present invention are achieved, and the present invention is not limited herein.
The above embodiments do not limit the scope of the present invention. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of the present invention.
Claims (10)
1. A virtual circuit verification method, comprising:
determining a target substation, and acquiring a system configuration file corresponding to the target substation, wherein the system configuration file comprises device configuration information corresponding to each target device in the target substation, and the target devices comprise intelligent terminals and/or protections;
dividing the target devices at intervals according to the device configuration information, and determining a target interval corresponding to each target device, wherein the target interval comprises at least one of a main transformer interval, a voltage side interval and a low-voltage branch interval;
Determining actual verification data corresponding to each target device according to the device configuration information;
and obtaining standard check data, and performing virtual loop check on the target transformer substation based on the target interval, the actual check data and the standard check data to obtain a loop check result.
2. The method according to claim 1, wherein the device configuration information includes a standard naming and/or a device description, the standard naming includes a target number of information characters, the target devices are divided according to the device configuration information, and determining a target interval corresponding to each target device includes:
dividing the interval of the target device based on the information character, and determining the main transformer interval corresponding to the target device, wherein the main transformer interval comprises at least one interval;
for each main transformer interval, dividing the target device according to preset characters, and determining the voltage side interval corresponding to the target device, wherein the voltage side interval comprises at least one of a main transformer main body interval, a high-voltage side interval, a medium-voltage side interval and a low-voltage side interval, and the preset characters are at least one character of the information characters;
And dividing the interval of the target device based on the equipment description aiming at the low-voltage side interval, and determining a low-voltage branch interval corresponding to the target device, wherein the low-voltage branch interval comprises at least one of a single-branch interval, a first branch interval and a second branch interval.
3. The method of claim 1, wherein determining actual verification data corresponding to each of the target devices based on the device configuration information comprises:
determining virtual loop association relations among all the target devices in the target substation through the device configuration information;
determining bus association relations between each target device and the connected buses through the device configuration information and the virtual loop association relations;
and taking the virtual loop association relationship and the bus association relationship as the actual verification data corresponding to each target device.
4. The method of claim 1, wherein the performing virtual circuit verification on the target substation based on the target interval, the actual verification data, and the standard verification data comprises:
determining the number of main transformers of a main transformer in the target substation based on the main transformer interval;
Under the condition that the number of the main transformers is one, performing virtual loop verification on the target transformer substation directly based on the actual verification data and the standard verification data corresponding to each target device;
and under the condition that the number of the main transformers is at least two, determining low-voltage branch information based on the low-voltage branch interval, and performing virtual loop verification on the target transformer substation based on the low-voltage branch information, the actual verification data and the standard verification data.
5. The method of claim 4, wherein the standard verification data comprises standard device templates and/or standard virtual circuit templates,
the performing virtual loop verification on the target substation directly based on the actual verification data and the standard verification data corresponding to each target device includes:
and carrying out data verification on the actual verification data of each target device based on a standard device template and/or a standard virtual loop template, and determining the loop verification result as success under the condition that the data are consistent, otherwise determining the loop verification result as failure.
6. The method of claim 4, wherein determining low-voltage branch information at the low-voltage branch interval, performing virtual circuit verification on the target substation based on the low-voltage branch information, the actual verification data, and the standard verification data, comprises:
Numbering each low-voltage branch interval to obtain low-voltage branch information, wherein the low-voltage branch information comprises a branch number of each low-voltage branch interval and the branch number of the low-voltage branch interval;
and determining virtual loop checking logic based on the branch numbers and the branch numbers, and performing virtual loop checking on the target transformer substation based on the virtual loop checking logic, the actual checking data and the standard checking data, wherein the virtual loop checking logic is a variable-jump logic existing among multiple main transformers.
7. The method of claim 1, wherein the information character comprises at least one of a device type, a home device type, a characterization voltage level, a device home number, and a character characterizing a device number corresponding to the target device.
8. A virtual circuit verification apparatus, comprising:
the file acquisition module is used for determining a target transformer substation and acquiring a system configuration file corresponding to the target transformer substation, wherein the system configuration file comprises device configuration information corresponding to each target device in the target transformer substation, and the target devices comprise intelligent terminals and/or protections;
The interval division module is used for dividing the target devices at intervals according to the device configuration information, and determining a target interval corresponding to each target device, wherein the target interval comprises at least one of a main transformer interval, a voltage side interval and a low-voltage branch interval;
the actual data extraction module is used for determining the actual verification data corresponding to each target device according to the device configuration information;
and the loop checking module is used for acquiring standard checking data, and performing virtual loop checking on the target transformer substation based on the target interval, the actual checking data and the standard checking data to obtain a loop checking result.
9. An electronic device, the electronic device comprising:
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein,
the memory stores a computer program executable by the at least one processor to enable the at least one processor to perform the virtual circuit verification method of any one of claims 1-7.
10. A computer readable storage medium storing computer instructions for causing a processor to implement the virtual circuit verification method of any one of claims 1-7 when executed.
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