CN117240717B - Method for processing grid of slicing structure, optimizing method, storage medium and equipment - Google Patents
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Abstract
The invention relates to a grid processing method of a sliced structure, an optimizing method, a storage medium and equipment, which are used for providing a grid dividing result with more balanced load under the steps of simple dividing, coarse dividing and fine dividing based on a graph dividing algorithm, and simultaneously keeping smaller communication quantity as much as possible, thereby improving the efficiency of subsequent parallel calculation. The key technical point of the method is that a processing method for automatically dividing the partitioned grids is provided, after the partitioned grids and the calculated core numbers are given, the feasible space is traversed according to the grid sizes and the topological structures of the partitioned grids, grid division is automatically generated, and the sub-grid sizes corresponding to each calculated core are enabled to be as consistent as possible on the premise that the number of the partitioned grids is minimum.
Description
Technical Field
The invention relates to the field of industrial manufacturing, in particular to a processing method of a grid with a segmented structure.
Background
Along with the increasing complexity of the appearance of an industrial model, the grid scale is increased, and meanwhile, huge calculation cost is required for a high-precision format, the serial solution of a traditional single processor is difficult to meet the actual demand, so CAE (Computer Aided Engineering for short) is an approximate numerical analysis method for solving the problems of analysis and calculation of mechanical properties such as complex engineering and product structural strength, rigidity, buckling stability, dynamic response, thermal conduction, three-dimensional multi-body contact, elastoplasticity and the like, optimization design of structural properties and the like by using computer assistance), and the actual application is often required to be carried out on a calculation cluster with high calculation power, and a high-performance parallel calculation method matched with the calculation method.
The common parallel programming model mainly comprises shared storage models such as OpenMP and CUDA and distributed storage models such as MPI. In CAE application, because the solutions among the grid cells are coupled, the parallel efficiency is very low by directly using the shared storage model such as OpenMP and the like; while for large-scale grids, a single memory may not be able to store all grid data. And the distributed storage models such as MPI and the like are matched with grid division of load balancing, the solution of the whole grid is divided into a plurality of processes, and communication among the processes is realized through MPI functions.
It can be seen that this distributed storage approach is better suited to the parallel computing requirements of current CAE. For this purpose, the computational grid needs to be divided as uniformly as possible, and the computational tasks on the sub-grids are allocated to the computational cores that can be simultaneously computed.
On the other hand, the split structural grids formed by splicing a plurality of structural grids can well describe common industrial models, such as complex geometric bodies formed by combining a plurality of regular industrial parts, such as planes in wind tunnels, engine inner cavities, propellers in generators and the like.
Therefore, the division of the grid of the segmented structure is indispensable in CAE application, and how to optimize the division process is a technical problem to be solved in the field.
Disclosure of Invention
In order to solve the technical problems, the invention provides a method for processing a grid of a slicing structure based on graph division, which comprises the following steps:
the graph dividing algorithm is as follows: taking a given partition structure grid and a given partition proportion as input, and taking a k partition result as output, so that the distribution of vertex weights is close to the given partition proportion, and the sum of the partitioned edge weights is small;
pretreatment: determining a slicing structure grid of a product to be analyzed, generating a graph, and determining divided allowable conditions and process numbers;
judging whether the number of fragments of the fragment structure grid of the product to be analyzed is equal to 1;
if the k division result is equal to 1, dividing the sectional structure grids of the product to be analyzed by adopting the structural grids directly, and obtaining the k division result as a sectional structure grid processing result of the product to be analyzed; at this time, k=the number of processes;
if the number is not equal to 1, dividing the segmented structure grids of the product to be analyzed into sub-segmented structure grids by inputting a graph dividing algorithm, and inputting each sub-segmented structure grid into the graph dividing algorithm to obtain k dividing results of each sub-segmented structure grid; and summarizing k division results of each sub-sliced structure grid to obtain sliced structure grid processing results of the product to be analyzed.
Further, the method for dividing the slicing structure grid of the product to be analyzed into sub-slicing structure grids by inputting a graph dividing algorithm comprises the following steps:
calculating a divisor of the process number;
traversing the divisors of the process numbers according to the sequence from large to small, taking the fragment structure grid of the product to be analyzed as a given fragment structure grid, determining a given division ratio according to the divisors of the process numbers, and inputting a graph division algorithm to obtain a k division result; at this point k=a divisor of the number of processes currently traversed;
evaluating whether the current division result meets the allowable condition or not, if so, ending; if not, continuing; until the maximum allowable submultiple meeting the allowable condition is found, the sub-sliced structural grid is obtained.
Further, inputting each sub-sliced structure grid into a graph dividing algorithm to obtain k dividing results of each sub-sliced structure grid, including:
determining a given dividing ratio by taking each sub-sliced structural grid as a given sliced structural grid according to the ratio of the number of processes to the maximum allowable divisor, and inputting the given dividing ratio into a graph dividing algorithm to obtain k dividing results of each sub-sliced structural grid; at this point k=the ratio of the number of processes to the maximum allowable divisor.
Further, if the maximum allowable divisor is equal to 1, taking the sub-sliced structure grid as a given sliced structure grid, determining a given dividing ratio according to the two divisions, and inputting a graph dividing algorithm to obtain a two division result of the sub-sliced structure grid; if the current division meets the allowable condition, taking the sub-sliced structure grids obtained by the two division results as given sliced structure grids, determining a given division ratio according to an up-down integer of the process number divided by 2, and inputting a graph division algorithm to obtain k division results of each sub-sliced structure grid; at this time, k=the number of processes divided by 2 is an up-down integer; summarizing k division results of each sliced structural grid to obtain sliced structural grid processing results of the product to be analyzed;
if the current division does not meet the allowable conditions, finding out the largest fragments meeting the preset conditions according to the graph division result, dividing the largest fragments into a plurality of small fragments along the long sides to obtain finer fragment structure grids, re-dividing the finer fragment structure grids to obtain two sub-fragment structure grids, determining a given division ratio according to the up-down integer of the number of processes/2 by using the sub-fragment structure grids obtained by the two divisions, and inputting a graph division algorithm to obtain k division results of each sub-fragment structure grid; at this time, k=the up-down integer of the process number/2; and summarizing k division results of each sliced structural grid to obtain sliced structural grid processing results of the product to be analyzed.
Further, generating a graph according to the sliced structural grids of the product to be analyzed, including:
the correlation of the sliced structural grid G is defined as: g is composed of L fragments, L is the number of fragments of the grid of the fragment structure, and each fragment is marked as D/us；
The correlation of graph G (V, E) is defined as: v represents a vertex set, E represents an edge set, any one of the edges on the vertex set is denoted as e_ij, and the edge set is an element in the edge set E and represents a connecting line for connecting the vertex v_i and the vertex v_j; the weights of vertex v_i and vertex v_j, denoted as W (v_i), W (v_j), respectively, are elements in the vertex weight vector W (v); the weight of edge e_ij, denoted as W (e_ij), is an element in the edge weight vector W (e);
the corresponding relation between the grid G with the slicing structure and the graph G (V, E) is as follows: each slice d_s of the slice structure grid G corresponds to a vertex v_s in the graph G (V, E), and the vertex weight w (v_s) = |d_s|; edge e_ij= (v_i, v_j) exists if and only if d_i is adjacent to d_j, and edge weight w (e_ij) = mesh size; wherein s is not less than 1 and not more than L, i is not less than 1 and not more than L, and j is not less than 1 and not more than L.
Further, the allowable conditions are: determining grid size tolerance parameters k1, k2, wherein k1< k2, such that the total size of the sub-grids allocated on each process falls at [ k1×na, k2×na ]; na is the average grid size of the process and is equal to the total grid size divided by the number of processes;
in another aspect, a method for optimizing a product structure is provided, including:
designing an initial product diagram;
and generating a segmented grid division result of the product graph by adopting the arbitrary segmented structure grid processing method, performing parallel CAE calculation, and iteratively optimizing the product graph according to the calculation result.
Further, the initial product map is an initial model of the aircraft; taking an initial model of the aircraft as input, generating a segmented grid division result of a product graph, performing wind tunnel simulation test, performing parallel CAE calculation, analyzing stress conditions according to the calculation result, finding out defects of the current model, and iteratively updating an optimized model.
In another aspect, the present invention also provides a computer storage medium storing executable program code; the executable program code is configured to perform any of the above-described tile structure grid processing methods, or any of the above-described optimization methods.
In another aspect, the present invention further provides a terminal device, including a memory and a processor; the memory stores program code executable by the processor; the program code is configured to perform any of the above-described method of processing a grid of sliced structures, or any of the above-described method of optimizing a product structure.
According to the grid processing method, the grid processing optimization method, the storage medium and the grid processing equipment for the segmented structure, based on a graph dividing algorithm, under the steps of simple division, coarse division and fine division, k division is solved, so that the distribution of vertex weights is close to a given dividing proportion, and the divided edge weights are small, so that loads in the calculation process are more balanced as far as possible in an equal proportion manner, the divided edge weights correspond to traffic, and the traffic is smaller. According to the judgment of the number of fragments, the judgment of the subsequent process number, the solution of the maximum allowable divisor and the judgment of the maximum allowable divisor, the processing method of the fragment structure grid can be suitable for the conditions of any number of fragments and process number, has no limitation or restriction, and can give a grid division result with more balanced load by a method that each process is responsible for a plurality of fragments when the process number is smaller than the number of fragments or the size of fragments is too large, simultaneously keep smaller communication quantity as much as possible, and improve the efficiency of subsequent parallel calculation. The key technical point of the method is that a processing method for automatically dividing the partitioned grids is provided, after the partitioned grids and the calculated core numbers are given, the feasible space is traversed according to the grid sizes and the topological structures of the partitioned grids, grid division is automatically generated, and the sub-grid sizes corresponding to each calculated core are enabled to be as consistent as possible on the premise that the number of the partitioned grids is minimum.
Drawings
FIG. 1 is a flow chart of one embodiment of a tile structure mesh processing method of the present invention;
FIG. 2 is a diagrammatical view of a sliced structural grid of an aircraft map in accordance with one embodiment.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
It should be noted that, in the embodiment of the present invention, directional indications such as up, down, left, right, front, and rear … … are referred to, and the directional indications are merely used to explain the relative positional relationship, movement conditions, and the like between the components in a specific posture, and if the specific posture is changed, the directional indications are correspondingly changed. In addition, if there are descriptions of "first, second", "S1, S2", "step one, step two", etc. in the embodiments of the present invention, the descriptions are only for descriptive purposes, and are not to be construed as indicating or implying relative importance or implying that the number of technical features indicated or indicating the execution sequence of the method, etc. it will be understood by those skilled in the art that all matters in the technical concept of the present invention are included in the scope of this invention without departing from the gist of the present invention.
Noun interpretation:
petsc—abbreviation for Portable, extensible Toolkit for Scientific Computation, chinese name is scientific computing Portable extension toolkit.
Hypre, a software library of high performance preprocessors and solvers, is used to solve large sparse linear systems of equations on massive parallel computers.
Metis—a set of serial programs used to divide the graph, divide the finite element mesh, and generate a fill reduction ordering for the sparse matrix.
As shown in fig. 1, the present invention provides a method for processing a grid of a tile structure based on graph division, which includes:
the graph dividing algorithm is as follows: the given partition structure grid G and the given partition proportion R (k) are taken as inputs, and the k partition result is taken as an output, so that the distribution of the vertex weights is close to the given partition proportion, and the sum of the partitioned edge weights is small. Specifically, the graph dividing algorithm can adopt any form in the prior art, and the key point of the invention is how to divide the grid of the slicing structure of the product to be analyzed according to the current practice of the product to be analyzed, and the specific target requirement is as follows: the distribution of the vertex weights is made to approach the given division ratio, and the divided edge weights sum to be small, i.e., the distribution of the vertex weights is made to approach infinitely as close as possible to the given division ratio, and the divided edge weights sum to be as small as possible, within the possible range; i.e. decreasing the gap between the distribution of the vertex weights and a given division ratio, even equal, but sometimes may not reach equal, but can only approach infinitely; while the edge weight sum is even equal to 0, sometimes it may not be possible to reach 0, but can only be infinitely small.
Specific:
1. the given split structural grid G is optionally, but not limited to, taking a complex geometry formed by combining a plurality of regular industrial parts such as an airplane in a wind tunnel, an engine cavity, a propeller in a generator and the like as an example, and is determined as the given split structural grid G according to a product diagram thereof, and a split structural grid schematic diagram of a certain airplane diagram is shown in fig. 2.
2. Given a division ratio R (k) = (r_1, r_2, …, r_k), k represents the division number. For example, for initial input, k is typically the number of processes P; for the two divisions, k=2. More specifically, if not specifically stated, the division is optionally but not limited to uniform division, that is, r_1, r_2, …, r_k=1/k, and only the division number k needs to be input at this time, without giving a specific division ratio, or of course, the division is not necessarily uniform, and if not uniform, each r_1, r_2, …, r_k may be customized to input a given division ratio.
3. The problem is described as: solving the k division result so that the distribution of the vertex weights is as close to a given division ratio as possible, and the sum of the divided edge weights is as small as possible; namely: the distribution of vertex weights and the given partitioning ratio have the smallest difference, and the sum of partitioned edge weights is the aim of the graph partitioning algorithm and the obtained result.
S2: pretreatment: generating a graph G (V, E) according to the grid G of the slicing structure, and determining the dividing allowable conditions and the process number P;
specific:
1. the tile structure grid G, optionally but not limited to, is based on its topology to define a generation graph G (V, E).
Example: the relevant definition of the tile structure grid G is as follows: g is composed of L fragments, L is the number of fragments of the grid of the fragment structure, and each fragment is marked as D/us. Taking a three-dimensional sliced structural grid as an example, the size is marked as |D\u s | =x_ s×y_ s×z_ sWithout loss of generality, the assumption may be, but is not limited to, thatx_ s≤y_ s≤z_ s. If D_i is adjacent to D_j, the common boundary is a 2-dimensional rectangular grid, and the size of the rectangular grid is defined as |D_i ≡D_j|. More specifically, the number of slices L is determined by the geometry of the product map.
The correlation of the graph G (V, E) is defined as follows: v represents a vertex set, E represents an edge set, any one of which is optionally but not limited to represented as e_ij, an element in E, and represents a connection line connecting vertex v_i and vertex v_j; the weights of the vertex v_i and vertex v_j, which may be denoted as W (v_i) and W (v_j), respectively, are elements in the vertex weight vector W (v); the weight of the edge e_ij, which may be denoted as W (e_ij), is an element in the edge weight vector W (e).
The correspondence between the tile structure grid G and the graph G (V, E) is as follows: each slice d_s of the slice structure grid G corresponds to a vertex v_s in the graph G (V, E), and the vertex weight w (v_s) = |d_s|. Side e_ij= (v_i, v_j) exists if and only if d_i is adjacent to d_j, and side weight w (e_ij) = mesh size, for example three dimensions, i.e. equal to the size of a rectangular mesh, |d_i n d_j|; wherein s is not less than 1 and not more than L, i is not less than 1 and not more than L, and j is not less than 1 and not more than L.
2. Before the actual division, optionally but not exclusively, product designers, users and the like give allowable conditions for grid division of the slicing structure in the practical application example according to the actual problem demands.
Illustratively, specific values are provided for determining grid size tolerance parameters k1, k2, where k1< k2, such that the total size of the sub-grids allocated on each process falls as far as possible at [ k1×na, k2×na ]; wherein Na is the average mesh size of the process, i.e., the total mesh size N divided by the number of processes P.
3. The number of processes P can be set as desired by those skilled in the art. Preferably, from practical application, the three quality factors of 2,3 and 5 are selected as the process number P, the divisor is only 1 and the algorithm is relatively simple. In practice, other numbers of processes may be handled with minor modifications.
On the basis of the above, the dividing step of the method for processing the grid of the segmented structure is optionally but not limited to determining according to the number of segments of the grid of the segmented structure of the product to be analyzed, and is divided into three stages: simple division; coarse division and fine division (complex division) are adopted, the complex problem is gradually disassembled into a plurality of simple problems to solve, and the method is also the core of the treatment method.
S3: judging whether the number of fragments of the fragment structure grid of the product to be analyzed is equal to 1;
a: simple division:
s4: if the number of fragments L of the fragment structure grid G (which is converted into the graph G (V, E) at the moment) is equal to 1, the structural grid is divided at the moment, and the k division result is obtained as a fragment structure grid processing result of the product to be analyzed. Specifically, the dividing problem of the sliced structural grid G is converted into the dividing problem of the structural grid, and the dividing problem is optionally but not limited to be solved by adopting any structural grid dividing method in the prior art, such as a PETSc dividing scheme.
B: if the number of fragments L of the fragment structure grid G is not equal to 1, complex division is performed:
s5: dividing the segmented structure grids of the product to be analyzed into sub-segmented structure grids by inputting a graph dividing algorithm, and inputting each sub-segmented structure grid into the graph dividing algorithm to obtain k dividing results of each sub-segmented structure grid; and summarizing k division results of each sub-sliced structure grid to obtain sliced structure grid processing results of the product to be analyzed.
More specifically, the complex division may be further divided into S51: coarse division and S52: refining the fraction.
Specific: and finding out the maximum allowable submultiple p under the premise of meeting the allowable condition division. And then, according to the size of the submultiple p, carrying out the next judgment, and adopting S51: coarse division or S52: fine division:
if the number L of the fragments of the fragment structure grid G is not equal to 1, traversing the divisor P of the process number P according to the sequence from large to small, determining the P division of the fragment structure grid G by using a graph division algorithm, evaluating whether the current division meets the allowable condition, and if so, ending; if not, continuing; until a division satisfying the allowable condition is found. Preferably: the p-division is optionally, but not limited to, a uniform division.
Illustratively, taking the process number p=5 as an example, the divisor thereof includes 1 and 5. Traversing the divisors 1 and 5 of the process number 5 in order from large to small, namely starting from 5, uniformly dividing the grid G of the slicing structure into 5 parts by using a graph dividing algorithm, and ending if the current division meets the preset allowable condition; if the current division does not meet the preset allowable condition, taking out a divisor smaller than 5 by one step, namely 1. And p=1, the allowable condition is naturally satisfied.
Therefore, the greatest permissible divisor P on the premise of the permissible condition division must be found by traversing the divisor P of the process number P in the order from large to small and performing the recursive judgment. It should be noted that the process number p=5 is exemplified, but not limited thereto. For example, for the number of processes p=6, the divisor thereof includes 1,2,3,6, it is sequentially determined from large to small, whether the predetermined condition is satisfied by uniform division according to p=6, if satisfied, it is ended, if not satisfied, whether … … is satisfied according to p=3, if not satisfied, then p=2, p=1, until the maximum allowable divisor on the premise that the allowable condition is satisfied is found.
More specifically, the graph partitioning algorithm is optionally, but not limited to, solving by using METIS, random Hash, linear Deterministic Greedy partitioning (LDG), fennel partitioning, and the like in practical application.
C: further carrying out recursion solution according to the maximum allowable submultiple p under the premise of meeting the allowable condition;
c1: if p >1, coarse division is performed, step S51:
s51: if p>1, then direct recursion: recording the grid of the sub-sliced structure obtained by division as G k K=1, 2, …, p; with each (G) k P/P) is used as input, the input diagram dividing algorithm is used for dividing P sub-sliced structural grids G k And (3) dividing, namely summarizing the dividing results obtained respectively to obtain a final dividing result.
C2: if p=1, it means that the coarse division is not fine enough, and the subsequent fine division means is needed to process, and the fine division is performed, step S52:
s52: if p=1, then refine the post-division recursion: if p=1, let the division ratio be (r1=ceil (P/2)/P, r2=floor (P/2)/P), first perform two divisions, where r_1, r_2 are division ratios, and since P may be an odd number and is not divided by 2, perform rounding, ceil represents rounding down, floor represents rounding up; if the current division meets the allowable condition, recording the two sub-fragment structure grids obtained by division as G 1 、G 2 And by (G) 1 Ceil (P/2)) and (G) 2 Floor (P/2)) is used as an input, and an input diagram dividing algorithm is used for sub-sliced structure gridsG 1 、G 2 And dividing, namely summarizing the obtained divisions to obtain a final division result.
And if the current division does not meet the allowable condition, performing the next step. And according to the graph dividing result, finding the maximum slice D_i meeting the preset condition.
Specifically, the preset conditions may be, but are not limited to:
d_i has adjacent slices D_j, and the division of D_i and D_j is different.
Division G where D_i is located q Is higher than the expected division ratio r_q.
Specifically, the method is optional but not limited to adopting an exhaustive mode, namely traversing all fragments for one-to-one verification, and searching for the largest fragment meeting the conditions.
Dividing the maximum slice D_i into a plurality of small slices along the long side to obtain a finer slice structure grid G ', and re-dividing the grid G' into two sub-slice structure grids G 1 ’ 、G 2 ', and is combined with (G) 1 ' ceil (P/2)) and (G) 2 ' floor (P/2)) as input, input a graph partitioning algorithm, for 2 sub-sliced structural grids G 1 ’ 、G 2 And dividing, namely summarizing the obtained division to obtain a final division result.
Taking three dimensions as an example, dividing the slice D_i into z_i small slices with the size of x_i×y_i×1 along the long side to obtain a finer slice structure grid G ', and re-dividing the slice structure grid G' to obtain two sub-slice structure grids G 1 ’ 、G 2 ’。
In the embodiment, the processing method of the grid with the sliced structure is provided, based on a graph dividing algorithm, under the steps of simple dividing, coarse dividing and fine dividing, k dividing is solved, so that the distribution of vertex weights is as close as possible to a given dividing proportion, and the divided edge weights and the smallest possible are used as targets, so that the loads in the calculation process corresponding to the equal proportion as much as possible are more balanced, and the divided edge weights correspond to the traffic. Therefore, when the number of processes is smaller than the number of fragments or the size difference of fragments is too large, a grid division result with more balanced load can be given by a method that each process is responsible for a plurality of fragments, meanwhile, the communication quantity is kept as small as possible, and the efficiency of subsequent parallel calculation is improved. The key technical point of the method is that a processing method for automatically dividing the partitioned grids is provided, after the partitioned grids and the calculated core numbers are given, the feasible space is traversed according to the grid sizes and the topological structures, grid division is automatically generated, and the sub-grid sizes corresponding to each calculated core are as consistent as possible on the premise that the number of the partitioned grids is minimum; the number of fragments and the number of processes of the grid with the fragment structure are not limited, and the grid with the fragment structure can be applied to any situation.
On the basis, the invention also provides a method for optimizing the product structure, which comprises the following steps:
p1: designing an initial product diagram;
p2: and generating a segmented grid division result of the product graph by adopting the arbitrary segmented structure grid processing method, performing parallel CAE calculation, and iteratively optimizing the product graph according to the calculation result.
Specifically, the steps of CAE calculation, iterative optimization of products and the like are optional but not limited to any mode in the prior art, and the core of the invention is that the product graph, namely input data, is processed to quickly and accurately obtain k division results, the distribution of the vertex weights is as close as possible to a given division ratio, and the divided edge weights are as small as possible, so that the load in the calculation process corresponding to the equal proportion as much as possible is more balanced, the divided edge weights correspond to the traffic, and the traffic is smaller, thereby simplifying the process of improving the subsequent CAE calculation and iterative optimization of products.
More specifically, taking a designed airplane model as an example, optionally but not limited to taking an initial airplane model as input, adopting the processing method of the split structure grid to generate a split grid division result of the airplane, performing wind tunnel simulation and other experiments, performing parallel CAE calculation, analyzing stress conditions and the like according to the calculation result, finding out defects of the current design model, iteratively updating and optimizing the model structure, and perfecting the airplane model.
In another aspect, the present invention also provides a computer storage medium storing executable program code; the executable program code is configured to execute any of the processing methods of the tile structure grid.
In another aspect, the present invention further provides a terminal device, including a memory and a processor; the memory stores program code executable by the processor; the program code is configured to perform any of the methods of processing a grid of slice structures described above.
For example, the program code may be partitioned into one or more modules/units that are stored in the memory and executed by the processor to perform the present invention. The one or more modules/units may be a series of computer program instruction segments capable of performing the specified functions, which instruction segments describe the execution of the program code in the terminal device.
The terminal equipment can be computing equipment such as a desktop computer, a notebook computer, a palm computer, a cloud server and the like. The terminal device may include, but is not limited to, a processor, a memory. Those skilled in the art will appreciate that the terminal devices may also include input-output devices, network access devices, buses, and the like.
The processor may be a central processing unit (Central Processing Unit, CPU), but may also be other general purpose processors, digital signal processors (Digital Signal Processor, DSP), application specific integrated circuits (Application Specific Integrated Circuit, ASIC), off-the-shelf programmable gate arrays (Field-Programmable Gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or the like. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
The storage may be an internal storage unit of the terminal device, such as a hard disk or a memory. The memory may also be an external storage device of the terminal device, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash memory Card (Flash Card) or the like, which are provided on the terminal device. Further, the memory may also include both an internal storage unit of the terminal device and an external storage device. The memory is used for storing the program codes and other programs and data required by the terminal equipment. The memory may also be used to temporarily store data that has been output or is to be output.
The above-mentioned optimization method of the product structure, the computer storage medium and the terminal device are created based on the above-mentioned grid processing method of the slice structure, and the technical effects and the beneficial effects thereof are not repeated herein, and each technical feature of the above-mentioned embodiment may be arbitrarily combined, so that the description is concise, and all possible combinations of each technical feature in the above-mentioned embodiment are not described, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope described in the present specification.
The above examples illustrate only a few embodiments of the invention, which are described in detail and are not to be construed as limiting the scope of the invention. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.
Claims (4)
1. A method for processing a grid of a slicing structure based on graph division is characterized by comprising the following steps:
the definition map partitioning algorithm is: taking a given partition structure grid and a given partition proportion as input, and taking a k partition result as output, so that the distribution of vertex weights is close to the given partition proportion, and the sum of the partitioned edge weights is small;
the pretreatment is as follows: determining a slicing structure grid of a product to be analyzed, generating a graph, and determining divided allowable conditions and process numbers;
judging whether the number of fragments of the fragment structure grid of the product to be analyzed is equal to 1;
if the k division result is equal to 1, dividing the sectional structure grids of the product to be analyzed by adopting the structural grids directly, and obtaining the k division result as a sectional structure grid processing result of the product to be analyzed; at this time, k=the number of processes;
if the number is not equal to 1, dividing the segmented structure grids of the product to be analyzed into sub-segmented structure grids by inputting a graph dividing algorithm, and inputting each sub-segmented structure grid into the graph dividing algorithm to obtain k dividing results of each sub-segmented structure grid; summarizing k division results of each sub-sliced structure grid to obtain sliced structure grid processing results of the product to be analyzed;
the method for dividing the product to be analyzed into sub-sliced structural grids by inputting a picture dividing algorithm comprises the following steps:
calculating a divisor of the process number;
traversing the divisors of the process numbers according to the order from the large divisors to the small divisors, taking the fragment structure grid of the product to be analyzed as a given fragment structure grid, determining a given division ratio according to the divisors of the process numbers, and inputting a graph division algorithm to obtain a k division result; at this point k=a divisor of the number of processes currently traversed;
evaluating whether the current division result meets the allowable condition or not, if so, ending; if not, continuing; until the maximum allowable submultiple meeting the allowable condition is found, obtaining a sub-fragment structure grid;
inputting each sub-segment structure grid into a graph partitioning algorithm to obtain k partitioning results of each sub-segment structure grid, wherein the k partitioning results comprise:
determining a given dividing ratio by taking each sub-sliced structural grid as a given sliced structural grid according to the ratio of the number of processes to the maximum allowable divisor, and inputting the given dividing ratio into a graph dividing algorithm to obtain k dividing results of each sub-sliced structural grid; at this time, k=the ratio of the number of processes to the maximum allowable divisor;
if the maximum allowable divisor is equal to 1, taking the sub-sliced structure grid as a given sliced structure grid, determining a given dividing ratio according to the two divisions, and inputting a graph dividing algorithm to obtain a two division result of the sub-sliced structure grid; if the current division meets the allowable condition, taking the sub-sliced structure grids obtained by the two division results as given sliced structure grids, determining a given division ratio according to an up-down integer of the process number divided by 2, and inputting a graph division algorithm to obtain k division results of each sub-sliced structure grid; at this time, k=the number of processes divided by 2 is an up-down integer; summarizing k division results of each sliced structural grid to obtain sliced structural grid processing results of the product to be analyzed;
if the current division does not meet the allowable conditions, finding out the largest fragments meeting the preset conditions according to the graph division result, dividing the largest fragments into a plurality of small fragments along the long sides to obtain finer fragment structure grids, re-dividing the finer fragment structure grids to obtain two sub-fragment structure grids, determining a given division ratio according to the up-down integer of the number of processes/2 by using the sub-fragment structure grids obtained by the two divisions, and inputting a graph division algorithm to obtain k division results of each sub-fragment structure grid; at this time, k=the up-down integer of the process number/2; summarizing k division results of each sliced structural grid to obtain sliced structural grid processing results of the product to be analyzed;
that is, the mesh division result of the load balancing is given according to the judgment of the number of fragments, the number of processes and the maximum allowable submultiple.
2. The method for processing a grid of slice structures according to claim 1, wherein the allowable conditions are: determining grid size tolerance parameters k1, k2, wherein k1< k2, such that the total size of the sub-grids allocated on each process falls at [ k1×na, k2×na ]; where Na is the average mesh size of the process, equal to the total mesh size divided by the number of processes.
3. A computer storage medium having executable program code stored therein; the executable program code for performing the tile structure grid processing method of any one of claims 1-2.
4. A terminal device comprising a memory and a processor; the memory stores program code executable by the processor; the program code is configured to perform the tile structure trellis processing method of any of claims 1-2.
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| CN114341859A (en) * | 2019-08-27 | 2022-04-12 | 西门子工业软件有限公司 | Object design process using coarse geometry cells and high resolution grid cells |
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