CN117233584A - Common mode transient immunity test circuit, method, test device and storage device - Google Patents
Common mode transient immunity test circuit, method, test device and storage device Download PDFInfo
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Abstract
The application relates to the technical field of common mode transient immunity test of integrated circuits and discloses a common mode transient immunity test circuit, a common mode transient immunity test method, a common mode transient immunity test device and a storage device, wherein the common mode transient immunity test circuit comprises a first switch, a second switch, a third switch, a fourth switch, a first resistance branch with adjustable resistance, a second resistance branch with fixed resistance, a third resistance branch with fixed resistance and an energy storage unit; when the tester is in actual use, the first resistance branch with the adjustable resistance value is arranged, and the first switch, the second switch, the third switch and the fourth switch are utilized to charge and discharge the energy storage unit, so that the change speed of a test signal can meet the test requirements of +/-10V/nS to +/-200V/n, and compared with an imported tester, the tester has the advantages of simple integral structure and low cost.
Description
Technical Field
The application relates to the technical field of common mode transient immunity test of integrated circuits, in particular to a common mode transient immunity test circuit, a common mode transient immunity test method, a common mode transient immunity test device and a common mode transient immunity test storage device.
Background
When testing an integrated circuit, a common mode transient immunity test, i.e. a CMTI (Common mode transient immunity) test, is often required, and when testing the common mode transient immunity test, a fast-changing transient voltage signal needs to be applied to a certain port of a specific functional integrated circuit, so as to test the anti-interference capability of the integrated circuit. When the common mode transient immunity test is carried out on the half-bridge driving circuit, the isolation driving circuit and the isolation signal transmission circuit, the test value of the transient voltage signal generally needs to reach +/-10V/nS to +/-200V/nS.
At present, most of common mode transient immunity tests use imported testers at home and abroad to provide +/-10V/nS to +/-200V/nS voltage interference signals, and according to different performances, the price of the testers is between hundreds of thousands of yuan and millions of yuan, so that the cost is high, and the test cost is greatly increased.
Disclosure of Invention
In view of the shortcomings of the background technology, the application provides a common mode transient immunity test circuit, a method, a test device and a storage device, and aims to solve the technical problem that the test cost is high when a tester is used for carrying out common mode transient immunity test on an integrated circuit at present.
In order to solve the technical problems, the first aspect of the application provides the following technical scheme: the common mode transient immunity test circuit comprises a first switch, a second switch, a third switch, a fourth switch, a first resistance branch with adjustable resistance, a second resistance branch with fixed resistance, a third resistance branch with fixed resistance and an energy storage unit;
the first connecting end of the first switch is electrically connected with the first connecting end of the third resistor branch and is used for inputting a power supply;
the second connecting end of the first switch is electrically connected with the first connecting end of the second switch and the first connecting end of the first resistor branch respectively;
the second connecting end of the third resistor branch is electrically connected with the first connecting end of the third switch, and the second connecting end of the third switch is electrically connected with the second connecting end of the first resistor branch, the first connecting end of the energy storage unit and the first connecting end of the fourth switch respectively; the second connecting end of the fourth switch is electrically connected with the first connecting end of the second resistance branch, and the second connecting end of the second resistance branch, the second connecting end of the second switch and the second connecting end of the energy storage unit are all grounded;
the resistance between the first connecting end of the first resistor branch and the second connecting end of the first resistor branch is adjustable, and the first connecting end of the energy storage unit is used for outputting a test signal.
In a certain implementation manner of the first aspect, the first switch, the second switch, the third switch and the fourth switch are electromagnetic relay switches.
In a certain implementation manner of the first aspect, the first connection terminal of the first switch is further electrically connected to a filtering unit.
In a certain implementation manner of the first aspect, the filtering unit includes at least one filtering capacitor, and when the number of the filtering capacitors is greater than or equal to 2, all the filtering capacitors are connected in parallel; one end of the first switch is electrically connected with one end of each filter capacitor, and the other end of each filter capacitor is grounded.
In a certain implementation manner of the first aspect, the first resistance branch includes an adjustable resistor R1, and the adjusting end and the output end of the adjustable resistor R1 are a first connection end and a second connection end of the first resistance branch;
the second resistor branch comprises a resistor R2, and the two ends of the resistor R2 are a first connecting end and a second connecting end of the second resistor branch;
the third resistor branch comprises a resistor R3, and the two ends of the resistor R3 are a first connecting end and a second connecting end of the third resistor branch.
In a certain implementation manner of the first aspect, the energy storage unit includes an energy storage capacitor, and two ends of the energy storage capacitor are a first connection end and a second connection end of the energy storage unit.
In a certain implementation manner of the first aspect, a capacitance value of the energy storage capacitor is ten times or more than a capacitance value of an input port of the test chip, where the input port of the test chip is used for inputting the test signal.
In a second aspect, the present application provides a method for testing the immunity of a common mode transient, which is implemented by the common mode transient immunity testing circuit, and includes the following steps:
s1: connecting a first connecting end of a first switch to a power supply, and setting the resistance of a first resistance branch to adjust the change speed of a test signal;
s2: firstly, the first switch, the second switch and the third switch are opened, and the fourth switch is closed, so that the electric charge on the energy storage unit is released; then changing the first switch from an open state to a closed state, and enabling a power supply to charge the energy storage unit through the first switch and the first resistor branch;
s3: firstly, the first switch, the second switch and the fourth switch are opened, the third switch is closed, and the energy storage unit is charged to the power supply voltage through the third switch and the third resistor branch; the second switch is then closed, discharging the energy storage unit through the first resistive branch and the second switch.
In a third aspect, the present application provides a storage device storing a computer program for executing the above-described common mode transient immunity test method.
In a fourth aspect, the present application provides a testing device, including the above-mentioned storage device, and further including a control device and a driving unit, where the control device is electrically connected to the storage device, and is configured to read the computer program, and control opening and closing of the first switch, the second switch, the third switch, and the fourth switch through the driving unit based on the computer program.
Compared with the prior art, the application has the following beneficial effects: according to the application, the first resistance branch with the adjustable resistance value is arranged, and the first switch, the second switch, the third switch and the fourth switch are utilized to charge and discharge the energy storage unit, so that the change speed of a test signal can meet the test requirements of +/-10V/nS to +/-200V/n, and compared with an imported tester, the tester has the advantages of simple integral structure and low cost.
Drawings
FIG. 1 is a circuit diagram of a test circuit in an embodiment;
FIG. 2 is a flow chart of a test method in an embodiment;
FIG. 3 is a first simulation diagram of a test signal voltage rising;
FIG. 4 is a first simulation diagram of a test signal voltage rising;
FIG. 5 is a second simulation diagram of a test signal voltage rise;
FIG. 6 is a second simulation diagram of a test signal voltage rising;
fig. 7 is a schematic structural diagram of the test device.
Detailed Description
The application will now be described in further detail with reference to the accompanying drawings. The drawings are simplified schematic representations which merely illustrate the basic structure of the application and therefore show only the structures which are relevant to the application.
As shown in fig. 1, the common mode transient immunity test circuit comprises a first switch S1, a second switch S2, a third switch S3, a fourth switch S4, a first resistance branch 1 with adjustable resistance, a second resistance branch 2 with fixed resistance, a third resistance branch 3 with fixed resistance and an energy storage unit 4;
the first connection end of the first switch S1 is electrically connected to the first connection end of the third resistor branch 3, and is used for inputting a power supply VDD;
the second connecting end of the first switch S1 is electrically connected with the first connecting end of the second switch S2 and the first connecting end of the first resistor branch 1 respectively;
the second connecting end of the third resistor branch 3 is electrically connected with the first connecting end of the third switch S3, and the second connecting end of the third switch S3 is electrically connected with the second connecting end of the first resistor branch 1, the first connecting end of the energy storage unit 4 and the first connecting end of the fourth switch S4 respectively; the second connection end of the fourth switch S4 is electrically connected with the first connection end of the second resistor branch 2, and the second connection end of the second resistor branch 2, the second connection end of the second switch S2 and the second connection end of the energy storage unit are all grounded
The resistance between the first connection end of the first resistor branch 1 and the second connection end of the first resistor branch 1 is adjustable, and the first connection end of the energy storage unit 4 is used for outputting a test signal OUT.
Specifically, in the present embodiment, the first switch S1, the second switch S2, the third switch S3, and the fourth switch S4 are all electromagnetic relay switches. In some embodiments, the first switch S1, the second switch S2, the third switch S3, and the fourth switch S4 may also select transistors such as MOS transistors and triodes, which may be specifically selected according to actual needs. In some embodiments, other switches with controllable on/off can be used as the first switch S1, the second switch S2, the third switch S3 or the fourth switch S4
In this embodiment, since the first connection end of the first switch S1 is used for inputting the power supply VDD, in order to ensure the voltage stability of the input power supply VDD, the first connection end of the first switch S1 is further electrically connected with the filtering unit 5, and filtering can be performed through the filtering unit 5, so as to filter out the interference signal in the power supply VDD.
In this embodiment, the filtering unit 5 includes at least one filtering capacitor, and when the number of the filtering capacitors is greater than or equal to 2, all the filtering capacitors are connected in parallel; one end of the first switch S1 is electrically connected with one end of each filter capacitor, and the other end of each filter capacitor is grounded. Illustratively, the circuit shown in FIG. 1 includes a filter capacitor C2.
In practical use, when the capacitance value of the filter capacitor is required to be larger, a plurality of filter capacitors can be connected in parallel. For example, when the capacitance value of the filter capacitor is 148uF, filter capacitors with capacitance values of 100uF, 47uF and 1uF may be used, and the three filter capacitors are connected in parallel.
As shown in fig. 1, in this embodiment, the first resistor branch 1 includes an adjustable resistor R1, and an adjusting end and an output end of the adjustable resistor R1 are a first connection end and a second connection end of the first resistor branch 1;
the second resistor branch 2 comprises a resistor R2, and the two ends of the resistor R2 are a first connecting end and a second connecting end of the second resistor branch 2;
the third resistor branch 3 comprises a resistor R3, and two ends of the resistor R3 are a first connecting end and a second connecting end of the third resistor branch 3.
In a certain embodiment, for the first resistor branch 1, a plurality of resistors connected in series are arranged on the first resistor branch 1, then a switch is connected in parallel to two ends of each resistor, and the total resistance of the first resistor branch 1 is adjusted by controlling the on-off of the switch; in some embodiments, the switches may be connected in parallel across some of all of the resistors in series, and not necessarily across all of the resistors.
In a certain implementation manner, a plurality of resistors connected in parallel can be arranged in the first resistor branch 1, each resistor is connected with a switch in series, and the total resistance of the first resistor branch 1 can be adjusted by controlling the on-off of the switch; in some embodiments, some of all of the parallel resistors may be switched in series, and it is not necessary that all of the parallel resistors be switched in series.
In fig. 1, the energy storage unit 4 includes an energy storage capacitor C1, and two ends of the energy storage capacitor C1 are a first connection end and a second connection end of the energy storage unit 4.
Since one end of the energy storage unit 4 is used for outputting the test signal OUT, and the test signal OUT is to be input to the input port of the test chip, the input port of the test chip is provided with the input capacitance, and in order to ignore the influence of the input capacitance, the capacitance value of the energy storage capacitance C1 is more than ten times of the capacitance value of the input port of the test chip.
The working procedure of the test circuit of the present application refers to the test method in the second embodiment.
Example two
In this embodiment, the present application provides a method for testing the immunity of a common mode transient, which is implemented by the common mode transient immunity testing circuit shown in fig. 1, and includes the following steps:
s1: connecting a first connecting end of a first switch S1 to a power supply VDD, and setting the resistance of a first resistance branch 1 to adjust the change speed of a test signal;
s2: firstly, the first switch S1, the second switch S2 and the third switch S3 are opened, and the fourth switch S4 is closed, so that the electric charge on the energy storage unit 4 is released; then the first switch S1 is changed from an open state to a closed state, and the power supply VDD charges the energy storage unit 4 through the first switch S1 and the first resistor branch 1;
s3: firstly, the first switch S1, the second switch S2 and the fourth switch S4 are opened, the third switch is closed, and the energy storage unit 4 is charged to the power supply VDD voltage through the third switch S3 and the third resistor branch 3; the second switch S2 is then closed, and the energy storage unit 4 is discharged via the first resistor branch 1 and the second switch S2.
In this embodiment, step S2 is used to generate the rising test signal OUT, and step S3 is used to generate the falling test signal OUT.
The energy storage capacitor C1 in fig. 1 is valued at 100 pF, the filter capacitor C2 is valued at 148uF (three capacitors of 100uF, 47uF and 1uF are connected in parallel), the resistor R2 and the resistor R3 are valued at 100kΩ, and the power supply VDD is set at 100V.
The analysis procedure for setting the resistance of the adjustable resistor R1 to 100 Ω is as follows:
the rising test signal OUT is generated first, specifically as follows:
firstly, the first switch S1, the second switch S2 and the third switch S3 are opened, the fourth switch S4 is closed, and therefore charges on the energy storage unit 4 are released, and the test signal OUT is 0V level; then, the first switch S1 is changed from the open state to the closed state, so that the power supply charges the energy storage unit 4 through the first switch S1 and the first resistor branch 1, the maximum charging current is about VDD/R1 (neglecting the on-resistance of the first switch S1), and the voltage rising amount of the energy storage capacitor C1 in the 1nS time is as follows:
Δv= （VDD/R1*1nS）/C1；
the test signal OUT is converted into the voltage variation within 1nS to be 10V, namely the application provides the test signal OUT with the maximum voltage of 10V/nS, and the test signal OUT is a common mode transient variation signal; as shown in FIG. 3, a simulated plot of the test signal OUT for this process, measured to provide a maximum dvdt of 9.9GV/S, i.e., 9.9V/nS, consistent with theoretical calculations, provides an average dvdt of about 5V/nS;
a falling test signal OUT is then generated, as follows:
firstly, the first switch S1, the second switch S2 and the fourth switch S4 are opened, the third switch S3 is closed, and the energy storage unit 4 is charged to the power supply VDD voltage through the third switch S3 and the third resistor branch 3, namely, 100V; then, the second switch S2 is closed, so that the energy storage unit 4 discharges through the first resistor branch 1 and the second switch S2, the maximum discharge current is about VDD/R1 (neglecting the on-resistance of the second switch S2), and the voltage drop of the capacitor C1 in 1nS time is as follows:
Δv= （VDD/R1*1nS）/C1；
the voltage variation of the test signal OUT converted to 1nS is as follows: -10V, i.e. the present application provides a common mode transient variation signal of maximally-10V/nS; as shown in FIG. 4, a simulated graph of the test signal OUT of this process shows that the maximum dvdt provided by the test signal OUT is-9.9 GV/S, i.e., -9.9V/nS, consistent with theoretical calculations, the signal provides an average dvdt of about-5V/nS;
in summary, the present application can provide a common mode transient variation test signal OUT for test systems within + -10V/nS.
The analysis procedure for setting the resistance value of the adjustable resistor R1 to 1Ω is as follows:
the rising test signal OUT is generated first, specifically as follows:
firstly, the first switch S1, the second switch S2 and the third switch S3 are opened, the fourth switch S4 is closed, and therefore charges on the energy storage unit 4 are released, and the test signal OUT is 0V level; then, the first switch S1 is changed from the open state to the closed state, so that the power supply VDD charges the energy storage unit 4 through the first switch S1 and the first resistor branch 1, the maximum charging current is about VDD/R1 (neglecting the on-resistance of the first switch S1), and the voltage rising amount of the energy storage capacitor C1 in the 1nS time is:
Δv= （VDD/R1*1nS）/C1；
the test signal OUT is converted into the voltage variation quantity within 1nS to be 1000V, namely the application provides the test signal OUT with the maximum voltage of 1000V/nS; as shown in FIG. 5, a simulated plot of the test signal OUT of this process, measured to provide a maximum dvdt of 900GV/S, i.e., 900V/nS, consistent with theoretical calculations, provides an average dvdt of about 450V/nS;
a falling test signal OUT is then generated, as follows:
firstly, the first switch S1, the second switch S2 and the fourth switch S4 are opened, the third switch S3 is closed, and the energy storage unit 4 is charged to the power supply VDD voltage through the third switch S3 and the third resistor branch 3, namely, 100V; then, the second switch S2 is closed, so that the energy storage unit 4 discharges through the first resistor branch 1 and the second switch S2, the maximum discharge current is about VDD/R1 (neglecting the on-resistance of the second switch S2), and the voltage drop of the capacitor C1 in 1nS time is as follows:
Δv= （VDD/R1*1nS）/C1；
the voltage variation of the test signal OUT converted to 1nS is as follows: -1000V, i.e. the present application provides a common mode transient variation signal of up to-1000V/nS; as shown in FIG. 6, a simulated plot of the test signal OUT of this process, measured to provide a maximum dvdt of-900 GV/S, i.e., -900V/nS, consistent with theoretical calculations, provides an average dvdt of about-450V/nS;
in summary, the present application can provide a common mode transient variation test signal OUT for test systems within + -900V/nS.
In combination with the analysis process of setting the resistance value of the adjustable resistor R1 to be 100 omega and 1 omega, the application can output a test signal OUT of +/-10V/nS to +/-900V/nS by adjusting the resistance value of the adjustable resistor R1, so that the actual test requirement can be completely met; the circuit of the application has simple structure, only needs common resistance, capacitance, relay and other devices, has the overall cost not exceeding 100 Yuan people's bank note and has extremely low application cost.
Example III
In this embodiment, the present application provides a storage device storing a computer program for executing the above-mentioned common mode transient immunity test method.
Example IV
As shown in fig. 7, in this embodiment, the present application provides a testing device, including the above-mentioned storage device 6, and further including a control device 5 and a driving unit 7, where the control device 5 is electrically connected to the storage device 6, for reading a computer program, and controlling opening and closing of the first switch S1, the second switch S2, the third switch and the fourth switch S4 through the driving unit 7 based on the computer program.
Unless defined otherwise, technical or scientific terms used herein should be given the ordinary meaning as understood by one of ordinary skill in the art to which this application belongs. The terms "first," "second," and the like in the description and in the claims, do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. Also, the terms "connected" or "connected," and the like, are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "one end" and "the other end" merely indicate relative positional relationships, and when the absolute positional relationship of the object to be described is changed, the positional relationship to be associated is changed accordingly. Further, the term "at least one" as used herein includes one, two or more than two.
Other embodiments of the application will be apparent to those skilled in the art from consideration of the specification and practice of the application disclosed herein. This application is intended to cover any variations, uses, or adaptations of the application following, in general, the principles of the application and including such departures from the present disclosure as come within known or customary practice within the art to which the application pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the application being indicated by the following claims.
It is to be understood that the application is not limited to the precise arrangements and instrumentalities shown in the drawings, which have been described above, and that various modifications and changes may be effected without departing from the scope thereof. The scope of the application is limited only by the appended claims.
Claims (10)
1. The common mode transient immunity test circuit is characterized by comprising a first switch, a second switch, a third switch, a fourth switch, a first resistance branch with adjustable resistance, a second resistance branch with fixed resistance, a third resistance branch with fixed resistance and an energy storage unit;
the first connecting end of the first switch is electrically connected with the first connecting end of the third resistor branch and is used for inputting a power supply;
the second connecting end of the first switch is electrically connected with the first connecting end of the second switch and the first connecting end of the first resistor branch respectively;
the second connecting end of the third resistor branch is electrically connected with the first connecting end of the third switch, and the second connecting end of the third switch is electrically connected with the second connecting end of the first resistor branch, the first connecting end of the energy storage unit and the first connecting end of the fourth switch respectively; the second connecting end of the fourth switch is electrically connected with the first connecting end of the second resistance branch, and the second connecting end of the second resistance branch, the second connecting end of the second switch and the second connecting end of the energy storage unit are all grounded;
the resistance between the first connecting end of the first resistor branch and the second connecting end of the first resistor branch is adjustable, and the first connecting end of the energy storage unit is used for outputting a test signal.
2. The common mode transient immunity test circuit of claim 1, wherein the first switch, the second switch, the third switch, and the fourth switch are all electromagnetic relay switches.
3. The common mode transient immunity test circuit of claim 1, wherein the first connection terminal of the first switch is further electrically connected with a filtering unit.
4. A common mode transient immunity test circuit according to claim 3, wherein said filter unit comprises at least one filter capacitor, all filter capacitors being connected in parallel when the number of filter capacitors is 2 or more; one end of the first switch is electrically connected with one end of each filter capacitor, and the other end of each filter capacitor is grounded.
5. The common mode transient immunity test circuit of claim 1, wherein said first resistive branch comprises an adjustable resistor R1, the adjustment and output terminals of the adjustable resistor R1 being the first and second connection terminals of the first resistive branch;
the second resistor branch comprises a resistor R2, and the two ends of the resistor R2 are a first connecting end and a second connecting end of the second resistor branch;
the third resistor branch comprises a resistor R3, and the two ends of the resistor R3 are a first connecting end and a second connecting end of the third resistor branch.
6. The common mode transient immunity test circuit of claim 1, wherein the energy storage unit comprises an energy storage capacitor, and wherein two ends of the energy storage capacitor are a first connection end and a second connection end of the energy storage unit.
7. The common mode transient immunity test circuit of claim 6, wherein a capacitance value of the storage capacitor is more than ten times a capacitance value of an input port of a test chip, the input port of the test chip being configured to input the test signal.
8. The method for testing the common mode transient immunity is characterized by comprising the following steps of:
s1: connecting a first connecting end of a first switch to a power supply, and setting the resistance of a first resistance branch to adjust the change speed of a test signal;
s2: firstly, the first switch, the second switch and the third switch are opened, and the fourth switch is closed, so that the electric charge on the energy storage unit is released; then changing the first switch from an open state to a closed state, and enabling a power supply to charge the energy storage unit through the first switch and the first resistor branch;
s3: firstly, the first switch, the second switch and the fourth switch are opened, the third switch is closed, and the energy storage unit is charged to the power supply voltage through the third switch and the third resistor branch; the second switch is then closed, discharging the energy storage unit through the first resistive branch and the second switch.
9. A storage device storing a computer program for executing the common mode transient immunity test method of claim 8.
10. A testing device comprising the memory device of claim 9, further comprising a control device and a drive unit, the control device being electrically connected to the memory device for reading the computer program and controlling the opening and closing of the first switch, the second switch, the third switch and the fourth switch via the drive unit based on the computer program.
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