CN117130243A

CN117130243A - Light emitting device and image forming apparatus

Info

Publication number: CN117130243A
Application number: CN202310584921.6A
Authority: CN
Inventors: 赤木太辅
Original assignee: Canon Inc
Current assignee: Canon Inc
Priority date: 2022-05-27
Filing date: 2023-05-23
Publication date: 2023-11-28

Abstract

Disclosed are a light emitting device and an image forming apparatus. An image forming apparatus includes a light emitting chip, a substrate on which a plurality of light emitting chips are mounted, a controller, and a switch. The light emitting chip includes a light emitting portion that emits light exposing the photosensitive drum based on a supply of a driving current to the light emitting portion, and a driving portion that drives the light emitting portion. The controller controls the driving part by transmitting a signal to the light emitting chip and outputs a digital signal corresponding to a target light amount of the light emitting part to the light emitting chip. Based on a control signal from the controller, the switch switches a connection state between the voltage source and the D/a converter to a first state in which the voltage source supplies the reference voltage to the D/a converter, and a second state in which an electrical connection between the voltage source and the D/a converter is disconnected.

Description

Light emitting device and image forming apparatus

Technical Field

The present disclosure relates to a light emitting device including a plurality of light emitting elements and an image forming apparatus that forms an image using an exposure device.

Background

In an electrophotographic printer, a method for exposing a photosensitive drum using an exposure head using a Light Emitting Diode (LED) or an organic Electroluminescence (EL) film and forming a latent image on the surface of the photosensitive drum is generally known. U.S. patent application publication No.2022/0146959 discusses a technique for mounting a light emitting unit and a driving circuit on the same chip in an exposure head as described above, thereby reducing the size of the apparatus. In the technique discussed in U.S. patent application publication No.2022/0146959, a driving integrated circuit and a plurality of electrodes are formed on a silicon (Si) substrate, and organic EL films are vapor deposited on the driving integrated circuit and the plurality of electrodes, whereby a light emitting unit and a driving circuit are built in a single light emitting chip. For example, the driving circuit includes a digital-to-analog converter (DAC) that receives a set value of a current to be applied to the light emitting unit as a digital value and outputs the current according to the digital signal as an analog signal. The analog signal output from the DAC is connected to the light emitting unit, and the current supplied to the light emitting unit is adjusted according to the digital signal, whereby the light emission of the light emitting unit can be controlled.

The known DAC may generate heat in a state where a voltage is supplied to the DAC.

In some conventional configurations in which the light emitting unit and the driving circuit are built in a single chip, heat generated by the DAC included in the driving circuit may be transferred to the organic EL film, and thus the light emitting characteristics of the organic EL may be changed, and the light emitting amount may be unintentionally changed.

For example, the above problem may be caused significantly during a period from when the formation of an image of a single page is completed to when the formation of an image of the next page is started (a period in which the light emitting unit does not emit light).

Disclosure of Invention

The present disclosure is directed to preventing a digital-to-analog (D/a) converter that converts a digital signal into a voltage from generating heat.

According to an aspect of the present disclosure, an image forming apparatus for forming an image on a recording medium includes: a photosensitive drum; a light emitting chip including a light emitting portion configured to emit light for exposing a surface of the photosensitive drum based on a supply of a driving current to the light emitting portion according to an image signal, and including a driving portion configured to drive the light emitting portion; a substrate on which a plurality of light emitting chips are mounted; and a controller configured to control the driving part by transmitting a signal to the light emitting chip and output a digital signal corresponding to a target light amount of the light emitting part to the light emitting chip, wherein the light emitting chip further includes: a voltage source configured to output a reference voltage; a digital-to-analog (D/a) converter configured to convert a digital signal into a voltage corresponding to the digital signal based on a reference voltage output from a voltage source; and a switch configured to switch a connection state between the voltage source and the D/a converter to a first state in which the voltage source and the D/a converter are connected to each other and the voltage source supplies a reference voltage to the D/a converter and a second state in which an electrical connection between the voltage source and the D/a converter is disconnected, based on a control signal from the controller.

Other features of the present disclosure will become apparent from the following description of exemplary embodiments with reference to the accompanying drawings.

Drawings

Fig. 1 is a schematic diagram illustrating a configuration of an image forming apparatus.

Fig. 2A and 2B are diagrams illustrating an exposure head and a photosensitive member.

Fig. 3A and 3B are diagrams illustrating a printed circuit board of an exposure head.

Fig. 4 is a diagram illustrating placement of light emitting elements in a light emitting chip.

Fig. 5 is a plan view of the light emitting chip.

Fig. 6 is a cross-sectional view of a light emitting device.

Fig. 7 is a diagram illustrating a control configuration of the light emitting chip.

Fig. 8 is a diagram illustrating a signal example of a signal line when image data is transmitted to a light emitting chip.

Fig. 9 is a diagram illustrating a signal example of a signal line when control data is written to a register in the light emitting chip.

Fig. 10 is a diagram illustrating a signal example of a signal line when reading control data from a register in a light emitting chip.

Fig. 11 is a functional block diagram of a light emitting chip.

Fig. 12 is a diagram illustrating a configuration of the current drive unit.

Fig. 13 is an example of a circuit diagram of a digital-to-analog converter (DAC) for setting a current.

Fig. 14 is a timing chart of various signals when printing is performed.

Fig. 15 is a timing chart of various signals when printing is performed.

Fig. 16 is a flowchart of a process performed by the image controller.

Fig. 17 is a flowchart of a process performed by the image controller.

Fig. 18 is a diagram illustrating a test pattern for gradation correction control.

Fig. 19 is a flowchart of a process performed by the image controller.

Fig. 20 is a diagram illustrating a control configuration of the light emitting chip.

Fig. 21 is a diagram illustrating a signal example of a signal line when reading control data from a register in a light emitting chip.

Fig. 22 is a functional block diagram of a light emitting chip.

Fig. 23 is a diagram illustrating a signal example of a signal line when transmitting image data.

Fig. 24A and 24B are diagrams illustrating signal examples of signal lines when the image controller accesses the register.

Fig. 25 is a diagram illustrating a signal example of a signal line when an identification bit indicating type "disable" is transmitted.

Fig. 26 is a functional block diagram of a light emitting chip.

Fig. 27 is a state transition diagram of the interface circuit.

Fig. 28 is a schematic diagram illustrating a configuration of an image forming apparatus.

Fig. 29 is a diagram illustrating a printed circuit board of the exposure head.

Fig. 30 is a diagram illustrating a relationship between the amount of light and the temperature of the light emitting unit when a predetermined current is supplied to the light emitting unit.

Detailed Description

Exemplary embodiments will be described in detail below with reference to the accompanying drawings. The following exemplary embodiments do not limit the present disclosure according to the appended claims. Although a plurality of features are described in the exemplary embodiments, not all of the plurality of features are necessary for the present disclosure, and the plurality of features may be optionally combined together. In addition, in the drawings, the same or similar components are designated by the same reference numerals and are not redundantly described.

Fig. 1 is a schematic diagram illustrating a configuration of an image forming apparatus according to a first exemplary embodiment. The reading unit 100 optically reads a document placed on a document platen and generates image data representing a result of the reading. The image forming apparatus 103 forms an image on a sheet based on, for example, image data generated by the reading unit 100 or based on image data received from an external device via a network.

The image forming apparatus 103 includes image forming units 101a, 101b, 101c, and 101d. The image forming units 101a, 101b, 101c, and 101d form black, yellow, magenta, and cyan toner images, respectively. The image forming units 101a, 101b, 101c, and 101d have similar configurations, and will therefore be hereinafter also referred to collectively as "image forming units 101".

When an image is formed, the photosensitive member 102 of each image forming unit 101 is rotationally driven in the clockwise direction in fig. 1.

The charging device 107 charges the photosensitive member 102. The exposure head 106 serving as an exposure device exposes the photosensitive member 102 according to image data, thereby forming an electrostatic latent image on the photosensitive member 102. The developing device 108 develops the electrostatic latent image on the photosensitive member 102 using toner. The toner image on the photosensitive member 102 is transferred to the sheet conveyed on the transfer belt 111. The toner images on the respective photosensitive members 102 are transferred to the sheet in a superimposed manner, whereby colors different from black, yellow, magenta, and cyan can be reproduced.

The conveying unit 105 controls feeding and conveying of the sheet. Specifically, the conveying unit 105 feeds sheets from a unit designated among the internal storage units 109a and 109b, the external storage unit 109c, and the manual feeding unit 109d to a conveying path in the image forming apparatus.

The fed sheet is conveyed to the registration roller 110. The registration roller 110 conveys the sheet onto the transfer belt 111 at a predetermined timing so that the toner image on the photosensitive member 102 is transferred to the sheet. As described above, the toner image is transferred to the sheet while the sheet is conveyed on the transfer belt 111. The fixing unit 104 heats and pressurizes the sheet to which the toner image is transferred, thereby fixing the toner image to the sheet. After the toner image is fixed, the sheet is discharged to the outside of the image forming apparatus by a discharge roller 112.

Fig. 2A and 2B illustrate the photosensitive member 102 and the exposure head 106. The exposure head 106 includes a light-emitting dot group 201, a printed circuit board 202 on which the light-emitting dot group 201 is mounted, a rod lens array 203, and a housing 204 holding the rod lens array 203 and the printed circuit board 202. The rod lens array 203 collects light emitted from the light emitting dot group 201 onto the photosensitive member 102, thereby forming image forming dots of a predetermined size on the photosensitive member 102.

Fig. 3A and 3B illustrate a printed circuit board 202. Fig. 3A illustrates the surface of the printed circuit board 202 on which the connector 305 is mounted, and fig. 3B illustrates the surface of the printed circuit board 202 on which the light emitting point group 201 is mounted (the surface on the opposite side of the surface on which the connector 305 is mounted). In the present exemplary embodiment, the light emitting point group 201 includes 20 light emitting chips 400-1 to 400-20. The light emitting chips 400-1 to 400-20 are arranged in two staggered rows along the main scanning direction. In the following description, the light emitting chips 400-1 to 400-20 will also be collectively referred to as "light emitting chip 400". Each light emitting chip 400 includes a plurality of light emitting points (light emitting elements). The light emitting chip 400 on the printed circuit board 202 is connected to an image controller (hereinafter also referred to as an image controller unit) 700 (fig. 7) serving as a control unit via a connector 305.

Fig. 4 is a diagram illustrating placement of each light emitting chip 400 and light emitting points 602 provided in the light emitting chips 400. The single light emitting chip 400 includes plural sets of 748 light emitting points 602 arranged along the main scanning direction. The plurality of groups are arranged along a sub-scanning direction orthogonal to the main scanning direction. As described above, in the light emitting chip 400, the plurality of light emitting points 602 are two-dimensionally placed along both the main scanning direction and the sub scanning direction. In the following description, the number of groups is four as an example. That is, in the following exemplary embodiment, the light emitting chip 400 includes four sets of 748 light emitting points 602 arranged along the main scanning direction, that is, 2992 light emitting points 602 in total. The pitch between the light-emitting points 602 adjacent to each other in the main scanning direction is about 21.16 micrometers (μm) corresponding to a resolution of 1200 dpi. Therefore, the length of the single set 748 light emitting points 602 in the main scanning direction is about 15.8 millimeters (mm). The pitch (length P in fig. 4) between the light-emitting points 602 adjacent to each other in the sub-scanning direction is also about 21.16 μm corresponding to a resolution of 1200 dpi. In addition, the pitch (length L in fig. 4) between the light emitting points 602 in the two light emitting chips 400 adjacent to each other in the main scanning direction is also about 21.16 μm corresponding to a resolution of 1200 dots per inch (dpi).

Fig. 5 is a plan view of each light emitting chip 400. A plurality of light emitting points 602 of the light emitting chip 400 are formed on the light emitting substrate 402 such as a silicon substrate. In the light emitting substrate 402, a circuit unit 406 for controlling a plurality of light emitting points 602 is provided. A signal line for communicating with the image controller 700, a power supply line for connecting to a power supply, and a ground line for connecting to ground are connected to the pads 408-1 to 408-10. For example, the signal line, the power line, and the ground line are wirings made of gold.

Fig. 6 illustrates a portion of a cross section along line A-A in fig. 5. On the light emitting substrate 402, a plurality of lower electrodes 504 are formed. Between two lower electrodes 504 adjacent to each other, a gap having a length d is provided. On the lower electrode 504, a light emitting layer 506 is provided. On the light emitting layer 506, an upper electrode 508 is provided. The upper electrode 508 is a single common electrode for the plurality of lower electrodes 504. If a predetermined voltage is applied between the lower electrode 504 and the upper electrode 508, current flows from the lower electrode 504 to the upper electrode 508, whereby the light emitting layer 506 emits light. Accordingly, a region of the light emitting layer 506 corresponding to a region of the single lower electrode 504 corresponds to the single light emitting point 602. That is, in the present exemplary embodiment, the light emitting substrate 402 includes a plurality of light emitting points 602. The light emitting point may also be referred to as a "light emitting unit".

As the light-emitting layer 506, for example, an organic Electroluminescence (EL) film can be used. Alternatively, as the light-emitting layer 506, an inorganic EL film may be used. The upper electrode 508 may be a transparent electrode such as Indium Tin Oxide (ITO) to transmit the light emission wavelength of the light emitting layer 506.

Although the entirety of the upper electrode 508 is configured to transmit the emission wavelength of the light emitting layer 506 in the present exemplary embodiment, the entirety of the upper electrode 508 does not need to transmit the emission wavelength. Specifically, only the region of the upper electrode 508 that emits light from the light-emitting point 602 is required to transmit the light-emitting wavelength.

Although the light emitting layer 506 is common to all the lower electrodes 504 provided in the light emitting chip 400 in the present exemplary embodiment, the present disclosure is not limited thereto. Alternatively, for example, the following configuration may be adopted: a first plurality of lower electrodes 504 among the plurality of lower electrodes 504 provided in the light emitting chip 400 is covered with a first light emitting layer 506, and a second plurality of lower electrodes 504 among the plurality of lower electrodes 504 provided in the light emitting chip 400 is covered with a second light emitting layer 506. In addition, in such a configuration, a region of the light emitting layer 506 corresponding to a region of the single lower electrode 504 corresponds to the single light emitting point 602. Alternatively, however, the light emitting layer 506 may be provided separately for each of the plurality of lower electrodes 504 provided in the light emitting chip 400. In addition, in such a configuration, a region of the light emitting layer 506 corresponding to a region of the single lower electrode 504 corresponds to the single light emitting point 602.

Fig. 7 illustrates a control configuration of each light emitting chip 400. The data switching unit 705 and each light emitting chip 400 are connected to each other through a plurality of signal lines (wirings). Specifically, the data switching unit 705 and the light emitting chips 400-n (n is an integer from 1 to 20) are connected to each other through the signal line DATAn, the signal line write, and the signal line READn. The data switching unit 705 transmits the image data to the light emitting chips 400-n using the signal line DATAn. The data switching unit 705 writes control data to a register in the light emitting chip 400-n using the signal line write, or notifies the light emitting chip 400-n of reading of the control data. The data switching unit 705 reads control data stored in a register in the light emitting chip 400-n using the signal line READn.

The data switching unit 705 and all the light emitting chips 400 are connected to each other through a single signal line CLK, a single signal line SYNC, and a single signal line EN. The signal line CLK is used to transmit a clock signal for transmitting and receiving data through the signal lines DATAn, wrten, and READn. The data switching unit 705 outputs a clock signal generated based on the reference clock signal from the clock generating unit 702 to the signal line CLK. The signals transmitted to the signal lines SYNC and EN will be described below.

A Central Processing Unit (CPU) 701 controls the whole of the image forming apparatus. The image data generating unit 703 performs various types of image processing such as halftone processing on the image data received from the reading unit 100 or the external device, thereby generating image data for controlling on and off of light emission of the light emitting point 602 in each light emitting chip 400. The image data generating unit 703 transfers the generated image data to the data switching unit 705. When the register access unit 704 writes control data to a register in each light emitting chip 400, the register access unit 704 receives the control data from the CPU 701 and transfers the control data to the data switching unit 705. The register access unit 704 also outputs control data read from a register in each light emitting chip 400 to the CPU 701.

Fig. 8 illustrates signals of the signal lines in the case where image data is transmitted to each light emitting chip 400. A cyclic line synchronization signal indicating the exposure timing of each line in the photosensitive member 102 is output to the signal line SYNC. If the circumferential speed of the photosensitive member 102 is 200mm/s and the resolution in the sub-scanning direction is 1200dpi (about 21.16 μm), the line synchronization signal is output at a period of about 105.8 μm. The DATA switching unit 705 transmits image DATA to the signal lines DATA1 to DATA20 in synchronization with the rising edge of the row synchronization signal. In the present exemplary embodiment, since each light emitting chip 400 includes 2992 light emitting points 602, the data switching unit 705 needs to transmit image data indicating whether each of the total 2992 light emitting points 602 emits light to each light emitting chip 400 in a period of about 105.8 microseconds (μs). In order to transmit image data of 2992 light emitting points 602 in total in a period of about 105.8 μs, in this example, as illustrated in fig. 8, at the time of transmitting the image data, the data switching unit 705 sets the frequency of the clock signal to be transmitted to the signal line CLK to 30 megahertz (MHz).

Fig. 9 illustrates signals of signal lines in the case where control data is written to registers in each light emitting chip 400. During communication, an enable signal that switches to a high level and indicates that communication is being performed is output to the signal line EN. The data switching unit 705 transfers the start bit to the signal line write in synchronization with the rising edge of the enable signal. Subsequently, the data switching unit 705 transmits a write flag indicating a write operation. Then, the data switching unit 705 transmits an address (4 bits in this example) of a register to which control data is to be written and control data (8 bits in this example). The start bit, the write identification bit, and the address are command data that instruct the register to perform an operation. The amount of control data is smaller than that of image data, and therefore the frequency of a clock signal to be output to the signal line CLK at the time of transmitting control data can be made lower than that at the time of transmitting image data. In this example, the frequency of the clock signal when reading or writing control data is 3MHz.

Fig. 10 illustrates signals of signal lines in the case of reading control data stored in a register in each light emitting chip 400. During communication, an enable signal that switches to a high level and indicates that communication is being performed is output to the signal line EN. The data switching unit 705 transfers the start bit to the signal line write in synchronization with the rising edge of the enable signal. Subsequently, the data switching unit 705 transmits a read flag indicating a read operation after the start bit. Then, the data switching unit 705 transmits the address of the register to read the control data.

The start bit, read identification bit, and address are command data that instruct the register to perform an operation. In response to the command data, the light emitting chip 400-n reads control data stored at an address specified by the command from the register, and outputs the control data to the signal line READn.

Fig. 11 is a functional block diagram of a single light emitting chip 400-n. As also illustrated in fig. 5, each light emitting chip 400 includes ten pads 408-1 to 408-10. The pads 408-1 and 408-2 are connected to a power supply voltage VCC through a power supply line. The power based on the power supply voltage VCC is supplied to one or more circuits of the circuit unit 406 of the light emitting chip 400. Pads 408-3 and 408-4 are connected to ground through a ground line.

One or more circuits of the circuit unit 406 and the upper electrode 508 are connected to ground via pads 408-3 and 408-4. The signal lines CLK, SYNC, and DATAn are connected to the image data holding unit 1103 via the pads 408-5 to 408-7. The image data holding unit 1103 and the pads 408-5 to 408-7 are connected to each other through signal lines corresponding to the signal lines CLK, SYNC, and DATAn. The signal lines EN, write EN, and READn are connected to a register (hereinafter, also referred to as a register unit) 1102 via pads 408-8 to 408-10. The register 1102 and the pads 408-8 to 408-10 are connected to each other through signal lines corresponding to the signal lines EN, write EN, and READn. A clock signal from the signal line CLK is also input to the register 1102. As described above, the register 1102 stores control data indicating control information. Details of the control information will be described below.

If the image data holding unit 1103 receives the image data corresponding to the light emitting point 602, the image data holding unit 1103 generates a drive signal for controlling the light emission of the light emitting point 602 based on the image data corresponding to the light emitting point 602, and outputs the drive signal to the current drive unit 1104.

Fig. 12 is a diagram illustrating a configuration of each driving unit 1104. The driving unit 1104 is connected one-to-one with the light emitting points 602. Although a single driving unit 1104 is described for convenience of description in the present exemplary embodiment, there are as many similar driving units 1104 as the number of light emitting points 602. That is, in the present exemplary embodiment, there are 748×4 columns=2992 driving circuits for a single light emitting element array chip.

Each drive unit 1104 includes a reference power supply 1200, a switch 1204, a digital-to-analog converter (DAC) 1201, a control Metal Oxide Semiconductor Field Effect Transistor (MOSFET) 1202, and a switching MOSFET 1203. The driving unit 1104 corresponds to a driving unit.

The reference power supply 1200 outputs a reference voltage and a reference current to be used by the driving unit 1104 based on a voltage VCC supplied from the power supply. That is, the reference power source 1200 corresponds to a voltage source. The DAC 1201 receives control data stored in the register unit 1102 as a digital value and divides a reference voltage, thereby generating a voltage (=analog value) according to the digital value based on the reference voltage. The DAC 1201 then outputs the generated voltage. That is, the control data corresponds to a digital signal.

The switch 1204 is configured to switch between an on state and an off state according to an instruction from the register unit 1102. If the switch 1204 is turned on, the reference voltage output from the reference power supply 1200 is supplied to the DAC 1201. If the switch 1204 is turned off, the electrical connection between the reference power supply 1200 and the DAC 1201 is disconnected, and the reference current and the reference voltage are not supplied to the DAC 1201. That is, the on state of the switch 1204 corresponds to the first state, and the off state of the switch 1204 corresponds to the second state. The on state and the off state of the switch 1204 are switched, whereby the connection state between the reference power source 1200 and the switch 1204 can be switched. When the switch 1204 is turned off, the DAC 1201 consumes no power, so that the power consumption of the light emitting chip 400 is reduced, and the heat generation of the light emitting chip 400 is reduced. Each of the reference power supply 1200, DAC 1201, and switch 1204 may be a single common circuit for the plurality of light emitting points 602.

The control MOSFET 1202 according to the present exemplary embodiment is a P-channel MOSFET. The source terminal of the control MOSFET 1202 is connected to the power supply voltage VCC, and the gate terminal of the control MOSFET 1202 is connected to the output of the DAC 1201. The control MOSFET 1202 has the following configuration: the larger the current flowing from DAC 1201 to the gate, the larger the current flowing from source to drain.

In the present exemplary embodiment, the switching MOSFET 1203 is also a P-channel MOSFET. The source terminal of the switching MOSFET 1203 is connected to the drain terminal of the control MOSFET 1202. The driving signal output from the image data holding unit 1103 is input to the gate terminal of the switching MOSFET 1203. The driving signal is a binary signal indicating a high level or a low level. When a high level signal is input, the switching MOSFET 1203 is turned on, and a current controlled by the control MOSFET 1202 flows from the source to the drain of the switching MOSFET 1203. The drain terminal of the switching MOSFET 1203 is connected to the light emitting layer 506 via the lower electrode 504. If a current flows through the drain terminal, the light emitting point 602 emits light. The light emission intensity of the light emission point 602 varies according to the current flowing through the light emission layer 506. The value of the current is controlled by the analog voltage output from the DAC 1201. That is, the light emission intensity of each light emission point 602 is controlled by the control data stored in the register 1102. The control data may individually indicate a digital value set for each of the DACs 1201 corresponding to the light-emitting points 602, or may indicate a single digital value set for a group of the plurality of light-emitting points 602.

Fig. 13 is a diagram illustrating a circuit example of the DAC 1201. DAC 1201 includes a plurality of resistors 1205, as many voltage dividing switches 1206 as resistors 1205, and decoder 1207. The reference current generated by the reference power supply 1200 flows to ground via a plurality of resistors 1205 connected together in series. The voltage dividing switch 1206 is connected to the resistor 1205.

The decoder 1207 turns on any one of the divided switches 1206 according to the setting value received from the register unit 1102. As a result, as many resistors 1205 as the number corresponding to the positions of the turned-on voltage dividing switch 1206 divide the reference voltage, and the divided voltage (analog value) is output from the DAC 1201. That is, the DAC 1201 corresponds to a D/a converter. If a reference voltage is supplied to the DAC 1201 regardless of whether the light emitting point 602 emits light, the resistor 1205 generates joule heat due to the supply of the voltage to the resistor 1205. In the present exemplary embodiment, when the switch 1204 is turned off, the reference voltage is not supplied to the DAC 1201. Accordingly, the resistor 1205 can be prevented from generating joule heat. That is, the DAC 1201 is prevented from generating heat. The DAC 1201 illustrated in fig. 13 is an example of a D/a converter according to the present exemplary embodiment. The D/a converter may use a method of dividing the reference voltage using a switching element without using a resistor. That is, the D/a converter may use another method such as a method for receiving a digital signal and outputting an analog signal.

Fig. 14 illustrates a timing chart of signals in the image controller unit 700 in the case where a print request is received from a user. For simplicity, fig. 14 illustrates a timing chart of signals in the case of forming an image in a single color.

If the device controller unit 708 receives a print request from the user, the device controller unit 708 confirms whether predetermined conditions under which the reading unit 100, the image forming apparatus 103, and the fixing unit 104 can perform printing are satisfied. Examples of the predetermined condition include whether the temperature of the fixing unit 104 satisfies a predetermined temperature at which the image can be fixed. If the device controller unit 708 confirms that the predetermined conditions under which the reading unit 100, the image forming device 103, and the fixing unit 104 can perform printing are satisfied, the device controller unit 708 transmits an loop signal to the image controller unit 700. The itop signal is a signal transmitted from the apparatus controller unit 708 to the image controller unit 700 based on an instruction given by the user to instruct the image forming apparatus to start an image forming job. That is, the device controller unit 708 corresponds to a transmission unit.

The image controller unit 700, which has received the itop signal from the device controller unit 708, transmits image data corresponding to the light emitting chips (400-1 to 400-20) after a predetermined time has elapsed. The light emitting chips (400-1 to 400-20) are controlled to be turned on based on the received image data, and a latent image is formed on the surface of the photosensitive drum by light emitted from the light emitting chip 400. That is, the image controller unit 700 starts transmitting image data to each light emitting chip 400 based on the timing at which the image controller unit 700 receives the itop signal. That is, the itop signal corresponds to the reference signal. The image data corresponds to an image signal.

In the case of performing an image forming job for continuously forming images on a plurality of recording media, a latent image of image data for a single page is formed on the surface of a photosensitive drum, and after an interval of a predetermined time, the next loop signal is transmitted. If the rotational speed of the photosensitive drum is constant, the image controller unit 700 determines that formation of the latent image of the image data of the single page is completed based on the first time elapsed as a predetermined time after the image controller unit 700 receives the itop signal. That is, the timing at which the first time elapses after the image controller unit 700 receives the itop signal corresponds to the first timing. The first time is defined by, for example, the image controller unit 700 transmitting a predetermined number of CLK signals to the light emitting chip 400.

At a first timing which is a timing when formation of an image of a single page is completed, the image controller unit 700 transfers register data for turning off the switch 1204 to the register unit 1102 in the light emitting chip 400. That is, the image controller unit 700 corresponds to a control unit. The switch 1204, which is switched to the off state by the image controller unit 700, is maintained in the off state until the switch 1204 is switched to the on state by the image controller unit 700. Through the above processing, the image controller unit 700 can determine that the formation of an image of a single page is completed, and block the voltage supplied to the DAC 1201 during a period in which the light emitting unit 602 does not need to emit light.

The image controller unit 700 transfers image data of a single page to the image data holding unit 1103 with respect to each line in the sub scanning direction. The image controller unit 700 may determine that formation of the latent image of the single page is completed when transfer of the image data of the last line in the sub-scanning direction in the single page to the image data holding unit 1103 is completed. That is, the timing at which the transfer of the image data of the last line in the sub-scanning direction in the single page to the image data holding unit 1103 is completed may be the first timing.

In the image forming apparatus according to the present exemplary embodiment, an alignment sensor (not shown) is mounted immediately before the alignment roller 110 on the conveyance path of the recording medium in the conveyance direction of the recording medium. The completion of the formation of the image of the single page may be determined based on the third time elapsed as the predetermined time after the front end of the recording medium is detected by the registration sensor. That is, the alignment sensor corresponds to the detection unit. The timing at which the third time elapses after the registration sensor detects the leading end of the recording medium corresponds to the third timing. The third time is a time at which an image is formed on the recording medium based on the latent image formed on the photosensitive drum when the third time has elapsed after the leading end of the recording medium is detected by the registration sensor. The third time is defined by, for example, the image controller unit 700 transmitting a predetermined number of CLK signals to the light emitting chip 400.

Based on the elapse of a second time, which is a predetermined time, after the image controller unit 700 receives the itop signal, the image controller unit 700 determines that the formation of the image data of the single page in the next page starts. That is, the timing at which the second time passes after the image controller unit 700 receives the itop signal corresponds to the second timing. The second time is longer than the first time, and is defined by, for example, the image controller unit 700 transmitting a predetermined number of CLK signals to the light emitting chip 400.

At a second timing, which is the timing of the start of image formation of the next page, the image controller unit 700 transfers register data for turning on the switch 1204 to the register unit 1102 in the light emitting chip 400. The switch 1204, which is switched to the on state by the image controller unit 700, is maintained in the on state until the switch 1204 is switched to the off state by the image controller unit 700. Through the above processing, the image controller unit 700 can determine the start of formation of an image of the next page, and supply current to the DAC 1201 during a period in which the light emitting unit 602 needs to emit light.

The image controller unit 700 transfers image data of a single page to the image data holding unit 1103 with respect to each line in the sub scanning direction. The image controller unit 700 may determine that formation of a latent image of a next page starts when transmitting image data of the first line in the sub-scanning direction in the next page to the image data holding unit 1103. That is, the timing at which the transfer of the image data of the first line in the sub-scanning direction in the next page to the image data holding unit 1103 is started may be the second timing.

The completion of the formation of the image of the single page may be determined based on the fourth time that is a predetermined time elapsed after the front end of the recording medium is detected by the registration sensor. That is, the timing at which the fourth time elapses after the registration sensor detects the leading end of the recording medium corresponds to the fourth timing. The fourth time is defined by, for example, the image controller unit 700 transmitting a predetermined number of CLK signals to the light emitting chip 400.

The image controller unit 700 performs the above processing, thereby turning off the supply of the reference voltage to the DAC 1201 during the period in which the light emitting chip 400 does not emit light, and preventing the generation of joule heat by the resistor 1205. Therefore, the DAC 1201 can be prevented from generating heat.

In the present exemplary embodiment, the timing at which the register data for turning off the switch 1204 is transferred to the register unit 1102 in the light emitting chip 400 is the first timing. However, the timing at which the switch 1204 is turned off is not limited thereto, and may be another timing. The timing at which the switch 1204 is turned off may be any timing during a period between the first timing and the second timing, for example.

In the present exemplary embodiment, the timing at which the register data for turning on the switch 1204 is transferred to the register unit 1102 in the light emitting chip 400 is the second timing. However, the timing at which the switch 1204 is turned on is not limited thereto, and may be another timing. The timing at which the switch 1204 is turned on may be any timing during a period between the timing at which the switch 1204 is turned off and the second timing, for example.

That is, during a period between the first period and the second period, a period in which the switch 1204 is switched to the off state corresponds to the first period. The start point of the first period may be a timing when a third time elapses after the registration sensor detects the leading end of the recording medium. In addition, the end point of the first period may be a timing at which a fourth time elapses after the registration sensor detects the front end of the recording medium.

Fig. 15 is a timing chart of signals in the case where images are formed in four colors of yellow (Y), magenta (M), cyan (C), and black (K). In the case of forming a color image, image forming units 101a, 101b, 101C, and 101d corresponding to yellow (Y), magenta (M), cyan (C), and black (K) in the image forming apparatus 103 are arranged in a direction of conveying a recording medium. The four image forming units 101a, 101b, 101c, and 101d start the formation of a yellow toner image, and after a predetermined time elapses, finished red, cyan, and black toner images are sequentially formed. The times T1, T2, and T3 in fig. 15 correspond to predetermined times of magenta, cyan, and black, respectively. After the time T1, T2, and T3 elapses after the yellow toner image is formed, magenta, cyan, and black toner images are formed, whereby a color image free from color misregistration can be formed on the recording medium. Even in the case of forming a color image, after the time T1, T2, and T3 have elapsed after the formation of a yellow image, processing similar to that in fig. 14 can be performed for magenta, cyan, and black, whereby the driving unit 1104 can be prevented from generating heat.

Fig. 16 is a flowchart of control of the register 1102 included in each light emitting chip 400 by the image controller unit 700 in the case of receiving a print request from a user.

If a print request is received from the user, in step S1301, the image controller unit 700 writes register data including the setting value of the DAC 1201 to the register unit 1102 in the light emitting chip 400.

In step S1302, based on the predetermined number of CLK signals being transmitted to the light emitting chips 400 after the image controller unit 700 receives the itop signal, the image controller unit 700 determines that the current timing is the printing start timing (yes in step S1302), and the process proceeds to step S1303.

In step S1303, before the start of printing, the image controller unit 700 sets the register unit 1102 in the light emitting chip 400 to turn on the switch 1204.

In step S1304, the image controller unit 700 transmits image data based on the image file instructed by the user to the 20 light emitting chips 400. The image controller unit 700 continues to transmit image data until printing of a single page is completed.

In step S1305, when the CLK signal is transmitted within a predetermined period after the image controller unit 700 receives the itop signal, the image controller unit 700 determines that printing of a single page is completed (yes in step S1305), and the process advances to step S1306.

In step S1306, the image controller unit 700 sets the register unit 1102 in the light emitting chip 400 to turn off the switch 1204.

In step S1307, if the registration sensor installed immediately before the registration roller 110 in the recording medium conveyance direction detects the leading end of the recording medium, the registration sensor transmits information indicating that the leading end of the recording medium is detected to the image controller unit 700. Based on the information indicating that the leading end of the recording medium is detected, the image controller unit 700 determines that the next page exists. If it is determined that there is a next page (yes in step S1307), the process returns to step S1302. Then, the image controller unit 700 performs steps S1302 to S1307.

In step S1307, if the front end and the rear end of the recording medium are not detected by the registration sensor (not shown) installed immediately before the registration roller 110 in the recording medium conveyance direction even after the predetermined time has elapsed, the registration sensor transmits information indicating that the front end and the rear end of the recording medium are not detected to the image controller unit 700. Based on the information indicating that the front end and the rear end of the recording medium are not detected for a predetermined time, the image controller unit 700 determines that there is no next page (no in step S1307), and the printing operation ends.

In the present exemplary embodiment, in a configuration in which the light emitting unit and the one or more driving circuits are formed on the same chip, the supply of current to the DAC 1201 included in each of the one or more driving circuits of the light emitting chip 400 is turned off at a timing at which printing is not performed, such as a timing between pages. Accordingly, the DAC 1201 included in each of the one or more driving circuits of the exposure head 106 can be prevented from generating heat. That is, the D/a converter that converts the digital signal into a voltage can be prevented from generating heat.

Fig. 17 is a flowchart regarding processing of writing of control data and reading of control data performed by the image controller 700 in the case where a print request is received from a user. In step S10, the image controller 700 WRITEs control data in parallel to the register 1102 in the light emitting chip 400 using the signal lines WRITE1 to WRITE 20. The control data includes data for controlling the light emission intensity of the light emission point 602. In step S11, the image controller 700 checks whether the control data is correctly written into the register 1102. Specifically, in step S11, the image controller 700 READs control data stored in the register 1102 in the light emitting chip 400 in parallel using the signal lines WRITE1 to WRITE20 and the signal lines READ1 to READ 20. In step S12, if the control data written in step S10 and the control data read from the register 1102 in step S11 do not match each other (no in step S12), the image controller 700 repeats the processing from step S10. The following configuration may also be employed: an upper limit of the number of repetitions of each of steps S10 and S11 is set in advance, and if the number of repetitions reaches the upper limit, the processing in fig. 17 is stopped, and an error is notified to the user.

If the control data written in step S10 and the control data read from the register 1102 in step S11 match each other (yes in step S12), the process proceeds to step S13 at the start timing of image formation. In step S13, the image controller 700 transfers image data to the light emitting chip 400 in parallel using the signal lines WRITE1 to WRITE 20. In step S14, the image controller 700 determines whether the formation of an image is completed. If the formation of the image is not completed (no in step S14), the image controller 700 repeats the processing from step S13. On the other hand, if the formation of the image is completed (yes in step S14), the process in fig. 17 ends.

The image forming apparatus also performs gradation correction control. For example, the image forming apparatus forms a test pattern for gradation correction control on a sheet. Fig. 18 illustrates an example of a test pattern used in the present exemplary embodiment. As illustrated in fig. 18, the test pattern includes five test images PT1 to PT5 having different densities. In the conveying direction of the sheet, an interval (pattern interval) is set between the test images PT1 to PT5. The user operates the image forming apparatus to cause the reading unit 100 to read the sheet on which the test pattern is formed. Accordingly, the image forming apparatus detects the density of each of the test images PT1 to PT5 included in the test pattern, and corrects the image forming condition on the density so that the density of each of the test images PT1 to PT5 approaches the target density. Specifically, for example, the image controller 700 rewrites the control data so that the density of each of the test images PT1 to PT5 approaches the target density.

Fig. 19 is a flowchart of a process performed by the image controller 700 when forming a test pattern. In step S20, the image controller 700 initializes an index q of the test image to 1. In step S21, the image controller 700 WRITEs control data for forming the test image PTq in parallel to the register 1102 in the light emitting chip 400 using the signal lines WRITE1 to WRITE 20. The control data includes data for controlling the light emission intensity of the light emission point 602. The data for controlling the light emission intensity of the light emission point 602 may also be referred to as data related to the magnitude of the voltage to be applied to the electrodes 504 and 508 or data related to the magnitude of the current to be supplied to the organic EL film. In step S22, the image controller 700 checks whether the control data is correctly written into the register 1102. Specifically, in step S22, the image controller 700 READs control data stored in the register 1102 in the light emitting chip 400 in parallel using the signal lines WRITE1 to WRITE20 and the signal lines READ1 to READ 20. In step S23, if the control data written in step S21 and the control data read from the register 1102 in step S22 do not match each other (no in step S23), the image controller 700 repeats the processing from step S21. The following configuration may also be employed: an upper limit of the number of repetitions of each of steps S21 and S22 is set in advance, and if the number of repetitions reaches the upper limit, the processing in fig. 19 is stopped, and an error is notified to the user.

If the control data written in step S21 and the control data read from the register 1102 in step S22 match each other (yes in step S23), the process proceeds to step S24 at the start timing of the formation of an image. In step S24, the image controller 700 transfers the image DATA on the test pattern to the signal lines DATA1 to DATA20 in parallel, and starts exposure of the photosensitive member 102. In step S25, the image controller 700 determines whether the formation of the test image PTq is completed. If the formation of the test image PTq is not completed (no in step S25), the image controller 700 repeats the processing from step S24. On the other hand, if the formation of the test image PTq is completed (yes in step S25), the image controller 700 determines whether q=5 is established in step S26. If q=5 does not hold (no in step S26), since formation of all the test images PT1 to PT5 of the test pattern is not completed, then in step S27, the image controller 700 increases the index q by 1. Then, the image controller 700 repeats the processing from step S21. On the other hand, if q=5 holds (yes in step S26), the process in fig. 19 ends.

In the present exemplary embodiment, the control data set in the register 1102 in step S21 changes the light emission intensity of the light emission point 602 according to the density of the test images PT1 to PT5 to be formed. Accordingly, the image data about the test pattern transmitted in step S24 may be the same regardless of the test images PT1 to PT5 to be formed.

As described above, the image controller 700 and each of the plurality of light emitting chips 400 are independently connected to each other via the dedicated signal line write en and the dedicated signal line READn, so that the image controller 700 can access the registers 1102 in the plurality of light emitting chips 400 in parallel. With this configuration, compared with a case where the image controller 700 sequentially accesses the light emitting chips 400 using the single signal line WRITE and the single signal line READ, the time for transmitting control data to the light emitting chips 400 can be shortened. Further, by rewriting control data in the register 1102, the exposure intensity can be changed in a short time. Therefore, when a plurality of test images having different densities are formed, the interval between the test images in the sheet conveying direction can be reduced. Accordingly, the number of test images that can be formed on the sheets can be increased, and the number of sheets (or the number of pages) used to form the test pattern can be reduced.

Although in the present exemplary embodiment, the image controller 700 and each of the plurality of light emitting chips 400 are independently connected to each other via the dedicated signal line write and the dedicated signal line READn, the connection method is not limited thereto. For example, the following configuration may be employed: there are a plurality of light emitting chip sets included in the plurality of light emitting chips 400, and each of the plurality of light emitting chip sets and the image controller 700 are connected to each other via the dedicated signal line write en and the dedicated signal line READn. At this time, the number of light emitting chip sets is not limited to two, and may be three or more. In addition, among the light emitting chip sets, the number of light emitting chips 400 included in each light emitting chip set may be different, and there may be a case where the number of light emitting chips 400 included in the light emitting chip set is one. The dedicated signal line write en and the dedicated signal line READn are shared in the light emitting chip set, whereby the number of signal lines can be reduced as compared with the case where the image controller 700 and each of the plurality of light emitting chips 400 are independently connected to each other via the dedicated signal line write en and the dedicated signal line READn. Therefore, the manufacturing cost of the exposure head 106 can be reduced.

Next, a second exemplary embodiment will be described mainly based on differences from the first exemplary embodiment. Fig. 20 illustrates a control configuration of each light emitting chip 400 according to the present exemplary embodiment. In the first exemplary embodiment, the signal lines READ1 to READ20 are provided one-to-one for the light emitting chips 400-1 to 400-20. In the present exemplary embodiment, the common signal line READ is used for all the light emitting chips 400-1 to 400-20. More specifically, a single (common) signal line READ is connected to the data switching unit 705 of the image controller 700. In the printed circuit board 202, a total of 20 signal lines (hereinafter, "intra-substrate signal line READ") from the light emitting chips 400-1 to 400-20 are connected to a single signal line READ. In the printed circuit board 202, the signal line READ is pulled up to a predetermined first potential via the pull-up resistor 1506.

Fig. 21 illustrates a timing chart when the control data is read from the register 1102 in the light emitting chips 400-1 to 400-20. In order to read the control data from the register 1102 in the light emitting chip 400-1, the image controller 700 transfers command data to the signal line WRITE1 in synchronization with the rising edge of the enable signal in the signal line EN. When the start bit (high level) of the command data is transferred to the signal line WRITE1, the signal lines WRITE2 to WRITE20 are fixed to low level. That is, the start bit is transmitted only to the signal line WRITE1, and is not transmitted to the signal lines WRITE2 to WRITE20. In response to command data from the image controller 700, the register 1102 in the light emitting chip 400-1 READs control data stored at an address specified by the command data, and outputs the control data to the signal line READ. Next, in order to read the control data from the register 1102 in the light emitting chip 400-2, the image controller 700 transfers command data to the signal line WRITE2 in synchronization with the rising edge of the enable signal in the signal line EN. In response to the command data from the image controller 700, the register 1102 in the light emitting chip 400-2 READs the control data stored at the address specified by the command data, and outputs the control data to the signal line READ. The image controller 700 repeats similar processing for the light emitting chips 400-3 to 400-20. The transmission of image data and the writing of control data are similar to those in the first exemplary embodiment.

Fig. 22 is a functional block diagram of the light emitting chip 400-n according to the present exemplary embodiment. In comparison with the light emitting chip 400-n according to the first exemplary embodiment, the light emitting chip 400-n according to the present exemplary embodiment includes a Field Effect Transistor (FET) 1701. Pad 408-10 is connected to an intra-substrate signal line READ and is also connected to the drain terminal of FET 1701. The source terminal of FET 1701 is connected to a second potential that is lower than the first potential to which pull-up resistor 1506 is connected, i.e., ground in this example. Then, the gate terminal of the FET 1701 is connected to the terminal of the register 1102 which transmits control data. The FET 1701 functions as a switching unit that is switched to an on state or an off state based on the level of a signal from the register 1102. In the on state, the intra-substrate signal line READ is connected to the second potential. In the off state, the connection of the intra-substrate signal line READ to the second potential is disconnected, and the intra-substrate signal line READ enters a high impedance state. When the register 1102 does not transfer control data to the image controller 700, the register 1102 switches the FET 1701 to the off state. As described above, with the FET 1701 and the pull-up resistor 1506, the intra-substrate signal line READ is configured as an open drain output (open drain output). On the other hand, when the register 1102 transmits control data to the image controller 700, the register 1102 switches the FET 1701 to an on state or an off state according to the data value. In the on state, a signal at a low level based on the second potential is output to the signal line READ. On the other hand, in the case of the off state, a signal at a high level based on the first potential is output to the signal line READ through the pull-up resistor 1506 of the printed circuit board 202.

As described above, the intra-substrate signal line READ is configured as an open drain output, whereby the pads 408-10 of the other light emitting chips 400 enter a high impedance state when the control data is READ from the register 1102 in a certain light emitting chip 400. Therefore, the potential from the other light emitting chips 400 to the intra-substrate signal line READ does not affect the signal line READ, and the single signal line READ can be shared.

In the present exemplary embodiment, the processing performed in the case where a print request is received from a user is similar to that in the first exemplary embodiment illustrated in fig. 17. However, the reading of the control data from the light emitting chips 400-1 to 400-20 in step S11 cannot be performed in parallel, but is performed sequentially. The same applies to the process for forming a test pattern in fig. 19.

Therefore, in the present exemplary embodiment, it takes more time to read the control data from the light emitting chip 400 than in the first exemplary embodiment. Meanwhile, the time for transmitting the control data to the light emitting chip 400 may be shortened. In the present exemplary embodiment, the number of signal lines READ can also be reduced as compared with the first exemplary embodiment, and as a result, the cost can be reduced.

The third exemplary embodiment will be described mainly based on differences from the first and second exemplary embodiments. In the first and second exemplary embodiments, the image controller 700 transmits image data to the light emitting chips 400-n using the signal line DATAn, and transmits control data to the light emitting chips 400-n using the signal line WRITEn. When the image controller 700 transmits image data to the light emitting chips 400-n, the image controller 700 transmits a line synchronization signal to the signal line SYNC. When the image controller 700 accesses the register 1102 in the light emitting chip 400-n, the image controller 700 transmits an enable signal to the signal line EN. In the present exemplary embodiment, the image controller 700 transmits image data and control data to the light emitting chips 400-n using the signal line DATAn, and transmits a line synchronization signal and an enable signal using the signal line SYNC. That is, in the present exemplary embodiment, the signal lines write EN and EN are not used. Therefore, although a total of ten pads 408-1 to 408-10 are provided in each light emitting chip 400 as illustrated in fig. 5 in the first and second exemplary embodiments, a total of eight pads 408-1 to 408-8 are provided in each light emitting chip 400 in the present exemplary embodiment.

Fig. 23 to 25 illustrate signals of the signal lines in the case where the data switching unit 705 outputs various types of data to each light emitting chip 400. In fig. 23 to 25, if the level of the signal is high (Hi in the drawing), the bit value is "1". If the level of the signal is low (in the figure, "Lo"), the bit value is "0".

Fig. 23 illustrates a case where the data type is "image". If the data type is "image", a line synchronization signal indicating the exposure timing of a single line in the photosensitive member 102 is output to the signal line SYNC. In this example, the circumferential speed of the photosensitive member 102 is 200mm/s, and the resolution in the sub-scanning direction is 1200dpi (about 21.16 μm). Accordingly, the line synchronization signal is output at a period of about 105.8 μm, which is a period in which the surface of the photosensitive member 102 moves by about 21.16 μm. The data switching unit 705 transmits an identification bit having a value "11" indicating that the data type is "image" to the signal line DATAn in synchronization with the rising edge of the row synchronization signal. Then, the data switching unit 705 transmits the image data. In the present exemplary embodiment, since each light emitting chip 400 includes 2992 light emitting points 602, the data switching unit 705 needs to transmit image data indicating whether each of the 2992 light emitting points 602 in total emits light or not within a period of about 105.8 μs. In order to transmit image data of 2992 light emitting points 602 in total within a period of about 105.8 μs, in this example, as illustrated in fig. 23, at the time of transmitting image data, the data switching unit 705 sets the frequency of the clock signal to be transmitted to the signal line CLK to 30MHz.

Fig. 24A and 24B illustrate a case where the data type is "control". Fig. 24A illustrates a case where control data is written into a register 1102 in each light emitting chip 400. Fig. 24B illustrates a case of reading control data stored in a register 1102 in each light emitting chip 400. If the data type is "control", during communication, an enable signal that switches to a high level and indicates that communication is being performed is output to the signal line SYNC. The data switching unit 705 transmits an identification bit having a value of "10" indicating that the data type is "control" to the signal line DATAn in synchronization with the rising edge of the enable signal. In the case of writing control data, the data switching unit 705 transmits a write flag indicating a write operation after the flag. Then, the data switching unit 705 transmits the address (4 bits in this example) of the register to which the control data is to be written and the control data (8 bits in this example). The order of transmission of address and control data may be reversed. In the case where the control data is read, the data switching unit 705 transmits a read identification bit indicating a read operation after the identification bit. Then, the data switching unit 705 transmits the address of the register from which the control data is to be read. In this case, the light emitting chip 400-n reads control data stored at a specified address from the register 1102 and outputs the control data to the signal line READn. The amount of control data is smaller than that of image data, and therefore the frequency of the clock signal to be output to the signal line CLK can be made lower than that when the image data is transmitted. As an example, the frequency of the clock signal when reading or writing control data may be 3MHz. However, the following configuration may be adopted: the frequency of the clock signal when reading or writing the control data is the same as that when the image data is transmitted.

Fig. 25 illustrates a case where the data type is "disabled". If the data type is "disabled", a trigger signal indicating the transmission of the identification bit is output to the signal line SYNC. The data switching unit 705 transmits an identification bit having a value of "0x" indicating that the data type is "disabled" to the signal line DATAn in synchronization with the rising edge of the trigger signal. In the case where the data type "disable" is transmitted, the data switching unit 705 may make the frequency of the clock signal to be output to the signal line CLK the same as that when the image data is transmitted. Alternatively, in the case where the data type "disable" is transmitted, the data switching unit 705 may make the frequency of the clock signal to be output to the signal line CLK the same as that when the image controller 700 accesses the register 1102. In addition, in the case where the data type "disabled" is transmitted, the data switching unit 705 may make the frequency of the clock signal to be output to the signal line CLK the same as the frequency before the data type "disabled" is transmitted. Further, in the case where the data type "disabled" is transmitted, the data switching unit 705 may set the frequency of the clock signal to be output to the signal line CLK to a predetermined value different from the frequency at the time of transmitting the image data and the time when the image controller 700 accesses the register 1102.

Fig. 26 is a functional block diagram of the light emitting chip 400-n according to the present exemplary embodiment. In the present exemplary embodiment, an interface circuit 1101 is provided in the circuit unit 406. The interface circuit 1101 is connected to the signal lines CLK, SYNC, DATAn and READn via the pads 408-5 to 408-8.

Based on the identification bit received using the signal line DATAn in synchronization with the rising edge of the signal received using the signal line SYNC, the interface circuit 1101 manages the state of the interface circuit 1101. Fig. 27 is a state transition diagram of the interface circuit 1101. The initial state when power is supplied based on the power supply voltage VCC is a disabled state. In the disabled state, if an identification bit indicating the type "disabled" is received, the interface circuit 1101 remains in the disabled state. In the disabled state, the interface circuit 1101 receives only the identification bit and does not transmit data to another circuit.

In the disabled state, if an identification bit indicating the type "image" is received, the interface circuit 1101 transitions to the image receiving state. In this case, the interface circuit 1101 transfers the image data received using the signal line DATAn after the identification bit to the image data holding unit 1103. At this time, the interface circuit 1101 also transmits a clock signal received using the signal line CLK and a row synchronization signal received using the signal line SYNC to the image data holding unit 1103. In the image receiving state, if an identification bit indicating the type "image" is received, the state of the interface circuit 1101 does not transition, and the interface circuit 1101 transfers image data received using the signal line DATAn after the identification bit to the image data holding unit 1103. On the other hand, in the image receiving state, if an identification bit indicating the type "disable" is received, the interface circuit 1101 transitions to the disabled state.

In the disabled state, if an identification bit indicating the type "control" is received, the interface circuit 1101 transitions to the control state. In this case, the interface circuit 1101 writes control data to the register 1102 or reads control data stored in the register 1102 based on data received using the signal line DATAn after the identification bit. At this time, the interface circuit 1101 transmits a clock signal received using the signal line CLK and an enable signal received using the signal line SYNC to the register 1102. In the control state, if an identification bit indicating the type "control" is received, the state of the interface circuit 1101 does not transition, and the interface circuit 1101 writes control data to the register 1102 or reads control data from the register 1102 based on data received using the signal line DATAn after the identification bit. On the other hand, in the control state, if an identification bit indicating the type "disable" is received, the interface circuit 1101 transitions to the disable state.

On the other hand, in the image receiving state, if the identification bit indicating the type "control" is received, the interface circuit 1101 remains in the image receiving state and does not transition to another state. In this case, the interface circuit 1101 determines that the data received using the signal line DATAn until the next identification bit is received is neither image data nor control data. Then, the interface circuit 1101 discards the received data, and does not output the received data to another circuit. Similarly, in the control state, if an identification bit indicating the type "image" is received, the interface circuit 1101 remains in the control state and does not transition to another state. In this case, the interface circuit 1101 determines that the data received using the signal line DATAn until the next identification bit is received is neither image data nor control data. Then, the interface circuit 1101 discards the received data, and does not output the received data to another circuit.

As described above, in the present exemplary embodiment, the direct transition from the image receiving state to the control state and the direct transition from the control state to the image receiving state are prohibited. This is to prevent the interface circuit 1101 from malfunctioning due to an error occurring in the identification bit received by the interface circuit 1101 by noise or static electricity from the outside. That is, in the present exemplary embodiment, transition between the "image receiving state" and the "control state" is performed via the "disabled state", and the data type "disabled" is provided to cause the interface circuit 1101 to transition to the "disabled state".

If the image data holding unit 1103 receives image data of a single line based on the line synchronization signal, the image data holding unit 1103 generates a drive signal for controlling light emission of the light emitting point 602 based on the image data, and outputs the drive signal to the current drive unit 1104.

As described above, also in the present exemplary embodiment, the control DATA is transmitted in parallel to the light emitting chips 400 using the dedicated signal lines DATA1 to DATA20 corresponding to the light emitting chips 400-1 to 400-20, respectively. Accordingly, the time for transmitting the control data to the light emitting chip 400 can be shortened. In addition, in the present exemplary embodiment, the signal lines DATA1 to DATA20 are shared for transmission of image DATA and transmission of control DATA. Therefore, the number of signal lines can be reduced as compared with the first exemplary embodiment, and as a result, the cost can be reduced.

In order to inform each light emitting chip 400 of whether DATA to be transmitted to a shared signal line (i.e., signal line DATA) is control DATA or image DATA, identification information indicating the type of DATA is transmitted using the signal line DATA before the DATA is transmitted. As a result, the interface circuit 1101 can determine whether the data transmitted from the image controller 700 is control data or image data. That is, the number of signal lines for connecting the image controller 700 and the printed circuit board 202 can be reduced, and it is also possible to control the turning on and off of the light emitting point 602 and adjust the amount of current supplied to the light emitting point 602 (voltage to be applied to the electrodes 504 and 508). That is, it is possible to prevent an increase in cost of the image forming apparatus and also control light emission of the light emitting point 602.

In the present exemplary embodiment, when the image controller 700 switches the data types "control" and "image", the image controller 700 first transmits the data type "disable" and then switches to the other data types. With this configuration, it is possible to prevent the image forming apparatus from malfunctioning due to erroneous detection of the data type by disturbance such as noise or static electricity.

In the present exemplary embodiment, as described above, the "image receiving state" and the "control state" of the interface circuit 1101 are shifted from each other via the "disabled state". Accordingly, the data switching unit 705 transmits an identification bit indicating type "disable" after image data is transmitted or after access to the register 1102 is completed. However, the following configuration may be adopted: a direct transition between the "image receiving state" and the "control state" is allowed without providing the "disabled state". In this case, the data switching unit 705 transmits only the identification bit indicating the type "image" before the image data is transmitted, or transmits only the identification bit indicating the type "control" before the image controller 700 accesses the register 1102. Even with such a configuration, the number of signal lines for connecting the image controller 700 and the printed circuit board 202 can be reduced.

In fig. 26, similar to the first exemplary embodiment, dedicated signal lines READ1 to READ20 are provided for the light emitting chips 400-1 to 400-20, respectively. However, similar to the second exemplary embodiment, a configuration in which a single signal line READ common to the light emitting chips 400 is provided may also be employed.

Although specific values are used for illustration purposes in the above exemplary embodiments, these specific values are merely illustrative, and the present disclosure is not limited to the specific values used in the exemplary embodiments. Specifically, the number of light emitting chips 400 provided in a single printed circuit board 202 is not limited to 20, and may be any number greater than or equal to 1. The number of light emitting points 602 included in each light emitting chip 400 is also not limited to 2992, and may be any other number. Although in the above-described exemplary embodiment, the single light emitting chip 400 includes four sets of 748 light emitting points placed along the main scanning direction, the number of sets may be any number greater than or equal to 1. Although the light emitting points 602 are placed at a pitch of about 21.16 μm corresponding to a resolution of 1200dpi in the main scanning direction, the placement interval between the light emitting points 602 may have any other value.

In the above exemplary embodiment, the image forming apparatus transfers the toner image formed on the photosensitive member 102 to the sheet conveyed on the transfer belt 111. However, the image forming apparatus may transfer the toner image on the photosensitive member 102 to the sheet via the intermediate transfer member. The image forming apparatus may be a color image forming apparatus that forms an image using toners of a plurality of colors, or may be a monochrome image forming apparatus that forms an image using toners of a single color.

Next, a fourth exemplary embodiment will be described mainly based on differences from the first to third exemplary embodiments. When the image forming apparatus according to each of the first to third exemplary embodiments performs gradation correction control, the image forming apparatus forms a test pattern for gradation correction control on a sheet. Then, the user causes the reading unit 100 to read the sheet on which the test pattern is formed. The image forming apparatus detects the density of each of the test images PT1 to PT5 included in the test pattern, and corrects the image forming condition on the density so that the density of each of the test images PT1 to PT5 approaches the target density. Specifically, for example, the image controller 700 rewrites the control data so that the density of each of the test images PT1 to PT5 approaches the target density.

Fig. 28 is a diagram illustrating an image forming apparatus 120 according to the present exemplary embodiment. The image forming apparatus 120 according to the present exemplary embodiment can be applied to each of the first to third exemplary embodiments.

The image forming units 20a, 20b, 20C, and 20d form yellow (Y), magenta (M), cyan (C), and black (K) toner images, respectively. In the following description, a plurality of components that are similar or identical to each other are denoted by the same reference numerals. When distinguishing a plurality of components from one another, alphabetic letters are added at the end of the reference numerals. When describing items common to a plurality of components, alphabetic letters at the end of reference numerals are omitted. The exposure head 23 in the following description has a configuration similar to that of the exposure head 106 described in each of the first to third exemplary embodiments.

The photosensitive member 21 is an image bearing member that bears an electrostatic latent image and a toner image. The charging device 22 charges the surface of the photosensitive member 21. The exposure head 23 exposes the photosensitive member 21, thereby forming an electrostatic latent image. The developing device 24 develops the electrostatic latent image with toner, thereby forming a toner image. The primary transfer roller 25 transfers the toner image from the photosensitive member 21 to the intermediate transfer belt 27. The intermediate transfer belt 27 conveys the toner image to the secondary transfer device 28.

The feeding apparatus 1 feeds the sheet P held in the sheet storage to a conveying path. The conveying apparatus 2 conveys the sheet P to the registration apparatus 3. The registration apparatus 3 corrects skew of the sheet P and conveys the sheet P to the secondary transfer apparatus 28.

The secondary transfer apparatus 28 transfers the toner image from the intermediate transfer belt 27 to the sheet P. The fixing device 29 applies heat and pressure to the sheet P, thereby fixing the toner image onto the sheet P. The discharge/conveyance apparatus 4 conveys the sheet P to which the toner image is fixed and discharges it to the outside of the image forming device 120.

In the present exemplary embodiment, a current based on the value of the control data set on the basis of the test pattern is supplied to the light emitting unit, and as a result, the photosensitive member 21 is exposed. During an image forming job for forming images on a plurality of sheets, if the number of sheets on which images are formed reaches a predetermined number, the image forming apparatus 120 forms a plurality of block images for gradation correction control on the intermediate transfer belt 27. For example, the densities of the plurality of patch images correspond to the densities of the test images PT1 to PT5 according to the first exemplary embodiment.

The image controller 700 causes the sensor 30 disposed adjacent to the intermediate transfer belt 27 to read patch images formed on the intermediate transfer belt 27, and detects the density of each of the patch images. For example, the image controller 700 rewrites the control data so that the density of each of the patch images approaches the target density. The target density corresponds to the target density when the control data is set based on the test pattern (fig. 18). In order to write control data, the configuration of any one of the first to third exemplary embodiments is applied.

Alternatively, if the number of sheets on which images are formed reaches a predetermined number, the image forming apparatus 120 may stop conveyance of the sheets (image forming job) once and form a plurality of patch images having densities corresponding to the test images PT1 to PT5 on the intermediate transfer belt 27. The image controller 700 may cause the sensor 30 to read a plurality of block images. Then, the image controller 700 may rewrite the control data based on the read result. If the overwriting of the control data is completed, the image forming apparatus 120 may resume the image forming job.

In the image forming job, the image forming apparatus 120 may form an electrostatic latent image corresponding to a patch image having a density corresponding to the test image PT1 on the photosensitive member 21 (i.e., form a patch image on the intermediate transfer belt 27) during a period from when the electrostatic latent image of the first page is formed on the photosensitive member 21 to when the electrostatic latent image of the second page subsequent to the first page is formed on the photosensitive member 21. Then, during a period from when the electrostatic latent image of the second page is formed on the photosensitive member 21 to when the electrostatic latent image of the third page subsequent to the second page is formed on the photosensitive member 21, the image forming apparatus 120 may form an electrostatic latent image corresponding to a patch image having a density corresponding to the test image PT2 on the photosensitive member 21 (i.e., form a patch image on the intermediate transfer belt 27). As described above, the image forming apparatus 120 may form an electrostatic latent image corresponding to a patch image on the photosensitive member 21 (i.e., form a patch image on the intermediate transfer belt 27) during a period from when an electrostatic latent image of a single page is formed on the photosensitive member 21 to when a latent image of a next page subsequent to the page is formed on the photosensitive member 21. Each time a block image is formed, the image controller 700 may cause the sensor 30 to read the block image. If the read results of the test images PT1 to PT5 are obtained, the image controller 700 may rewrite the control data based on the read results.

As described above, the image controller 700 and each of the plurality of light emitting chips 400 are independently connected to each other via the dedicated signal line write en and the dedicated signal line READn, so that the image controller 700 can access the registers 1102 in the plurality of light emitting chips 400 in parallel. With this configuration, compared with a case where the image controller 700 sequentially accesses the light emitting chips 400 using the single signal line WRITE and the single signal line READ, the time for transmitting control data to the light emitting chips 400 can be shortened. Such a configuration is particularly effective in the case where it is necessary to form a block image (rewriting control data) in a relatively short period of time, for example, in the case where an electrostatic latent image corresponding to the block image (i.e., a block image is formed on the intermediate transfer belt 27) is formed on the photosensitive member 21 during a period from when an electrostatic latent image of a single page is formed on the photosensitive member 21 to when an electrostatic latent image of a next page subsequent to the page is formed on the photosensitive member 21. In the gradation correction control described in the present exemplary embodiment, instead of detecting the densities of the plurality of test images PT1 to PT5 on the sheet P described in the first exemplary embodiment, the densities of the plurality of patch images on the intermediate transfer belt 27 are detected. Therefore, the plurality of block images according to the present exemplary embodiment may be regarded as the plurality of test images according to the first exemplary embodiment.

Next, a fifth exemplary embodiment will be described mainly based on differences from the first to fourth exemplary embodiments. In the present exemplary embodiment, as illustrated in fig. 29, a temperature sensor 31 for detecting the temperature of the printed circuit board 202 (the temperature of the light emitting chip 400, or the temperature of the light emitting point or the light emitting unit 602) is provided on the surface of the printed circuit board 202 on which the light emitting point group 201 is mounted. The temperature sensor 31 may be provided on a surface of the printed circuit board 202 on the opposite side of the surface on which the light-emitting point group 201 is mounted (fig. 3A).

Fig. 30 is a diagram illustrating a relationship between the amount of light and the temperature of the light emitting unit 602 when a predetermined current is supplied to the light emitting unit 602. The relationship illustrated in fig. 30 is merely an example, and the relationship between temperature and light amount is not necessarily expressed linearly.

As illustrated in fig. 30, the higher the temperature, the greater the amount of light emitted from the light emitting unit 602 supplied with a predetermined current. In the present exemplary embodiment, for example, the relationship between the temperature and the light amount of each chip illustrated in fig. 30 is stored in a memory provided in the image controller 700. Based on the detection result of the temperature sensor 31 and the relationship between the temperature and the amount of light stored in the memory, the image controller 700 rewrites the control data stored in the register 1102, for example, so that if the temperature increases, the current supplied to the light emitting unit 602 decreases.

For example, in an image forming job for forming images on a plurality of sheets, control data is rewritten during a period from when an image of a single page is formed on the intermediate transfer belt 27 to when an image of a next page subsequent to the page is formed on the intermediate transfer belt 27.

As described above, the image controller 700 and each of the plurality of light emitting chips 400 are independently connected to each other via the dedicated signal line write en and the dedicated signal line READn, so that the image controller 700 can access the registers 1102 in the plurality of light emitting chips 400 in parallel. With this configuration, compared with a case where the image controller 700 sequentially accesses the light emitting chips 400 using the single signal line WRITE and the single signal line READ, the time for transmitting control data to the light emitting chips 400 can be shortened. Such a configuration is particularly effective in the case where rewriting control data is required during a period from when an electrostatic latent image of a single page is formed on the photosensitive member 21 to when an electrostatic latent image of a next page subsequent to the page is formed on the photosensitive member 21.

Although specific values are used for illustration purposes in the above exemplary embodiments, these specific values are merely illustrative, and the present disclosure is not limited to the specific values used in the exemplary embodiments. Specifically, the number of light emitting chips 400 provided in a single printed circuit board 202 is not limited to 20, and may be any number greater than or equal to 1. The number of light emitting points 602 included in each light emitting chip 400 is also not limited to 2992, and may be any other number. Although in the present exemplary embodiment, the single light emitting chip 400 includes four sets of 748 light emitting points placed along the main scanning direction, the number of sets may be any number greater than or equal to 1. Although the light emitting points 602 are placed at a pitch of about 21.16 μm corresponding to a resolution of 1200dpi in the main scanning direction, the placement interval between the light emitting points 602 may have any other value.

Other exemplary embodiments

The present disclosure can also be realized by the following processes: the program for realizing one or more functions of the above-described exemplary embodiments is supplied to a system or apparatus via a network or a storage medium, and one or more processors in a computer of the system or apparatus read and execute the program. In addition, the present disclosure may also be implemented by circuitry (e.g., an Application Specific Integrated Circuit (ASIC)) capable of performing one or more functions.

The present disclosure is not limited to the above exemplary embodiments, and may be changed and modified in various ways without departing from the spirit and scope of the present disclosure. Accordingly, the appended claims are intended to disclose the scope of the present disclosure.

According to the present disclosure, the D/a converter converting a digital signal into a voltage can be prevented from generating heat.

Embodiments of the present disclosure may also perform one or more of the above-described embodiments by reading out and executing computer-executable instructions (e.g., one or more programs) recorded on a storage medium (which may also be more fully referred to as a "non-transitory computer-readable storage medium")And/or a computer comprising a system or apparatus for performing the functions of one or more of the above embodiments (e.g., an Application Specific Integrated Circuit (ASIC)), by, for example, reading and executing computer-executable instructions from a storage medium to perform the functions of one or more of the above embodiments and/or controlling one or more circuits to perform the functions of one or more of the above embodiments, by a method performed by a computer of the system or apparatus. The computer may include one or more processors (e.g., a Central Processing Unit (CPU), a micro-processing unit (MPU)), and may include a separate computer or a network of separate processors to read out and execute the computer-executable instructions. The computer-executable instructions may be provided to the computer, for example, from a network or a storage medium. The storage medium may include, for example, a hard disk, random Access Memory (RAM), read Only Memory (ROM), storage for a distributed computing system, an optical disk (such as a Compact Disk (CD), digital Versatile Disk (DVD), or blu-ray disc (BD) ^TM ) One or more of a flash memory device, memory card, etc.

OTHER EMBODIMENTS

The embodiments of the present invention can also be realized by a method in which software (program) that performs the functions of the above embodiments is supplied to a system or apparatus, a computer of the system or apparatus or a method in which a Central Processing Unit (CPU), a Micro Processing Unit (MPU), or the like reads out and executes the program, through a network or various storage mediums.

While the present disclosure has been described with reference to exemplary embodiments, it is to be understood that the present disclosure is not limited to the disclosed exemplary embodiments. The scope of the following claims is to be accorded the broadest interpretation so as to encompass all such modifications and equivalent structures and functions.

Claims

1. An image forming apparatus that forms an image on a recording medium, the image forming apparatus comprising:

a photosensitive drum;

a light emitting chip including a light emitting portion configured to emit light for exposing a surface of the photosensitive drum based on a supply of a driving current to the light emitting portion according to an image signal, and including a driving portion configured to drive the light emitting portion;

A substrate on which a plurality of light emitting chips are mounted; and

a controller configured to control the driving part by transmitting a signal to the light emitting chip and output a digital signal corresponding to a target light amount of the light emitting part to the light emitting chip,

wherein, the light emitting chip further includes:

a voltage source configured to output a reference voltage;

a digital-to-analog (D/a) converter configured to convert the digital signal into a voltage corresponding to the digital signal based on a reference voltage output from the voltage source; and

a switch configured to switch a connection state between the voltage source and the D/a converter to a first state in which the voltage source and the D/a converter are connected to each other and the voltage source supplies the reference voltage to the D/a converter, and a second state in which an electrical connection between the voltage source and the D/a converter is disconnected, based on a control signal from the controller.

2. The image forming apparatus according to claim 1,

wherein the D/A converter includes a resistor and is configured to supply the reference voltage to the resistor to generate a voltage corresponding to the digital signal,

Wherein the first state is a state in which the voltage source and the resistor are connected to each other and the voltage source supplies the reference voltage to the resistor, and

wherein the second state is a state in which an electrical connection between the voltage source and the resistor is broken.

3. The image forming apparatus according to claim 1, wherein the controller controls the switch to the second state during a first period in a period between a first timing, which is a timing at which transmission of image data of a single page is completed, and a second timing, which is a timing at which transmission of image data of a next page is started, during execution of an image forming job for continuously forming images on a plurality of recording media.

4. The image forming apparatus according to claim 3, further comprising a transmission section configured to transmit a reference signal to the controller based on an instruction given by a user instructing the image forming apparatus to start the image forming job,

wherein the controller starts transmission of the image data based on reception of the reference signal transmitted from the transmission section, and

Wherein the first timing is a timing at which a first time elapses after the controller receives the reference signal.

5. The image forming apparatus according to claim 4, wherein the second timing is a timing at which a second time passes after the controller receives the reference signal, the second time being longer than the first time.

6. The image forming apparatus according to claim 3, further comprising a detecting portion configured to detect a front end of the recording medium,

wherein the detecting portion is provided on a conveyance path of the recording medium, and a start point of the first period is a third timing at which a third time elapses after the detecting portion detects the leading end of the recording medium.

7. The image forming apparatus according to claim 6, wherein the end point of the first period is a timing at which a fourth time elapses after the detection portion detects the trailing end of the recording medium.

8. The image forming apparatus according to claim 3, wherein the controller is configured to control the switch to be switched to the first state during a second period from when transmission of image data of a single page starts to when transmission of image data of a single page completes.

9. The image forming apparatus according to claim 1, wherein the light emitting portion includes an organic Electroluminescent (EL) film.

10. The image forming apparatus according to claim 9,

wherein the driving section is a first driving section, the image forming apparatus further includes a second driving section including the D/A converter and the switch, and

wherein the organic EL film is formed on the second driving portion, and the organic EL film and the second driving portion are integrated together.

11. A light emitting device in which a plurality of light emitting portions configured to emit light based on supply of a driving current to the plurality of light emitting portions according to an image signal and a driving portion configured to drive the plurality of light emitting portions are built, comprising:

a voltage source configured to output a reference voltage;

a digital-to-analog (D/a) converter provided corresponding to each of the plurality of light emitting portions and configured to convert a digital signal corresponding to a target light amount of the plurality of light emitting portions into a voltage corresponding to the digital signal based on the reference voltage; and

A switch provided corresponding to each of the plurality of light emitting portions and configured to switch a connection state between the voltage source and the D/a converter to a first state in which the voltage source and the D/a converter are connected to each other and the voltage source supplies the reference voltage to the D/a converter and a second state in which an electrical connection between the voltage source and the D/a converter is disconnected.

12. The light-emitting device according to claim 11,

13. The light-emitting device according to claim 11, wherein the plurality of light-emitting portions comprise an organic Electroluminescent (EL) film.