CN117055151A - Hybrid integration-based heterogeneous photoelectric fusion integrated chip and method - Google Patents
Hybrid integration-based heterogeneous photoelectric fusion integrated chip and method Download PDFInfo
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- CN117055151A CN117055151A CN202210518512.1A CN202210518512A CN117055151A CN 117055151 A CN117055151 A CN 117055151A CN 202210518512 A CN202210518512 A CN 202210518512A CN 117055151 A CN117055151 A CN 117055151A
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- 230000010354 integration Effects 0.000 title claims abstract description 41
- 238000000034 method Methods 0.000 title claims abstract description 25
- 230000004927 fusion Effects 0.000 title claims abstract description 20
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 78
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 78
- 239000010703 silicon Substances 0.000 claims abstract description 78
- ZNTNOUPVDYWPHO-UHFFFAOYSA-N [Li].[Si]=O.[Si] Chemical compound [Li].[Si]=O.[Si] ZNTNOUPVDYWPHO-UHFFFAOYSA-N 0.000 claims abstract description 38
- GQYHUHYESMUTHG-UHFFFAOYSA-N lithium niobate Chemical compound [Li+].[O-][Nb](=O)=O GQYHUHYESMUTHG-UHFFFAOYSA-N 0.000 claims abstract description 22
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 18
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 18
- 239000010410 layer Substances 0.000 claims description 88
- 238000005516 engineering process Methods 0.000 claims description 22
- 229910052751 metal Inorganic materials 0.000 claims description 18
- 239000002184 metal Substances 0.000 claims description 18
- 239000000758 substrate Substances 0.000 claims description 13
- 238000002955 isolation Methods 0.000 claims description 10
- ZVLDJSZFKQJMKD-UHFFFAOYSA-N [Li].[Si] Chemical compound [Li].[Si] ZVLDJSZFKQJMKD-UHFFFAOYSA-N 0.000 claims description 9
- 230000008878 coupling Effects 0.000 claims description 9
- 238000010168 coupling process Methods 0.000 claims description 9
- 238000005859 coupling reaction Methods 0.000 claims description 9
- 238000005530 etching Methods 0.000 claims description 9
- 239000010408 film Substances 0.000 claims description 8
- 229910052732 germanium Inorganic materials 0.000 claims description 8
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 8
- 230000003287 optical effect Effects 0.000 claims description 8
- 238000001465 metallisation Methods 0.000 claims description 5
- 238000000151 deposition Methods 0.000 claims description 4
- 238000003466 welding Methods 0.000 claims description 4
- 230000005540 biological transmission Effects 0.000 claims description 3
- 230000008021 deposition Effects 0.000 claims description 3
- 238000012545 processing Methods 0.000 claims description 3
- 238000006243 chemical reaction Methods 0.000 claims description 2
- 239000011229 interlayer Substances 0.000 claims description 2
- 238000005476 soldering Methods 0.000 claims description 2
- 238000000427 thin-film deposition Methods 0.000 claims description 2
- 239000000463 material Substances 0.000 abstract description 20
- 239000002210 silicon-based material Substances 0.000 abstract description 16
- -1 III-V Chemical compound 0.000 abstract description 2
- 239000010409 thin film Substances 0.000 description 4
- 230000007547 defect Effects 0.000 description 3
- 125000005842 heteroatom Chemical group 0.000 description 3
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 2
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 239000006185 dispersion Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000013386 optimize process Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B2006/12035—Materials
- G02B2006/12038—Glass (SiO2 based materials)
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B2006/12035—Materials
- G02B2006/1204—Lithium niobate (LiNbO3)
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B2006/12083—Constructional arrangements
- G02B2006/12121—Laser
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B2006/12133—Functions
- G02B2006/12142—Modulator
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B2006/12133—Functions
- G02B2006/12147—Coupler
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B2006/12133—Functions
- G02B2006/12159—Interferometer
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Optical Integrated Circuits (AREA)
- Semiconductor Lasers (AREA)
Abstract
A photoelectric fusion integrated chip and a method based on mixed integration integrate a silicon-silicon oxide-lithium niobate chip with a bulk silicon electronic chip and a III-V laser chip together in a mixed integration mode, realize the full integration of a high-linearity and large-bandwidth modulator with a laser, a high-compactness passive photon device and an electronic device, exert the advantages of silicon-based, silicon oxide, III-V, lithium niobate and bulk silicon materials, avoid lattice mismatch and thermal mismatch between the silicon-based material and the III-V materials, reduce the degree of lattice mismatch and thermal mismatch between the silicon-based material and the lithium niobate material, and avoid a high-temperature and high-cost silicon-based process.
Description
Technical Field
The invention belongs to the technical field of hybrid photoelectric heterogeneous integration, and particularly relates to a heterogeneous photoelectric fusion integrated chip based on hybrid integration and an integration method.
Background
Since this century, with the development of high-rate data communication technology, there has been an increasing demand for communication devices with high transmission rates, large capacity, low latency, and the like. Due to the bottlenecks of low speed, narrow bandwidth and the like of the traditional electronic technology, the photoelectric system combining the advantages of low jitter, low time delay, high bandwidth and the like of photons is generated. The photoelectric fusion system consists of an optical device and an electric device, and the early photoelectric fusion system adopts a discrete element and has the disadvantages of larger volume and size, unstable performance and larger loss. At present, the photoelectric system is developed towards the integration direction, and the photoelectric system integration has the advantage of miniaturization, can also reduce the power consumption of the system, improve the overall stability and reduce the cost of the system. Therefore, the integration has important significance to the photoelectric system.
The photoelectric fusion chip is composed of a photon device and an electronic device, wherein the photon device comprises an active device such as a laser, a modulator, an amplifier and the like, a passive device such as a coupler, a wavelength division multiplexer and the like, and the electronic device is used for controlling or driving the photon device and the like. Monolithic integration and hybrid integration are effective ways to realize a photofusion integrated chip. The hybrid integration means that different optical and electric devices are realized on a substrate by adopting different materials, and then the different functional devices are fixed together through a certain packaging method. The monolithic integration is realized by adopting an optimized process on the same substrate, and is suitable for large-scale integration. The integration platform of the current photoelectric fusion system is basically based on silicon-based materials and III-V materials. The silicon-based material has the advantages of CMOS compatibility, low cost, high compactness, mature process and the like. However, silicon-based materials are indirect bandgap semiconductor materials, which are difficult to emit light. The III-V material makes up the defect that the silicon-based material cannot emit light, and can be used for preparing active photonic devices such as light sources, amplifiers and the like. However, the III-V materials are expensive, have high processing difficulty, and have the problems of lattice mismatch and thermal mismatch with the silicon-based materials, and the defects limit the monolithic integration of the silicon materials and the III-V materials. On the other hand, silicon-based material based modulators suffer from low linearity and bandwidth due to plasma dispersion effects. In recent years, various approaches have been implemented to achieve high linearity, large bandwidth modulators by introducing lithium niobate materials on a silicon-based material platform. Finally, although photonic devices and electronic devices can currently be integrated on the same silicon substrate, the fabrication of such electronic devices is based on thin film silicon technology, which is costly compared to mature bulk silicon electronic devices. And the substrate of the bulk silicon electronic device is different from that of the photonic device, and monolithic integration is difficult to realize. Compared with the monolithic integration technology, the hybrid integration technology has earlier development and mature process, and can ensure that each device adopts the most suitable material, thereby playing the advantages of different materials. At present, some work reports III-V-Si-based hybrid integration or hybrid integration of a photonic chip and an electronic chip, but the material selection and the device arrangement are not completely consistent with the invention. Therefore, the photoelectric fusion chip based on hybrid integration and the integration method of the invention do not exist in the existing work.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a photoelectric fusion integrated chip and an integrated method based on mixed integration, which integrate a silicon-silicon oxide-lithium niobate chip with a bulk silicon electronic chip and a III-V laser chip together in a mixed integration mode, realize the full integration of a high-linearity and large-bandwidth modulator with a laser, a high-compactness passive photon device and an electronic device, exert the advantages of silicon-based, silicon oxide, III-V, lithium niobate and bulk silicon materials, avoid lattice mismatch and thermal mismatch between the silicon-based materials and the III-V materials, reduce the lattice mismatch and thermal mismatch degree between the silicon-based materials and the lithium niobate materials, and avoid the silicon-based process with high temperature and high cost.
The technical scheme of the invention is as follows:
a heterogeneous photoelectric fusion integrated chip based on hybrid integration comprises a silicon-silicon oxide-lithium niobate photonic chip, a bulk silicon electronic chip and a III-V laser chip. The silicon-silicon oxide-lithium niobate photon chip is used for photoelectric conversion, processing and transmission of optical signals; the bulk silicon electronic chip is used for controlling and driving the silicon-silicon oxide-lithium niobate photonic chip; the III-V laser chip is used for generating optical information and transmitting the optical information to the silicon-silicon oxide-lithium niobate photonic chip; in the silicon-silicon oxide-lithium niobate photon chip, the chip structure comprises a silicon substrate layer, a silicon oxide isolation layer, a lithium niobate wafer layer, a silicon oxide buffer layer, a silicon wafer layer and a germanium film layer; the silicon oxide isolation layer is arranged between the silicon substrate layer and the lithium niobate layer, and between the silicon wafer layer and the germanium film layer to serve as an isolation layer; the silicon oxide buffer layer is arranged between the lithium niobate layer and the silicon wafer layer and used as a buffer layer, and the characteristic size is 0-1 micron; the passive photonic device comprises an interlayer coupler, a directional coupler, a multimode interferometer, a wavelength division multiplexer, a Mach-Zehnder interferometer, a micro-ring and a delay line; the lithium niobate wafer and the silicon wafer form a mixed waveguide to obtain an electro-optic modulator; forming a photoelectric detector on the silicon wafer layer by depositing a germanium film; the silicon-silicon oxide-lithium niobate photonic chip can emit light through back light emission or end surface coupling and other modes. In the bulk silicon electronic chip: the chip is composed of a bulk silicon layer; an electronic device is arranged in the bulk silicon layer and used for controlling and driving a photon device in the silicon-silicon oxide-lithium niobate chip; the III-V laser chip comprises: the chip structure comprises a silicon substrate layer, a III-V buffer layer and a III-V wafer layer; and forming a laser on the III-V wafer layer. The silicon-lithium niobate electro-optical modulator is interconnected with the electronic device through a metal wire; the photoelectric detector is interconnected with the electronic device through a metal wire; the passive photonic devices are connected with each other, and the passive photonic devices are connected with the electro-optical modulator, the passive photonic devices and the photoelectric detector through silicon waveguides; the passive photonic device is interconnected with the III-V laser through end face coupling; the metal electrode is arranged on the bulk silicon layer and is interconnected with the CMOS electronic circuit of the bulk silicon layer.
An integration method of a heterogeneous photoelectric fusion integrated chip based on hybrid integration comprises the following steps: etching, thin film deposition, metal deposition, doping, vias, flip-chip processes, and end-face coupling. The waveguide etching technology is adopted to obtain a passive photon device on a silicon wafer layer, and a modulator is obtained on the silicon wafer and a lithium niobate wafer layer; preparing a CMOS electronic circuit such as a driving circuit, a control circuit and the like by adopting etching and doping technologies; forming a laser on a III-V wafer by adopting the waveguide etching technology; forming metal wires inside and outside the silicon-silicon oxide-lithium niobate photonic chip and the bulk silicon electronic chip by adopting the metal deposition technology and the through hole technology; the through hole technology refers to that small openings are arranged in the silicon oxide isolation layer and the silicon oxide buffer layer, so that conductive connection between different layers is allowed; adopting the film deposition and doping technology, forming a silicon photoelectric detector by the doped germanium film and the doped silicon film; the flip chip bonding process is adopted to bond the silicon-silicon oxide-lithium niobate photonic chip and the electronic chip together, and the end surface coupling is adopted to bond the silicon-silicon oxide-lithium niobate photonic chip and the III-V laser chip together, so as to form a heterogeneous photoelectric fusion integrated chip based on mixed integration; the flip chip bonding process comprises the following steps: the surface metallization of the chip, the deposition of welding points and the overturning and positioning of the chip, so that the welding balls are aligned to external circuit connection, reflow soldering and bottom filling.
Compared with the prior art, the invention has the following beneficial effects:
1) Comprehensively utilizes the advantages of high compactness of the silicon-based material, high luminous efficiency of the III-V material, excellent electro-optical performance of the lithium niobate material, mature process of bulk silicon and low cost;
2) The electronic device is arranged in the bulk silicon, so that the influence of high temperature in the preparation process of the electronic device on the silicon-silicon oxide-lithium niobate chip is avoided. The electronic device is electrically interconnected with the silicon-silicon oxide-lithium niobate wafer in a flip-chip bonding mode, and the flip-chip bonding technology is used for replacing wire bonding to integrate the photon chip and the silicon-silicon oxide-lithium niobate chip, so that the influence of parasitic capacitance can be reduced;
3) The modulator is arranged on the silicon wafer and the lithium niobate wafer, so that the disadvantages of contamination caused by etching lithium niobate, incompatibility with the existing silicon phototechnology and the like are avoided;
4) The laser is arranged in the III-V material and is interconnected with the silicon-silicon oxide-lithium niobate photonic chip through end surface coupling, so that lattice mismatch and thermal mismatch between the III-V material and the silicon-based material are avoided;
5) A silicon oxide buffer layer is arranged between a lithium niobate wafer and a silicon wafer, so that the influence of lattice mismatch and thermal mismatch between lithium niobate and silicon is reduced, and in the integration method of the silicon-silicon oxide-lithium niobate chip, a low-temperature process is adopted, so that cracking caused by thermal mismatch between materials is avoided, and the yield of devices is improved.
Drawings
FIG. 1 is a cross-sectional view of a hetero-photo-fusion integrated chip according to the present invention, wherein (a) is a cross-sectional view of a silicon-silicon oxide-lithium niobate hetero-wafer structure, and (b) is a cross-sectional view of a III-V laser chip structure;
fig. 2 is a cross-sectional view of a hetero photoelectric fusion integrated chip according to an embodiment of the present invention, wherein (a) is a cross-sectional view of the hetero photoelectric fusion integrated chip according to embodiment 1, and (b) is a cross-sectional view of the hetero photoelectric fusion integrated chip according to embodiment 2;
fig. 3 is a cross-sectional view of a junction between a silicon-silicon oxide-lithium niobate photonic chip and a group iii-v laser chip, and (b) is a three-dimensional cross-sectional view of a junction between a silicon-silicon oxide-lithium niobate photonic chip and a group iii-v laser chip.
Detailed Description
The present invention will be described in detail with reference to the accompanying drawings and examples, which are given to illustrate the embodiments and structures, but the scope of the present invention is not limited to the examples.
According to an embodiment of the invention:
the initial multi-material system of the present invention is shown in fig. 1, and fig. (a) is a cross-sectional view of a silicon-silicon oxide-lithium niobate heterogeneous wafer structure of a silicon-silicon oxide-lithium niobate photonic chip part of two embodiments, comprising, from bottom to top, a silicon substrate layer 1, a silicon oxide isolation layer 2, a lithium niobate wafer layer 3, a silicon oxide buffer layer 4, a silicon wafer layer 5, a germanium thin film layer 6, and a silicon oxide insulating layer 2. The silicon oxide isolation layer 2 is arranged between the silicon substrate layer 1 and the lithium niobate wafer layer 3, and between the silicon wafer layer 5 and the germanium thin film layer 6 to serve as isolation layers; the silicon oxide buffer layer 4 is arranged between the lithium niobate thin film layer and the silicon wafer layer and used as a buffer layer, and the characteristic dimension is 0-1 micron. Fig. (b) is a cross-sectional view of a portion of the structure of a group iii-v laser chip in two embodiments, including, from bottom to top, a silicon substrate layer 7, a group iii-v buffer layer 8, and a group iii-v wafer layer 9. And forming a laser on the III-V wafer layer.
As shown in fig. 2, the embodiment of the present invention adopts a structure of an electronic chip under an upper photonic chip, and includes a silicon-germanium photodetector 10, a silicon-lithium niobate electro-optical modulator 11, a silicon passive photonic device 12, a bulk silicon layer CMOS electronic circuit 13, a metal electrode 14, and a group iii-v laser 15; the silicon-silicon oxide-lithium niobate photonic chip is coupled with light through an end face; the silicon-lithium niobate electro-optical modulator is interconnected with the electronic device through a metal wire; the photoelectric detector is interconnected with the electronic device through a metal wire; the passive photonic devices are interconnected with each other through silicon waveguides, and the passive photonic devices are interconnected with the electro-optical modulator, the passive photonic devices and the photoelectric detector through end face coupling. The metal electrode 14 is disposed on the bulk silicon layer and interconnects with the bulk silicon layer CMOS electronic circuitry. FIG. (b) shows another embodiment, which adopts a structure with a photonic chip under an upper electronic chip, comprising a silicon-germanium photodetector 10, a silicon-lithium niobate electro-optical modulator 11, a silicon passive photonic device 12, a bulk silicon layer CMOS electronic circuit 13, and a metal electrode 14; the silicon-silicon oxide-lithium niobate photonic chip emits light through the back; the silicon-lithium niobate electro-optical modulator is interconnected with the electronic device through a metal wire; the photoelectric detector is interconnected with the electronic device through a metal wire; the passive photonic devices are interconnected with each other through silicon waveguides, and the passive photonic devices are interconnected with the electro-optical modulator, the passive photonic devices and the photoelectric detector through end face coupling; the metal electrode 14 is disposed on the bulk silicon layer and interconnects with the bulk silicon layer CMOS electronic circuitry.
As shown in fig. 3, in the cross-sectional view of the junction between the end surfaces of the chips according to the embodiment of the present invention, fig. (a) is a two-dimensional cross-sectional view of the junction between a silicon-silicon oxide-lithium niobate photonic chip and a group iii-v laser chip, which is sequentially from left to right: silicon-silicon oxide-lithium niobate photonic chips, group iii-v laser chips; the photonic chip includes: a silicon passive photonic device 12; the III-V laser chip comprises: a metal electrode 14, a group iii-v laser 15; fig. b is a three-dimensional cross-sectional view of the junction of a silicon-silicon oxide-lithium niobate photonic chip and a group iii-v laser chip, in order from front to back: silicon-silicon oxide-lithium niobate photonic chips, group iii-v laser chips; the photonic chip includes a silicon passive photonic device 12; the III-V laser chip comprises: a metal electrode 14, a group iii-v laser 15; the metal electrode 14 is disposed on the bulk silicon layer and interconnects with the bulk silicon layer CMOS electronic circuitry.
Claims (7)
1. The heterogeneous photoelectric fusion integrated chip based on hybrid integration is characterized in that: the device comprises a silicon-silicon oxide-lithium niobate photonic chip, a bulk silicon electronic chip and a III-V laser chip;
the silicon-silicon oxide-lithium niobate photonic chip comprises a silicon substrate layer (1), a lithium niobate wafer layer (3), a silicon oxide buffer layer (4) and a silicon wafer layer (5) from bottom to top, wherein a germanium film layer (6) is formed on the surface of the silicon wafer layer (5); a silicon oxide isolation layer (2) is respectively arranged between the silicon substrate layer (1) and the lithium niobate wafer layer (3) and between the silicon wafer layer (5) and the germanium film layer (6) to be used as isolation;
the bulk silicon electronic chip is composed of a bulk silicon layer;
the III-V laser chip comprises a second silicon substrate layer (7), a III-V buffer layer (7) and a III-V wafer layer (8) from bottom to top in sequence;
the silicon-silicon oxide-lithium niobate photonic chip is connected with the bulk silicon electronic chip through a flip-chip technology, and the end face of the III-V laser chip is coupled with the end face of the silicon-silicon oxide-lithium niobate photonic chip.
2. The hybrid integration-based heterogeneous photo-fusion integrated chip of claim 1, wherein:
the silicon-silicon oxide-lithium niobate photon chip is used for photoelectric conversion, processing and transmission of optical signals;
the bulk silicon electronic chip is used for controlling and driving the silicon-silicon oxide-lithium niobate photonic chip.
The III-V laser chip is used for generating optical information and transmitting the optical information to the silicon-silicon oxide-lithium niobate photonic chip.
3. The hybrid integration-based heterogeneous photo-fusion integrated chip according to claim 1 or 2, wherein: the silicon wafer layer (5) forms a passive photon device and an active photon device, and the silicon wafer layer (5) and the lithium niobate wafer layer (3) form a mixed waveguide to serve as the active photon device; the bulk silicon layer forms an electronic device for controlling and driving the active photonic device; the III-V wafer layer (8) forms a laser; the passive photonic devices are interconnected with each other through silicon waveguides, and the passive photonic devices are interconnected with the laser through end face coupling.
4. The hybrid integration-based heterogeneous photoelectric fusion integrated chip according to claim 3, wherein the passive photonic device comprises an interlayer coupler, a directional coupler, a multimode interferometer, a wavelength division multiplexer, a Mach-Zehnder interferometer, a micro-ring and a delay line; the active photon device comprises a silicon-lithium niobate electro-optical modulator and a photoelectric detector; the electronic device comprises a driving circuit and a control circuit.
5. A hybrid integration-based heterogeneous photo-fusion integrated chip integration method as defined in any one of claims 1-4, wherein: the method comprises the following steps:
a passive photonic device is obtained on the silicon wafer layer through a waveguide etching technology;
obtaining an active photon device comprising a photoelectric detector through a thin film deposition and doping technology on a silicon wafer layer;
the active photonic device is obtained on the silicon wafer and the lithium niobate wafer layer through a waveguide etching technology, and comprises a silicon-lithium niobate electro-optical modulator;
the passive photonic devices, the passive photonic devices and the silicon-lithium niobate electro-optical modulator, and the passive photonic devices and the photoelectric detector are interconnected through silicon waveguides;
the electronic device is obtained on the bulk silicon layer through etching and doping technology;
obtaining a laser through waveguide etching technology on the III-V wafer layer;
forming metal wires inside and outside the silicon-silicon oxide-lithium niobate photonic chip and the bulk silicon electronic chip through a metal deposition technology and a through hole technology;
and bonding the silicon-silicon oxide-lithium niobate photonic chip and the electronic chip together through a flip chip bonding process, bonding the silicon-silicon oxide-lithium niobate photonic chip and the III-V laser chip together through end face coupling, and interconnecting the silicon-lithium niobate electro-optical modulator and the electronic device through metal wires, wherein the photoelectric detector and the electronic device are interconnected through metal wires.
6. The method for integrating hybrid integration-based heterogeneous photoelectric fusion integrated chips according to claim 5, wherein the through-hole process technology is that small openings are formed in the silicon oxide isolation layer (2) and the silicon oxide buffer layer (4) to allow conductive connection between different layers.
7. The method for integrating hybrid integration-based heterogeneous photo-electric fusion integrated chips as defined in claim 5, wherein the flip-chip bonding process comprises: the surface metallization of the chip, the deposition of welding points and the overturning and positioning of the chip, so that the welding balls are aligned to external circuit connection, reflow soldering and bottom filling.
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