CN117012839A - Solar cell and photovoltaic module - Google Patents

Solar cell and photovoltaic module Download PDF

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Publication number
CN117012839A
CN117012839A CN202210474482.9A CN202210474482A CN117012839A CN 117012839 A CN117012839 A CN 117012839A CN 202210474482 A CN202210474482 A CN 202210474482A CN 117012839 A CN117012839 A CN 117012839A
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China
Prior art keywords
passivation
doped polysilicon
solar cell
contact step
polysilicon layer
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Inventor
余丁
杨洁
李文琪
吴佳豪
王浩
柴嘉磊
张晓雯
赵世杰
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Zhejiang Jinko Solar Co Ltd
Jinko Solar Co Ltd
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Zhejiang Jinko Solar Co Ltd
Jinko Solar Co Ltd
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Priority to CN202210474482.9A priority Critical patent/CN117012839A/en
Priority to DE212022000085.4U priority patent/DE212022000085U1/en
Priority to AU2022331905A priority patent/AU2022331905A1/en
Priority to EP22859544.3A priority patent/EP4289007A1/en
Priority to PCT/CN2022/124851 priority patent/WO2023206980A1/en
Priority to US17/973,438 priority patent/US20230352603A1/en
Priority to NL2034305A priority patent/NL2034305B1/en
Publication of CN117012839A publication Critical patent/CN117012839A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0216Coatings
    • H01L31/02161Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/02167Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H01L31/02168Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells the coatings being antireflective or having enhancing optical properties for the solar cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H01L31/0264Inorganic materials
    • H01L31/028Inorganic materials including, apart from doping material or other impurities, only elements of Group IV of the Periodic Table
    • H01L31/0288Inorganic materials including, apart from doping material or other impurities, only elements of Group IV of the Periodic Table characterised by the doping material

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Sustainable Development (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Power Engineering (AREA)
  • Sustainable Energy (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Photovoltaic Devices (AREA)

Abstract

The invention discloses a solar cell and a photovoltaic module, which relate to the technical field of cells and comprise a first passivation contact step arranged on the surface of a crystalline silicon substrate; the second passivation contact step is arranged on one surface of the first passivation contact step, which is far away from the crystalline silicon substrate; the first passivation anti-reflection step is arranged on one surface of the first passivation contact step, which is far away from the crystalline silicon substrate; the second passivation anti-reflection step is arranged on one surface of the second passivation contact step, which is far away from the first passivation contact step; one end of the electrode is contacted with the first passivation contact step, and the other end sequentially penetrates through the second passivation contact step and the second passivation anti-reflection step. According to the scheme provided by the invention, the multi-stage passivation contact steps are arranged, the thickness of the first passivation contact step is thinner, the parasitic absorption of long-wave light can be reduced, and the long-wave response and the double-sided rate of the solar cell are effectively improved. The thickness of the second passivation contact step is thicker, so that good ohmic contact with the metal paste in the metallization process can be ensured.

Description

Solar cell and photovoltaic module
Technical Field
The invention relates to the technical field of batteries, in particular to a solar battery and a photovoltaic module.
Background
TOPCon (Tunnel Oxide Passivating Contacts) the cell is a solar cell based on the selective carrier principle where the tunneling oxide layer passivates contacts. The back surface of the semiconductor device is usually in a structure of combining ultrathin tunneling silicon oxide and doped polysilicon films, so that a passivation contact effect is realized.
In the related art, in order to ensure the matching and passivation effects of the metallization paste, the thickness of the doped polysilicon film needs to be controlled to be more than 90 nm. However, the excessively thick doped polysilicon film can cause parasitic absorption of the back infrared band, thereby causing the problems of poor long-wave response, low double-sided rate and the like of the battery.
Disclosure of Invention
In view of the above, the invention provides a solar cell, which can reduce the thickness of a doped polysilicon film, further reduce parasitic absorption to the infrared band, and improve the long-wave response and the double-sided rate of the solar cell.
In a first aspect, the present invention provides a solar cell comprising a crystalline silicon substrate, a first passivation contact step, a second passivation contact step, a first passivation anti-reflection step, a second passivation anti-reflection step, and an electrode;
the first passivation contact step is arranged on the surface of the crystalline silicon substrate;
the second passivation contact step is arranged on one surface of the first passivation contact step, which is far away from the crystalline silicon substrate, and is positioned in a region corresponding to the electrode;
the first passivation anti-reflection step is arranged at a region, which is far away from the crystalline silicon substrate, of the first passivation contact step and is not contacted with the second passivation contact step;
the second passivation anti-reflection step is arranged on one surface of the second passivation contact step, which is far away from the first passivation contact step;
one end of the electrode is contacted with the first passivation contact step, and the other end sequentially penetrates through the second passivation contact step and the second passivation anti-reflection step.
In one possible implementation, the first passivation contact step includes a first tunneling oxide layer and a first doped polysilicon layer;
the first tunneling oxide layer is arranged on the surface of the crystalline silicon substrate, and the first doped polysilicon layer is arranged on one surface of the first tunneling oxide layer, which is far away from the crystalline silicon substrate;
the second passivation contact step comprises a second tunneling oxide layer and a second doped polysilicon layer;
the second tunneling oxide layer is arranged on one surface of the first doped polysilicon layer, which is far away from the first tunneling oxide layer, and is positioned in a region corresponding to the electrode;
the second doped polysilicon layer is arranged on one surface of the second tunneling oxide layer, which is far away from the second doped polysilicon layer;
one end of the electrode is in contact with the first doped polysilicon layer.
In one possible implementation, the first tunneling oxide layer includes at least one of phosphorus-containing silicon oxide, aluminum oxide, silicon oxynitride, and silicon oxycarbide, and the phosphorus element concentration of the first tunneling oxide layer is not greater than 5×10 19 cm -3
In one possible implementation, the thickness of the first tunneling oxide layer is 0.5nm-3nm.
In one possible implementation of the present invention,the phosphorus element concentration of the first doped polysilicon layer after activation is 1 multiplied by 10 20 cm -3 -3×10 20 cm -3
In one possible implementation, the first doped polysilicon layer has a thickness of 30nm to 80nm.
In one possible implementation, the second tunneling oxide layer includes at least one of phosphorus-containing silicon oxide, aluminum oxide, silicon oxynitride, and silicon oxycarbide, and the phosphorus element concentration of the second tunneling oxide layer is not greater than 8×10 19 cm -3 -2×10 20 cm -3
In one possible implementation, the thickness of the second tunneling oxide layer is 0.5nm-5nm, and the thickness of the second tunneling oxide layer is greater than the thickness of the first tunneling oxide layer.
In one possible implementation, the patterned line width of the second tunneling oxide layer is 1% -7% of the patterned line width of the first doped polysilicon layer, and the patterned line width of the second tunneling oxide layer is not greater than 100 μm.
In one possible implementation, the second doped polysilicon layer has a phosphorus element concentration of 2×10 after activation 20 cm -3 -4×10 20 cm -3
In one possible implementation, the thickness of the second doped polysilicon layer is 30nm-80nm, and the thickness of the second doped polysilicon layer is greater than the thickness of the first doped polysilicon layer.
In one possible implementation, the patterned linewidth of the second doped polysilicon layer is not greater than the patterned linewidth of the second tunneling oxide layer.
In one possible implementation, the first passivation anti-reflection step includes at least one passivation anti-reflection layer, and the thickness of the first passivation anti-reflection step is 70nm-110nm and is not less than the thickness of the second passivation contact step.
In one possible implementation, the second passivation anti-reflection step has a thickness of 50nm to 110nm.
In one possible implementation, the patterned linewidth of the second passivation anti-reflection step is not greater than 100 μm and is not less than the patterned linewidth of the second passivation contact step.
In one possible implementation, a distance from an end of the electrode in contact with the first passivation contact step to a surface of the second passivation anti-reflection step remote from the second passivation contact step is not less than 100nm.
In a second aspect, the present invention provides a photovoltaic module comprising a solar cell as in the first aspect and any one of its possible implementations, at least part of the solar cells being electrically connected in a tile or stack and encapsulated by an encapsulating material.
Compared with the prior art, the solar cell provided by the invention has the following beneficial effects:
the embodiment provided by the invention is provided with the multi-stage passivation contact step, wherein the first passivation contact step is arranged on the surface of the crystalline silicon substrate, so that the surface passivation of the solar cell is realized. The thickness of the first passivation contact step is thinner, parasitic absorption of long-wave light can be reduced, and the long-wave response and the double-sided rate of the solar cell are effectively improved. The second passivation contact step is arranged on one surface of the first passivation contact step, which is far away from the crystalline silicon substrate, and is positioned in a region corresponding to the electrode, and the thickness of the second passivation contact step is thicker, so that good ohmic contact with the metal paste in the metallization process can be ensured.
Of course, it is not necessary for any one product embodying the invention to achieve all of the technical effects described above at the same time.
Other features of the present invention and its advantages will become apparent from the following detailed description of exemplary embodiments of the invention, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.
Fig. 1 is an enlarged schematic view of a partial cross-sectional structure of a solar cell according to an embodiment of the present invention;
fig. 2 is a schematic cross-sectional view of a solar cell according to an embodiment of the present invention;
FIG. 3 is a schematic diagram showing a cross-sectional structure of a solar cell according to an embodiment of the invention;
fig. 4 is a graph showing internal quantum conversion efficiency of a solar cell according to an embodiment of the present invention;
fig. 5 is a flowchart of a method for manufacturing a solar cell according to an embodiment of the present invention;
fig. 6 is a second flowchart of a method for manufacturing a solar cell according to an embodiment of the invention.
Detailed Description
Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless it is specifically stated otherwise.
The following description of at least one exemplary embodiment is merely exemplary in nature and is in no way intended to limit the invention, its application, or uses.
Techniques, methods, and apparatus known to one of ordinary skill in the relevant art may not be discussed in detail, but are intended to be part of the specification where appropriate.
In all examples shown and discussed herein, any specific values should be construed as merely illustrative, and not a limitation. Thus, other examples of exemplary embodiments may have different values.
It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further discussion thereof is necessary in subsequent figures.
In the prior art, in order to ensure the matching and passivation effects of the metalized slurry, the thickness of the doped polysilicon film needs to be controlled to be more than 90 nm. The excessively thick doped polysilicon film can cause parasitic absorption of the back infrared band, so that the problems of poor long-wave response, low double-sided rate and the like of the battery are caused.
In order to solve the above problems in the related art, embodiments of the present invention provide a solar cell, which can reduce the thickness of a doped polysilicon film, thereby reducing parasitic absorption to the infrared band and improving the long-wave response and the double-sided rate of the solar cell.
Referring to fig. 1, an embodiment of the present invention provides a solar cell, including: the semiconductor device comprises a crystalline silicon substrate 1, a first passivation contact step 2, a second passivation contact step 3, a first passivation anti-reflection step 4, a second passivation anti-reflection step 5 and an electrode 6;
the first passivation contact step 2 is arranged on the surface of the crystalline silicon substrate 1;
the second passivation contact step 3 is arranged on one surface of the first passivation contact step 2, which is far away from the crystalline silicon substrate 1, and is positioned in a region corresponding to the electrode 6;
the first passivation and antireflection step 4 is arranged at a region of the first passivation contact step 2, which is far away from the crystalline silicon substrate 1 and is not contacted with the second passivation contact step 3;
the second passivation anti-reflection step 5 is arranged on one surface of the second passivation contact step 3, which is far away from the first passivation contact step 2;
one end of the electrode 6 is contacted with the first passivation contact step 2, and the other end sequentially penetrates through the second passivation contact step 3 and the second passivation anti-reflection step 5.
It is understood that the surface of the crystalline silicon substrate 1 may be an upper surface, and/or a lower surface. In some embodiments, the upper surface refers to the light entrance face, i.e. the face facing the sun. The lower surface is the surface opposite the upper surface. For a double sided battery, the lower surface may also serve as the light receiving surface.
Referring to fig. 2, in an alternative embodiment of the present invention, a first passivation contact step 2, a second passivation contact step 3, a first passivation anti-reflection step 4, a second passivation anti-reflection step 5, and an electrode 6 are disposed on the lower surface of a crystalline silicon substrate 1, and at this time, a diffusion layer 7, an interface modification layer 8, a front passivation layer 9, a transition layer 10, a front passivation anti-reflection layer 11, and a front electrode 12 are sequentially disposed on the upper surface of the crystalline silicon substrate 1. Wherein the diffusion layer 7 may be located on the upper surface, or the lower surface, of the crystalline silicon substrate 1. When the crystalline silicon substrate 1 is an N-type crystalline silicon substrate, the element of the diffusion layer 7 is boron or other P-type dopant. The interface modification layer 8 may be an oxide layer, and the interface modification layer 8 may be a silicon oxide layer, for example. The thickness of the interface modification layer 8 is larger and is 3nm-10nm. The front passivation layer 9 may be at least one of silicon nitride, silicon oxynitride, silicon oxycarbonitride, titanium oxide, hafnium oxide, aluminum oxide. The transition layer 10 may be at least one of silicon oxide and silicon oxynitride. The front passivation anti-reflection layer 11 may be at least one of silicon nitride, silicon oxynitride, silicon oxycarbonitride. The interface modification layer 8, the front passivation layer 9, the transition layer 10 and the front passivation anti-reflection layer 11 form a front passivation anti-reflection structure of the solar cell. But without being limited by the above description and drawings, the front passivation anti-reflection structure may be a similar single layer or multi-layer structure.
Referring to fig. 3, in an alternative embodiment of the present invention, a first passivation contact step 2, a second passivation contact step 3, a first passivation anti-reflection step 4, a second passivation anti-reflection step 5, and an electrode 6 are disposed on the upper and lower surfaces of the crystalline silicon substrate 1. At this time, the passivation contact steps are respectively a front passivation contact step and a back passivation contact step, the passivation antireflection steps are respectively a front passivation antireflection step and a back passivation antireflection step, and the electrodes 6 are respectively a front electrode and a back electrode.
With continued reference to fig. 1, in an alternative embodiment of the present invention, the first passivated contact step 2 comprises a first tunneling oxide layer 21 and a first doped polysilicon layer 22; the first tunneling oxide layer 21 is disposed on the surface of the crystalline silicon substrate 1, and the first doped polysilicon layer 22 is disposed on a surface of the first tunneling oxide layer 21 away from the crystalline silicon substrate 1.
Referring to fig. 1, the embodiment of the present invention adopts a step passivation contact structure, wherein the thickness of the first tunneling oxide layer 21 is 0.5nm-3nm, and the thickness of the first doped polysilicon 22 is 30nm-80nm. In the first passivation contact step 2, a composite film layer of the first tunneling oxide layer 21 and the first doped polysilicon layer 22 is adopted, so that good passivation can be formed on the surface of the crystalline silicon substrate 1. Meanwhile, by forming PN junctions or high-low junctions, effective separation of photo-generated carriers is achieved.
Referring to fig. 4, the internal quantum conversion efficiency of the solar cell having the surface without the stepped passivation contact structure in the related art is shown as a dotted line, and the internal quantum conversion efficiency of the solar cell having the stepped passivation contact structure provided by the embodiment of the present invention is shown as a solid line. Compared with the related art, the embodiment of the invention can reduce parasitic absorption to the infrared band (1000-1200 nm), and the solar cell can obtain higher internal quantum conversion efficiency (IQE, internal Quantum Efficiency) in the long band. Wherein the IQE increase in the 1100-1150nm band can be greater than 10%.
The first tunneling oxide layer 21 includes at least one of phosphorus-containing silicon oxide, aluminum oxide, silicon oxynitride, and silicon oxycarbide.
The doping element of the first doped polysilicon layer 22 is adapted to the crystalline silicon substrate 1; illustratively, when the crystalline silicon substrate 1 is an N-type crystalline silicon substrate, the doping element of the first doped polysilicon layer 22 is phosphorus or other N-type doping element; when the crystalline silicon substrate 1 is a P-type crystalline silicon substrate, the doping element of the first doped polysilicon layer 22 is boron or other P-type doping element.
When the first passivation contact step 2, the second passivation contact step 3, the first passivation anti-reflection step 4, the second passivation anti-reflection step 5, and the electrode 6 are disposed on the upper surface and the lower surface of the crystalline silicon substrate 1, the first doped polysilicon layer 22 and the second doped polysilicon layer 32 on the upper surface of the crystalline silicon substrate 1 are opposite to the doping elements of the first doped polysilicon layer 22 and the second doped polysilicon layer 32 on the lower surface of the crystalline silicon substrate 1. Illustratively, when the doping elements of the first doped polysilicon layer 22 and the second doped polysilicon layer 32 on the lower surface of the crystalline silicon substrate 1 are phosphorus or other N-type doping elements, the doping elements of the first doped polysilicon layer 22 and the second doped polysilicon layer 32 on the upper surface of the crystalline silicon substrate 1 are boron or other P-type doping elements.
When the doping element of the first doped polysilicon layer 22 is phosphorus, the phosphorus concentration of the first tunneling oxide layer 21 after expansion of the phosphorus element is not more than 5×10 19 cm -3 . And the phosphorus concentration of the first doped polysilicon layer 22 after activation is 1×10 20 cm -3 -3×10 20 cm -3
With continued reference to fig. 1, in an alternative embodiment of the present invention, the second passivation contact step 3 comprises a second tunnel oxide layer 31 and a second doped polysilicon layer 32; the second tunneling oxide layer 31 is disposed on a surface of the first doped polysilicon layer 22 away from the first tunneling oxide layer 21 and is located in a region corresponding to the electrode 6; the second doped polysilicon layer 32 is disposed on a surface of the second tunneling oxide layer 31 away from the second doped polysilicon layer 32; one end of the electrode 6 is in contact with the first doped polysilicon layer 22.
It is understood that the thickness of the second tunnel oxide layer 31 is 0.5nm-5nm, and the thickness of the second tunnel oxide layer 31 is greater than the thickness of the first tunnel oxide layer 21. The thickness of the second doped polysilicon layer 32 is 30nm-80nm, and the thickness of the second doped polysilicon layer 32 is greater than the thickness of the first doped polysilicon layer 22. In the second passivation contact step 3, a structure that the second tunneling oxide layer 31 and the second doped polysilicon layer 32 are compounded is adopted, and the thicknesses of the second tunneling oxide layer 31 and the second doped polysilicon layer 32 are respectively larger than those of the first tunneling oxide layer 21 and the first doped polysilicon layer 22, so that the overall thickness of the second passivation contact step 3 is larger, and good ohmic contact with metal slurry in the metallization process can be ensured.
Referring to fig. 2, when a plurality of electrodes 6 are provided in the region of the second tunnel oxide layer 31 corresponding to the electrode 6, a plurality of second passivation contact steps 3 are provided, i.e., a plurality of second tunnel oxide layers 31 are included. The patterned line width of the second tunneling oxide layer 31 accounts for 1% -7% of the patterned line width of the first doped polysilicon layer 22, the patterned line width of the second tunneling oxide layer 31 is not greater than 100 μm, and the patterned line width of the second doped polysilicon layer 32 is not greater than the patterned line width of the second tunneling oxide layer 31, wherein the patterned line width refers to the width in the X direction in the cross-section structure of the solar cell.
The second tunneling oxide layer 31 includes at least one of phosphorus-containing silicon oxide, aluminum oxide, silicon oxynitride, and silicon oxycarbide.
The doping elements of the second doped polysilicon layer 32 are the same as those of the first doped polysilicon layer 22, and are matched with the crystalline silicon substrate 1; when the crystalline silicon substrate 1 is an N-type crystalline silicon substrate, the doping element of the second doped polysilicon layer 32 is phosphorus; when the crystalline silicon substrate 1 is a P-type crystalline silicon substrate, the doping element of the second doped polysilicon layer 32 is boron.
When the doping element of the second doped polysilicon layer 32 is phosphorus, the phosphorus concentration of the second tunneling oxide layer 31 after the phosphorus expansion is not more than 8×10 19 cm -3 -2×10 20 cm -3 . And the activated phosphorus concentration of the second doped polysilicon layer 32 is 2×10 20 cm -3 -4×10 20 cm -3
With continued reference to fig. 1, in an alternative embodiment of the present invention, the first passivation anti-reflection step 4 comprises at least one passivation anti-reflection layer comprising at least one of silicon nitride, silicon oxynitride and silicon oxide. The thickness of the first passivation anti-reflection step 4 is 70nm-110nm and is not less than the thickness of the second passivation contact step 3.
With continued reference to fig. 1, in an alternative embodiment of the present invention, the second passivation anti-reflection step 5 comprises at least one passivation anti-reflection layer comprising at least one of silicon nitride, silicon oxynitride and silicon oxide. The thickness of the second passivation anti-reflection step 5 is 50nm-110nm. The patterned linewidth of the second passivation anti-reflection step 5 is not greater than 100 μm and is not smaller than the patterned linewidth of the second passivation contact step 3.
With continued reference to fig. 1, in an alternative embodiment of the invention, the end of the electrode 6 in contact with the first passivation contact step 2 is at a distance of not less than 100nm from the surface of the second passivation anti-reflection step 5 remote from the second passivation contact step 3.
It will be appreciated that the materials of the electrode 6 include: silver, aluminum, copper, or an alloy composed of at least two of silver, aluminum, copper. The patterned linewidth of the electrode 6 is not greater than 100nm and not greater than the patterned linewidth of the second passivation contact step 3.
In summary, the solar cell provided by the invention has at least the following beneficial effects:
the embodiment provided by the invention is provided with a multi-stage passivation contact step, wherein the first passivation contact step 2 is arranged on the surface of the crystalline silicon substrate 1, so that the surface passivation of the solar cell is realized. The thickness of the first passivation contact step 2 is thinner, parasitic absorption of long-wave light can be reduced, and the long-wave response and the double-sided rate of the solar cell are effectively improved. The second passivation contact step 3 is arranged on one surface of the first passivation contact step 2, which is far away from the crystalline silicon substrate 1, and is positioned in a region corresponding to the electrode 6, and the thickness of the second passivation contact step 3 is thicker, so that good ohmic contact with the metal paste in the metallization process can be ensured.
Based on the same inventive concept, embodiments of the present invention also provide a photovoltaic module including the aforementioned solar cells, at least some of which are connected in a tiled or laminated manner and sealed by an encapsulation material.
In some embodiments, the plurality of solar cells are located on the same plane and are electrically connected with a certain gap (small gap) or without a gap to form the photovoltaic module. In some embodiments, a plurality of solar cells are electrically connected in a stacked (i.e., in different planes) configuration to form the photovoltaic module. The solar cell may employ any of the cells shown in fig. 1-3.
It will be appreciated by those skilled in the art that the photovoltaic module and the solar cell described above are based on the same inventive concept, and the features and advantages described above for the solar cell are equally applicable to the application of the photovoltaic module, and thus the photovoltaic module has at least the same or advantages as those of the solar cell described above, and will not be described herein.
The photovoltaic module may include, for example, a back sheet, an encapsulant, a battery string, an encapsulant, and glass in that order from bottom to top. Wherein, the packaging material can be EVA, POE and other packaging film materials well known in the art. The cell string may be formed by splicing or stacking the solar cells, and may or may not have a gap between the cells when formed by splicing.
Based on the same inventive concept, the embodiment of the invention further provides a method for manufacturing a solar cell, referring to fig. 5, the method comprises:
and S01, etching and cleaning the surface of the crystalline silicon substrate 1.
It can be appreciated that a wet chemical etching method can be adopted to etch and clean the surface of the crystalline silicon substrate 1, so as to obtain the flat and smooth surface morphology of the crystalline silicon substrate 1.
S02, a first tunneling oxide layer 21 is formed on the surface of the crystalline silicon substrate 1.
It is understood that the first tunneling oxide layer 21 of 0.5nm to 3nm may be formed on the surface of the crystalline silicon substrate 1 by a thermal oxidation method of 600 degrees celsius or more.
And S03, forming a first undoped polysilicon layer on the surface of the first tunneling oxide layer 21, which is far away from the crystalline silicon substrate 1.
It is understood that the first undoped polysilicon layer 22 having a thickness of 30nm to 80nm may be formed on the surface of the first tunneling oxide layer 21 remote from the crystalline silicon substrate 1 by any one of a low pressure chemical vapor deposition method and a plasma enhanced chemical vapor deposition method.
And S04, forming a second initial tunneling oxide layer on the surface of the first undoped polysilicon layer far away from the first tunneling oxide layer 21.
It is understood that a thermal oxidation method above 600 degrees celsius may be used to form a second initial tunneling oxide layer with a thickness of 0.5nm-5nm on the surface of the first undoped polysilicon layer 22 away from the first tunneling oxide layer 21, where the thickness of the second initial tunneling oxide layer is greater than that of the first tunneling oxide layer 21.
S05, forming a second initial undoped polysilicon layer on the surface of the second initial tunneling oxide layer far away from the first undoped polysilicon layer.
It is understood that any one of low pressure chemical vapor deposition and plasma enhanced chemical vapor deposition may be used to form a second initial undoped polysilicon layer having a thickness of 30nm to 80nm on the surface of the second initial tunneling oxide layer away from the first undoped polysilicon layer, where the thickness of the second initial undoped polysilicon layer is greater than that of the first undoped polysilicon layer.
S06, performing diffusion treatment on the first undoped polysilicon layer and the second initial undoped polysilicon layer to form a first phosphorus doped polysilicon layer and a second initial phosphorus doped polysilicon layer respectively, and forming a phosphosilicate glass layer (PSG, phospho Silicate Glass) on the surface of the second initial phosphorus doped polysilicon layer.
It will be appreciated that the diffusion process may employ a low pressure diffusion process. When the crystalline silicon substrate 1 is a P-type crystalline silicon substrate, the doping element is phosphorus. The first phosphorus doped polysilicon layer obtained after the phosphorus diffusion treatment is the first doped polysilicon layer 22. The phosphorus element concentration of the first phosphorus doped polysilicon layer and the second initial phosphorus doped polysilicon layer is 1×10 20 cm -3 -4×10 20 cm -3
S07, printing an organic coating on the surface of the phosphosilicate glass, and drying the organic coating at a high temperature to form a patterned mask, wherein the width of the patterned mask in the X direction is not more than 100 mu m.
It will be appreciated that the organic coating is produced by screen printing and that the shape of the patterned mask is adapted to the shape of the second passivation contact step 3.
And S08, etching the surface, far away from the second initial tunneling oxide layer, of the second initial phosphorus-doped polysilicon layer, which is not covered by the patterned mask, and reserving the first tunneling oxide layer 21, the first phosphorus-doped polysilicon layer, the phosphosilicate glass layer, the second initial tunneling oxide layer and the second initial phosphorus-doped polysilicon layer which are covered by the patterned mask, wherein the first passivation contact step 2 comprises the first tunneling oxide layer 21 and the first phosphorus-doped polysilicon layer.
It will be appreciated that the first selective etching of the crystalline silicon substrate 1 may be performed using a wet chemical etching method. And in the step, etching the phosphosilicate glass layer, the second initial tunneling oxide layer and the second initial phosphorus doped polysilicon layer which are not covered by the patterned mask. After etching, the second initial tunneling oxide layer covered by the patterned mask is a second tunneling oxide layer 31, the second initial phosphorus doped polysilicon layer is a second phosphorus doped polysilicon layer, and the second phosphorus doped polysilicon layer is a second doped polysilicon layer 32.
S09, etching on the surface of the patterned mask, and reserving the first tunneling oxide layer 21, the first doped polysilicon layer, the second tunneling oxide layer 31 and the second phosphorus doped polysilicon layer.
It will be appreciated that the second selective etching of the crystalline silicon substrate 1 may also be performed using wet chemical etching. In the above steps, the patterned mask and the phosphosilicate glass layer covered by the patterned mask are etched.
S10, forming a first passivation anti-reflection step 4 and a second passivation anti-reflection step 5 on the surfaces of the first phosphorus doped polysilicon layer and the second phosphorus doped polysilicon layer, which are far away from the crystalline silicon substrate 1.
It will be appreciated that the first passivation anti-reflection step 4 and the second passivation anti-reflection step 5 are prepared using a plasma enhanced chemical vapor deposition method. The first passivation and antireflection step 4 and the second passivation and antireflection step 5 are made of at least one of silicon nitride, silicon oxynitride and silicon oxide, and have a thickness of 70nm to 110nm.
And S11, preparing an electrode 6 in the corresponding area of the second passivation contact step 3 and the second passivation anti-reflection step 5.
It will be appreciated that the electrode 6 is prepared by any one of screen printing and electroplating. The imaged line width of the electrode 6 in the X direction is not more than 100nm.
The embodiment of the invention also provides another method for manufacturing a solar cell, and referring to fig. 6, the manufacturing method comprises the following steps:
and S21, etching and cleaning the surface of the crystalline silicon substrate 1.
S22, a first tunneling oxide layer 21 is formed on the surface of the crystalline silicon substrate 1.
S23, in-situ doped polysilicon deposition is carried out on the surface, far away from the crystalline silicon substrate 1, of the first tunneling oxide layer 21, so as to form a first original phosphorus doped polysilicon layer.
S24, forming a second initial tunneling oxide layer on the surface of the first original phosphorus doped polysilicon layer far away from the first tunneling oxide layer 21.
S25, performing in-situ doped polysilicon deposition on the surface, far away from the first original phosphorus doped polysilicon layer, of the second initial tunneling oxide layer to form a second original phosphorus doped polysilicon layer.
S26, forming a silicon oxide mask on the surface of the second original phosphorus doped polysilicon layer.
It is understood that the silicon oxide mask may be prepared by an ion-enhanced chemical vapor deposition method, and the thickness of the silicon oxide mask is not less than 10nm.
And S27, printing an organic coating on the surface of the silicon oxide mask, and drying the organic coating at a high temperature to form a patterned mask, wherein the width of the patterned mask in the X direction is not more than 100 mu m.
And S28, etching the surface, far away from the second initial tunneling oxide layer, of the second initial phosphorus-doped polysilicon layer, which is not covered by the patterned mask, and reserving the first tunneling oxide layer 21, the first initial phosphorus-doped polysilicon layer, the silicon oxide mask covered by the patterned mask, the second initial tunneling oxide layer and the second initial phosphorus-doped polysilicon layer.
It is understood that the etched second initial tunnel oxide layer is the second tunnel oxide layer 31.
And S29, etching on the surface of the patterned mask, and reserving the first tunneling oxide layer 21, the first original phosphorus doped polysilicon layer, the second original tunneling oxide layer and the second original phosphorus doped polysilicon layer.
S30, performing high-temperature annealing treatment on the solar cell.
It can be understood that the annealing temperature is 750-950 ℃, after annealing treatment, the phosphorus impurities in the first original phosphorus doped polysilicon and the second original phosphorus doped polysilicon film are activated, and the concentration of the phosphorus element after activation is 1 x 10 20 cm -3 -4×10 20 cm -3 . The activated first original phosphorus doped polysilicon is the firstThe phosphorus doped polysilicon layer, the first phosphorus doped polysilicon layer is the first doped polysilicon layer 22, the activated second original phosphorus doped polysilicon is the second phosphorus doped polysilicon layer, and the second phosphorus doped polysilicon layer is the second doped polysilicon layer 32.
And S31, forming a first passivation anti-reflection step 4 and a second passivation anti-reflection step 5 on the surfaces of the first phosphorus doped polysilicon layer and the second phosphorus doped polysilicon layer, which are far away from the crystalline silicon substrate 1.
And S32, preparing the electrode 6 in the corresponding area of the second passivation contact step 4 and the second passivation anti-reflection step 5.
While certain specific embodiments of the invention have been described in detail by way of example, it will be appreciated by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the invention. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.

Claims (17)

1. A solar cell, comprising:
the device comprises a crystalline silicon substrate, a first passivation contact step, a second passivation contact step, a first passivation anti-reflection step, a second passivation anti-reflection step and an electrode;
the first passivation contact step is arranged on the surface of the crystalline silicon substrate;
the second passivation contact step is arranged on one surface of the first passivation contact step, which is far away from the crystalline silicon substrate, and is positioned in a region corresponding to the electrode;
the first passivation anti-reflection step is arranged at a region, which is far away from the crystalline silicon substrate, of the first passivation contact step and is not contacted with the second passivation contact step;
the second passivation anti-reflection step is arranged on one surface of the second passivation contact step, which is far away from the first passivation contact step;
one end of the electrode is contacted with the first passivation contact step, and the other end sequentially penetrates through the second passivation contact step and the second passivation anti-reflection step.
2. The solar cell of claim 1, wherein the first passivated contact step comprises a first tunneling oxide layer and a first doped polysilicon layer;
the first tunneling oxide layer is arranged on the surface of the crystalline silicon substrate, and the first doped polysilicon layer is arranged on one surface of the first tunneling oxide layer, which is far away from the crystalline silicon substrate;
the second passivation contact step comprises a second tunneling oxide layer and a second doped polysilicon layer;
the second tunneling oxide layer is arranged on one surface of the first doped polysilicon layer, which is far away from the first tunneling oxide layer, and is positioned in a region corresponding to the electrode;
the second doped polysilicon layer is arranged on one surface of the second tunneling oxide layer, which is far away from the second doped polysilicon layer;
one end of the electrode is in contact with the first doped polysilicon layer.
3. The solar cell of claim 2, wherein the first tunneling oxide layer comprises at least one of phosphorus-containing silicon oxide, aluminum oxide, silicon oxynitride, silicon oxycarbide, and has a phosphorus element concentration of no greater than 5 x 10 19 cm -3
4. A solar cell according to claim 2 or 3, wherein the thickness of the first tunnel oxide layer is 0.5nm-3nm.
5. A solar cell according to claim 2 or 3, wherein the activated phosphorus element concentration of the first doped polysilicon layer is 1 x 10 20 cm -3 -3×10 20 cm -3
6. A solar cell according to claim 2 or 3, wherein the thickness of the first doped polysilicon layer is 30nm-80nm.
7. The solar cell of claim 2 or 3, wherein the second tunneling oxide layer comprises at least one of phosphorus-containing silicon oxide, aluminum oxide, silicon oxynitride, silicon oxycarbide, and has a phosphorus element concentration of no greater than 8 x 10 19 cm -3 -2×10 20 cm -3
8. The solar cell of claim 2 or 3, wherein the thickness of the second tunnel oxide layer is 0.5nm-5nm and the thickness of the second tunnel oxide layer is greater than the thickness of the first tunnel oxide layer.
9. The solar cell of claim 2 or 3, wherein the patterned linewidth of the second tunnel oxide layer is 1% -7% of the patterned linewidth of the first doped polysilicon layer, and the patterned linewidth of the second tunnel oxide layer is no greater than 100 μm.
10. A solar cell according to claim 2 or 3, wherein the activated phosphorus element concentration of the second doped polysilicon layer is 2 x 10 20 cm -3 -4×10 20 cm -3
11. A solar cell according to claim 2 or 3, wherein the thickness of the second doped polysilicon layer is 30nm-80nm and the thickness of the second doped polysilicon layer is greater than the thickness of the first doped polysilicon layer.
12. The solar cell of claim 2 or 3, wherein a patterned linewidth of the second doped polysilicon layer is no greater than a patterned linewidth of the second tunnel oxide layer.
13. The solar cell according to claim 1 or 2, wherein the first passivation anti-reflection step comprises at least one passivation anti-reflection layer, the thickness of the first passivation anti-reflection step being 70nm-110nm and not less than the thickness of the second passivation contact step.
14. The solar cell according to claim 1 or 2, wherein the thickness of the second passivation anti-reflection step is 50nm-110nm.
15. The solar cell according to claim 1 or 2, wherein the patterned linewidth of the second passivation anti-reflection step is not greater than 100 μm and not less than the patterned linewidth of the second passivation contact step.
16. The solar cell according to claim 1 or 2, wherein a distance from an end of the electrode in contact with the first passivation contact step to a surface of the second passivation anti-reflection step remote from the second passivation contact step is not less than 100nm.
17. A photovoltaic module comprising the solar cell of any of claims 1-16, at least some of the solar cells being electrically connected in a tile or stack and encapsulated by an encapsulant.
CN202210474482.9A 2022-04-29 2022-04-29 Solar cell and photovoltaic module Pending CN117012839A (en)

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CN202210474482.9A CN117012839A (en) 2022-04-29 2022-04-29 Solar cell and photovoltaic module
DE212022000085.4U DE212022000085U1 (en) 2022-04-29 2022-10-12 Solar cell and photovoltaic module
AU2022331905A AU2022331905A1 (en) 2022-04-29 2022-10-12 Solar cell and photovoltaic module
EP22859544.3A EP4289007A1 (en) 2022-04-29 2022-10-12 Solar cell and photovoltaic module
PCT/CN2022/124851 WO2023206980A1 (en) 2022-04-29 2022-10-12 Solar cell and photovoltaic module
US17/973,438 US20230352603A1 (en) 2022-04-29 2022-10-25 Solar cell and photovoltaic module
NL2034305A NL2034305B1 (en) 2022-04-29 2023-03-09 Solar cell and photovoltaic module

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117457805A (en) * 2023-12-25 2024-01-26 正泰新能科技股份有限公司 TOPCon battery, preparation method thereof and photovoltaic module

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117457805A (en) * 2023-12-25 2024-01-26 正泰新能科技股份有限公司 TOPCon battery, preparation method thereof and photovoltaic module

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