CN117012773B - IGBT device and preparation method thereof - Google Patents
IGBT device and preparation method thereof Download PDFInfo
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- CN117012773B CN117012773B CN202311250349.6A CN202311250349A CN117012773B CN 117012773 B CN117012773 B CN 117012773B CN 202311250349 A CN202311250349 A CN 202311250349A CN 117012773 B CN117012773 B CN 117012773B
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- igbt
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- nmos tube
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- 238000002360 preparation method Methods 0.000 title claims abstract description 7
- 239000000758 substrate Substances 0.000 claims abstract description 35
- 239000000853 adhesive Substances 0.000 claims description 12
- 230000001070 adhesive effect Effects 0.000 claims description 12
- 239000000463 material Substances 0.000 claims description 12
- 239000002313 adhesive film Substances 0.000 claims description 10
- 238000004519 manufacturing process Methods 0.000 claims description 5
- 238000010438 heat treatment Methods 0.000 abstract description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000008707 rearrangement Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
The invention relates to an IGBT device and a preparation method thereof, comprising the following steps: a substrate, wherein an IGBT emitter, an IGBT grid and an IGBT collector of an IGBT chip are formed on the substrate; the NMOS tube is arranged on the substrate and between the IGBT grid electrode and the IGBT emitter electrode, the drain electrode of the NMOS tube is electrically connected with the IGBT grid electrode, the grid electrode and the source electrode of the NMOS tube are electrically connected with the IGBT emitter electrode, and a resistor is connected between the grid electrode of the NMOS tube and the IGBT emitter electrode; the technology of the invention can improve the short-circuit capacity without reducing the current density of the IGBT, and can adjust the resistance value by adjusting the wire bonding position of the emitter frame, thereby adjusting the short-circuit current value of the IGBT when the NMOS is conducted, improving the heating of the device, improving the power density and improving the performance of the device.
Description
Technical Field
The invention belongs to the field of semiconductor integrated circuit design and manufacture, and particularly relates to an IGBT device and a preparation method thereof.
Background
At present, an IGBT device is generally applied to various high-current application fields such as a motor, a frequency converter, PFC and the like, in most IGBT fields (such as an air conditioner compressor, an inner fan, an automobile motor drive, automobile PTC seat heating, a photovoltaic inverter and the like), the IGBT device is required to have a short-circuit time of 10 mu s, the current density of the IGBT device is required to be reduced in order to ensure the device to have the short-circuit time of 10 mu s, so that the conduction loss of the device is greatly increased, and the working efficiency of the device is reduced.
Thus, there remains a need in the art for improvements.
Disclosure of Invention
The invention aims to solve the problems that in the prior art, in the time of needing IGBT short circuit, the current density of an IGBT device is required to be reduced, so that the conduction loss of the device is greatly increased and the working efficiency of the device is reduced.
In order to achieve the above purpose, the present invention adopts the following technical scheme:
the present invention provides an IGBT device, comprising:
a substrate, wherein an IGBT emitter, an IGBT grid and an IGBT collector of an IGBT chip are formed on the substrate;
the NMOS tube is arranged on the substrate and between the IGBT grid electrode and the IGBT emitter electrode, the drain electrode of the NMOS tube is electrically connected with the IGBT grid electrode, the grid electrode and the source electrode of the NMOS tube are electrically connected with the IGBT emitter electrode, and a resistor is connected between the grid electrode of the NMOS tube and the IGBT emitter electrode;
the IGBT chip is adhered above the substrate through the sheet-shaped chip adhesive film serving as an adhesive material, and the NMOS tube is adhered above the IGBT chip through the sheet-shaped chip adhesive film serving as an adhesive material.
When the IGBT chip is short-circuited, the IGBT emitter electrode applies a threshold voltage which is simultaneously applied to the grid electrode of the NMOS tube to enable the NMOS tube to be conducted, so that the IGBT emitter electrode is short-circuited with the IGBT grid electrode, and the current is reduced.
Further, the threshold voltage has a value of 3V-5V.
Further, the IGBT gate is electrically connected with an IGBT gate bus, and the IGBT gate bus is arranged in a ring shape and surrounds the periphery of the IGBT emitter.
The invention also provides a preparation method of the IGBT device, which comprises the following steps:
providing a substrate, and forming an IGBT emitter, an IGBT grid and an IGBT collector of an IGBT chip on the substrate;
an NMOS tube is arranged on the substrate, the NMOS tube is arranged between the IGBT grid electrode and the IGBT emitter electrode, the drain electrode of the NMOS tube is electrically connected with the IGBT grid electrode, the grid electrode and the source electrode of the NMOS tube are electrically connected with the IGBT emitter electrode, and a resistor is connected between the grid electrode of the NMOS tube and the IGBT emitter electrode;
the IGBT chip is adhered above the substrate through the sheet-shaped chip adhesive film serving as an adhesive material, and the NMOS tube is adhered above the IGBT chip through the sheet-shaped chip adhesive film serving as an adhesive material.
Further, when the IGBT chip is shorted, the IGBT emitter applies a threshold voltage, and the threshold voltage is simultaneously applied to the gate of the NMOS transistor to turn on the NMOS transistor, so that the IGBT emitter is shorted with the IGBT gate, and the current is reduced.
Further, the threshold voltage has a value of 3V-5V.
Further, the substrate includes a first surface and a second surface opposite to each other, the IGBT emitter, the IGBT gate, and the gate of the NMOS transistor are disposed on the first surface of the substrate, and the IGBT collector is disposed on the second surface of the substrate, or/and the IGBT chip further includes a field stop layer disposed in the substrate and disposed near the IGBT collector.
The invention has the beneficial effects that: the current density of the IGBT itself does not need to be reduced, thereby improving the short circuit capability. In addition, the resistance value can be adjusted through adjusting the routing position of the emitter frame, so that the short-circuit current value of the IGBT when the NMOS is conducted is adjusted, the technology reflected by the patent can improve the heating of the device, the power density is improved, and the performance of the device is further improved.
Drawings
Fig. 1 is a schematic circuit diagram of an IGBT device according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a layout structure of an IGBT device according to an embodiment of the present invention;
fig. 3 is a schematic cross-sectional view of a method for manufacturing an IGBT device according to an embodiment of the invention.
Detailed Description
The invention is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting thereof. It should be further noted that, for convenience of description, only some, but not all of the structures related to the present invention are shown in the drawings.
In the description of the present invention, unless explicitly stated and limited otherwise, the terms "connected," "connected," and "fixed" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the above terms in the present invention will be understood in specific cases by those of ordinary skill in the art.
In the present invention, unless expressly stated or limited otherwise, a first feature "above" or "below" a second feature may include both the first and second features being in direct contact, as well as the first and second features not being in direct contact but being in contact with each other through additional features therebetween. Moreover, a first feature being "above," "over" and "on" a second feature includes the first feature being directly above and obliquely above the second feature, or simply indicating that the first feature is higher in level than the second feature. The first feature being "under", "below" and "beneath" the second feature includes the first feature being directly under and obliquely below the second feature, or simply means that the first feature is less level than the second feature.
In the description of the present embodiment, the terms "upper", "lower", "right", etc. orientation or positional relationship are based on the orientation or positional relationship shown in the drawings, and are merely for convenience of description and simplicity of operation, and do not indicate or imply that the apparatus or elements referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as limiting the invention. Furthermore, the terms "first," "second," and the like, are used merely for distinguishing between descriptions and not for distinguishing between them.
As shown in fig. 1 to 3, the present invention provides an IGBT device, including:
a substrate 1, wherein an IGBT emitter 14, an IGBT gate 12 and an IGBT collector of an IGBT chip are formed on the substrate 1;
the NMOS tube 20 is arranged on the substrate and between the IGBT grid 12 and the IGBT emitter 14, the drain electrode of the NMOS tube is electrically connected with the IGBT grid 12, the grid electrode and the source electrode of the NMOS tube are electrically connected with the IGBT emitter 14, and a resistor 21 is connected between the grid electrode of the NMOS tube and the IGBT emitter 14;
the IGBT chip is adhered above the substrate through a sheet-like chip adhesive film (DAF) 4 serving as an adhesive material, and the NMOS tube is adhered above the IGBT chip through the sheet-like chip adhesive film (DAF) 4 serving as the adhesive material.
When the IGBT chip is shorted, the IGBT emitter 14 applies a threshold voltage that is simultaneously applied to the gate of the NMOS transistor to turn on the NMOS transistor, thereby shorting the IGBT emitter 14 to the IGBT gate and causing a current to drop.
Further, the threshold voltage has a value of 3V-5V.
Further, the IGBT gate 12 is electrically connected to the IGBT gate bus 10, and the IGBT gate bus 10 is disposed in a ring shape and surrounds the periphery of the IGBT emitter 14.
Further, the substrate 1 includes an upper surface and a lower surface, the lower surface of the IGBT chip 2 is attached to the upper surface of the substrate 1 through the chip attach film (DAF) 4, the lower surface of the NMOS 20 is attached to the upper surface of the IGBT chip 2 through the chip attach film (DAF) 4,
the invention also provides a preparation method of the IGBT device, which comprises the following steps:
providing a substrate 1, and forming an IGBT emitter 14, an IGBT gate 12 and an IGBT collector of an IGBT chip 2 on the substrate 1;
an NMOS tube 20 is arranged on the substrate, the NMOS tube 20 is electrically connected between the IGBT grid 12 and the IGBT emitter 14, a drain electrode of the NMOS tube is electrically connected with the IGBT grid 12, a grid electrode and a source electrode of the NMOS tube are electrically connected with the IGBT emitter, and a resistor is connected between the grid electrode of the NMOS tube and the IGBT emitter;
the IGBT chip 2 is adhered above the substrate 1 by a sheet-like chip film as an adhesive material, and the NMOS transistor 20 is adhered above the IGBT chip 2 by a sheet-like chip film as an adhesive material.
Further, when the IGBT chip is shorted, the IGBT emitter applies a threshold voltage, and the threshold voltage is simultaneously applied to the gate of the NMOS transistor to turn on the NMOS transistor, so that the IGBT emitter is shorted with the IGBT gate, and the current is reduced.
Further, the threshold voltage has a value of 3V-5V.
Further, the IGBT chip further includes a field stop layer disposed in the substrate and disposed near the IGBT collector.
Note that the above is only a preferred embodiment of the present invention and the technical principle applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, while the invention has been described in connection with the above embodiments, the invention is not limited to the embodiments, but may be embodied in many other equivalent forms without departing from the spirit or scope of the invention, which is set forth in the following claims.
Claims (8)
1. An IGBT device, comprising:
a substrate, wherein an IGBT emitter, an IGBT grid and an IGBT collector of an IGBT chip are formed on the substrate;
the NMOS tube is arranged on the substrate and between the IGBT grid electrode and the IGBT emitter electrode, the drain electrode of the NMOS tube is electrically connected with the IGBT grid electrode, the grid electrode and the source electrode of the NMOS tube are electrically connected with the IGBT emitter electrode, and a resistor is connected between the grid electrode of the NMOS tube and the IGBT emitter electrode;
the IGBT chip is adhered above the substrate through the sheet-shaped chip adhesive film serving as an adhesive material, and the NMOS tube is adhered above the IGBT chip through the sheet-shaped chip adhesive film serving as an adhesive material.
2. The IGBT device of claim 1 wherein when the IGBT chip is shorted, the IGBT emitter applies a threshold voltage that is simultaneously applied to the gate of the NMOS transistor to turn on the NMOS transistor, shorting the IGBT emitter to the IGBT gate, and causing current to drop.
3. The IGBT device of claim 2 wherein the threshold voltage has a value of 3V-5V.
4. The IGBT device of claim 1 wherein the IGBT gate is electrically connected to an IGBT gate bus, the IGBT gate bus being arranged in a ring shape and surrounding the IGBT emitter periphery.
5. The preparation method of the IGBT device is characterized by comprising the following steps of:
providing a substrate, and forming an IGBT emitter, an IGBT grid and an IGBT collector of an IGBT chip on the substrate;
an NMOS tube is arranged on the substrate, the NMOS tube is arranged between the IGBT grid electrode and the IGBT emitter electrode, the drain electrode of the NMOS tube is electrically connected with the IGBT grid electrode, the grid electrode and the source electrode of the NMOS tube are electrically connected with the IGBT emitter electrode, and a resistor is connected between the grid electrode of the NMOS tube and the IGBT emitter electrode;
the IGBT chip is adhered above the substrate through the sheet-shaped chip adhesive film serving as an adhesive material, and the NMOS tube is adhered above the IGBT chip through the sheet-shaped chip adhesive film serving as an adhesive material.
6. The method of manufacturing an IGBT device according to claim 5, wherein when the IGBT chip is shorted, the IGBT emitter applies a threshold voltage which is simultaneously applied to the gate of the NMOS transistor to turn on the NMOS transistor, thereby shorting the IGBT emitter to the IGBT gate and causing a current to drop.
7. The method of manufacturing an IGBT device of claim 6 wherein the threshold voltage has a value of 3V to 5V.
8. The method of manufacturing an IGBT device of claim 5 wherein the IGBT chip further comprises a field stop layer disposed in the substrate and disposed adjacent to the IGBT collector.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311250349.6A CN117012773B (en) | 2023-09-26 | 2023-09-26 | IGBT device and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311250349.6A CN117012773B (en) | 2023-09-26 | 2023-09-26 | IGBT device and preparation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN117012773A CN117012773A (en) | 2023-11-07 |
| CN117012773B true CN117012773B (en) | 2023-12-05 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202311250349.6A Active CN117012773B (en) | 2023-09-26 | 2023-09-26 | IGBT device and preparation method thereof |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1604338A (en) * | 2003-10-02 | 2005-04-06 | 三菱电机株式会社 | Semiconductor device and driving circuit for semiconductor device |
| CN102034815A (en) * | 2009-09-29 | 2011-04-27 | 比亚迪股份有限公司 | Insulated gate bipolar translator (IGBT) and manufacturing method thereof |
| CN105870179A (en) * | 2016-04-26 | 2016-08-17 | 电子科技大学 | Trench gate charge storage reverse-conducting insulated-gate bipolar transistor (RC-IGBT) and fabrication method thereof |
| CN109004020A (en) * | 2018-07-26 | 2018-12-14 | 上海汇瑞半导体科技有限公司 | The semiconductor power device structure of symmetrical high |
| CN115566059A (en) * | 2022-11-10 | 2023-01-03 | 上海功成半导体科技有限公司 | IGBT device and preparation method thereof |
-
2023
- 2023-09-26 CN CN202311250349.6A patent/CN117012773B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1604338A (en) * | 2003-10-02 | 2005-04-06 | 三菱电机株式会社 | Semiconductor device and driving circuit for semiconductor device |
| CN102034815A (en) * | 2009-09-29 | 2011-04-27 | 比亚迪股份有限公司 | Insulated gate bipolar translator (IGBT) and manufacturing method thereof |
| CN105870179A (en) * | 2016-04-26 | 2016-08-17 | 电子科技大学 | Trench gate charge storage reverse-conducting insulated-gate bipolar transistor (RC-IGBT) and fabrication method thereof |
| CN109004020A (en) * | 2018-07-26 | 2018-12-14 | 上海汇瑞半导体科技有限公司 | The semiconductor power device structure of symmetrical high |
| CN115566059A (en) * | 2022-11-10 | 2023-01-03 | 上海功成半导体科技有限公司 | IGBT device and preparation method thereof |
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| Publication number | Publication date |
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| CN117012773A (en) | 2023-11-07 |
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