CN116992504A - Data protection method for solid state disk, electronic equipment and storage medium - Google Patents
Data protection method for solid state disk, electronic equipment and storage medium Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/78—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
- G06F21/79—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data in semiconductor storage media, e.g. directly-addressable memories
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2284—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing by power-on test, e.g. power-on self test [POST]
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/81—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer by operating on the power supply, e.g. enabling or disabling power-on, sleep or resume operations
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Abstract
The application provides a data protection method of a solid state disk, electronic equipment and a storage medium. The method comprises the following steps: detecting whether a condition for triggering self-checking is met or not under the condition that the electronic equipment is in a power-off state and the battery is in a power-on state; under the condition that the triggering self-checking condition is met, a power supply enabling signal is sent to the solid state disk, so that the solid state disk is electrified and self-checked according to the power supply enabling signal; after the solid state disk is subjected to self-checking, determining the error correction rate range of the solid state disk according to the self-checking result, and carrying out corresponding error correction processing on the solid state disk according to the error correction rate range. According to the embodiment of the application, the solid state disk is electrified and self-inspected, the error correction rate range of the solid state disk is determined according to the self-inspection result, and the corresponding error correction processing is carried out according to the error correction rate range, so that the regular inspection of the solid state disk can be effectively ensured, the error correction and the corresponding data refreshing are carried out according to the state of the solid state disk, and the data integrity of the solid state disk is ensured.
Description
Technical Field
The present application relates to the field of data storage technologies, and in particular, to a data protection method for a solid state disk, an electronic device, and a storage medium.
Background
At present, solid State Disk (SSD) is gradually replacing mechanical hard Disk, and is becoming a mainstream storage medium of electronic products such as desktop computers and notebook computers, and has the characteristics of rapid and efficient data response. However, the disadvantage is that once the data stored in the solid state disk is lost, the data cannot be retrieved, so how to prevent the solid state disk from losing the data becomes an important aspect when the solid state disk is used. To solve this problem, the following scheme may be adopted: 1. using NAND flash memory particles with better data retention; 2. when the user stores the power, the user selects a temperature which is more suitable and more beneficial to data retention; 3. the user periodically and manually starts the machine, and performs self-checking and refreshing data after power-on. However, because the NAND flash memory with better retention is higher in particles, the burden of a user is increased, and because the environment in which the user is located is different, the storage environment temperature of the solid state disk is not easy to select, and in addition, the user does not know the solid state disk and the storage knowledge, so that the daily maintenance cannot be performed. Therefore, a data protection method for a solid state disk is required to be proposed to solve the above problems.
Disclosure of Invention
The present application has been made keeping in mind at least one of the above problems occurring in the prior art. According to an aspect of the present application, there is provided a data protection method for a solid state disk, applied to an electronic device, where the solid state disk, a battery and an embedded controller are disposed, the method including:
detecting whether a condition for triggering self-checking is met or not under the condition that the electronic equipment is in a power-off state and the battery is in a power-on state;
under the condition that the triggering self-checking condition is met, a power supply enabling signal is sent to the solid state disk, so that the solid state disk is electrified and self-checked according to the power supply enabling signal;
after self-checking, the solid state disk determines an error correction rate range of the solid state disk according to a self-checking result, and performs corresponding error correction processing on the solid state disk according to the error correction rate range.
In some embodiments, the condition that triggers the self-test comprises: the electronic equipment is powered off for a preset time from the last power-on.
In some embodiments, the electronic device further comprises a micro-control unit comprising a timer; judging whether the power-off of the electronic equipment reaches the preset time from the last power-on or not comprises the following steps:
when the electronic equipment is powered off after last power-on, starting a timer in the micro control unit;
and when the timer reaches the preset time after counting, determining that the power-off of the electronic equipment reaches the preset time.
In some embodiments, when the error correction rate range of the solid state disk is within a first preset error correction rate range, the solid state disk sends a power-off notification to the embedded controller, wherein the power-off notification is sent to the embedded controller, and the embedded controller controls the solid state disk to power off.
In some embodiments, when the error correction rate range of the solid state disk is within a second preset error correction rate range, the solid state disk sends a notification that the preset time is changed to a first preset time and power is turned off to the embedded controller, so that the embedded controller notifies the micro control unit to change the preset time to the first preset time, and meanwhile power-off processing is performed on the solid state disk.
In some embodiments, when the error correction rate range of the solid state disk is within a third preset error correction rate range, the solid state disk performs data refreshing processing; and after finishing data refreshing, the solid state disk sends a notification of changing the preset time to a second preset time and powering off to the embedded controller, so that the embedded controller notifies the micro control unit to change the preset time to the second preset time, and simultaneously the solid state disk is powered off.
In some embodiments, the preset time is based at least on an error correction rate of the solid state disk and an ambient temperature.
Another aspect of the embodiments of the present application provides an electronic device, including:
the micro control unit is arranged in the battery, is connected with the embedded controller and the battery, and is used for sending the timing time of the timer in the micro control unit to the embedded controller and controlling the battery to supply power to the solid state disk;
the embedded controller is connected with the solid state disk and the micro control unit and is used for judging whether to send a power supply enabling signal to the solid state disk according to the timing time sent by the micro control unit; when receiving a request for refreshing preset time and powering off the solid state disk, sending a request for refreshing the preset time to the micro control unit, and controlling the solid state disk to power off;
the solid state disk is powered on when receiving a power supply enabling signal sent by the micro control unit, performs self-checking, determines an error correction rate range of the solid state disk according to a self-checking result, and performs corresponding error correction processing according to the error correction rate range;
the electronic equipment is used for realizing the data protection method of the solid state disk.
In some embodiments, the embedded controller is to:
detecting whether a condition for triggering self-checking is met or not under the condition that the electronic equipment is in a power-off state and the battery is in a power-on state;
under the condition that the triggering self-checking condition is met, a power supply enabling signal is sent to the solid state disk, so that the solid state disk is electrified and self-checked according to the power supply enabling signal;
after self-checking, the solid state disk determines an error correction rate range of the solid state disk according to a self-checking result, and performs corresponding error correction processing on the solid state disk according to the error correction rate range.
In yet another aspect, an embodiment of the present application provides a storage medium, where a computer program is stored, where the computer program when executed by a processor causes the processor to perform a method for protecting data of a solid state disk as described above.
According to the data protection method for the solid state disk, when the triggering self-checking condition is met, the solid state disk is electrified and self-checked, then the error correction rate range of the solid state disk is determined according to the self-checking result, and corresponding error correction processing is carried out on the solid state disk according to the error correction rate range, so that the state of the solid state disk can be effectively ensured to be regularly checked, whether error correction is carried out or not is determined according to the state of the solid state disk, and corresponding data refreshing is carried out, and therefore the data integrity of the solid state disk is ensured.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort to a person skilled in the art.
FIG. 1 (a) is a schematic diagram showing data retention times of a consumer-grade solid state disk at different ambient temperatures, according to conventional techniques;
FIG. 1 (b) is a schematic diagram showing data retention times of an enterprise-level solid state disk at different ambient temperatures, according to conventional techniques;
FIG. 2 shows a schematic flow chart of a data protection method of a solid state disk according to an embodiment of the application;
FIG. 3 shows a schematic flow chart of a process of determining whether the power of the electronic device has reached the preset time since the last power-up according to an embodiment of the application;
FIG. 4 is a schematic flow chart of a method for protecting data of a solid state disk according to another embodiment of the application;
fig. 5 shows a schematic block diagram of an electronic device according to an embodiment of the application.
Detailed Description
In order to enable those skilled in the art to better understand the technical solutions of the embodiments of the present application, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are only some embodiments of the present application, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
The core technology of the solid state disk is to store data in a mode of capturing electrons by adopting a floating gate, if the solid state disk is in a power-off state, electrons in the floating gate can escape possibly along with the time length, and thus data errors are caused. When the amount of errors is small, error checking and correction techniques (Error Correcting Code, ECC) can be used for error correction, but if the amount of errors is too large, the data will not be retrieved. Taking a notebook computer as an example, the solid state disk is powered by a Power Management Integrated Circuit (PMIC) on a motherboard. When the notebook computer is in a shutdown state for a long time, the data integrity of the solid state disk is lost due to the fact that a new brush is not applied for a long time. In the user plane, if the user keeps the solid state disk in a power-off state for a long time, the situation of data loss may occur in the solid state disk. In addition, as the solid state disk is continuously used by a user, the probability of data error occurrence after the solid state disk is powered off can be increased, so that the problem of data loss can be avoided when the solid state disk is powered on at intervals.
In addition, the data storage time and the storage temperature of the solid state disk are also greatly related. For a solid state disk based on NAND flash memory, the operating temperature at the time of data writing and the storage temperature at the time of power failure are important factors affecting "data retention". FIG. 1 (a) is a schematic diagram of data storage time of a consumer-level solid state disk at different ambient temperatures according to a conventional technology; fig. 1 (b) is a schematic diagram showing data storage time of an enterprise-level solid state disk at different environmental temperatures according to the conventional technology. As can be seen from fig. 1 (a), when the power outage storage temperature is about 55 ℃, the data of the consumer-level solid state disk is kept for only 8 weeks, that is, about 56 days, and the data of the enterprise-level solid state disk is kept for only 2 weeks, about 14 days, so that the outage storage of the solid state disk is a great hidden danger for users in data keeping safety.
Most users are not aware of the optimal time for maintaining the data integrity of the solid state disk at the current ambient temperature, so it is difficult to periodically boot the solid state disk.
Based on at least one technical problem described above, the application provides a data protection method for a solid state disk, which is applied to electronic equipment, wherein the electronic equipment is provided with the solid state disk, a battery and an embedded controller, and the method comprises the following steps: detecting whether a condition for triggering self-checking is met or not under the condition that the electronic equipment is in a power-off state and the battery is in a power-on state; under the condition that the triggering self-checking condition is met, a power supply enabling signal is sent to the solid state disk, so that the solid state disk is electrified and self-checked according to the power supply enabling signal; after self-checking, the solid state disk determines an error correction rate range of the solid state disk according to a self-checking result, and performs corresponding error correction processing on the solid state disk according to the error correction rate range. According to the data protection method for the solid state disk, when the triggering self-checking condition is met, the solid state disk is electrified and self-checked, then the error correction rate range of the solid state disk is determined according to the self-checking result, and corresponding error correction processing is carried out on the solid state disk according to the error correction rate range, so that the state of the solid state disk can be effectively ensured to be regularly checked, whether error correction is carried out or not is determined according to the state of the solid state disk, and corresponding data refreshing is carried out, and therefore the data integrity of the solid state disk is ensured.
Fig. 2 shows a schematic flow chart of a data protection method of a solid state disk according to an embodiment of the application. The data protection method of the Solid State Disk is applied to electronic equipment, wherein the electronic equipment is provided with a Solid State Disk (SSD), a battery and an embedded controller (EmbedController, EC).
The embodiment of the application can be applied to electronic equipment. The electronic devices may include portable electronic devices such as personal computers, notebook computers, tablet computers, mobile phones, digital cameras, personal digital assistants, game consoles, and the like, and may also include large stationary electronic devices such as Automated Teller Machine (ATM) consoles.
The embodiment of the application is described by taking a notebook computer as an example.
As shown in fig. 2, a data protection method 200 of a solid state disk according to an embodiment of the present application may include the following steps S201 and S202:
in step S201, when the electronic device is in a power-off state and the battery is in a power-on state, it is detected whether a condition for triggering self-test is satisfied.
The execution body of the embodiment of the application can be an embedded controller.
In one embodiment of the present application, the condition for triggering self-test includes: the electronic equipment is powered off for a preset time from the last power-on.
In one embodiment of the application, the electronic device further comprises a micro control unit (Microcontroller Unit; MCU) comprising a timer. The micro-control unit may here be arranged in a battery for controlling the battery power supply. The embodiment of the application adopts a timer in the micro control unit to count so as to ensure that the EC determines whether the preset time is reached. The MCU can send the current timing time to the EC within a preset time interval, and the EC judges whether the current timing time reaches the preset time; the MCU can also judge whether the preset time is reached, when the preset time is reached, the MCU sends a notice of reaching the preset time to the EC, and the EC determines that the condition for triggering the self-check is met according to the received notice.
When the embodiment of the application is implemented, the battery is kept to store certain electric quantity, so that when the system of the electronic equipment is powered off, the micro-control unit works because the battery still stores the electric quantity, or a timer in the micro-control unit keeps timing, so that whether the system power off reaches the preset time or not is detected.
In one example, as shown in fig. 3, a schematic flowchart of a process 300 for determining whether the power of the electronic device reaches the preset time since the last power-up according to an embodiment of the present application includes step A1:
in step A1, when the electronic equipment is powered off after last power-on, a timer in the micro control unit is started.
In step A2, when the timer reaches the preset time after counting, it is determined that the electronic device is powered off to reach the preset time.
Because the MCU module of the battery in the current system has a timing function, and when the power is cut off, certain electric quantity is still stored in the battery, the MCU module in the battery can be always in a working state, and meanwhile, the timer in the MCU module can keep timing. Thus, the MCU module may be employed for timing. It should be noted that, when the solid state disk in the embodiment of the present application is stored, the solid state disk may be subjected to multiple brush-up processes, so that the preset time may change after each brush-up process, and therefore, when the system is powered off again, the timer in the embodiment of the present application should restart according to the new preset time.
In step S202, a power supply enabling signal is sent to the solid state disk under the condition that the triggering self-checking condition is met, so that the solid state disk is powered on and self-checked according to the power supply enabling signal.
According to the embodiment of the application, the Firmware (FW) of the micro control unit is adjusted to realize timing, and the Embedded Controller (EC) is informed to send a power supply enabling signal to the solid state disk through the bus (SMBus) at regular intervals (for example, every 8 weeks), so that the battery supplies power to the solid state disk. The SSD after power supply may perform data refresh under certain conditions, and notify the system of power failure after refresh, and simultaneously feed back a new data retention time (i.e. a new preset time) to the micro control unit of the battery, and start a new round of timing. The battery and the embedded controller interact through a bus (SMBus). Communication between EC and SSD is also via bidirectional bus SMBus.
The battery is connected with the solid state disk through a converter (counter) and supplies power to the solid state disk, and the EC controls the converter (counter) to output voltage to the solid state disk SSD through an enabling signal (en), so that the process of supplying power to the solid state disk SSD is realized, after the power is supplied, the solid state disk SSD performs self-checking, and whether error correction of an error checking and correcting technology (ECC) is needed is judged according to the error correction rate of the ECC.
In one embodiment of the application, after the solid state disk is self-checked, determining an error correction rate range of the solid state disk according to a self-check result, and performing corresponding error correction processing on the solid state disk according to the error correction rate range.
The way of error correction processing performed in the different error correction rate ranges is described below.
In a first example, when the error correction rate range of the solid state disk is within a first preset error correction rate range, the solid state disk sends a power-off notification to the embedded controller, wherein the power-off notification is sent to the embedded controller, and the power-off notification is kept unchanged for the preset time, so that the embedded controller controls the solid state disk to be powered off.
The embedded controller EC of the embodiment of the present application sends a notification signal to the embedded controller at a preset time (for example, every 8 weeks) through a timing function of the micro control unit in the battery, so as to notify the embedded controller that the preset time has been reached. The embedded controller EC may thus determine that the condition for the solid state disk power-on self-test has been reached, whereupon the embedded controller EC sends a power supply enable signal (en) to cause the battery to power the solid state disk SSD.
In this example, after the SSD self-checking, when the error correction rate of the SSD is found to be within the first preset error correction rate range, the first preset error correction rate range indicates that the bad codes of the SSD are fewer, so that the data stored in the SSD is not required to be refreshed, and the preset time is not required to be changed. Therefore, the solid state disk can send a notification of keeping the preset time unchanged and powering off to the embedded controller.
For example, the first preset error correction rate range is: the error correction rate is <30%. When the error correction rate is less than 30% during the self-checking of the solid state disk, the solid state disk informs the embedded controller EC to power off the system through the bus SMBus, and the solid state disk is kept in a storage state.
In a second example, when the error correction rate range of the solid state disk is within a second preset error correction rate range, the solid state disk sends a notification that the preset time is changed to a first preset time and power is turned off to the embedded controller, so that the embedded controller notifies the micro control unit to change the preset time to the first preset time, and meanwhile power-off processing is performed on the solid state disk.
In this example, after the SSD self-checking, when the error correction rate of the SSD is found to be within the second preset error correction rate range, the second preset error correction rate range indicates that the number of bad codes of the SSD is greater, but the SSD is not required to be refreshed. Therefore, the solid state disk can send a notification of power failure to the embedded controller, wherein the notification is that the preset time is changed to the first preset time.
For example, the second preset error correction rate range is: 30% < error correction rate <80%. When the error correction rate is more than 30% and less than 80% during the self-checking of the solid state disk, the solid state disk informs the embedded controller EC through the bus SMBus to change the preset time to the first preset time, and then the power-off notification is carried out.
Correspondingly, when the timer in the MCU counts time, the timer counts time by taking the current power-off time as the starting time, and when the first preset time is reached, the embedded controller is informed that the first preset time is reached.
In a third example, when the error correction rate range of the solid state disk is within a third preset error correction rate range, the solid state disk performs data refreshing processing; and after finishing data refreshing, the solid state disk sends a notification of changing the preset time to a second preset time and powering off to the embedded controller, so that the embedded controller notifies the micro control unit to change the preset time to the second preset time, and simultaneously the solid state disk is powered off.
In this example, after the SSD self-checking, when the error correction rate of the SSD is found to be within the third preset error correction rate range, the second preset error correction rate range indicates that the number of bad codes of the SSD is very large, and the data stored in the SSD needs to be refreshed. After the solid state disk finishes data refreshing, the solid state disk sends a notification of changing the preset time into a second preset time and performing power-off to the embedded controller.
For example, the third preset error correction rate range is: the error correction rate is >80%. When the error correction rate is greater than 80%, the solid state disk refreshes the data through an ECC technology, and then the embedded controller EC is notified through the bus SMBus to send a notification of changing the preset time into a second preset time and performing power-off.
Correspondingly, when the timer in the MCU counts time, the timer counts time by taking the current power-off time as the starting time, and when the second preset time is reached, the embedded controller is informed that the second preset time is reached.
In one embodiment of the present application, the preset time is at least based on an error correction rate of the solid state disk and an ambient temperature. That is, when the solid state disk determines the preset time (or the first preset time or the second preset time), the current error correction rate and the ambient temperature of the solid state disk need to be corresponding to each other. For example, when the current error correction rate is between 30% and 80%, the error correction rate is higher, but no refresh is needed, and the design interaction frequency should be adaptively increased, that is, the preset time is shortened, so that the first preset time is smaller than the second preset time. While referring also to the temperature of the current zone, for example, the current temperature is 8 weeks, the first preset time should be shorter than 8 weeks.
The embodiment of the application can effectively ensure that the solid state disk periodically patrols the state of the solid state disk, and determines whether to correct the error of the solid state disk according to the state of the solid state disk so as to execute a data refreshing action and ensure the data integrity of the solid state disk.
Meanwhile, for users in different areas, due to different local environment temperatures, the embodiment of the application can reset the preset time after data refreshing, so that the preset time is more matched with the local environment temperature, and the requirements of users in different areas are met.
Fig. 4 is a schematic flow chart of a data protection method of a solid state disk according to another embodiment of the present application. The data protection method 400 of the solid state disk according to the embodiment of the present application may include the following steps S401, S402, S403, S404, S405, S406, S407, S408, S409, S410, and S411;
in step S401, a user shutdown instruction is received.
After receiving a user shutdown instruction, the electronic device of the embodiment of the application can power off the system so as to shut down the electronic device. However, the embodiment of the application requires that the battery still stores certain electric quantity for the self-checking of the power-on of the solid state disk. In other embodiments, the power-on self-test of the solid state disk can be realized through an external power supply, and the timing is performed in other feasible timing modes. All embodiments according to the inventive concept should be considered as falling within the scope of the application.
In step S402, the solid state disk receives a power failure notification sent by the system.
In step S403, the solid state disk performs data storage and feeds back to a time threshold for system data retention.
The time threshold is determined according to the error correction rate of the solid state disk and the ambient temperature. For example, when the current error correction rate is between 30% and 80%, the error correction rate is higher, but no refresh is needed, and the design interaction frequency should be adaptively increased. While referring also to the temperature of the current zone, for example, the current temperature is 8 weeks, the first preset time should be shorter than 8 weeks.
In step S404, the micro control unit of the battery determines according to the time threshold fed back by the solid state disk.
For example, the time threshold is 8 weeks. In other embodiments, the micro-control unit may also feed back the time threshold to the EC, determine the time threshold by the EC, and send an instruction for power-on self-test to the solid state disk.
In step S405, when the power-off time of the solid state disk is equal to the data storage time threshold, the embedded controller powers on the solid state disk.
The embedded controller sends a power supply enabling instruction to the converter, and the converter controls the battery to supply power for the solid state disk.
In step S406, the solid state disk is powered on for self-checking, and whether the error correction rate range is greater than 80%, or whether the error correction rate range is greater than 30% and less than 80%; if it is more than 80%, step S407 is performed; if it is more than 30% and less than 80%, step S410 is performed; otherwise, the process returns to step S402.
In step S407, after the solid state disk is powered on, data refreshing is performed. When the error correction rate of the solid state disk is larger, the fact that the data in the solid state disk has a large number of bad codes is indicated, so that ECC error correction is needed to be carried out on the data, namely, the data are refreshed.
In step S408, after the data refreshing of the solid state disk is finished, the system is notified to power off, and a new data saving time threshold is fed back to the system side. After the data is refreshed, since the error correction rate of the solid state disk has changed, a new time threshold should be set for the solid state disk according to the changed error correction rate and the current environment temperature.
In step S409, the embedded controller powers off the solid state disk and feeds back a new data saving time threshold to the micro control unit, and then returns to execute step S404.
The embedded controller sends the new time threshold to the micro-control unit to facilitate timing by the micro-control unit. And when the timing of the micro control unit reaches a new time threshold, the embedded controller is notified again.
In step S410, the solid state disk notifies the system of power failure, and feeds back a new adjustment patrol frequency. Here, the patrol frequency is adjusted to correspond to the time threshold; those skilled in the art will appreciate that a small time threshold will result in a high patrol frequency and a large time threshold will result in a low patrol frequency.
In step S411, the embedded controller powers off the solid state disk, and feeds back a new data saving time threshold to the micro control unit, and then returns to execute step S404.
According to the data protection method for the solid state disk, when the triggering self-checking condition is met, the solid state disk is electrified and self-checked, then the error correction rate range of the solid state disk is determined according to the self-checking result, and corresponding error correction processing is carried out on the solid state disk according to the error correction rate range, so that the state of the solid state disk can be effectively ensured to be regularly checked, whether error correction is carried out or not is determined according to the state of the solid state disk, and corresponding data refreshing is carried out, and therefore the data integrity of the solid state disk is ensured.
The electronic device of the application is described below in connection with fig. 5, wherein fig. 5 shows a schematic block diagram of an electronic device according to an embodiment of the application.
As shown in fig. 5, the electronic device according to the embodiment of the present application includes a micro control unit 5021, an embedded controller 501 and a solid state disk 503.
The micro control unit 5021 is disposed in the battery 502, and the micro control unit 5021 is connected with the embedded controller 501 and the battery 502, and is configured to send the timing time of the timer in the micro control unit 5021 to the embedded controller 501, and is configured to control the battery 502 to supply power to the solid state disk 503.
In one example, the battery is connected to the solid state disk 503 through a converter 504 and provides Power to the solid state disk 503 through the converter 504.
The embedded controller 501 is connected to the solid state disk 503 and the micro control unit 5021, and is configured to determine whether to send a power supply enabling signal (en) to the solid state disk 503 according to the timing time sent by the micro control unit 5021; and when receiving the request for refreshing the solid state disk 503 and powering off, the method sends a request for refreshing the preset time to the micro control unit 5021, and controls the solid state disk 503 to power off.
In one example, embedded controller 501 is coupled to battery 502 via a bidirectional bus (SMBus) and is also coupled to solid state disk 503 via a bidirectional bus (SMBus). When sending the enable signal en, the embedded controller 501 sends the enable signal en to the converter, so that the battery 502 can output voltage to the solid state disk through the converter 504, so as to realize the process of supplying power to the solid state disk.
The solid state disk 503 is powered on when receiving the power supply enable signal (en) sent by the micro control unit 5021, performs self-checking, determines an error correction rate range of the solid state disk 503 according to a self-checking result, and performs corresponding error correction processing according to the error correction rate range.
The electronic device is used for realizing the data protection method of the solid state disk in any embodiment shown in fig. 2-4.
Further, the embedded controller 501 is configured to:
detecting whether a condition for triggering self-checking is met when the electronic equipment is in a power-off state and the battery 502 is in a power-on state;
under the condition that the triggering self-checking condition is met, a power supply enabling signal is sent to the solid state disk 503, so that the solid state disk 503 is electrified and self-checked according to the power supply enabling signal;
after the solid state disk 503 is self-inspected, determining an error correction rate range of the solid state disk 503 according to a self-inspection result, and performing corresponding error correction processing on the solid state disk 503 according to the error correction rate range.
In addition, according to an embodiment of the present application, there is further provided a storage medium on which program instructions are stored, which when executed by a computer or a processor are configured to perform the corresponding steps of the data protection method for a solid state disk according to the embodiment of the present application. The storage medium may include, for example, a memory card of a smart phone, a memory component of a tablet computer, a hard disk of a personal computer, read-only memory (ROM), erasable programmable read-only memory (EPROM), portable compact disc read-only memory (CD-ROM), USB memory, or any combination of the foregoing storage media.
The electronic equipment and the storage medium provided by the embodiment of the application have the same advantages as the data protection method of the solid state disk because the data protection method of the solid state disk can be realized.
Although the illustrative embodiments have been described herein with reference to the accompanying drawings, it is to be understood that the above illustrative embodiments are merely illustrative and are not intended to limit the scope of the present application thereto. Various changes and modifications may be made therein by one of ordinary skill in the art without departing from the scope and spirit of the application. All such changes and modifications are intended to be included within the scope of the present application as set forth in the appended claims.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
In the several embodiments provided by the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described device embodiments are merely illustrative, e.g., the division of the elements is merely a logical functional division, and there may be additional divisions when actually implemented, e.g., multiple elements or components may be combined or integrated into another device, or some features may be omitted or not performed.
In the description provided herein, numerous specific details are set forth. However, it is understood that embodiments of the application may be practiced without these specific details. In some instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.
Similarly, it should be appreciated that in order to streamline the application and aid in understanding one or more of the various inventive aspects, various features of the application are sometimes grouped together in a single embodiment, figure, or description thereof in the description of exemplary embodiments of the application. However, the method of the present application should not be construed as reflecting the following intent: i.e., the claimed application requires more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single disclosed embodiment. Thus, the claims following the detailed description are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate embodiment of this application.
It will be understood by those skilled in the art that all of the features disclosed in this specification (including any accompanying claims, abstract and drawings), and all of the processes or units of any method or apparatus so disclosed, may be combined in any combination, except combinations where the features are mutually exclusive. Each feature disclosed in this specification (including any accompanying claims, abstract and drawings), may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise.
Furthermore, those skilled in the art will appreciate that while some embodiments described herein include some features but not others included in other embodiments, combinations of features of different embodiments are meant to be within the scope of the application and form different embodiments. For example, in the claims, any of the claimed embodiments may be used in any combination.
Various component embodiments of the application may be implemented in hardware, or in software modules running on one or more processors, or in a combination thereof. Those skilled in the art will appreciate that some or all of the functions of some of the modules according to embodiments of the present application may be implemented in practice using a microprocessor or Digital Signal Processor (DSP). The present application can also be implemented as an apparatus program (e.g., a computer program and a computer program product) for performing a portion or all of the methods described herein. Such a program embodying the present application may be stored on a computer readable medium, or may have the form of one or more signals. Such signals may be downloaded from an internet website, provided on a carrier signal, or provided in any other form.
It should be noted that the above-mentioned embodiments illustrate rather than limit the application, and that those skilled in the art will be able to design alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps not listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The application may be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means may be embodied by one and the same item of hardware. The use of the words first, second, third, etc. do not denote any order. These words may be interpreted as names.
The foregoing description is merely illustrative of specific embodiments of the present application and the scope of the present application is not limited thereto, and any person skilled in the art can easily think about variations or substitutions within the scope of the present application. The protection scope of the application is subject to the protection scope of the claims.
Claims (10)
1. The data protection method for the solid state disk is characterized by being applied to electronic equipment, wherein the solid state disk, a battery and an embedded controller are arranged in the electronic equipment, and the method comprises the following steps:
detecting whether a condition for triggering self-checking is met or not under the condition that the electronic equipment is in a power-off state and the battery is in a power-on state;
under the condition that the triggering self-checking condition is met, a power supply enabling signal is sent to the solid state disk, so that the solid state disk is electrified and self-checked according to the power supply enabling signal;
after self-checking, the solid state disk determines an error correction rate range of the solid state disk according to a self-checking result, and performs corresponding error correction processing on the solid state disk according to the error correction rate range.
2. The method of claim 1, wherein the condition triggering self-test comprises: the electronic equipment is powered off for a preset time from the last power-on.
3. The method of claim 2, wherein the electronic device further comprises a micro-control unit, the micro-control unit comprising a timer; judging whether the power-off of the electronic equipment reaches the preset time from the last power-on or not comprises the following steps:
when the electronic equipment is powered off after last power-on, starting a timer in the micro control unit;
and when the timer reaches the preset time after counting, determining that the power-off of the electronic equipment reaches the preset time.
4. The method of claim 2, wherein when the error correction rate range of the solid state disk is within a first preset error correction rate range, the solid state disk sends a power-off notification to the embedded controller to keep the preset time unchanged, so that the embedded controller controls the solid state disk to power off.
5. The method of claim 2, wherein when the error correction rate range of the solid state disk is within a second preset error correction rate range, the solid state disk sends a notification to the embedded controller that the preset time is changed to a first preset time and power is turned off, so that the embedded controller notifies the micro control unit to change the preset time to the first preset time and power off processing is performed on the solid state disk.
6. The method of claim 2, wherein when the error correction rate range of the solid state disk is within a third preset error correction rate range, the solid state disk performs data refresh processing; and after finishing data refreshing, the solid state disk sends a notification of changing the preset time to a second preset time and powering off to the embedded controller, so that the embedded controller notifies the micro control unit to change the preset time to the second preset time, and simultaneously the solid state disk is powered off.
7. The method of claim 2, wherein the preset time is based at least on an error correction rate of the solid state disk and an ambient temperature.
8. An electronic device, the electronic device comprising:
the micro control unit is arranged in the battery, is connected with the embedded controller and the battery, and is used for sending the timing time of the timer in the micro control unit to the embedded controller and controlling the battery to supply power to the solid state disk;
the embedded controller is connected with the solid state disk and the micro control unit and is used for judging whether to send a power supply enabling signal to the solid state disk according to the timing time sent by the micro control unit; when receiving a request for refreshing preset time and powering off the solid state disk, sending a request for refreshing the preset time to the micro control unit, and controlling the solid state disk to power off;
the solid state disk is powered on when receiving a power supply enabling signal sent by the micro control unit, performs self-checking, determines an error correction rate range of the solid state disk according to a self-checking result, and performs corresponding error correction processing according to the error correction rate range;
the electronic device is used for realizing the data protection method of the solid state disk as claimed in claims 1 to 7.
9. The electronic device of claim 8, wherein the embedded controller is configured to:
detecting whether a condition for triggering self-checking is met or not under the condition that the electronic equipment is in a power-off state and the battery is in a power-on state;
under the condition that the triggering self-checking condition is met, a power supply enabling signal is sent to the solid state disk, so that the solid state disk is electrified and self-checked according to the power supply enabling signal;
after self-checking, the solid state disk determines an error correction rate range of the solid state disk according to a self-checking result, and performs corresponding error correction processing on the solid state disk according to the error correction rate range.
10. A storage medium having stored thereon a computer program which, when executed by a processor, causes the processor to perform a method of protecting data of a solid state disk as claimed in any one of claims 1 to 7.
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| CN202311245098.2A CN116992504A (en) | 2023-09-26 | 2023-09-26 | Data protection method for solid state disk, electronic equipment and storage medium |
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