CN116980574A - Constant-speed high-frame-rate projection control circuit, method and industrial optical machine - Google Patents

Abstract

The application discloses a constant-speed high-frame-rate projection control circuit, a constant-speed high-frame-rate projection control method and an industrial optical machine, wherein the circuit comprises: the device comprises a main control module, a DLP display module, a light source driving module, a first external control module and a second external control module; the master control module comprises a master control unit and a PWM trigger unit; the master control unit is used for receiving a trigger input signal of the first external control module, and the PWM trigger unit is used for generating a PWM pulse signal to trigger the DLP control module; the DLP control module is used for controlling the projection picture according to the PWM pulse signal; the DLP display module and the light source driving module are used for realizing the output of structured light according to the projection picture; the DLP control module is used for sending a synchronous signal to the camera for acquisition when the projection picture is controlled; the main control unit is used for generating a trigger output signal to the second external control module after the synchronous signals reach the preset quantity. The application can output structured light through uniform high-frame-rate projection; the function of projecting one or more groups of patterns by external one-time triggering is supported.

Description

Constant-speed high-frame-rate projection control circuit, method and industrial optical machine

Technical Field

The application relates to the technical field of structured light projection, in particular to a constant-speed high-frame-rate projection control circuit and method and an industrial optical machine.

Background

Structured light is a set of system structures consisting of projectors and cameras. The projector projects specific light information to the surface of the object and the background, and the specific light information is collected by the camera. And calculating information such as the position, the depth and the like of the object according to the change of the optical signal caused by the object, and further restoring the whole three-dimensional space.

The TI company has proposed industrial DMDs (digital micromirror devices) such as DLP2010LC, 3010LC, 4710LC, etc., and a matched DLPC controller (light controller of DLP technology) that provides 1D fringe pattern structured light projection of internal modes 1bit and 8bit, and is commonly used in the fields of 3D AOI (automatic optical inspection), SPI (solder paste inspection), visual scanning, etc. DLPC internal mode projection supports receiving an external run command to trigger a complete batch of picture projections and trigger a single picture projection. The exposure timing (Pattern setorder table) of the pattern set is supported, i.e. the exposure period (front dark field time + exposure time + rear dark field time) of the specified 1-N pattern sets is set to control the frame rate, the LED light source is controlled by the DLP controller and the DMD micromirror is controlled to realize digital structured light projection, but the following disadvantages exist:

1) DLPC supports RUNONCE command projection, IIC command is required to be sent to DLPC and the DLPC waits for preloading treatment, and projection is started after delay of more than 5-20ms (the projection delay time is influenced by the configured exposure period time), so that the comprehensive frame rate is reduced;

2) DLPC supports TRIGGER IN single-image projection, but only a single image can be projected by one trigger, and external multiple triggers are needed to completely project one round. Triggering and projecting one pattern set at a time is not supported, or one round of pictures of all pattern sets are projected at a time;

3) The internal pattern is stored and loaded according to pattern set groups, and 7-8 pieces of 8-bit 1D images (taking DLP4710 as an example, 7 transverse images and 8 vertical images at most) can be stored in each pattern set, so that more pattern set sets can not be directly supported;

4) If only the exposure projection frame rate of pattern circulating in a single pattern set in the whole time sequence table can achieve the highest 427 frame (because reloading is not needed), the total pattern number of the single pattern set cannot meet the requirement of clients;

5) Since most structured light projection applications actually use at least 10 patterns, multiple patterns sets are required for projection. When the projection is switched to the next pattern set, extra loading time exists in the middle; the greater the number of patterns that the next pattern set contains, the longer the load time. And therefore cannot output structured light at a uniform high frame rate.

6) For reasons of cost, the highest frame rate of the matched high-resolution industrial camera is lower than the highest frame rate of the DLP optical machine projection, and the projection frame rate must be reduced to match the highest frame rate of the camera so as to ensure that the industrial camera can work normally. However, after the reduction, due to the reasons described above, the average integrated projection frame rate and the camera acquisition frame rate are lower than the highest frame rate of the camera due to the existence of the switch loading time in the plurality of pattern sets. Causing the camera to have idle waiting. Therefore, the application provides a constant-speed high-frame-rate projection control circuit, which is a problem to be solved by those skilled in the art.

Disclosure of Invention

The application aims to provide a constant-speed high-frame-rate projection control circuit and an industrial optical machine, wherein in the scheme, a main control unit receives a trigger input signal of a first external control module, and a PWM trigger unit generates a PWM pulse signal to trigger a DLP control module; the DLP control module controls the projection picture according to the PWM pulse signal; the DLP display module and the light source driving module are used for realizing the output of structured light according to the projection picture; the DLP control module sends a synchronous signal to the camera for acquisition when controlling the projection picture; the main control unit generates trigger output signals to the second external control module after the synchronous signals reach the preset quantity, so that the function of projecting one or more groups of patterns by external one-time triggering is realized, and the uniform-speed high-frame-rate projection output structured light is realized.

In order to solve the technical problems, the application provides a uniform-speed high-frame-rate projection control circuit, which comprises a main control module, a DLP display module, a light source driving module, a first external control module and a second external control module; the master control module comprises a master control unit and a PWM trigger unit;

the master control unit is electrically connected with the first external control module, the PWM trigger unit is electrically connected with the master control unit, the DLP control module is electrically connected with the PWM trigger unit, and the DLP display module is electrically connected with the DLP control module;

the light source driving module is electrically connected with the DLP control module, and the DLP control module and the main control unit are electrically connected with the second external control module;

the master control unit is used for receiving a trigger input signal of the first external control module, and the PWM trigger unit is used for generating a PWM pulse signal to trigger the DLP control module;

the DLP control module is used for performing display processing control on the projection pictures according to the PWM pulse signals; the DLP display module and the light source driving module are used for realizing structured light output according to the projection picture;

the DLP control module is used for sending a synchronous signal to a camera for acquisition when controlling the projection picture;

the main control unit is used for generating a trigger output signal to the second external control module after the synchronous signals reach a preset number.

Preferably, the uniform high frame rate projection control circuit further comprises an input filtering module;

the first external control module is electrically connected with the input filter module, and the main control unit is electrically connected with the input filter module.

Preferably, the constant-speed high-frame-rate projection control circuit further comprises an isolation output module;

the second external control module is electrically connected with the isolation output module, and the isolation output module is electrically connected with the main control unit.

Preferably, the constant-speed high-frame-rate projection control circuit further comprises a USB module and a FLASH storage module;

the USB module is respectively and electrically connected with the upper computer, the DLP control module and the FLASH storage module, and the FLASH storage module is electrically connected with the DLP control module;

the USB module is used for realizing the burning of projection data;

and the FLASH storage module is used for realizing configuration loading of starting initialization.

Preferably, the main control module further comprises a bus transceiving unit, an input buffer unit and an output buffer unit;

the bus transceiver unit is electrically connected with the input buffer unit and the output buffer unit respectively;

the input buffer unit is respectively and electrically connected with the input filtering module and the DLP control module;

the output buffer unit is electrically connected with the isolation output module and the DLP control module respectively.

Preferably, the main control module further comprises a debugging unit;

the debugging unit is electrically connected with the main control unit.

In order to solve the technical problem, the application also provides a uniform-speed high-frame-rate projection control method, which comprises the following steps:

receiving a trigger input signal of the first external control module;

generating a PWM pulse signal according to the trigger input signal to trigger the DLP control module;

performing display processing control of the projection picture according to the PWM pulse signal;

realizing structured light output according to the projection picture;

sending a synchronous signal to a camera for acquisition when the control of the projection picture is carried out;

and generating a trigger output signal to the second external control module after the synchronization signal reaches a preset number.

Preferably, the method further comprises:

making a pattern set package by the upper layer of the upper computer;

the loading time of each pattern set is controlled to be consistent.

Preferably, the method further comprises:

respectively acquiring the front dark field time, the exposure time, the rear dark field time and the total period time of the loading time of pattern set in a complete period of one exposure;

acquiring total dark field time of the front dark field time and the rear dark field time;

and obtaining a difference value between the total dark field time and the loading time, wherein the difference value meets the sum of minimum front dark field time and minimum back dark field time.

In order to solve the technical problems, the application provides an industrial optical machine, which comprises the uniform-speed high-frame-rate projection control circuit.

The constant-speed high-frame-rate projection control circuit has the following beneficial effects that the constant-speed high-frame-rate projection control circuit disclosed by the application comprises the following components: the device comprises a main control module, a DLP display module, a light source driving module, a first external control module and a second external control module; the master control module comprises a master control unit and a PWM trigger unit; the master control unit is used for receiving a trigger input signal of the first external control module, and the PWM trigger unit is used for generating a PWM pulse signal to trigger the DLP control module; the DLP control module is used for performing display processing control on the projection pictures according to the PWM pulse signals; the DLP display module and the light source driving module are used for realizing structured light output according to the projection picture; the DLP control module is used for sending a synchronous signal to a camera for acquisition when controlling the projection picture; the main control unit is used for generating a trigger output signal to the second external control module after the synchronous signals reach a preset number. According to the application, the DLP control module is triggered by the PWM trigger unit, and the DLP control module supports triggering projection of one picture at a time; in addition, when the DLP control module starts projecting a picture, a synchronous signal is sent to an external camera for acquisition, and after the synchronous signal reaches a preset number, the main control module outputs a continuous trigger signal to the outside, so that uniform-speed high-frame-rate projection control is realized. Therefore, the application can output the structured light by uniform high-frame-rate projection and has high reliability.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the present application will be further described with reference to the accompanying drawings and embodiments, in which the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained by those skilled in the art without inventive effort:

FIG. 1 is a schematic diagram of a constant speed high frame rate projection control circuit according to a preferred embodiment of the present application;

FIG. 2 is a schematic diagram of a constant speed high frame rate projection control circuit according to a preferred embodiment of the present application;

FIG. 3 is a schematic diagram of a constant speed high frame rate projection control circuit according to a preferred embodiment of the present application;

FIG. 4 is a schematic diagram of a constant speed high frame rate projection control circuit according to a preferred embodiment of the present application;

FIG. 5 is a schematic diagram of a constant speed high frame rate projection control circuit in accordance with a preferred embodiment of the present application;

FIG. 6 is a schematic diagram of a constant velocity high frame rate projection control method according to a preferred embodiment of the present application;

FIG. 7 is a timing diagram of a constant speed high frame rate projection control method according to a preferred embodiment of the present application;

FIG. 8 is a diagram of exposure configuration data for a constant speed high frame rate projection control method according to a preferred embodiment of the present application;

FIG. 9 is a diagram of exposure configuration data for a constant speed high frame rate projection control method according to a preferred embodiment of the present application;

fig. 10 is a diagram of exposure configuration data of a constant-speed high-frame-rate projection control method according to a preferred embodiment of the present application.

Detailed Description

The application provides a constant-speed high-frame-rate projection control circuit and an industrial optical machine, wherein in the scheme, a PWM trigger unit triggers a DLP control module, and the DLP control module supports triggering projection of one picture at a time; in addition, when the DLP control module starts projecting a picture, a synchronous signal is sent to an external camera for acquisition, and after the synchronous signal reaches a preset number, the main control module outputs a continuous trigger signal to the outside, so that uniform-speed high-frame-rate projection control is realized. .

For the purpose of making the objects, technical solutions and advantages of the embodiments of the present application more apparent, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments of the present application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.

Referring to fig. 1, fig. 1 is a schematic structural diagram of a constant-speed high-frame-rate projection control circuit provided by the application, which comprises a main control module 1, a DLP control module 2, a DLP display module 3, a light source driving module 4, a first external control module 5 and a second external control module 6; the main control module 1 comprises a main control unit 11 and a PWM trigger unit 12;

the master control unit 11 is electrically connected with the first external control module 5, the PWM trigger unit 12 is electrically connected with the master control unit 11, the DLP control module 2 is electrically connected with the PWM trigger unit 12, and the DLP display module 3 is electrically connected with the DLP control module 2;

the light source driving module 4 is electrically connected with the DLP control module 2, and the DLP control module 2 and the main control unit 11 are electrically connected with the second external control module 6;

the main control unit 11 is used for receiving a trigger input signal of the first external control module 5, and the PWM trigger unit 12 is used for generating a PWM pulse signal to trigger the DLP control module 2;

the DLP control module 2 is used for controlling projection pictures according to the PWM pulse signals; the DLP display module 3 and the light source driving module 4 are used for realizing the output of structured light according to the projection picture;

the DLP control module 2 is used for sending a synchronous signal to the camera for acquisition when the control of the projection picture is carried out;

the main control unit 11 is configured to generate a trigger output signal to the second external control module 6 after the synchronization signal reaches a preset number.

In the prior art, structured light is a set of system structures consisting of projectors and cameras. The projector projects specific light information to the surface of the object and the background, and the specific light information is collected by the camera. And calculating information such as the position, the depth and the like of the object according to the change of the optical signal caused by the object, and further restoring the whole three-dimensional space. The display chip in the DLP projector is an imaging device, and tens of millions of micro-lenses are arranged on the chip, each micro-lens has the capability of independently controlling the light to be switched on and off, when the light of the light source passes through the color wheel and reaches the display chip, the reflected light is regulated by the micro-lenses, and therefore gray-level images with different brightness are formed.

The DLPC controller internal mode projection of TI supports RUNONCE command projection, but requires IIC command transmission to the DLPC and waiting for the pre-load process to start external projection with a delay of more than 5-20ms, resulting in a drop in the overall frame rate. And because of the mechanism limiting mode of the DLPC nonce command, the trigger waiting time of 5-20ms cannot be eliminated under the influence of the factors such as iic command processing, pattern loading, configured projection exposure period and the like.

In view of the above drawbacks, as shown in fig. 1, the present application is provided with a main control module 1, a DLP control module 2, a DLP display module 3, a light source driving module 4, a first external control module 5, and a second external control module 6; the main control module 1 comprises a main control unit 11 and a PWM trigger unit 12, is switched to trigger input of the DLPC, triggers the DLP control module by setting the PWM trigger unit, and sends a synchronous signal to an external camera for acquisition when the DLP control module starts projecting a picture, and the main control module outputs continuous trigger signals outwards after the synchronous signal reaches a preset quantity, so that uniform-speed high-frame-rate projection control is realized.

In summary, the present application provides a constant-speed high-frame-rate projection control circuit, in which, in this scheme, a main control unit 11 is configured to receive a trigger input signal of a first external control module 6, and a PWM trigger unit 12 is configured to generate a PWM pulse signal to trigger a DLP control module 2; the DLP control module 2 is used for performing display processing control of the projection pictures according to the PWM pulse signals; the DLP display module 3 and the light source driving module 4 are used for realizing the output of structured light according to the projection picture; the DLP control module 2 is used for sending a synchronous signal to the camera for acquisition when the control of the projection picture is carried out; the main control unit 11 is configured to generate a trigger output signal to the second external control module after the synchronization signal reaches a preset number. According to the application, the DLP control module is triggered by the PWM trigger unit, and the DLP control module supports triggering projection of one picture at a time; in addition, when the DLP control module starts projecting a picture, a synchronous signal is sent to an external camera for acquisition, and after the synchronous signal reaches a preset number, the main control module outputs a continuous trigger signal to the outside, so that uniform-speed high-frame-rate projection control is realized. Therefore, the application can output the structured light by uniform high-frame-rate projection and has high reliability.

Based on the above embodiments:

referring to fig. 2, fig. 2 is a schematic structural diagram of a constant-speed high-frame-rate projection control circuit according to the present application.

As a preferred embodiment, a uniform high frame rate projection control circuit further includes an input filter module 7;

the first external control module 5 is electrically connected with the input filter module 7, and the main control unit 11 is electrically connected with the input filter module 7.

Specifically, after the trigger is triggered by the trigger, the main control unit 11 receives the trigger input signal trigger in of the first external control module 5, and the input filtering module is used for filtering the trigger input signal trigger in, so that high-frequency noise of the trigger input signal trigger in is filtered, and the stability of signal input is ensured.

Specifically, the first external control module 5 may be set as the previous optical machine, and the second external control module 6 may be set as the next optical machine.

As a preferred embodiment, a uniform high frame rate projection control circuit further includes an isolated output module 8;

the second external control module 6 is electrically connected with the isolation output module 8, and the isolation output module 8 is electrically connected with the main control unit 11.

Specifically, the main control unit 11 of the present application is configured to generate the trigger output signal trigger out to the second external control module 6 after the synchronization signal reaches the preset number, and the isolation output module 8 is configured to implement signal isolation between the main control unit 11 and the second external control module 6, reduce signal interference, and improve signal transmission stability.

Referring to fig. 3, fig. 3 is a schematic structural diagram of a constant-speed high-frame-rate projection control circuit according to the present application.

As a preferred embodiment, a uniform high frame rate projection control circuit further includes a USB module 9 and a FLASH memory module 10;

the USB module 9 is respectively and electrically connected with the upper computer, the DLP control module 2 and the FLASH storage module 10, and the FLASH storage module 10 is electrically connected with the DLP control module 2;

the USB module 9 is used for realizing the burning of projection data; when the pattern data is written, only one pattern diagram is stored according to each pattern set, so that the load time consistency can be ensured, and the pattern can be output at a constant speed.

The FLASH memory module 10 is used for implementing configuration loading of start initialization.

Referring to fig. 5, fig. 5 is a schematic structural diagram of a constant-speed high-frame-rate projection control circuit according to the present application.

As a preferable embodiment, the application starts initialization loading flash configuration by burning pattern patterns and timing charts through the USB module 9. The USB module 9 may be connected to a host computer, a mobile terminal, or a mobile hard disk, which is not limited herein. The trigger input signal trigger is received by the main control module 1 through IO interruption, a certain number of PWM pulse trigger DLP control modules 2 are generated, and the DLP control modules 2 support triggering projection of one picture at a time; when the DLP control module 2 starts projecting a graph, a synchronous signal is sent to the camera for acquisition, and after a certain number of synchronous signals are accumulated, the main control module 1 outputs a trigger output signal trigger out to the outside.

As a preferred embodiment, the main control module 1 is set as a single chip microcomputer, the model is MSP430F2132, and the hardware model of the main control module 1 is not particularly limited.

As a preferred embodiment, the chip model of the DLP control module 2 is DLPC347X, and the hardware model of the DLP control module is not particularly limited.

As a preferred embodiment, the chip model of the DLP display module 3 is DLP2010LC, DLP3010 or DLP4710LC, and the hardware model of the DLP display module 3 is not particularly limited.

As a preferred embodiment, the chip model of the light source driving module 4 is DLPA3005, and the hardware model of the light source driving module 4 is not particularly limited.

As a preferred embodiment, the chip model of the USB module 9 is CY7C65215-32ltxi, and the hardware model of the USB module 9 is not particularly limited.

As a preferred embodiment, the chip model of the FLASH memory module 10 is W25Q64FVZPIG, and the hardware model of the FLASH memory module 10 is not particularly limited.

Referring to fig. 4, fig. 4 is a schematic structural diagram of a constant-speed high-frame-rate projection control circuit according to the present application.

As a preferred embodiment, the main control module 1 further includes a bus transceiver unit 13, an input buffer unit 14, and an output buffer unit 15;

the bus transceiver unit 13 is electrically connected with the main control unit 11, the input buffer unit 14 and the output buffer unit 15 respectively;

the input buffer unit 14 is electrically connected with the main control unit 11, the input filter module 7 and the DLP control module 2 respectively;

the output buffer unit 15 is electrically connected with the main control unit 11, the isolation output module 8 and the DLP control module 2, respectively.

Specifically, the bus transceiver unit 13 is configured to implement data isolation transmission between the main control module 1 and the first external control module 5; the input buffer unit 14 is used for temporarily storing data from the external device so as to be taken away by the main control unit 11; the output buffer unit 15 is used for temporarily storing data sent to the peripheral device by the main control unit 11. It can be understood that the input buffer unit 14 and the output buffer unit 15 are digital buffers, so that the main control unit 11 working at high speed and the peripheral devices working at low speed coordinate and buffer to realize the synchronism of data transmission.

Specifically, the input buffer unit 14 and the output buffer unit 15 are connected to the data bus of the bus transceiver unit 13, and have a tri-state output function. The model of the input buffer unit 14 and the output buffer unit 15 in the application is SN74LVC1G07DCKR.

As a preferred embodiment, the main control module 1 further comprises a debug unit 16;

the debug unit 16 is electrically connected to the main control unit 11 and the keyboard, respectively. It is understood that the debug unit 16 is used to implement debug control of the main control module 1.

In order to solve the technical problems, the application also provides a constant-speed high-frame-rate projection control method.

Referring to fig. 6, fig. 6 is a flowchart of a constant-speed high-frame-rate projection control method according to the present application.

The method comprises the following steps:

s1, receiving a trigger input signal of a first external control module;

s2, generating a PWM pulse signal to trigger a DLP control module;

s3, performing display processing control of the projection picture according to the PWM pulse signal;

s4, realizing structured light output according to the projection picture;

s5, sending a synchronous signal to a camera for acquisition when the projection picture is controlled;

and S6, generating a trigger output signal to the second external control module after the synchronous signals reach the preset quantity.

Preferably, the method further comprises:

making a pattern set package by the upper layer of the upper computer;

the loading time of each pattern set is controlled to be consistent.

Preferably, the method further comprises:

respectively acquiring the front dark field time, the exposure time, the rear dark field time and the total period time of the loading time of pattern set in a complete period of one exposure;

acquiring the sum of the front dark field time and the rear dark field time;

and obtaining a difference value between the sum and the loading time, wherein the difference value meets the sum of the minimum front dark field time and the minimum back dark field time.

Specifically, in the present application, the internal pattern of the DLP control module 2 is stored and loaded in pattern sets, and each pattern set can store 7-8 pieces of 8-bit 1D map at the maximum. In order to offset different loading time waiting when switching among a plurality of pattern sets of the DLP control module 2, the application makes a pattern set package through the upper layer of the upper computer, and when the bottom layer initially writes pattern data through the USB module 9, only one pattern form is stored according to each pattern set. Thus, although the loading time cannot be completely eliminated, the loading time of all pattern sets is substantially uniform. This can offset the loading time by reducing the front-to-back dark field time.

Specifically, let t1=front dark field time (us, minimum 171), t2=exposure time (us, minimum 2084), t3=rear dark field time (us, minimum 33), t4=each pattern set loading time (us). The exposure complete period is as follows: t=t1+t2+t3+t4. Subtracting t4 from the total dark field time of t1 or t3 or t1+t3, the subtraction must satisfy the sum of the minimum front and rear dark field times.

Set new total dark field time= (t1+t3-t 4). New exposure complete period t1=t1+t2+t3 after offset. Therefore, the exposure frame rate of projection can be matched with the highest frame rate acquired by the camera, and the acquisition frame rate can be relatively uniform. Wherein, the frame rate is the frequency (rate) of the continuous appearance of the bitmap image on the projection breadth in units of frames, and the frame rate matching reflects the synergy between the camera and the optical machine.

In the present application, when t1, t2, t3 take the minimum values, the highest frame rate inside a single pattern set can reach 427. But with multiple patterns set, the original integrated frame rate is much smaller than 427 due to the loading time. Considering that the projected frame rate also matches the maximum frame rate of the camera at a uniform rate, the projected frame rate cannot normally be set to the maximum value.

Referring to fig. 7, fig. 7 is a timing chart of a constant-speed high-frame-rate projection control method according to the present application.

Referring to fig. 8, fig. 8 is a diagram of exposure configuration data of a constant-speed high-frame-rate projection control method according to the present application.

If the maximum frame rate of the camera is 180, the maximum frame rate of the projected 12 patterns sets must be 180 or less, and the exposure period time may be t=1000000/180=5556 (us), as shown in fig. 8, the original patterns sets may be divided into 3 groups of 4+4+4. In the original configuration, as shown in FIG. 8, the overall frame rate is only 158-169. The combined frame rate and highest frame rate is approximately 180 in the manner of the new storage configuration and internal trigger in DLPC.

Referring to fig. 9, fig. 9 is a diagram of exposure configuration data of a constant-speed high-frame-rate projection control method according to the present application.

If the maximum frame rate of the camera is 240, it is configured according to the matching frame rate, 12 patterns sets are required to be projected, the period is 4155 at maximum, and according to the original 6+6 configuration mode, as shown in fig. 9, the integrated frame rate is 204-223, and the improved integrated uniform frame rate is close to 240.

Referring to fig. 10, fig. 10 is a diagram of exposure configuration data of a constant-speed high-frame-rate projection control method according to the present application.

If the maximum frame rate 356 of the camera, as shown in fig. 10, 12 patterns sets, is only 281-319 of the integrated frame rate configured in the original manner, and the improved integrated uniform frame rate can basically achieve 355.

In summary, the highest 427 uniform frame rate configuration (the frame rate of the camera must be matched) can be adopted in the case of 1 pattern set, and the highest frame rate of the uniform 355 can be configured in the case of more than 1 pattern set.

In order to complete the situation that one pattern set generates a trigger out1, or in order to realize that only one group of N pictures of pattern set is thrown in one trigger, the master control module 1 reads the total number P and the trigger interval period time T under each original pattern set in the DLPC exposure time sequence table when the MCU is initialized, the MCU stores a virtual pattern set x table, the pattern set x1 corresponds to the pattern number P1 of the original pattern set1, and so on to have the P2. After the MCU receives the external trigger signal, the internal trigger signal of a certain quantity of PX is sent to the DLPC, so that PWM trigger is realized. The MCU can count the camera synchronizing signal trigger out2 generated by the DLPC at the same time.

If one pattern needs to be triggered and projected at a time, PX is set to be 1, DLPC is triggered in sequence, then counting is carried out, when the counting is just PX, an mcu trigger out1 signal is output, and when the counting is complete P, an mcu trigger out completion signal is output.

If a set of pattern setx needs to be triggered at a time, PX is set to p1. And triggering PX for times according to the corresponding interval time, and periodically cycling. And each time a group of pattern sets is thrown, a trigger out1 signal can be sent out, and when the count is complete P, an mcu trigger out completion signal is output.

If all pattern projections need to be triggered at once, PX is set to P. After the internal trigger is once triggered for P times, a plurality of mcu trigger out1 and 1 mcu trigger out finishing signals are respectively output after counting, and are used for realizing cascading or notifying external equipment.

Since the MCU receives external IO signals, a processing time of 20-50us is required, and since each frame has a complete exposure period, a front dark field time, an exposure time, a rear dark field time, and a rear set loading time, the rear dark field time+the rear loading time exceeds 600us. In order to offset the time of the overall integrated frame rate IO processing, the next frame can be cascaded or fed back to an external control end when the final frame is exposed and 100us output mcu out is advanced.

Therefore, the application can maximally improve the uniform projection frame rate of the DLP4710LC optical engine to 356fps. If the maximum frame rate of the high resolution industrial camera is not reached, the projection frame rate can also be adjusted by configuring the projection exposure period to adapt to the maximum acquisition frame rate of the camera.

The application also provides an industrial optical machine, which comprises a constant-speed high-frame-rate projection control circuit.

For an introduction of the constant-speed high-frame-rate projection control circuit provided by the present application, please refer to the above embodiment, and the description of the present application is omitted here.

It should be noted that in this specification the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises an element.

The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. A constant velocity high frame rate projection control circuit, comprising: the device comprises a main control module, a DLP display module, a light source driving module, a first external control module and a second external control module; the master control module comprises a master control unit and a PWM trigger unit;

the master control unit is electrically connected with the first external control module, the PWM trigger unit is electrically connected with the master control unit, the DLP control module is electrically connected with the PWM trigger unit, and the DLP display module is electrically connected with the DLP control module;

the light source driving module is electrically connected with the DLP control module, and the DLP control module and the main control unit are electrically connected with the second external control module;

the master control unit is used for receiving a trigger input signal of the first external control module, and the PWM trigger unit is used for generating a PWM pulse signal to trigger the DLP control module;

the DLP control module is used for performing display processing control on the projection pictures according to the PWM pulse signals; the DLP display module and the light source driving module are used for realizing structured light output according to the projection picture;

the DLP control module is used for sending a synchronous signal to a camera for acquisition when controlling the projection picture;

the main control unit is used for generating a trigger output signal to the second external control module after the synchronous signals reach a preset number.

2. The constant velocity high frame rate projection control circuit of claim 1, further comprising an input filter module;

the first external control module is electrically connected with the input filter module, and the main control unit is electrically connected with the input filter module.

3. The constant velocity high frame rate projection control circuit according to claim 1 or 2, further comprising an isolated output module;

the second external control module is electrically connected with the isolation output module, and the isolation output module is electrically connected with the main control unit.

4. The constant velocity high frame rate projection control circuit according to claim 1, further comprising a USB module and a FLASH memory module;

the USB module is respectively and electrically connected with the upper computer, the DLP control module and the FLASH storage module, and the FLASH storage module is electrically connected with the DLP control module;

the USB module is used for realizing the burning of projection data;

and the FLASH storage module is used for realizing configuration loading of starting initialization.

5. The constant-speed high-frame-rate projection control circuit according to claim 3, wherein the main control module further comprises a bus transceiver unit, an input buffer unit and an output buffer unit;

the bus transceiver unit is electrically connected with the input buffer unit and the output buffer unit respectively;

the input buffer unit is respectively and electrically connected with the input filtering module and the DLP control module;

the output buffer unit is electrically connected with the isolation output module and the DLP control module respectively.

6. The constant velocity high frame rate projection control circuit according to claim 1, wherein the main control module further comprises a debugging unit;

the debugging unit is electrically connected with the main control unit.

7. A method for controlling uniform high frame rate projection, applied to the uniform high frame rate projection control circuit of claim 1, said method comprising:

receiving a trigger input signal of the first external control module;

generating a PWM pulse signal according to the trigger input signal to trigger the DLP control module;

performing display processing control of the projection picture according to the PWM pulse signal;

realizing structured light output according to the projection picture;

sending a synchronous signal to a camera for acquisition when the control of the projection picture is carried out;

and generating a trigger output signal to the second external control module after the synchronization signal reaches a preset number.

8. The method of uniform velocity high frame rate projection control according to claim 7, further comprising:

making a pattern set package by the upper layer of the upper computer;

the loading time of each pattern set is controlled to be consistent.

9. The method of uniform velocity high frame rate projection control according to claim 7, further comprising:

respectively acquiring the front dark field time, the exposure time, the rear dark field time and the total period time of the loading time of each pattern set in a complete period of one exposure;

acquiring total dark field time of the front dark field time and the rear dark field time;

and obtaining a difference value between the total dark field time and the loading time, wherein the difference value meets the sum of minimum front dark field time and minimum back dark field time.

10. An industrial optical machine comprising a constant velocity high frame rate projection control circuit according to any one of claims 1 to 9.