CN116973829B - Chip pin injection waveform calibration method and device - Google Patents
Chip pin injection waveform calibration method and device Download PDFInfo
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- CN116973829B CN116973829B CN202311205203.XA CN202311205203A CN116973829B CN 116973829 B CN116973829 B CN 116973829B CN 202311205203 A CN202311205203 A CN 202311205203A CN 116973829 B CN116973829 B CN 116973829B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R35/00—Testing or calibrating of apparatus covered by the other groups of this subclass
- G01R35/005—Calibrating; Standards or reference devices, e.g. voltage or resistance standards, "golden" references
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/001—Measuring interference from external sources to, or emission from, the device under test, e.g. EMC, EMI, EMP or ESD testing
- G01R31/002—Measuring interference from external sources to, or emission from, the device under test, e.g. EMC, EMI, EMP or ESD testing where the device under test is an electronic circuit
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
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Abstract
The application provides a chip pin injection waveform calibration method and device, and belongs to the field of chip electromagnetic compatibility testing. The method comprises the following steps: acquiring a signal attenuation curve of a pin of a chip to be tested; measuring and acquiring a first waveform at the same sampling frequency; and carrying out Fourier transformation and inverse transformation according to the signal attenuation curve and the first waveform to calculate the injection waveform of the chip pin. The injection waveform of the chip pins is obtained through calculation through the obtained signal attenuation curve and the first waveform with the same frequency, and calibration of the injection waveform of the chip pins is achieved, so that accurate injection of chip pin interference energy is achieved, and the method is further used for failure research of interference waveforms with different characteristics on the chip pins, and the interference waveform sensitive to the chip is obtained.
Description
Technical Field
The application relates to the field of chip electromagnetic compatibility testing, in particular to a chip pin injection waveform calibration method and a chip pin injection waveform calibration device.
Background
The power chip works in secondary equipment in power scenes such as transformer substations, converter stations, distribution network lines and the like, and under the power scenes, along with the operation of switches such as isolating switches and circuit breakers, transient electromagnetic interference can be generated on surrounding space and the lines directly connected with the isolating switches and circuit breakers, normal operation of the secondary equipment and the internal chips is interfered, and even failure of the equipment and the chips can be caused. In recent years, as primary and secondary devices of a transformer substation are fused, the secondary devices and a chip are closer to an interference source, and the electromagnetic interference faced by the secondary devices and the chip is also more serious, so that an electromagnetic immunity experiment needs to be carried out before the chip is applied, and the transient electromagnetic interference resistance of the chip is improved. The injection device is used for simulating the conduction path of the actual interference source coupled to the chip in the equipment, so that the coupling and injection of electromagnetic interference signals are realized, and a necessary coupling path and a test method are provided for the electromagnetic immunity test of the chip.
Existing standards IEC 62215-3 (integrated circuit pulse immunity measurement part 3: asynchronous transient injection method), IEC 62132-2 (integrated circuit electromagnetic immunity measurement part 2: determination of radiation immunity, transverse electromagnetic wave transmission chamber and broadband transverse electromagnetic wave transmission chamber method), and IEC 62132-8 (integrated circuit electromagnetic immunity measurement part 8: radiation immunity measurement, integrated Circuit (IC) dielectric stripline method) also prescribe on-chip conducted and radiated electromagnetic immunity experimental methods, but it only makes simple suggestions for experimental and injection methods, and does not prescribe information such as experimental grade and injection energy. The method of the disturbance injection is not specified in the conduction test IEC 62215-3 standard, but only the functions of the injection device are suggested, and the information such as the energy actually injected by the chip, the test limit value and the like is not considered. In the radiation test IEC 62132-2 and IEC 62132-8 standards, the chip under test is specified to be placed in a standard radiation source for testing, but it does not take into account the coupling problem of the actual radiation interference signal at the chip.
The interference provided by the interference source is coupled with the injection device, the printed circuit board mounted by the tested chip and the like before being injected into the tested chip pin, and the interference provided by the interference source is different from the interference actually provided by the interference source, so that in order to realize accurate injection of the chip pin interference energy, the injection waveform is required to be calibrated.
Disclosure of Invention
The method can achieve calibration of chip pin injection waveforms, so that accurate injection of chip pin interference energy is achieved, and therefore the method is further used for failure research of interference waveforms with different characteristics on chip pins, and chip-sensitive interference waveforms are obtained.
In order to achieve the above object, a first aspect of the present application provides a chip pin injection waveform calibration method, including:
acquiring a signal attenuation curve of a pin of a chip to be tested;
measuring and acquiring a first waveform at the same sampling frequency;
and carrying out Fourier transformation and inverse transformation according to the signal attenuation curve and the first waveform to calculate the injection waveform of the chip pin. And calculating the injection waveform of the chip pin through the acquired signal attenuation curve and the first waveform with the same frequency, and calibrating the injection waveform of the chip pin.
In the embodiment of the application, acquiring a signal attenuation curve of a pin of a chip to be tested includes:
a shielded cable is adopted to connect the vector network analyzer and the port of the printed circuit board;
connecting the port of the printed circuit board to the corresponding pin of the tested chip;
and acquiring a signal attenuation curve of the pin of the chip to be tested at a first sampling frequency through a vector network analyzer.
Through the technical means, the accurate signal attenuation curve of the tested chip pin can be directly obtained through the vector network analyzer.
In an embodiment of the present application, measuring and acquiring the first waveform at the same sampling frequency includes:
the method comprises the steps that a shielding cable is adopted to sequentially connect an interference injection device, an attenuator and an oscilloscope with a load of 50 ohms;
the first waveform is acquired by an oscilloscope at a first sampling frequency.
Through the technical means, the attenuator is used for attenuating the interference generated by the interference injection device and then collecting the interference by the oscilloscope, so that the normal operation of the oscilloscope is ensured, and meanwhile, the first waveform is collected and used for calculating the injection waveform of the chip pin.
In the embodiment of the application, an external interference source device is adopted as an interference injection device, and the external interference source device is connected with an attenuator and an oscilloscope with a load of 50 ohms through a shielding cable in sequence;
a first waveform of injected conducted interference is measured by an oscilloscope at a first sampling frequency.
Through the technical means, the interference generated by the external interference source device can simulate the interference conducted from other circuits to the chip pins, and the injection waveform calculation of the chip pins based on the conducted interference can be realized.
In the embodiment of the application, an antenna is adopted as an interference injection device, and the antenna is connected with an attenuator and an oscilloscope with a load of 50 ohms through a shielding cable in sequence;
a first waveform of the injected radiation disturbance is measured by an oscilloscope at a first sampling frequency.
By the technical means, the antenna is coupled with electromagnetic interference signals in a radiation form, electromagnetic interference of a radiation field can be simulated, and injection waveform calculation of chip pins based on the radiation interference can be realized.
In an embodiment of the present application, performing fourier transform and inverse transform according to the signal attenuation curve and the first waveform to calculate an injection waveform of a chip pin includes:
performing discrete Fourier transform on the first waveform to obtain the waveform characteristics of the full frequency band of the injection waveform;
calculating the difference value between the waveform characteristic of the full frequency band of the injection waveform and the signal attenuation curve;
and performing inverse discrete Fourier transform on the difference value to obtain a chip pin injection waveform.
The chip pin injection waveform is obtained through calculation by the technical means.
A second aspect of the present application provides a chip pin injection waveform calibration device, including: the device comprises a vector network analyzer, a tested chip, a printed circuit board, an attenuator, an oscilloscope, an interference injection device and a plurality of shielding cables;
the tested chip is arranged on the printed circuit board, tested pins of the tested chip are connected with ports on the printed circuit board, and the ports on the printed circuit board are connected with the vector network analyzer through a shielding cable and are used for obtaining signal attenuation curves of the tested chip pins;
the interference injection device is connected with the attenuator and the oscilloscope sequentially through the shielding cable and is used for measuring and acquiring a first waveform at the same sampling frequency.
By the technical means, the device for measuring the signal attenuation curve and the first waveform of the tested chip pin is provided, and a data basis is provided for calculating the injection waveform of the chip pin.
In this embodiment of the present application, the interference injection device is an external interference source device, and the external interference source device generates an interference injection shielding cable.
By the technical means, the interference generated by the external interference source device can simulate the interference conducted from other circuits to the chip pins, and a data basis can be provided for the injection waveform calculation of the chip pins based on the conducted interference.
In this embodiment of the present application, the interference injection device uses an antenna, and the antenna couples electromagnetic interference signals in a radiation form to form an interference injection shielding cable.
By the technical means, the antenna is coupled with electromagnetic interference signals in a radiation form, electromagnetic interference of a radiation field can be simulated, and a data base can be provided for injection waveform calculation of chip pins based on the radiation interference.
In the embodiment of the application, the lower bandwidth limit cut-off frequency of the antenna is zero, the upper bandwidth limit cut-off frequency is larger than the bandwidth of electromagnetic interference signals in a radiation form, the flatness is smaller than 3dB, and the characteristic impedance is 50Ω; the bandwidth of the attenuator can cover the bandwidth of the interference injection device, and the flatness of the attenuation curve is less than 0.2db.
Through the technical scheme, the calibration of the chip pin injection waveform is realized, so that the accurate injection of the chip pin interference energy is realized, and the method is further used for the failure research of the chip pin by the interference waveforms with different characteristics, and the chip-sensitive interference waveform is obtained.
For radiation interference injection, the coupling path and the transmission path of the radiation interference of an actual chip are simulated, and the problem that the radiation field is difficult to couple to the chip due to the short size of the pins of the chip in the existing standard is solved.
Additional features and advantages of embodiments of the present application will be set forth in the detailed description which follows.
Drawings
The accompanying drawings are included to provide a further understanding of embodiments of the present application and are incorporated in and constitute a part of this specification, illustrate embodiments of the present application and together with the description serve to explain, without limitation, the embodiments of the present application. In the drawings:
FIG. 1 is a flowchart of a method for calibrating injection waveforms of chip pins according to an embodiment of the present application;
fig. 2 is a schematic structural diagram of a signal attenuation curve measuring device in a chip pin injection waveform calibration device according to an embodiment of the present application;
FIG. 3 is a schematic diagram of a first waveform measurement device in the chip pin injection waveform calibration device provided in the present application;
fig. 4 is a schematic structural diagram of a first waveform measurement device in a chip pin injection waveform calibration device according to an embodiment of the present application;
fig. 5 is a schematic structural diagram of a first waveform measurement device in a chip pin injection waveform calibration device according to a second embodiment of the present application.
Description of the reference numerals
The device comprises a 1-chip to be tested, a 2-printed circuit board, a 3-shielding cable, a 4-vector network analyzer, a 5-attenuator, a 7-oscilloscope, an 8-interference injection device, an 8-1-external interference source device and an 8-2-antenna.
Detailed Description
The following detailed description of specific embodiments of the present application refers to the accompanying drawings. It should be understood that the detailed description is presented herein for purposes of illustration and explanation only and is not intended to limit the present application.
Example 1
Fig. 1 is a flowchart of a chip pin injection waveform calibration method according to an embodiment of the present application. As shown in fig. 1, the chip pin injection waveform calibration method includes:
s1: acquiring a signal attenuation curve of a pin of a chip 1 to be tested, and in the embodiment of the application, acquiring the signal attenuation curve of the pin of the chip 1 to be tested by the following method:
the shielding cable 3 is adopted to connect the ports of the vector network analyzer 4 and the printed circuit board 2, in the embodiment, the two ends of the shielding cable 3 are SMA interfaces, and the two ends are connected with the ports of the vector network analyzer 4 and the printed circuit board 2 through the SMA interfaces, so that the connection mode is simple and quick.
The ports of the printed circuit board 2 are connected to the corresponding pins of the chip 1 to be tested, and in the embodiment of the application, 50 Ω microstrip lines are used to realize that the ports of the printed circuit board 2 are connected to the corresponding pins of the chip to be tested.
And acquiring a signal attenuation curve of the pin of the chip 1 to be tested at a first sampling frequency through the vector network analyzer 4.
Through the technical means, the accurate signal attenuation curve of the pin of the chip 1 to be tested can be directly obtained through the vector network analyzer 4.
S2: the first waveform is acquired by measuring at the same sampling frequency, and in the embodiment of the present application, the first waveform is acquired by:
the shielding cable 3 is adopted to sequentially connect an interference injection device 8, an attenuator 5 and an oscilloscope 7 with a load of 50 ohms; in the present embodiment, the shielded cable 3 is also connected to the disturbance injection device 8, the attenuator 5, and the oscilloscope 7 with a load of 50 ohms using an SMA interface.
The first waveform is acquired by an oscilloscope 7 measuring at a first sampling frequency. The signal attenuation curve is the same as the sampling frequency of the first waveform so as to ensure the accuracy of the subsequent calculation of the injection waveform of the chip pins.
Through the technical means, the attenuator 5 is utilized to attenuate the interference generated by the interference injection device 8 and then acquire the interference by the oscilloscope 7, so that the normal operation of the oscilloscope 7 is ensured, and meanwhile, the first waveform is acquired and used for calculating the injection waveform of the chip pin.
S3: and carrying out Fourier transformation and inverse transformation according to the signal attenuation curve and the first waveform to calculate the injection waveform of the chip pin, wherein in the embodiment of the application, the injection waveform of the chip pin is calculated by the following method:
performing discrete Fourier transform on the first waveform to obtain the waveform characteristics of the full frequency band of the injection waveform;
calculating the difference value between the waveform characteristic of the full frequency band of the injection waveform and the signal attenuation curve;
performing inverse discrete Fourier transform on the difference value to obtain a chip pin injection waveform, wherein the calculation formula is as follows:
；
wherein S11 (ω) is a signal attenuation curve, V in-pcb (t) is a first waveform, V in-pin And (t) injecting waveforms into the pins of the chip, wherein k is the attenuation multiple of the attenuator. And calculating the injection waveform of the chip pin through the acquired signal attenuation curve and the first waveform with the same frequency, and calibrating the injection waveform of the chip pin.
In the embodiment, an external interference source device 8-1 is adopted as an interference injection device 8, and the external interference source device 8-1 is connected with an attenuator 5 and an oscilloscope 7 with a load of 50 ohms through a shielding cable 3 in sequence;
the first waveform of the injected conducted disturbance is measured by the oscilloscope 7 at the first sampling frequency.
By the technical means, the interference generated by the external interference source device 8-1 can simulate the interference conducted from other circuits to the chip pins, and the injection waveform calculation of the chip pins based on the conducted interference can be realized.
The application also provides a chip pin injection waveform calibration device, which comprises: the device comprises a vector network analyzer 4, a chip 1 to be tested, a printed circuit board 2, an attenuator 5, an oscilloscope 7, an interference injection device 8 and a plurality of shielding cables 3;
as shown in fig. 2, the tested chip 1 is mounted on a printed circuit board 2, tested pins of the tested chip 1 are connected with ports on the printed circuit board 2, and the ports on the printed circuit board 2 are connected with a vector network analyzer 4 through a shielding cable 3 for obtaining signal attenuation curves of the tested chip 1 pins;
as shown in fig. 3, the disturbance injection device 8 is connected to the attenuator 5 and the oscilloscope 7 in sequence through the shielded cable 3, and is used for measuring and acquiring a first waveform at the same sampling frequency. The shielded cable 3 is connected with the vector network analyzer 4, the printed circuit board 2, the attenuator 5, the oscilloscope 7 and the interference injection device 8 by adopting an SMA interface. The SMA joint port can prevent signal reflection and ensure the integrity of injected signals.
By the technical means, the device for measuring the signal attenuation curve and the first waveform of the pin 1 of the tested chip is provided, and a data basis is provided for calculating the injection waveform of the pin of the chip. The shielded cable 3 prevents the spatial radiation field from interfering with the injected signal.
In this embodiment, as shown in fig. 4, the interference injection device 8 adopts an external interference source device 8-1, and the external interference source device 8-1 generates the interference injection shielding cable 3.
By the technical means, the interference generated by the external interference source device 8-1 can simulate the interference conducted from other circuits to the chip pins, and a data base can be provided for the injection waveform calculation of the chip pins based on the conducted interference.
Example two
The embodiment provides a chip pin injection waveform calibration method, as shown in fig. 1. The chip pin injection waveform calibration method comprises the following steps:
s1: acquiring a signal attenuation curve of a pin of a chip 1 to be tested, and in the embodiment of the application, acquiring the signal attenuation curve of the pin of the chip 1 to be tested by the following method:
the shielding cable 3 is adopted to connect the ports of the vector network analyzer 4 and the printed circuit board 2, in the embodiment, the two ends of the shielding cable 3 are SMA interfaces, and the shielding cable is connected with the ports of the vector network analyzer 4 and the printed circuit board 2 through the SMA interfaces, so that the connection mode is quick in gear establishment.
Connecting the ports of the printed circuit board 2 to the corresponding pins of the chip 1 under test, in the embodiment of the application, the ports of the printed circuit board 2
And acquiring a signal attenuation curve of the pin of the chip 1 to be tested at a first sampling frequency through the vector network analyzer 4.
Through the technical means, the accurate signal attenuation curve of the pin of the chip 1 to be tested can be directly obtained through the vector network analyzer 4.
S2: the first waveform is acquired by measuring at the same sampling frequency, and in the embodiment of the present application, the first waveform is acquired by:
the shielding cable 3 is adopted to sequentially connect an interference injection device 8, an attenuator 5 and an oscilloscope 7 with a load of 50 ohms; in the present embodiment, the shielded cable 3 is also connected to the disturbance injection device 8, the attenuator 5, and the oscilloscope 7 with a load of 50 ohms using an SMA interface.
The first waveform is acquired by an oscilloscope 7 measuring at a first sampling frequency. The signal attenuation curve is the same as the sampling frequency of the first waveform so as to ensure the accuracy of the subsequent calculation of the injection waveform of the chip pins.
Through the technical means, the attenuator 5 is utilized to attenuate the interference generated by the interference injection device 8 and then acquire the interference by the oscilloscope 7, so that the normal operation of the oscilloscope 7 is ensured, and meanwhile, the first waveform is acquired and used for calculating the injection waveform of the chip pin.
S3: and carrying out Fourier transformation and inverse transformation according to the signal attenuation curve and the first waveform to calculate the injection waveform of the chip pin, wherein in the embodiment of the application, the injection waveform of the chip pin is calculated by the following method:
performing discrete Fourier transform on the first waveform to obtain the waveform characteristics of the full frequency band of the injection waveform;
calculating the difference value between the waveform characteristic of the full frequency band of the injection waveform and the signal attenuation curve;
performing inverse discrete Fourier transform on the difference value to obtain a chip pin injection waveform, wherein the calculation formula is as follows:
；
wherein S11 (ω) is a signal attenuation curve, V in-pcb (t) is a first curve, V in-pin (t) waveform is injected into chip pins, k is attenuatorDamping factor. And calculating the injection waveform of the chip pin through the acquired signal attenuation curve and the first waveform with the same frequency, and calibrating the injection waveform of the chip pin.
In the embodiment, an antenna 8-2 is adopted as an interference injection device 8, and the antenna is connected with an attenuator 5 and an oscilloscope 7 with a load of 50 ohms through a shielding cable 3 in sequence;
the first waveform of the injected radiation disturbance is measured by an oscilloscope 7 at a first sampling frequency.
By the technical means, the antenna 8-2 is coupled with electromagnetic interference signals in a radiation form, electromagnetic interference of a radiation field can be simulated, and injection waveform calculation of chip pins based on the radiation interference can be realized.
The application also provides a chip pin injection waveform calibration device, which comprises: the device comprises a vector network analyzer 4, a chip 1 to be tested, a printed circuit board 2, an attenuator 5, an oscilloscope 7, an interference injection device 8 and a plurality of shielding cables 3;
the tested chip 1 is arranged on the printed circuit board 2, tested pins of the tested chip 1 are connected with ports on the printed circuit board 2, and the ports on the printed circuit board 2 are connected with the vector network analyzer 4 through the shielding cable 3 and are used for obtaining signal attenuation curves of the pins of the tested chip 1;
the disturbance injection device 8 is connected to the attenuator 5 and the oscilloscope 7 in sequence through the shielded cable 3, and is used for measuring and acquiring a first waveform at the same sampling frequency. The shielded cable 3 is connected with the vector network analyzer 4, the printed circuit board 2, the attenuator 5, the oscilloscope 7 and the interference injection device 8 by adopting an SMA interface. The SMA joint port can prevent signal reflection and ensure the integrity of injected signals.
By the technical means, the device for measuring the signal attenuation curve and the first waveform of the pin 1 of the tested chip is provided, and a data basis is provided for calculating the injection waveform of the pin of the chip. The shielded cable 3 prevents the spatial radiation field from interfering with the injected signal.
In this embodiment, as shown in fig. 5, the interference injection device 8 adopts an antenna 8-2, and the antenna 8-2 radiates electromagnetic interference signals to form an interference injection shielded cable 3.
By the technical means, the antenna 8-2 is coupled with electromagnetic interference signals in radiation form, electromagnetic interference of a radiation field can be simulated, and a data base can be provided for injection waveform calculation of chip pins based on the radiation interference.
In the embodiment of the application, the lower bandwidth limit cutoff frequency of the antenna 8-2 is zero, the upper bandwidth limit cutoff frequency is larger than the bandwidth of the electromagnetic interference signal in a radiation form, the flatness is smaller than 3dB, and the characteristic impedance is 50Ω; the bandwidth of the attenuator 5 can cover the bandwidth of the disturbance injection device 8, and the attenuation curve flatness is less than 0.2db.
Those skilled in the art will appreciate that all or part of the steps in a method for implementing the above embodiments may be implemented by a program, where the program is stored in a storage medium, and the program includes several instructions for causing a single-chip microcomputer, chip or processor (processor) to perform all or part of the steps in a method according to various embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
The optional embodiments of the present application have been described in detail above with reference to the accompanying drawings, but the embodiments of the present application are not limited to the specific details of the foregoing embodiments, and various simple modifications may be made to the technical solutions of the embodiments of the present application within the scope of the technical concept of the embodiments of the present application, and all the simple modifications belong to the protection scope of the embodiments of the present application. In addition, the specific features described in the above embodiments may be combined in any suitable manner without contradiction. In order to avoid unnecessary repetition, the embodiments of the present application will not be described in any way with respect to the various possible combinations.
In addition, any combination of the various embodiments of the present application may be made, so long as it does not depart from the spirit of the embodiments of the present application, which should also be construed as disclosed in the embodiments of the present application.
Claims (8)
1. The chip pin injection waveform calibration method is characterized by comprising the following steps of:
acquiring a signal attenuation curve of a pin of a chip to be tested at a first sampling frequency;
measuring at a first sampling frequency to obtain a first waveform, comprising:
the method comprises the steps that a shielding cable is adopted to sequentially connect an interference injection device, an attenuator and an oscilloscope with a load of 50 ohms;
measuring and acquiring a first waveform at a first sampling frequency by an oscilloscope;
performing fourier transform and inverse transform on the signal attenuation curve and the first waveform to calculate an injection waveform of the chip pin, including:
performing discrete Fourier transform on the first waveform to obtain the waveform characteristics of the full frequency band of the injection waveform;
calculating the difference value between the waveform characteristic of the full frequency band of the injection waveform and the signal attenuation curve;
and performing inverse discrete Fourier transform on the difference value to obtain a chip pin injection waveform.
2. The method for calibrating a chip pin injection waveform according to claim 1, wherein acquiring a signal attenuation curve of a chip pin under test at a first sampling frequency comprises:
a shielded cable is adopted to connect the vector network analyzer and the port of the printed circuit board; connecting the port of the printed circuit board to the corresponding pin of the tested chip;
and acquiring a signal attenuation curve of the pin of the chip to be tested at a first sampling frequency through a vector network analyzer.
3. The method for calibrating the injection waveform of the chip pins according to claim 1, wherein,
an external interference source device is adopted as an interference injection device, and the external interference source device is connected with an attenuator and an oscilloscope with a load of 50 ohms through a shielding cable in sequence;
a first waveform of injected conducted interference is measured by an oscilloscope at a first sampling frequency.
4. The method for calibrating the injection waveform of the chip pins according to claim 1, wherein,
an antenna is adopted as an interference injection device, and is connected with an attenuator and an oscilloscope with a load of 50 ohms through a shielding cable in sequence;
a first waveform of the injected radiation disturbance is measured by an oscilloscope at a first sampling frequency.
5. A chip pin injection waveform calibration device for implementing the chip pin injection waveform calibration method of claim 1, comprising: the device comprises a vector network analyzer, a tested chip, a printed circuit board, an attenuator, an oscilloscope, an interference injection device and a plurality of shielding cables;
the tested chip is arranged on the printed circuit board, tested pins of the tested chip are connected with ports on the printed circuit board, and the ports on the printed circuit board are connected with the vector network analyzer through a shielding cable and are used for acquiring signal attenuation curves of the tested chip pins at a first sampling frequency;
the interference injection device is connected with the attenuator and the oscilloscope sequentially through the shielding cable and is used for measuring and acquiring a first waveform at a first sampling frequency.
6. The chip pin injection waveform calibration device of claim 5, wherein the interference injection device employs an external interference source device that generates an interference injection shielded cable.
7. The chip pin injection waveform calibration device of claim 5, wherein the interference injection device employs an antenna that couples electromagnetic interference signals in the form of radiation to form an interference injection shielded cable.
8. The chip pin injection waveform calibration device according to claim 7, wherein the antenna has a lower bandwidth cutoff frequency of zero, an upper bandwidth cutoff frequency greater than a bandwidth of an electromagnetic interference signal in a radiation form, a flatness of less than 3dB, and a characteristic impedance of 50Ω; the bandwidth of the attenuator can cover the bandwidth of the interference injection device, and the flatness of the attenuation curve is less than 0.2db.
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| CN115021808A (en) * | 2022-05-31 | 2022-09-06 | 国网浙江省电力有限公司电力科学研究院 | Electromagnetic pulse optical fiber measuring system and method with adjustable remote attenuation |
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| CN106771668A (en) * | 2017-01-05 | 2017-05-31 | 西南交通大学 | A kind of electromagnetic radiation parameter test system |
| CN112710977A (en) * | 2020-12-11 | 2021-04-27 | 西安电子科技大学 | Surface-mounted passive device S parameter measuring device and method based on TRM calibration |
| CN115021808A (en) * | 2022-05-31 | 2022-09-06 | 国网浙江省电力有限公司电力科学研究院 | Electromagnetic pulse optical fiber measuring system and method with adjustable remote attenuation |
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