CN116973673A - Failure positioning method, device and system of electronic device and computer equipment - Google Patents

Failure positioning method, device and system of electronic device and computer equipment Download PDF

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CN116973673A
CN116973673A CN202311239395.6A CN202311239395A CN116973673A CN 116973673 A CN116973673 A CN 116973673A CN 202311239395 A CN202311239395 A CN 202311239395A CN 116973673 A CN116973673 A CN 116973673A
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sample
failure
tested
time
impedance
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CN116973673B (en
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刘加豪
孙朝宁
赵昊
陈方舟
陈泽坚
肖美珍
吴建宇
刘沛江
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China Electronic Product Reliability and Environmental Testing Research Institute
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China Electronic Product Reliability and Environmental Testing Research Institute
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/003Environmental or reliability tests
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant

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  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Environmental & Geological Engineering (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

The application relates to a failure positioning method, a device, a system and computer equipment of an electronic device, which are characterized in that a first impedance change point corresponding to a test signal is obtained by sending the test signal to an empty probe, then the probe is connected with a sample to be tested, the test signal is sent to the sample to be tested connected with the probe, so as to obtain a second impedance change point of the sample to be tested, whether the sample to be tested fails or not is determined according to the environmental test condition of the sample to be tested, the failure time of the impedance signal of the sample to be tested exceeding a failure threshold value is obtained under the condition that the sample to be tested fails, and then the position of the failure point of the sample to be tested is determined according to the transmission distance of the test signal, the failure time, the first time corresponding to the first impedance change point and the second time corresponding to the second impedance change point, so that the accurate positioning of the failure point is realized, and the efficiency and the accuracy of failure analysis are improved.

Description

Failure positioning method, device and system of electronic device and computer equipment
Technical Field
The present application relates to the field of integrated circuits, and in particular, to a method, an apparatus, a system, and a computer device for locating failure of an electronic device.
Background
With the rapid development of 5G communication, the electronic device structure gradually develops toward miniaturization, integration and complexity. In order to meet the high-frequency and high-speed technical requirements of 5G communication, the manufacturing process, raw materials and structures of electronic components, printed circuit boards (Printed Circuit Board, PCB) and printed circuit board assemblies (Printed Circuit Board Assembly, PCBA) are obviously changed, and the introduction of new processes, materials and structures enables the reliability risk of an electronic system to be increased sharply.
Traditional electronic components, PCBs and PCBA need to carry out environmental stress test screening on products after manufacturing, and the electronic components, PCBs and PCBA subjected to multi-group environmental stress test screening can flow into the market. However, the main purpose of the screening method is to screen out early failure products of the test sample, and the stress load of the product in the transportation, storage and service processes cannot be well simulated. In addition, after the failure product is obtained, the failure product needs to be analyzed through a series of processes such as electrical measurement, nondestructive failure analysis, effective loss analysis and the like, at the moment, the failure background of the failure product is difficult to trace, and the whole failure analysis link is long. Therefore, how to accurately locate failure when an electronic device fails is one of the problems that are currently in urgent need.
Disclosure of Invention
In view of the foregoing, it is desirable to provide a method, an apparatus, a system, and a computer device for locating and analyzing failures of an electronic device, which can accurately locate and analyze the failures of the electronic device, and improve the efficiency of failure analysis.
In a first aspect, the present application provides a method for locating failure of an electronic device, where the method includes: transmitting a test signal to the idle probe to obtain a first impedance change point corresponding to the test signal; transmitting a test signal to a sample to be tested connected with the probe to obtain a second impedance change point of the sample to be tested; determining whether the sample to be tested fails according to the environmental test conditions of the sample to be tested; under the condition that a sample to be detected fails, acquiring failure time when an impedance signal of the sample to be detected exceeds a failure threshold value; and determining the position of the failure point of the sample to be tested according to the transmission distance and the failure time of the test signal, the first time corresponding to the first impedance change point and the second time corresponding to the second impedance change point.
In one embodiment, determining the position of the failure point of the sample to be tested according to the transmission distance of the test signal, the failure time, the first time corresponding to the first impedance change point, and the second time corresponding to the second impedance change point includes: determining the transmission speed of the test signal according to the transmission distance of the test signal, the first time corresponding to the first impedance change point and the second time corresponding to the second impedance change point; and determining the position of the failure point of the sample to be tested according to the failure time, the first time and the transmission speed.
In one embodiment, determining the transmission speed of the test signal according to the transmission distance of the test signal, the first time corresponding to the first impedance change point, and the second time corresponding to the second impedance change point includes: acquiring a first time difference value of the second time and the first time; and determining the transmission speed according to the ratio of the transmission distance of the preset first coefficient to the first time difference value.
In one embodiment, determining the position of the failure point of the sample to be tested according to the failure time, the first time and the transmission speed includes: acquiring a second time difference value between the failure time and the first time; and determining the position of the failure point according to the product of the transmission speed of the preset second coefficient and the second time difference value.
In one embodiment, determining whether the sample to be tested fails according to environmental test conditions of the sample to be tested includes: providing environmental test conditions for the sample to be tested in the total stress loading period, and continuously and repeatedly acquiring impedance signals of the sample to be tested based on the test signals; and under the condition that the impedance value corresponding to the impedance signal exceeds the failure threshold value, determining that the sample to be tested fails.
In one embodiment, determining that the sample to be tested fails when the impedance value corresponding to the impedance signal exceeds the failure threshold value includes: and under the condition that the impedance value corresponding to the impedance signal exceeds the failure threshold value at least three times continuously, determining that the sample to be tested fails.
In one embodiment, the failure positioning method of the electronic device further includes: under the condition that a sample to be tested fails, acquiring environmental test conditions of the failure of the sample to be tested; determining a stress curve in a total stress loading period according to environmental test conditions; and determining failure influence factors of the sample to be tested according to the stress curve and the impedance signal of the sample to be tested.
In a second aspect, the present application further provides a failure positioning device for an electronic device, where the device includes: the impedance acquisition module is used for sending a test signal to the idle probe so as to acquire a first impedance change point corresponding to the test signal; transmitting a test signal to a sample to be tested connected with the probe to obtain a second impedance change point of the sample to be tested; the failure confirmation module is used for determining whether the sample to be tested fails or not according to the environmental test conditions of the sample to be tested; under the condition that a sample to be detected fails, acquiring failure time when an impedance signal of the sample to be detected exceeds a failure threshold value; the position determining module is used for determining the position of the failure point of the sample to be tested according to the transmission distance and the failure time of the test signal, the first time corresponding to the first impedance change point and the second time corresponding to the second impedance change point.
In a third aspect, the present application also provides a failure positioning system for an electronic device, the system comprising: the probe assembly comprises a probe and an objective table, wherein the probe is arranged on the objective table and is used for being connected with a sample to be detected; the TDR test system is connected with the probe and is used for providing a test signal for the probe so as to acquire a first impedance change point, a second impedance change point and failure time; the environment test box is used for accommodating the probe assembly and providing environment test conditions for the sample to be tested; the control system is used for controlling the environment test box to provide environment test conditions; the processing system is respectively connected with the TDR test system and the control system and is used for determining the position of the failure point of the sample to be tested according to the transmission distance and the failure time of the test signal, the first time corresponding to the first impedance change point and the second time corresponding to the second impedance change point.
In a fourth aspect, the present application also provides a computer device comprising a memory storing a computer program and a processor implementing the steps of the method in any of the embodiments of the present disclosure when the processor executes the computer program.
According to the failure positioning method, the device, the system and the computer equipment of the electronic device, the test signal is sent to the idle probe, the first impedance change point corresponding to the test signal is obtained, so that the time of transmission of the test signal from the signal sending point to the probe is obtained, then the probe is connected with the sample to be tested, the test signal is sent to the sample to be tested connected with the probe, the second impedance change point is obtained, so that the time of transmission of the test signal from the signal sending point to the tail end of the transmission distance of the sample to be tested is obtained, then the environmental test condition of the environmental test box is controlled by the control system, whether the sample to be tested fails or not is determined according to the environmental test condition of the sample to be tested, the failure time of the impedance signal of the sample to be tested exceeding the failure threshold value is obtained under the condition that the sample to be tested fails, and then the position of the failure point to be tested is determined according to the transmission distance of the test signal, the failure time, the first time corresponding to the first impedance change point and the second time corresponding to the first impedance change point, and the position of the sample to be tested fail can be accurately analyzed under the condition that the failure time is provided.
Drawings
FIG. 1 is a flow diagram of a failure localization method of an electronic device in one embodiment;
FIG. 2 is a schematic diagram of impedance signals in a failure localization method of an electronic device according to an embodiment;
FIG. 3 is a schematic diagram of the location of failure points in a failure location method of an electronic device in one embodiment;
FIG. 4 is a schematic diagram of the structure of a ceramic component in one embodiment;
FIG. 5 is a schematic diagram of the structure of a solder joint in a ceramic assembly according to one embodiment;
FIG. 6 is a schematic diagram of a failure localization system for an electronic device in one embodiment;
FIG. 7 is a flow chart of a failure localization method of an electronic device according to another embodiment;
fig. 8 is a block diagram of a failure locator device for an electronic device in one embodiment.
Detailed Description
The present application will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present application more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application.
In the general technical scheme, the method of reliability screening for the electronic device can be adopted to avoid the outflow of unqualified products, for example, a high-low temperature circulation and vibration superposition method is adopted to test the PCB so as to quickly excite the faults of the PCB and quickly fail the PCB, thereby saving test time, but after the PCB fails due to the faults, the failure point of the PCB cannot be accurately positioned.
Accordingly, in one embodiment, as shown in fig. 1, there is provided a failure positioning method of an electronic device, including the steps of:
step 102: and sending a test signal to the empty probe to obtain a first impedance change point corresponding to the test signal.
The test signal may be an electromagnetic wave signal, and the range of the signal frequency may be less than 130GHZ, for example: 20GHZ, 40GHZ, 60GHZ, 80GHZ, 100GHZ, 120GHZ, etc. The electromagnetic wave signal may be any one of a pulse signal or a square wave signal, and the application is not particularly limited in the type of signal and the frequency of the signal of the test signal. The time domain reflectometer can be used for sending out a test signal, and better test effect can be obtained by regulating and controlling the width of a pulse, the signal amplitude and the signal frequency in the test signal. The time resolution of the waveform of the return impedance signal can be improved by adjusting the pulse width, so that smaller defects and faults are detected, and the failure positioning accuracy is improved; the signal amplitude is adjusted to adapt to samples to be tested of different media so as to adapt to different testing scenes; and the response characteristics of the sample to be tested under different frequencies can be detected by adjusting the frequency of the test signal, so that the failure type of the sample to be tested is analyzed.
The test signal is reflected at each position on the transmission path after the signal emission point, so that the impedance signal of each position can be obtained. When the probe is not connected with a sample to be tested, the probe is empty, the probe is in contact with air, because of the change of a transmission medium, the contact point of the probe and the air can generate abrupt impedance change compared with other positions, the impedance tends to infinity, the point of the abrupt change of the first impedance signal after the signal is sent out can be judged to be the first impedance change point according to the waveform of the impedance signal returned by the test signal, and the first impedance change point is the impedance signal returned by the contact point of the probe and the air. In addition, the probe is a high-reliability probe, and can be normally used in extreme environments such as high and low temperature, humidity, corrosive gas and the like.
Step 104: and sending a test signal to a sample to be tested connected with the probe so as to obtain a second impedance change point of the sample to be tested.
And good products are used as samples to be tested, so that the probes and the samples to be tested can be rigidly fixed, and the influence on test results caused by separation of the probes and the samples to be tested in the test process is avoided. The same test signal is sent to the sample to be tested, the impedance signal returned from each position after the signal sending point is obtained, the impedance signal returned from the tail end of the transmission distance of the sample to be tested can be obtained by combining the structure diagram of the sample to be tested and the waveform of the returned impedance signal, and the second impedance change point of the sample to be tested can be obtained based on the impedance signal. In addition, the sample to be tested may include, but is not limited to, PCB boards, resistors, capacitors, inductors, chips, and PCBA components.
Step S106: and determining whether the sample to be tested fails according to the environmental test conditions of the sample to be tested.
The temperature, humidity, gas property and other parameters in the test box are controlled by placing the sample to be tested in the test box, so that different environmental test conditions are provided for the sample to be tested. The method comprises the steps of controlling environmental test conditions to periodically change, enabling a sample to be tested to undergo the whole process of changing good products into invalid products, sending test signals to the sample to be tested in the test process, obtaining impedance signals returned by each position of the sample to be tested, enabling waveforms of the impedance signals to periodically change when the sample to be tested is in a good product state, enabling the waveform of the impedance signals to be invalid when the environmental test conditions exceed the bearing range of the sample to be tested, enabling the waveforms of the impedance signals to have mutation points, enabling the mutation points to be the impedance signals of the invalid points, and judging that the sample to be tested is invalid according to the mutation points.
In addition, the environmental test conditions may include the type of environmental stress, the duration of the environmental stress, and the like. For example, environmental stresses include, but are not limited to, any one or more of high temperature stress, low temperature stress, temperature cycling stress, temperature impact stress, hot flashes stress, salt spray stress, vibration stress. The duration of the environmental stress is related to the type of the environmental stress, for example, when the stress is a temperature cycling stress, the stress resistance of the sample to be measured is weak, and the duration of the environmental stress is short.
Step S108: and under the condition that the sample to be detected fails, acquiring the failure time of the impedance signal of the sample to be detected exceeding the failure threshold value.
Under the condition that a sample to be detected fails, the abrupt point of the waveform of the impedance signal is the impedance signal returned by the failure point, and the time corresponding to the abrupt point is the failure time of the failure point. The failure threshold may be a ratio of impedance to good impedance, and the range of the failure threshold may be-10% -200%, for example, 20%, 40%, 60%, 80%, 100%, 140%, 160%, 180%, etc., when the failure threshold is 20%, the ratio of the impedance value corresponding to the impedance signal of the abrupt point to the good impedance value is greater than 20%, and then the abrupt point is determined to be a failure point, and the difference between the time point corresponding to the failure point and the sending time point of the test signal is determined to be the failure time.
Step S110: and determining the position of the failure point of the sample to be tested according to the transmission distance and the failure time of the test signal, the first time corresponding to the first impedance change point and the second time corresponding to the second impedance change point.
As an example, according to the transmission distance of the test signal, the failure time, the first time corresponding to the first impedance change point, the second time corresponding to the second impedance change point, and the corresponding relationship between the time and the distance, the distance from the probe to the failure point of the test signal can be obtained, and then the failure point position of the electronic device can be obtained by combining the structure diagram of the sample to be tested. The first time and the second time are respectively the difference between the time point corresponding to the first impedance change point and the time point of the test signal emission, and the difference between the time point corresponding to the second impedance change point and the time point of the test signal emission.
Referring to fig. 2 and 3, as an example, a first time t1 of an empty probe, a second time t2 when a sample to be tested is a good product, and a failure time t3 when the sample to be tested is changed from the good product to a failure product are obtained, wherein the probe 1 may be an input probe, the probe 2 may be a connection probe at the end of a transmission distance of the sample to be tested, for providing a test loop, a distance between the probe 1 and the probe 2 is a transmission distance L1, and L2 is a distance between a failure point and the probe 1, and the position of the failure point may be obtained by determining L2 according to the first time t1, the second time t2, the failure time t3, and the transmission distance L1.
In the above embodiment, the first impedance change point corresponding to the test signal and the first time of the first impedance change point are obtained by sending the test signal to the empty probe, so as to obtain the time for transmitting the test signal to the probe, then the same test signal is sent to the sample to be tested connected with the probe, the second impedance change point and the second time corresponding to the second impedance change point are obtained, so as to obtain the time for transmitting the test signal in the good product, then the environmental test condition is provided for the sample to be tested, the sample to be tested is subjected to the process of changing the good product into the invalid product, the invalid time of the impedance signal exceeding the invalid threshold is obtained under the condition that the sample to be tested is invalid, and then the distance from the probe to the invalid point of the test signal is obtained according to the transmission distance, the invalid time, the first time and the second time of the test signal, so that the invalid point position can be obtained, and the efficiency and the accuracy of the invalid positioning of the electronic device are improved, and the type of the invalid sample to be tested is not limited.
In one embodiment, determining the position of the failure point of the sample to be tested according to the transmission distance of the test signal, the failure time, the first time corresponding to the first impedance change point, and the second time corresponding to the second impedance change point includes: determining the transmission speed of the test signal according to the transmission distance of the test signal, the first time corresponding to the first impedance change point and the second time corresponding to the second impedance change point; and then determining the position of the failure point of the sample to be tested according to the failure time, the first time and the transmission speed.
The transmission distance is the longest transmission distance of the test signal in the sample to be tested, and the transmission speed of the test signal in the sample to be tested can be obtained according to the corresponding relation among the transmission distance, the first time, the second time, the distance, the speed and the time. Because the transmission speeds of the test signals in the same medium are the same, the distance from the probe to the failure point can be obtained according to the transmission speed of the test signals in the sample to be tested, the failure time and the first time, and the corresponding relation of the distance, the speed and the time, so that the position of the failure point can be obtained, the simplicity of failure positioning of the sample to be tested can be improved, and the efficiency of failure positioning is improved.
In one embodiment, determining the transmission speed of the test signal according to the transmission distance of the test signal, the first time corresponding to the first impedance change point, and the second time corresponding to the second impedance change point includes: acquiring a first time difference value of the second time and the first time; and determining the transmission speed according to the ratio of the transmission distance of the preset first coefficient to the first time difference value. The first time and the second time are the receiving time of the impedance signal returned after the test signal is sent out, so the preset first coefficient can be 2.
As an example, the transmission speed V can be obtained by the following formula:
wherein,,for a first time difference, t 2 For a second time, t 1 For the first time, a is a preset first coefficient, L 1 Is the transmission distance.
The time of the test signal transmitted from the signal emitting point to the probe can be obtained through the first time corresponding to the first impedance change point, and then the time of the test signal transmitted from the signal emitting point to the tail end of the transmission distance of the sample to be tested is determined through the second time corresponding to the second impedance change point. Because the medium from the signal sending point to the probe is different from the medium of the sample to be tested, and the transmission speed of the test signal in different mediums is different, the time of the test signal from the probe to the tail end of the transmission distance of the sample to be tested can be determined by acquiring the first time difference, and then the transmission speed of the test signal in the sample to be tested can be obtained according to the ratio of the transmission distance to the first time difference and the preset first coefficient.
In the above embodiment, the calculation of the transmission speed excludes the time of transmitting the test signal from the signal transmitting point to the probe by obtaining the first time, thereby improving the accuracy of positioning the failure point, and also considers the difference of the transmission speeds under different media, thereby calculating the first time difference according to the difference between the second time and the first time, and then obtaining the transmission speed of the test signal in the medium such as the sample to be tested by the ratio of the transmission distance and the first time difference, further improving the accuracy of calculating the position of the failure point, and improving the positioning accuracy of the failure point.
In one embodiment, determining the location of the failure point of the sample to be tested based on the failure time, the first time, and the transport speed includes: acquiring a second time difference value between the failure time and the first time; and determining the position of the failure point according to the product of the transmission speed of the preset second coefficient and the second time difference value. The first time and the failure time are the receiving time of the impedance signal returned after the test signal is sent out, so the preset second coefficient can be 1/2.
As an example, the distance L between the failure point and the input point of the test signal of the sample to be tested can be obtained by the following formula:
Wherein,,is the second time difference, t 3 For the failure time t 1 B is a preset second coefficient for the first time, and V is the transmission speed.
The failure time is the time of the test signal transmitted from the signal sending point to the failure point, and according to the difference between the failure time and the first time, a second time difference can be obtained, namely the time of the test signal transmitted from the probe to the failure point is obtained, and then the distance of the test signal transmitted from the probe to the failure point is determined according to the product of the transmission speed of the test signal in the tested sample, the second time difference and a preset second coefficient, namely the position of the failure point is determined.
In the above embodiment, the calculation of the position of the failure point eliminates the time of transmitting the test signal from the signal transmitting point to the probe by acquiring the first time, thereby improving the accuracy of positioning the failure point, then acquires the time of transmitting the test signal from the probe to the failure point in the medium such as the sample to be tested by the second time difference between the failure time and the first time, and considers the influence of different mediums on the transmission time and the transmission speed by combining the acquired transmission speed of the test signal in the sample to be tested, thereby improving the accuracy of calculating the failure point.
In one embodiment, determining whether the sample to be tested is invalid based on environmental test conditions of the sample to be tested includes: providing environmental test conditions for the sample to be tested in the total stress loading period, and continuously and repeatedly acquiring impedance signals of the sample to be tested based on the test signals; and determining that the sample to be tested fails under the condition that the impedance value corresponding to the impedance signal exceeds the failure threshold value.
The total stress loading period is the total time for applying a certain stress to the sample to be tested, and is related to the stress type. For example, when the influence of a certain stress on the sample to be tested is large, the total stress loading period is short, and the time of the total stress loading period is not particularly limited in the application, so that the test requirement of the sample to be tested is met. The impedance signal of the sample to be tested can be obtained according to a certain test frequency in the total stress loading period, the test frequency can be in the range of 10 picoseconds to 10 days, for example, 10 nanoseconds, 10 microseconds, 10 milliseconds, 10 seconds, 10 minutes, 1 hour and the like, when the influence of a certain stress on the sample to be tested is larger, the test frequency can be 5 picoseconds, and when the influence of a certain stress on the sample to be tested is smaller, the test frequency can be 5 days.
As an example, the test frequency may be selected according to the stress type, then a test signal is sent to the sample to be tested based on the test frequency continuously for multiple times, a corresponding impedance signal returned by the test signal is obtained, and the sample to be tested is determined to fail under the condition that the impedance value corresponding to the impedance signal exceeds the failure threshold value.
In the above embodiment, a proper stress loading total period is selected according to the stress type, so that the stress load of the sample to be tested in the whole life period can be simulated, unqualified products and qualified products are screened out, different testing frequencies are selected according to the stress type in the stress loading total period to obtain the impedance signal of the sample to be tested, the impedance signal is prevented from being tested continuously, the manpower and material resources of the test can be saved to a certain extent, the economic waste is avoided, and meanwhile, the efficiency of the test is improved.
In one embodiment, determining that the sample to be tested fails if the impedance value corresponding to the impedance signal exceeds the failure threshold value includes: and determining that the sample to be tested fails under the condition that the impedance value corresponding to the impedance signal exceeds the failure threshold value at least three times continuously.
As an example, according to the test frequency, a test signal is continuously sent to the sample to be tested, a corresponding impedance signal returned by the test signal is obtained, and when the impedance value of any point corresponding to the impedance signal received by sending the test signal to the sample to be tested three times continuously exceeds the failure threshold value, the sample to be tested can be determined to be failed.
In the above embodiment, the failure is determined by exceeding the failure threshold value by the impedance value corresponding to the impedance signal for at least three consecutive times, so that the influence of the test signal fluctuation or the noise in the transmission process on the test can be avoided, and the erroneous determination is avoided.
In one embodiment, the failure positioning method of the electronic device further includes: under the condition that a sample to be tested fails, acquiring environmental test conditions of the failure of the sample to be tested; and determining a stress curve in the total stress loading period according to the environmental test conditions, and determining a failure influence factor of the sample to be tested according to the stress curve and the impedance signal of the sample to be tested.
According to the stress load change and the corresponding time in the environmental test conditions, the stress load corresponding to each time point can be obtained, so that a stress curve in the total stress loading period is obtained, wherein the stress curve can represent the corresponding relation between the amplitude of the stress and the loading period. And then, the stress curve is corresponding to the impedance signal of the sample to be tested, so that the relation between the impedance value and the stress at different times can be determined, the failure background is obtained, the influence degree of different stress amplitude values, different loading periods and the like on the impedance value is analyzed, the relation between the failure reason of the failure point and the stress is determined, and the accuracy of failure analysis is improved.
In one embodiment, the sample to be tested is a ceramic component with a daisy chain structure, the ceramic component comprises a welding spot 401, an electronic device and a ceramic substrate 404, the welding spot 401 mechanically fixes the electronic device and the ceramic substrate 404 to provide electric connection between the electronic devices, the welding spot 401 adopts lead solder balls, and as shown in fig. 4, the sample to be tested contains a plurality of links 402, and the method provided by the embodiment of the application can test the failure point positions of the links part31-part 30. The first time t1 of the first impedance change point in the empty probe and the second time t2 of the second impedance change point when the probe is connected with good products are respectively obtained, and the transmission speed V can be obtained according to the following formula:
V=2×L1/(t2-t1)=2×58.34×10^-3/(2.53-1.31)×10^-9=9.56×10^7m/s;
wherein L1 is the transmission distance.
Then, environmental test conditions are applied to a sample to be tested, the total stress loading period is 1800 periods, the stress type is temperature cycle stress, the temperature cycle can be in the range of-55 ℃ to 125 ℃, the cycle mode can be peak heat preservation for 15min, the temperature rise rate is 12 ℃/min, the test frequency can be 1 hour once, after 1500 cycles, the ceramic component is continuously detected for three times, the impedance value corresponding to the impedance signal exceeds a failure threshold value of 30%, the ceramic component is determined to fail, the failure time t3 is 1.92ns, and the distance L2 from the probe to the failure point 403 can be determined according to the transmission speed V, the failure time t3, the first time t1 and the following formula:
L2=1/2×V*(t3-t1)=0.5×9.56×10^7×(1.92-1.31)×10^-9=29.16mm;
With continued reference to fig. 4, the structure of the ceramic component may be determined, the failure point 403 may be further determined by combining the stress curve, then the failure background of the solder joint 401 may be further determined by combining failure analysis devices including but not limited to an optical microscope, an X-ray, a scanning electron microscope, etc. to observe and analyze the failure point 403, please refer to fig. 5, where (a) is the structure of the solder joint 401 when not failing, and (b) is the structure of the solder joint 401 when failing, it may be determined that the thermal expansion coefficients of the failure point 403 and the ceramic substrate 404 are not matched, stress concentration is caused at the interface of the failure point 403 during the cold and hot circulation, and fatigue failure occurs at the failure point 403 under the long-term effect. According to the analysis of failure reasons, the improvement method of the subsequent process can be obtained by reducing the difference of thermal expansion coefficients between the ceramic substrate 404 and the welding spot 401 or filling underfill in the welding spot 401.
It should be understood that, although the steps in the flowcharts related to the embodiments described above are sequentially shown as indicated by arrows, these steps are not necessarily sequentially performed in the order indicated by the arrows. The steps are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders. Moreover, at least some of the steps in the flowcharts described in the above embodiments may include a plurality of steps or a plurality of stages, which are not necessarily performed at the same time, but may be performed at different times, and the order of the steps or stages is not necessarily performed sequentially, but may be performed alternately or alternately with at least some of the other steps or stages.
Referring to fig. 6, in one embodiment, the present application further provides a failure positioning system for an electronic device, including a probe assembly 607, a TDR test system 601, an environmental test chamber 602, a control system 603, and a processing system 604. The probe assembly 607 is disposed in the environmental test chamber 602, the control system 603 is connected with the environmental test chamber 602, the probe assembly 607 is respectively connected with the sample to be tested 608 and the TDR test system 601, and the TDR test system 601 and the control system 603 are connected with the processing system 604.
A probe assembly 607 comprising a probe 605 and a stage 606, the probe 605 being disposed on the stage 606 and being operable to form a test loop between a sample 608 to be tested and the TDR test system 601.
The TDR test system 601 may be configured to send electromagnetic wave signals with a certain frequency and a certain amplitude to the probe 605 through a cable according to a test requirement, so as to obtain a first impedance change point, a second impedance change point and a failure time, and transmit the first impedance change point, the second impedance change point and the failure time to the processing system 604 through the cable; the cable is temperature-resistant and can work normally in high and low temperature, humid and corrosive gas environments.
The environmental test chamber 602 is configured to house the probe assembly 607, and provide environmental test conditions for the sample 608 to be tested, and simulate different stresses of the sample 608 to be tested during a full life cycle.
A control system 603 operable to control the environmental test chamber 602 to provide environmental test conditions; the control system 603 includes a plurality of stress types, and different stress types can be selected according to test requirements.
The processing system 604 may be configured to determine a position of a failure point of the sample 608 to be tested according to a transmission distance, a failure time, a first time corresponding to the first impedance change point, and a second time corresponding to the second impedance change point of the test signal transmitted by the TDR test system 601.
In the above embodiment, the TDR test system transmits the test signal to the probe assembly, and obtains the first impedance change point, the second impedance change point and the failure time according to the impedance signal returned by the test signal, and in the test process, the control system controls the environmental test box to provide environmental test conditions for the sample to be tested, so that the sample to be tested is subjected to the whole process of changing from good products to failure products, and then the processing system obtains the position of the failure point according to the transmission distance and the first time corresponding to the first impedance change point, the second time corresponding to the second impedance change point and the failure time obtained by the TDR test system, thereby improving the accuracy of failure positioning, and having universality at the same time, and avoiding the limitation of the test range of failure positioning due to the type of the sample to be tested.
In one embodiment, the processing system is further configured to determine a transmission speed of the test signal in the sample to be tested according to a transmission distance of the test signal in the sample to be tested, a first time corresponding to the first impedance change point, and a second time corresponding to the second impedance change point; and then determining the position of the failure point of the sample to be tested according to the failure time, the first time and the transmission speed.
In one embodiment, the processing system is further configured to obtain a first time difference value for the second time and the first time; and then determining the transmission speed of the test signal in the sample to be tested according to the ratio of the transmission distance of the preset first coefficient to the first time difference value.
In one embodiment, the processing system is further configured to obtain a second time difference between the expiration time and the first time; and then determining the position of the failure point according to the product of the transmission speed of the preset second coefficient and the second time difference value.
In one embodiment, the environmental test chamber is further configured to provide environmental test conditions for the sample to be tested in a total stress loading period, and the TDR test system continuously acquires the impedance signal of the sample to be tested multiple times; and under the condition that the impedance value corresponding to the impedance signal exceeds the failure threshold value, determining that the sample to be tested fails.
In one embodiment, the processing system is further configured to determine that the sample to be tested fails if the impedance value corresponding to the impedance signal exceeds the failure threshold at least three consecutive times.
In one embodiment, the failure positioning method of the electronic device further includes: under the condition that a sample to be tested fails, the control system acquires environmental test conditions of the failure of the sample to be tested; determining a stress curve in a total stress loading period according to environmental test conditions; and then the processing system combines the stress curve transmitted by the control system and the impedance signal of the sample to be tested transmitted by the TDR test system to determine the failure influence factor of the sample to be tested.
In one embodiment, as shown in fig. 7, for convenience of explanation, a processing system in which the failure positioning method of the electronic device is applied to the failure positioning system of the electronic device is exemplified. The failure positioning method of the electronic device may specifically include:
step one: placing a sample to be tested in an environment test box, fixing and calibrating the probe and the sample to be tested, and connecting cables among a TDR test system, the environment test box and a processing system;
step two: setting environmental test conditions of an environmental test box through a control system;
Step three: applying environmental test conditions, setting signal frequency of a TDR test system, and detecting waveform change of impedance signals of a sample to be tested;
step four: judging whether the to-be-detected sample continuously exceeds the failure threshold value, and performing the fifth step when the impedance signal of the to-be-detected sample continuously exceeds the failure threshold value; when the impedance signal of the sample to be tested does not continuously exceed the failure threshold value, performing a step seven;
step five: obtaining a failure distance through the first time, the second time, the failure time and the transmission distance, and determining the position of a failure point by combining a structure diagram of a failure product;
step six: determining the failure reason by combining analysis equipment such as an optical microscope, an X-ray, a scanning electron microscope and the like, and performing the step eight;
step seven: judging whether the test period is completed or not, and continuing to carry out the step three when the test period is not completed; when the test period is completed, performing the step eight;
step eight: and (5) giving test conclusion and suggestion.
Based on the same inventive concept, the embodiment of the application also provides a failure positioning device of the electronic device for realizing the failure positioning method of the electronic device. The implementation of the solution provided by the device is similar to the implementation described in the above method, so the specific limitation in the embodiments of the failure positioning device for one or more electronic devices provided below may refer to the limitation of the failure positioning method for an electronic device described above, which is not repeated herein.
In one embodiment, as shown in fig. 8, there is provided a failure positioning apparatus 800 of an electronic device, including: an impedance acquisition module 801, a failure confirmation module 802, a location determination module 803, wherein:
the impedance obtaining module 801 is configured to send a test signal to the empty probe, so as to obtain a first impedance change point corresponding to the test signal; transmitting a test signal to a sample to be tested connected with the probe to obtain a second impedance change point of the sample to be tested;
a failure confirmation module 802, configured to determine whether the sample to be tested fails according to an environmental test condition of the sample to be tested; under the condition that a sample to be detected fails, acquiring failure time when an impedance signal of the sample to be detected exceeds a failure threshold value;
the position determining module 803 is configured to determine a position of a failure point of the sample to be tested according to a transmission distance of the test signal, a failure time, a first time corresponding to the first impedance change point, and a second time corresponding to the second impedance change point.
In the above embodiment, the impedance obtaining module 801 is configured to obtain a first impedance change point when the probe is empty and a second impedance change point when the probe is connected to a good product, so as to obtain time from a signal sending point to a transmission distance between the probe and a sample to be tested, and the failure confirming module 802 determines whether the sample to be tested fails according to an environmental test condition, in the case of failure, obtains a failure time when the impedance signal of the sample to be tested exceeds a failure threshold value, so as to obtain time from the signal sending point to the failure point, and then the position determining module 803 determines a position of the failure point of the sample to be tested according to the transmission distance of the test signal, the failure time, the first time corresponding to the first impedance change point, and the second time corresponding to the second impedance change point, thereby realizing accurate positioning of the failure point and improving efficiency of failure analysis.
In one embodiment, determining the position of the failure point of the sample to be tested according to the transmission distance of the test signal, the failure time, the first time corresponding to the first impedance change point, and the second time corresponding to the second impedance change point includes: determining the transmission speed of the test signal according to the transmission distance of the test signal, the first time corresponding to the first impedance change point and the second time corresponding to the second impedance change point; and determining the position of the failure point of the sample to be tested according to the failure time, the first time and the transmission speed.
In one embodiment, determining the transmission speed of the test signal according to the transmission distance of the test signal, the first time corresponding to the first impedance change point, and the second time corresponding to the second impedance change point includes: acquiring a first time difference value of the second time and the first time; and determining the transmission speed according to the ratio of the transmission distance of the preset first coefficient to the first time difference value.
In one embodiment, determining the location of the failure point of the sample to be tested based on the failure time, the first time, and the transport speed includes: acquiring a second time difference value between the failure time and the first time; and determining the position of the failure point according to the product of the transmission speed of the preset second coefficient and the second time difference value.
In one embodiment, determining whether the sample to be tested is invalid based on environmental test conditions of the sample to be tested includes: providing environmental test conditions for the sample to be tested in the total stress loading period, and continuously and repeatedly acquiring impedance signals of the sample to be tested based on the test signals; and under the condition that the impedance value corresponding to the impedance signal exceeds the failure threshold value, determining that the sample to be tested fails.
In one embodiment, determining that the sample to be tested fails if the impedance value corresponding to the impedance signal exceeds the failure threshold value includes: and under the condition that the impedance value corresponding to the impedance signal exceeds the failure threshold value at least three times continuously, determining that the sample to be tested fails.
In one embodiment, the failure positioning device of the electronic device further includes: under the condition that a sample to be tested fails, acquiring environmental test conditions of the failure of the sample to be tested; determining a stress curve in a total stress loading period according to environmental test conditions; and determining failure influence factors of the sample to be tested according to the stress curve and the impedance signal of the sample to be tested.
The various modules in the failure locator device of the electronic device described above may be implemented in whole or in part by software, hardware, and combinations thereof. The above modules may be embedded in hardware or may be independent of a processor in the computer device, or may be stored in software in a memory in the computer device, so that the processor may call and execute operations corresponding to the above modules.
In one embodiment, the present application provides a computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the method described in any of the embodiments of the present disclosure.
In one embodiment, the application also provides a computer program product comprising a computer program which, when executed by a processor, implements the steps of the method described in any of the embodiments of the disclosure.
The foregoing examples illustrate only a few embodiments of the application and are described in detail herein without thereby limiting the scope of the application. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of the application should be assessed as that of the appended claims.

Claims (10)

1. A method of locating failure of an electronic device, the method comprising:
transmitting a test signal to an idle probe to obtain a first impedance change point corresponding to the test signal;
Transmitting the test signal to a sample to be tested connected with the probe so as to obtain a second impedance change point of the sample to be tested;
determining whether the sample to be tested fails according to the environmental test conditions of the sample to be tested;
under the condition that the sample to be detected fails, acquiring failure time when an impedance signal of the sample to be detected exceeds a failure threshold value;
and determining the position of the failure point of the sample to be tested according to the transmission distance of the test signal, the failure time, the first time corresponding to the first impedance change point and the second time corresponding to the second impedance change point.
2. The method of claim 1, wherein determining the location of the failure point of the sample under test based on the transmission distance of the test signal, the failure time, a first time corresponding to the first impedance change point, and a second time corresponding to the second impedance change point comprises:
determining the transmission speed of the test signal according to the transmission distance of the test signal, the first time corresponding to the first impedance change point and the second time corresponding to the second impedance change point;
and determining the position of the failure point of the sample to be detected according to the failure time, the first time and the transmission speed.
3. The method of claim 2, wherein determining the transmission speed of the test signal according to the transmission distance of the test signal, the first time corresponding to the first impedance change point, and the second time corresponding to the second impedance change point comprises:
acquiring a first time difference value of the second time and the first time;
and determining the transmission speed according to the ratio of the transmission distance of a preset first coefficient to the first time difference value.
4. The method of claim 2, wherein determining the location of the failure point of the sample under test based on the failure time, the first time, and the transport speed comprises:
acquiring a second time difference value between the failure time and the first time;
and determining the position of the failure point according to the product of the transmission speed of the preset second coefficient and the second time difference value.
5. The method of claim 1, wherein said determining whether the sample to be tested is faulty based on environmental test conditions of the sample to be tested comprises:
providing the environmental test conditions for the sample to be tested in a total stress loading period, and continuously acquiring impedance signals of the sample to be tested for multiple times based on the test signals;
And under the condition that the impedance value corresponding to the impedance signal exceeds an invalidation threshold value, determining that the sample to be detected fails.
6. The method according to claim 5, wherein determining that the sample to be tested fails in the case that the impedance value corresponding to the impedance signal exceeds a failure threshold value comprises:
and determining that the sample to be tested fails under the condition that the impedance value corresponding to the impedance signal exceeds the failure threshold value at least three times continuously.
7. The method of claim 5, wherein the method further comprises:
under the condition that the sample to be tested fails, acquiring the environmental test condition that the sample to be tested fails;
determining a stress curve in the total stress loading period according to the environmental test conditions;
and determining failure influence factors of the sample to be tested according to the stress curve and the impedance signal of the sample to be tested.
8. A failure locator device for an electronic device, the device comprising:
the impedance acquisition module is used for sending a test signal to the no-load probe so as to acquire a first impedance change point corresponding to the test signal; transmitting the test signal to a sample to be tested connected with the probe so as to obtain a second impedance change point of the sample to be tested;
The failure confirmation module is used for determining whether the sample to be tested fails or not according to the environmental test conditions of the sample to be tested; under the condition that the sample to be detected fails, acquiring failure time when an impedance signal of the sample to be detected exceeds a failure threshold value;
the position determining module is used for determining the position of the failure point of the sample to be tested according to the transmission distance of the test signal, the failure time, the first time corresponding to the first impedance change point and the second time corresponding to the second impedance change point.
9. A failure localization system for an electronic device, the system comprising:
the probe assembly comprises a probe and an objective table, wherein the probe is arranged on the objective table and is used for being connected with a sample to be detected;
the TDR test system is connected with the probe and is used for providing a test signal for the probe so as to acquire a first impedance change point, a second impedance change point and failure time;
the environment test box is used for accommodating the probe assembly and providing environment test conditions for the sample to be tested;
the control system is used for controlling the environment test box to provide the environment test conditions;
the processing system is respectively connected with the TDR test system and the control system and is used for determining the position of the failure point of the sample to be tested according to the transmission distance of the test signal, the failure time, the first time corresponding to the first impedance change point and the second time corresponding to the second impedance change point.
10. A computer device comprising a memory and a processor, the memory storing a computer program, characterized in that the processor implements the steps of the method of any of claims 1 to 7 when the computer program is executed.
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Citations (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB0114273D0 (en) * 2001-06-12 2001-08-01 Phoenix Aviat And Technology L Fault detection system and method
CN1450354A (en) * 2002-02-22 2003-10-22 英特尔公司 Integrated adjustable short-haul/long-haul time domain reflectometry
EP1826583A2 (en) * 2006-02-24 2007-08-29 Tektronix, Inc. Signal analysis system and calibration method
CN101127928A (en) * 2007-09-11 2008-02-20 电子科技大学 Method and device for testing network cable failure
US20100277198A1 (en) * 2009-04-30 2010-11-04 Hon Hai Precision Industry Co., Ltd. System and method for testing a characteristic impedance of an electronic component
CN105137293A (en) * 2015-09-24 2015-12-09 国网技术学院 Positioning method of fault points in power distribution network mixed circuits
CN106707103A (en) * 2016-12-12 2017-05-24 中国人民解放军海军航空工程学院 Hand-held automatic cable fault location device
CN107219447A (en) * 2017-06-19 2017-09-29 安徽江淮汽车集团股份有限公司 A kind of direct-current arc detection method and system based on impedance characteristic
CN111239590A (en) * 2020-02-24 2020-06-05 珠海格力电器股份有限公司 Method and device for positioning electrostatic damage of chip
CN112557823A (en) * 2020-12-04 2021-03-26 国网浙江省电力有限公司绍兴供电公司 Power transmission line fault positioning qualitative method based on time domain reflection technology
WO2021209180A1 (en) * 2020-04-16 2021-10-21 Abb Power Grids Switzerland Ag Fault detection in a power transmission system
CN216747902U (en) * 2021-09-25 2022-06-14 新疆威尔电子科技有限公司 Cable connection point positioning instrument
CN115113124A (en) * 2022-05-27 2022-09-27 中国电子产品可靠性与环境试验研究所((工业和信息化部电子第五研究所)(中国赛宝实验室)) Composite probe calibration method and device, computer equipment and storage medium
CN115128405A (en) * 2022-06-22 2022-09-30 重庆长安新能源汽车科技有限公司 Vehicle-mounted video line fault on-site diagnosis method and system
CN115856581A (en) * 2022-12-30 2023-03-28 湖南芯引向科技有限责任公司 MMIC limiter chip failure analysis method
EP4227977A1 (en) * 2022-02-14 2023-08-16 Innovatum Instruments Inc. Automated probe landing

Patent Citations (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB0114273D0 (en) * 2001-06-12 2001-08-01 Phoenix Aviat And Technology L Fault detection system and method
CN1450354A (en) * 2002-02-22 2003-10-22 英特尔公司 Integrated adjustable short-haul/long-haul time domain reflectometry
EP1826583A2 (en) * 2006-02-24 2007-08-29 Tektronix, Inc. Signal analysis system and calibration method
CN101127928A (en) * 2007-09-11 2008-02-20 电子科技大学 Method and device for testing network cable failure
US20100277198A1 (en) * 2009-04-30 2010-11-04 Hon Hai Precision Industry Co., Ltd. System and method for testing a characteristic impedance of an electronic component
CN105137293A (en) * 2015-09-24 2015-12-09 国网技术学院 Positioning method of fault points in power distribution network mixed circuits
CN106707103A (en) * 2016-12-12 2017-05-24 中国人民解放军海军航空工程学院 Hand-held automatic cable fault location device
CN107219447A (en) * 2017-06-19 2017-09-29 安徽江淮汽车集团股份有限公司 A kind of direct-current arc detection method and system based on impedance characteristic
CN111239590A (en) * 2020-02-24 2020-06-05 珠海格力电器股份有限公司 Method and device for positioning electrostatic damage of chip
WO2021209180A1 (en) * 2020-04-16 2021-10-21 Abb Power Grids Switzerland Ag Fault detection in a power transmission system
CN112557823A (en) * 2020-12-04 2021-03-26 国网浙江省电力有限公司绍兴供电公司 Power transmission line fault positioning qualitative method based on time domain reflection technology
CN216747902U (en) * 2021-09-25 2022-06-14 新疆威尔电子科技有限公司 Cable connection point positioning instrument
EP4227977A1 (en) * 2022-02-14 2023-08-16 Innovatum Instruments Inc. Automated probe landing
CN115113124A (en) * 2022-05-27 2022-09-27 中国电子产品可靠性与环境试验研究所((工业和信息化部电子第五研究所)(中国赛宝实验室)) Composite probe calibration method and device, computer equipment and storage medium
CN115128405A (en) * 2022-06-22 2022-09-30 重庆长安新能源汽车科技有限公司 Vehicle-mounted video line fault on-site diagnosis method and system
CN115856581A (en) * 2022-12-30 2023-03-28 湖南芯引向科技有限责任公司 MMIC limiter chip failure analysis method

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