CN116865725A - Signal processing method for demodulation signal, related device, storage medium and program - Google Patents
Signal processing method for demodulation signal, related device, storage medium and program Download PDFInfo
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/125—Discriminating pulses
- H03K5/1252—Suppression or limitation of noise or interference
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
- H03K5/04—Shaping pulses by increasing duration; by decreasing duration
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/153—Arrangements in which a pulse is delivered at the instant when a predetermined characteristic of an input signal is present or at a fixed time interval after this instant
- H03K5/1534—Transition or edge detectors
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract
The embodiment of the application discloses a signal processing method for demodulation signals, a related device, a storage medium and a program. The method may include: under the condition that the noise of the current sampling frequency exceeds a preset noise threshold value, the current sampling frequency is updated to be the first sampling frequency, a first original signal and a second original signal of the capacitance sampling circuit are obtained, the edge position of the first original signal and the edge position of the second original signal are respectively determined, the level of the edge position of the first original signal is set to be a first level, so that the duty ratio of the first original signal and the first original signal is positively correlated, and the level of the edge position of the second original signal is set to be a first level, so that the duty ratio of the second original signal and the second original signal is positively correlated. The embodiment of the application is beneficial to relatively accurately predicting the demodulation signal after the frequency change when the sampling frequency of the capacitance sampling circuit jumps.
Description
Technical Field
The present application relates to the field of general data processing technology in the internet industry, and in particular, to a signal processing method for a demodulation signal, and a related apparatus, storage medium and program.
Background
When the sampling frequency of the capacitance sampling circuit is changed, the duty ratio of the pulse signal is changed due to the change of the frequency, and if the change amplitude of the duty ratio is too large, the demodulation signal finally output by the capacitance sampling circuit is also changed greatly, so that the problem that the demodulation signal after the change of the frequency cannot be estimated is caused.
Disclosure of Invention
The embodiment of the application provides a signal processing method for a demodulation signal, a related device, a storage medium and a program, which are beneficial to relatively accurately predicting the demodulation signal after frequency change when the sampling frequency of a capacitance sampling circuit jumps.
In a first aspect, an embodiment of the present application provides a signal processing method for a demodulation signal in a capacitance sampling circuit, where the method includes:
determining whether noise of the current sampling frequency of the capacitance sampling circuit exceeds a preset noise threshold;
updating the current sampling frequency to a first sampling frequency under the condition that the noise of the current sampling frequency exceeds the preset noise threshold value, wherein the first sampling frequency is a frequency of which the noise is lower than the preset noise threshold value;
acquiring a first original signal and a second original signal of the capacitance sampling circuit, wherein the first original signal is a pulse signal at the current sampling frequency, and the second original signal is a pulse signal at the first sampling frequency;
Respectively determining the edge position of the first original signal and the edge position of the second original signal;
setting the level of the edge position of the first original signal to be a first level, so that the set first original signal is positively correlated with the duty ratio of the set first original signal;
setting the level of the edge position of the second original signal to the first level, so that the set second original signal is positively correlated with the duty ratio of the set second original signal;
processing the set first original signal to obtain a first demodulation signal, wherein the first demodulation signal is a demodulation signal of the set first original signal;
and calculating a second demodulation signal according to the first demodulation signal, the duty ratio of the set first original signal and the duty ratio of the set second original signal, wherein the second demodulation signal is the demodulation signal of the set second original signal.
The implementation of the first aspect of the embodiment of the application has the following beneficial effects:
the embodiment of the application can determine whether the noise of the current sampling frequency of the capacitance sampling circuit exceeds a preset noise threshold, under the condition that the noise of the current sampling frequency exceeds the preset noise threshold, the current sampling frequency is updated to be a first sampling frequency, the first sampling frequency is the frequency with the lowest noise, a first original signal and a second original signal of the capacitance sampling circuit are obtained, the first original signal is a pulse signal under the current sampling frequency, the second original signal is a pulse signal under the first sampling frequency, the edge position of the first original signal and the edge position of the second original signal are respectively determined, the level of the edge position of the first original signal is set to be a first level, the level of the edge position of the second original signal is set to be a first level, the set second original signal is positively correlated with the duty ratio of the set second original signal, the set first original signal is processed to obtain a first demodulated signal, the first demodulated signal is the first demodulated signal, the first duty ratio of the first demodulated signal is set to be the second original signal, and the second duty ratio of the first demodulated signal is set to be the first duty ratio of the first original signal; in this way, by changing the level of the edge positions of the first original signal and the second original signal, the duty ratio of the first original signal and the duty ratio of the first original signal are positively correlated, and the duty ratio of the second original signal are positively correlated, so that the second demodulation signal can be calculated according to the duty ratio of the first original signal and the duty ratio of the second original signal, and the demodulation signal after the frequency change can be estimated.
In a second aspect, an embodiment of the present application provides a signal processing apparatus for a demodulation signal in a capacitance sampling circuit, where the apparatus includes:
a noise determining unit, configured to determine whether noise of a current sampling frequency of the capacitance sampling circuit exceeds a preset noise threshold;
a frequency updating unit, configured to update the current sampling frequency to a first sampling frequency when the noise of the current sampling frequency exceeds the preset noise threshold, where the first sampling frequency is a frequency where the noise is lower than the preset noise threshold;
the acquisition unit is used for acquiring a first original signal and a second original signal of the capacitance sampling circuit, wherein the first original signal is a pulse signal at the current sampling frequency, and the second original signal is a pulse signal at the first sampling frequency;
a determining unit configured to determine an edge position of the first original signal and an edge position of the second original signal, respectively;
a level adjustment unit, configured to set a level of an edge position of the first original signal to a first level, so that the set first original signal is positively correlated with a duty cycle of the set first original signal;
The level adjusting unit is further configured to set a level of an edge position of the second original signal to the first level, so that the set second original signal is positively correlated with a duty cycle of the set second original signal;
the demodulation unit is used for processing the set first original signal to obtain a first demodulation signal, wherein the first demodulation signal is a demodulation signal of the set first original signal;
and the calculating unit is used for calculating a second demodulation signal according to the first demodulation signal, the duty ratio of the set first original signal and the duty ratio of the set second original signal, wherein the second demodulation signal is the demodulation signal of the set second original signal.
In a third aspect, an embodiment of the present application provides an electronic device, including a processor, a memory, and a computer program or instructions stored on the memory, where the processor executes the computer program or instructions to implement the steps in the first aspect of the embodiment of the present application.
In a fourth aspect, embodiments of the present application provide a computer-readable storage medium storing a computer program for electronic data exchange, wherein the computer program causes a computer to execute instructions of some or all of the steps as described in the first aspect of the embodiments of the present application.
In a fifth aspect, embodiments of the present application provide a computer program product, wherein the computer program product comprises a computer program operable to cause a computer to perform some or all of the steps described in the first aspect of the embodiments of the present application.
The technical effects of the second to fifth aspects may be seen in the technical effects of the first aspect, and are not described here again.
Drawings
In order to more clearly illustrate the embodiments of the application or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present application;
fig. 2 is a schematic flow chart of a signal processing method for a demodulation signal in a capacitance sampling circuit according to an embodiment of the present application;
fig. 3A is a schematic diagram of a partial circuit architecture of a capacitance sampling circuit according to an embodiment of the present application;
FIG. 3B is a schematic diagram of signals according to an embodiment of the present application;
fig. 4 is a functional unit block diagram of a signal processing device for demodulating a signal in a capacitance sampling circuit according to an embodiment of the present application;
fig. 5 is a schematic structural diagram of still another electronic device according to an embodiment of the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are some, but not all embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
The terms "first," "second," "third," and "fourth" and the like in the description and in the claims and drawings are used for distinguishing between different objects and not necessarily for describing a particular sequential or chronological order. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed steps or elements but may include other steps or elements not listed or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, result, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
1. Electronic equipment
The electronic device in the application can comprise a smart Phone (such as an Android mobile Phone, an iOS mobile Phone, a Windows Phone mobile Phone, etc.), a tablet computer, a palm computer, a notebook computer, a mobile internet device MID (Mobile Internet Devices, abbreviated as MID), a wearable device or a scanning device, etc., and the electronic device can also comprise a terminal device and a server, which are not limited herein. The above-described electronic devices are merely examples and are not intended to be exhaustive and include, but are not limited to, the above-described electronic devices.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an electronic device according to an embodiment of the application. The electronic device includes a processor and a memory, etc.
Wherein the memory is coupled to the processor. The Processor is a control center of the electronic device, and uses various interfaces and lines to connect various parts of the whole electronic device, and executes various functions of the electronic device and processes data by running or executing software programs and/or modules stored in a memory and calling the data stored in the memory, so as to monitor the electronic device as a whole, and the Processor may be a central processing unit (Central Processing Unit/Processor, CPU), a graphics Processor (Graphics Processing Unit, GPU) or a network Processor (nerve-network Processing Unit, NPU).
The memory is used for storing software programs and/or modules, and the processor executes various functional applications of the electronic device by running the software programs and/or modules stored in the memory. The memory may include a program including a flow execution function for executing the present scheme. The memory may further include a storage program area and a storage data area, wherein the storage program area may store an operating system, software programs required for at least one function, and the like; the storage data area may store data created according to the use of the electronic device, etc. In addition, the memory may include high-speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other volatile solid-state storage device.
2. Signal processing method for demodulation signal in capacitance sampling circuit
1. Description of the invention
When the capacitance sampling circuit samples, noise detection can be started first, and when the noise of the current sampling frequency is overlarge, the capacitance sampling circuit switches the sampling frequency to the sampling frequency with the lowest noise for sampling, and the data of the current sampling frequency is discarded.
When the sampling frequency of the capacitance sampling circuit is changed, the duty ratio of the pulse signal is changed due to the change of the frequency, and if the change amplitude of the duty ratio is too large, the demodulation signal finally output by the capacitance sampling circuit is also changed greatly, so that the problem that the demodulation signal after the change of the frequency cannot be estimated is caused.
Referring to fig. 2, fig. 2 is a flow chart of a signal processing method for a demodulation signal in a capacitance sampling circuit according to an embodiment of the application. The method includes, but is not limited to, the following steps:
step 201, determining whether noise of the current sampling frequency of the capacitance sampling circuit exceeds a preset noise threshold.
The preset noise threshold value can be set comprehensively according to factors such as use occasions of the capacitance sampling circuit and device parameters of the capacitance sampling circuit, and the like, and the noise threshold value is not limited in particular. The capacitor sampling circuit can be used in new energy automobiles, radars, wireless navigation, broadcasting equipment, television equipment, numerical control equipment, instrument wires and cables and the like. The device parameters of the capacitance sampling circuit, such as RC constant in the circuit, the number of sampling channels, etc.
It will be appreciated that step 201 above may be performed by a noise detection module in a capacitance sampling circuit. The noise detection module can be used for detecting interference noise of the environment so that during normal operation, frequency hopping can be conducted to a frequency point with lower interference noise for sampling, the signal to noise ratio under interference is improved, and the quality of the collected signals is ensured.
Step 202, updating the current sampling frequency to a first sampling frequency when the noise of the current sampling frequency exceeds a preset noise threshold, wherein the first sampling frequency is a frequency of which the noise is lower than the preset noise threshold.
If a plurality of available frequencies meet the condition that "noise is lower than a preset noise threshold", a frequency closest to the current sampling frequency may be selected for sampling.
Step 203, a first original signal and a second original signal of the capacitance sampling circuit are obtained, wherein the first original signal is a pulse signal at a current sampling frequency, and the second original signal is a pulse signal at the first sampling frequency.
The first original signal is a signal at an output end of an Analog-to-digital converter (ADC) of the capacitance sampling circuit.
Step 204, determining edge positions of the first original signal and edge positions of the second original signal respectively.
The edge positions are the positions of the rising edge and the falling edge of the pulse signal. It will be appreciated that at different sampling frequencies, the rising and falling edges occur at different times and for different durations, and therefore the edge positions of the first original signal are also different from the edge positions of the second original signal.
Step 205, setting the level of the edge position of the first original signal to a first level, so that the set first original signal is positively correlated with the duty cycle of the set first original signal.
Step 206, setting the level of the edge position of the second original signal to the first level, so that the set second original signal is positively correlated with the duty cycle of the set second original signal.
Wherein, the first level may be 0.
As can be appreciated, from fourier transform theory: any continuous signal f (T) with a period of T can be expressed as the sum of sine and cosine harmonic components with a frequency that is an integer multiple of the fundamental frequency, and the PWM square wave can be expressed as:
where a is the amplitude of the square wave, k is the duty cycle of the square wave, and f is the square wave signal frequency (i.e., the sampling frequency of the capacitive sampling circuit).
For an ideal square wave, after quadrature demodulation and low-pass filtering as shown in fig. 3A, the dc component is obtained as follows:however, the edge position of the actual signal is not like the "straight up and down" (as shown in fig. 3B) of the ideal signal due to the influence of the charge-discharge rate of the circuit, especially when the RC constant of the circuit is relatively large, a significant ramp process occurs on the rising edge and the falling edge, in this case, since the signal is not an ideal square wave, the dc component is not only related to the duty cycle k, but also related to the frequency spectrum in the rising edge and the falling edge of the signal itself, in this case, if the square wave signal frequency f is changed, the original data corresponding to the dc component will change, and the change rule cannot be estimated.
Therefore, the embodiment of the present application sets the level of the edge position of the first original signal to the first level, sets the level of the edge position of the second original signal to the first level (the adjusted signal is the "processed signal" in fig. 3B), and makes the duty ratio of the first original signal and the first original signal positively correlated, and makes the duty ratio of the second original signal and the second original signal positively correlated. In this way, the demodulation signal collected at the output end of the capacitance sampling circuit is positively correlated with the duty ratio, and even if the capacitance sampling circuit hops, the signal with the frequency changed can still be estimated according to the duty ratio.
Step 207, processing the set first original signal to obtain a first demodulated signal, where the first demodulated signal is a demodulated signal of the set first original signal.
Step 208, calculating a second demodulation signal according to the demodulation signal of the first original signal, the set duty ratio of the first original signal and the set duty ratio of the second original signal, wherein the second demodulation signal is the demodulation signal of the set second original signal.
Specifically, referring to fig. 3A again, a partial circuit architecture of the capacitance sampling circuit is shown in the drawing, and the embodiment of the application acquires a first original signal and a second original signal at an output end of the ADC, adjusts a level of an edge position of the first original signal so that the adjusted first original signal is positively correlated with a duty cycle thereof, and adjusts a level of an edge position of the second original signal so that the adjusted second original signal is positively correlated with the duty cycle thereof. In this way, the demodulation signal collected at the output end of the capacitance sampling circuit is positively correlated with the duty ratio, and even if the capacitance sampling circuit hops, the signal with the frequency changed can still be estimated according to the duty ratio.
The embodiment of the application has the following beneficial effects:
the embodiment of the application can determine whether the noise of the current sampling frequency of the capacitance sampling circuit exceeds a preset noise threshold, under the condition that the noise of the current sampling frequency exceeds the preset noise threshold, the current sampling frequency is updated to be a first sampling frequency, the first sampling frequency is the frequency with the lowest noise, a first original signal and a second original signal of the capacitance sampling circuit are obtained, the first original signal is a pulse signal under the current sampling frequency, the second original signal is a pulse signal under the first sampling frequency, the edge position of the first original signal and the edge position of the second original signal are respectively determined, the level of the edge position of the first original signal is set to be a first level, the level of the edge position of the second original signal is set to be a first level, the set second original signal is positively correlated with the duty ratio of the set second original signal, the set first original signal is processed to obtain a first demodulated signal, the first demodulated signal is the first demodulated signal, the first duty ratio of the first demodulated signal is set to be the second original signal, and the second duty ratio of the first demodulated signal is set to be the first duty ratio of the first original signal; in this way, by changing the level of the edge positions of the first original signal and the second original signal, the duty ratio of the first original signal and the duty ratio of the first original signal are positively correlated, and the duty ratio of the second original signal are positively correlated, so that the second demodulation signal can be calculated according to the duty ratio of the first original signal and the duty ratio of the second original signal, and the demodulation signal after the frequency change can be estimated.
2. Detailed description of the preferred embodiments
The technical scheme, beneficial effects and the like related to the embodiment of the application are specifically described below.
1) How to determine the edge position of the first original signal and the edge position of the second original signal
Some embodiments of how the edge positions of the first original signal and the edge positions of the second original signal are determined are described in detail below.
In some possible embodiments, the determining the edge positions of the first original signal and the second original signal in the step 204 may include the following steps:
in step 2041, determining an edge time and an edge width, where the edge time is a time when a rising edge and a falling edge of the pulse signal start to appear, and the edge width is a time when the rising edge and the falling edge continue, where the pulse signal includes a pulse signal corresponding to the first original signal and a pulse signal corresponding to the second original signal.
Step 2042, determining an edge position of the first original signal and an edge position of the second original signal according to the edge time and the edge width.
Referring again to FIG. 3B, it will be appreciated that the edge locations are shown as T edge Corresponding positions. In a specific implementation, the edge position may be determined according to the time and duration at which the edge position of the pulse signal starts to appear.
It can be seen that, according to the embodiment of the application, the edge time and the edge width can be determined, the edge time is the time when the rising edge and the falling edge of the pulse signal start to appear, the edge width is the time when the rising edge and the falling edge continue, the pulse signal comprises the pulse signal corresponding to the first original signal and the pulse signal corresponding to the second original signal, and the edge position of the first original signal and the edge position of the second original signal are determined according to the edge time and the edge width; in this way, accurate identification of the edge positions is facilitated, thereby ensuring accurate calculation of the duty cycles of the set first original signal and the set second original signal.
2) How to calculate the demodulation signal of the second original signal based on the demodulation signal of the first original signal, the duty cycle of the first original signal and the duty cycle of the second original signal
Some embodiments of how to calculate the demodulated signal of the second original signal based on the demodulated signal of the first original signal, the duty cycle of the first original signal, and the duty cycle of the second original signal are described in detail below.
In some possible embodiments, the step 208 of calculating the second demodulated signal according to the demodulated signal of the first original signal, the set duty cycle of the first original signal, and the set duty cycle of the second original signal may include the steps of:
Step 2081, determining the duty ratio of the set first original signal according to the sampling period of the capacitance sampling circuit at the current sampling frequency and the edge position of the set first original signal.
Step 2082, determining the duty ratio of the set second original signal according to the sampling period of the capacitance sampling circuit at the first sampling frequency and the edge position of the set second original signal.
Step 2083, calculating a second demodulation signal according to the first demodulation signal, the set duty ratio of the first original signal, the set duty ratio of the second original signal, and the preset correspondence.
Referring again to FIG. 3B, if the sampling period is at the current sampling frequencyStage T sig The edge position of the first original signal after setting is T edge The duty ratio of the first original signal after setting isSimilarly, the duty cycle of the second original signal after setting is also available therefrom.
Further, in some possible embodiments, the preset correspondence relationship is:
wherein, rawdata1 is a first demodulation signal, rawdata2 is a second demodulation signal, k 1 For the duty cycle, k, of the set first original signal 2 Is the duty cycle of the second original signal after setting.
It will be appreciated that after the level of the edge position is set to the first level, the first original signal is positively correlated with its duty cycle, the second original signal is positively correlated with its duty cycle, and the quadrature demodulation and low pass filtering of the signals does not affect the duty cycle of the signals, so that the demodulated signal of the first original signal is still positively correlated with the duty cycle of the first original signal, and the demodulated signal of the second original signal is still positively correlated with the duty cycle of the second original signal. Thus, the above correspondence can be obtained for the direct current component of the demodulated signal of the first original signal and the direct current component of the demodulated signal of the second original signal.
It can be seen that, according to the sampling period of the capacitor sampling circuit at the current sampling frequency and the edge position of the set first original signal, the duty ratio of the set first original signal is determined, and according to the sampling period of the capacitor sampling circuit at the first sampling frequency and the edge position of the set second original signal, the duty ratio of the set second original signal is determined, and according to the first demodulation signal, the duty ratio of the set first original signal, the duty ratio of the set second original signal and the preset corresponding relation, the second demodulation signal is calculated, so that the level of the edge positions of the first original signal and the second original signal is changed, and the duty ratio of the set first original signal and the duty ratio of the set second original signal are positively correlated, so that the second demodulation signal can be calculated according to the duty ratio of the set first original signal and the duty ratio of the set second original signal, and the estimated frequency of the signal can be changed.
3) How to determine whether noise of current sampling frequency of capacitive sampling circuit exceeds preset noise threshold
Some embodiments of how to determine whether the noise of the current sampling frequency of the capacitive sampling circuit exceeds a preset noise threshold are described in detail below.
In some possible embodiments, the step 201 of determining whether the noise of the current sampling frequency of the capacitive sampling circuit exceeds the preset noise threshold may include the following steps:
step 2011, detecting noise of the current sampling frequency of the capacitor sampling circuit;
step 2012, converting the detection result of the noise into a noise current signal or a noise voltage signal;
step 2013, determining that the noise of the current sampling frequency exceeds a preset noise threshold value under the condition that the noise current signal exceeds the preset noise current threshold value or the noise voltage signal exceeds the preset noise voltage threshold value, wherein the preset noise threshold value corresponds to the preset noise current threshold value and the preset noise voltage threshold value;
step 2014, determining that the noise of the current sampling frequency does not exceed the preset noise threshold value in the case that the noise current signal is less than or equal to the preset noise current threshold value or the noise voltage signal is less than or equal to the preset noise voltage threshold value.
It can be seen that in the embodiment of the present application, the noise of the current sampling frequency is detected by the noise current signal or the noise voltage signal, and whether the noise exceeds the preset noise threshold is determined, so that the accurate identification of the noise of the current sampling frequency is facilitated.
4) How to process the first original signal and the second original signal
Some embodiments of how the first original signal and the second original signal are processed are described in detail below.
In some possible embodiments, the step 207 processes the set first original signal to obtain a first demodulated signal, and may include the following steps:
step 2071, performing quadrature demodulation and low-pass filtering on the set first original signal to obtain a first demodulated signal.
Thus, the channel capacity of the capacitance sampling circuit is improved, and accurate transmission of signals is ensured.
3. Signal processing device for demodulation signal in capacitance sampling circuit
1) Description of the application
The foregoing description of the embodiments of the present application has been presented primarily in terms of a method-side implementation. It will be appreciated that, in order to achieve the above-described functions, the electronic device may include corresponding hardware structures and/or software modules that perform the respective functions. Those of skill in the art will appreciate that the application may be implemented in hardware or a combination of hardware and computer software, as methods, functions, modules, units, or steps of the examples described in connection with the embodiments provided herein. Whether a method, function, module, unit, or step is implemented as hardware or computer software driven hardware depends upon the particular application and design constraints imposed on the solution. Those skilled in the art may implement the described methods, functions, modules, units, or steps using different methods for each particular application, but such implementation is not to be considered as outside the scope of the present application.
The embodiment of the application can divide the functional units/modules according to the method example. For example, each functional unit/module may be divided corresponding to each function, or two or more functions may be integrated in one functional unit/module. The integrated functional units/modules described above may be implemented in hardware or in software. It should be noted that the division of the functional units/modules in the embodiment of the present application is schematic, but only one logic function is divided, and another division manner may be implemented in practice.
In the case of using integrated units, referring to fig. 4, fig. 4 is a block diagram illustrating functional units of a signal processing apparatus for demodulating a signal in a capacitance sampling circuit according to an embodiment of the present application. The signal processing apparatus 400 for a demodulation signal in a capacitance sampling circuit includes: a noise determination unit 401, a frequency update unit 402, an acquisition unit 403, a determination unit 404, a level adjustment unit 405, a demodulation unit 406, and a calculation unit 407.
In some possible implementations, the noise determination unit 401, the frequency update unit 402, the acquisition unit 403, the determination unit 404, the level adjustment unit 405, the demodulation unit 406, and the calculation unit 407 may be separate units from each other, and may be integrated in the same unit.
For example, the noise determination unit 401, the frequency update unit 402, the acquisition unit 403, the determination unit 404, the level adjustment unit 405, the demodulation unit 406, and the calculation unit 407 may be integrated in a processing unit.
It should be noted that the processing unit may be a processor or a controller, and may be, for example, a central processing unit (central processing unit, CPU), a general purpose processor, a digital signal processor (digital signal processor, DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (field programmable gate array, FPGA), or other programmable logic device, a transistor logic device, a hardware component, or any combination thereof. Which may implement or perform the various exemplary logical blocks, modules, and circuits described in connection with the present disclosure. The processing unit may also be a combination that implements computing functionality, e.g., comprising one or more microprocessor combinations, a combination of DSPs and microprocessors, etc.
In some possible implementations, the signal processing apparatus 400 for demodulation signals in the capacitive sampling circuit may further include a storage unit for storing a computer program or instructions executed by the signal processing apparatus 400 for demodulation signals in the capacitive sampling circuit. The memory unit may be a memory.
In some possible designs, the signal processing apparatus 400 for demodulating signals in the capacitive sampling circuit may be a chip/chip module/processor/device/operating system.
In a specific implementation, the noise determining unit 401, the frequency updating unit 402, the acquiring unit 403, the determining unit 404, the level adjusting unit 405, the demodulating unit 406, and the calculating unit 407 are configured to perform the steps described in the above method embodiments. The following is a detailed description.
A noise determining unit 401, configured to determine whether noise of a current sampling frequency of the capacitance sampling circuit exceeds a preset noise threshold;
a frequency updating unit 402, configured to update the current sampling frequency to a first sampling frequency when the noise of the current sampling frequency exceeds a preset noise threshold, where the first sampling frequency is a frequency at which the noise is lower than the preset noise threshold;
an obtaining unit 403, configured to obtain a first original signal and a second original signal of the capacitance sampling circuit, where the first original signal is a pulse signal at a current sampling frequency, and the second original signal is a pulse signal at the first sampling frequency;
a determining unit 404 for determining an edge position of the first original signal and an edge position of the second original signal, respectively;
A level adjustment unit 405, configured to set a level of an edge position of the first original signal to a first level, so that the set first original signal is positively correlated with a duty cycle of the set first original signal;
the level adjustment unit 405 is further configured to set a level of an edge position of the second original signal to a first level, so that the set second original signal is positively correlated with a duty cycle of the set second original signal;
a demodulation unit 406, configured to process the set first original signal to obtain a first demodulated signal, where the first demodulated signal is a demodulated signal of the set first original signal;
the calculating unit 407 is configured to calculate a second demodulation signal according to the first demodulation signal, the set duty cycle of the first original signal, and the set duty cycle of the second original signal, where the second demodulation signal is a demodulation signal of the set second original signal.
It can be seen that, in the embodiment of the present application, whether the noise of the current sampling frequency of the capacitance sampling circuit exceeds the preset noise threshold value can be determined, and when the noise of the current sampling frequency exceeds the preset noise threshold value, the current sampling frequency is updated to be the first sampling frequency, the first sampling frequency is the frequency with the lowest noise, the first original signal and the second original signal of the capacitance sampling circuit are obtained, the first original signal is the pulse signal under the current sampling frequency, the second original signal is the pulse signal under the first sampling frequency, the edge position of the first original signal and the edge position of the second original signal are respectively determined, the level of the edge position of the first original signal is set to be the first level, the method comprises the steps of enabling a set first original signal to be positively correlated with the duty ratio of the set first original signal, setting the level of the edge position of a second original signal to be a first level, enabling the set second original signal to be positively correlated with the duty ratio of the set second original signal, processing the set first original signal to obtain a first demodulation signal, wherein the first demodulation signal is a demodulation signal of the set first original signal, and calculating a second demodulation signal according to the demodulation signal of the first original signal, the duty ratio of the set first original signal and the duty ratio of the set second original signal, wherein the second demodulation signal is a demodulation signal of the set second original signal; in this way, by changing the level of the edge positions of the first original signal and the second original signal, the duty ratio of the first original signal and the duty ratio of the first original signal are positively correlated, and the duty ratio of the second original signal are positively correlated, so that the second demodulation signal can be calculated according to the duty ratio of the first original signal and the duty ratio of the second original signal, and the demodulation signal after the frequency change can be estimated.
It should be noted that, the specific implementation of each operation performed by the signal processing apparatus 400 for demodulating a signal in the capacitance sampling circuit may be referred to the corresponding description of the above method embodiment, which is not repeated herein.
2) Other possible implementations
Some of the implementations involved are described below, and other details not involved may be specifically described above, which will not be repeated.
In some possible embodiments, the determining unit 404 is configured to, in determining the edge positions of the first original signal and the edge positions of the second original signal, respectively:
determining edge time and edge width, wherein the edge time is the time when the rising edge and the falling edge of the pulse signal start to appear, and the edge width is the time when the rising edge and the falling edge continue, and the pulse signal comprises a pulse signal corresponding to a first original signal and a pulse signal corresponding to a second original signal;
and determining the edge position of the first original signal and the edge position of the second original signal according to the edge time and the edge width.
In some possible embodiments, the calculating unit 407 is configured to, in calculating the second demodulated signal according to the demodulated signal of the first original signal, the set duty cycle of the first original signal, and the set duty cycle of the second original signal:
Determining the duty ratio of the set first original signal according to the sampling period of the capacitance sampling circuit at the current sampling frequency and the edge position of the set first original signal;
determining the duty ratio of the set second original signal according to the sampling period of the capacitor sampling circuit at the first sampling frequency and the edge position of the set second original signal;
and calculating a second demodulation signal according to the first demodulation signal, the set duty ratio of the first original signal, the set duty ratio of the second original signal and the preset corresponding relation.
In some possible embodiments, the noise determining unit 401 is configured to, in determining whether the noise of the current sampling frequency of the capacitive sampling circuit exceeds a preset noise threshold value:
detecting noise of the current sampling frequency of the capacitance sampling circuit;
converting the detection result of the noise into a noise current signal or a noise voltage signal;
under the condition that the noise current signal exceeds a preset noise current threshold value or the noise voltage signal exceeds a preset noise voltage threshold value, determining that the noise of the current sampling frequency exceeds the preset noise threshold value, wherein the preset noise threshold value corresponds to the preset noise current threshold value and the preset noise voltage threshold value;
And determining that the noise of the current sampling frequency does not exceed the preset noise threshold value under the condition that the noise current signal is smaller than or equal to the preset noise current threshold value or the noise voltage signal is smaller than or equal to the preset noise voltage threshold value.
In some possible embodiments, in processing the set first original signal to obtain a first demodulated signal, the demodulation unit 406 is configured to:
and carrying out quadrature demodulation and low-pass filtering on the set first original signal to obtain a first demodulation signal.
4. Still another electronic device
1) Description of the application
The following describes a schematic structural diagram of an electronic device according to an embodiment of the present application, as shown in fig. 5. The electronic device 500 includes a processor 510, a memory 520, and at least one communication bus for connecting the processor 510 and the memory 520.
In some possible implementations, the processor 510 may be one or more central processing units, CPUs. In the case where the processor 510 is a CPU, the CPU may be a single core CPU or a multi-core CPU. Memory 520 includes, but is not limited to, random access memory (random access memory, RAM), read-only memory (ROM), erasable programmable read-only memory (erasable programmable read only memory, EPROM), or portable read-only memory (compact disc read-only memory, CD-ROM), and memory 520 is used to store computer programs or instructions.
In some possible implementations, the electronic device 500 also includes a communication interface for receiving and transmitting data.
In some possible implementations, the processor 510 in the electronic device 500 is configured to execute the computer program or instructions 521 stored in the memory 520 to implement the steps of:
determining whether the noise of the current sampling frequency of the capacitance sampling circuit exceeds a preset noise threshold value;
updating the current sampling frequency to a first sampling frequency under the condition that the noise of the current sampling frequency exceeds a preset noise threshold value, wherein the first sampling frequency is the frequency of which the noise is lower than the preset noise threshold value;
acquiring a first original signal and a second original signal of a capacitance sampling circuit, wherein the first original signal is a pulse signal at a current sampling frequency, and the second original signal is a pulse signal at the first sampling frequency;
respectively determining the edge position of the first original signal and the edge position of the second original signal;
setting the level of the edge position of the first original signal to be a first level, so that the set first original signal is positively correlated with the duty ratio of the set first original signal;
setting the level of the edge position of the second original signal to be a first level, so that the set second original signal is positively correlated with the duty ratio of the set second original signal;
Processing the set first original signal to obtain a first demodulation signal, wherein the first demodulation signal is a demodulation signal of the set first original signal;
and calculating a second demodulation signal according to the first demodulation signal, the set duty ratio of the first original signal and the set duty ratio of the second original signal, wherein the second demodulation signal is the demodulation signal of the set second original signal.
It can be seen that, in the electronic device provided by the embodiment of the present application, whether the noise of the current sampling frequency of the capacitance sampling circuit exceeds the preset noise threshold value can be determined, under the condition that the noise of the current sampling frequency exceeds the preset noise threshold value, the current sampling frequency is updated to be the first sampling frequency, the first sampling frequency is the frequency with the lowest noise, the first original signal and the second original signal of the capacitance sampling circuit are obtained, the first original signal is a pulse signal under the current sampling frequency, the second original signal is a pulse signal under the first sampling frequency, the edge position of the first original signal and the edge position of the second original signal are respectively determined, the level of the edge position of the first original signal is set to be the first level, the level of the edge position of the second original signal is set to be the first level, the level of the second original signal is set to be the second level, the first original signal is processed to obtain a first demodulated signal, the first demodulated signal is the first original signal, the second demodulated signal is the second original signal is set to be the second original signal, and the first demodulated signal is set to be the second original signal, and the second demodulated signal is set to be the first original signal; in this way, by changing the level of the edge positions of the first original signal and the second original signal, the duty ratio of the first original signal and the duty ratio of the first original signal are positively correlated, and the duty ratio of the second original signal are positively correlated, so that the second demodulation signal can be calculated according to the duty ratio of the first original signal and the duty ratio of the second original signal, and the demodulation signal after the frequency change can be estimated.
It should be noted that, the specific implementation of each operation performed by the electronic device 500 may be referred to the corresponding description of the above illustrated method embodiment, which is not repeated herein.
2) Other possible implementations
In some possible embodiments, the processor 510 in the electronic device 500 is configured to execute the computer program or instructions 521 stored in the memory 520 to implement the following steps in determining the edge positions of the first original signal and the second original signal, respectively:
determining edge time and edge width, wherein the edge time is the time when the rising edge and the falling edge of the pulse signal start to appear, and the edge width is the time when the rising edge and the falling edge continue, and the pulse signal comprises a pulse signal corresponding to a first original signal and a pulse signal corresponding to a second original signal;
and determining the edge position of the first original signal and the edge position of the second original signal according to the edge time and the edge width.
In some possible embodiments, in calculating the second demodulated signal from the first demodulated signal, the set duty cycle of the first original signal, and the set duty cycle of the second original signal, the processor 510 in the electronic device 500 is configured to execute the computer program or instructions 521 stored in the memory 520 to implement the steps of:
Determining the duty ratio of the set first original signal according to the sampling period of the capacitance sampling circuit at the current sampling frequency and the edge position of the set first original signal;
determining the duty ratio of the set second original signal according to the sampling period of the capacitor sampling circuit at the first sampling frequency and the edge position of the set second original signal;
and calculating the demodulation signal of the second original signal according to the first demodulation signal, the set duty ratio of the first original signal, the set duty ratio of the second original signal and the preset corresponding relation.
In some possible embodiments, the processor 510 in the electronic device 500 is configured to execute the computer program or instructions 521 stored in the memory 520 to implement the following steps in determining whether the noise of the current sampling frequency of the capacitive sampling circuit exceeds a preset noise threshold:
detecting noise of the current sampling frequency of the capacitance sampling circuit;
converting the detection result of the noise into a noise current signal or a noise voltage signal;
under the condition that the noise current signal exceeds a preset noise current threshold value or the noise voltage signal exceeds a preset noise voltage threshold value, determining that the noise of the current sampling frequency exceeds the preset noise threshold value, wherein the preset noise threshold value corresponds to the preset noise current threshold value and the preset noise voltage threshold value;
And determining that the noise of the current sampling frequency does not exceed the preset noise threshold value under the condition that the noise current signal is smaller than or equal to the preset noise current threshold value or the noise voltage signal is smaller than or equal to the preset noise voltage threshold value.
In some possible embodiments, in processing the set first original signal to obtain a first demodulated signal, the processor 510 in the electronic device 500 is configured to execute the computer program or the instructions 521 stored in the memory 520 to implement the following steps:
and carrying out quadrature demodulation and low-pass filtering on the set first original signal to obtain a first demodulation signal.
5. Other exemplary description
The embodiment of the present application also provides a computer storage medium storing a computer program for electronic data exchange, where the computer program causes a computer to execute some or all of the steps of any one of the methods described in the above method embodiments.
Embodiments of the present application also provide a computer program product comprising a computer program operable to cause a computer to perform part or all of the steps of any one of the methods described in the method embodiments above. A computer program product is understood to be a software product whose solution is realized mainly by means of a computer program.
It should be noted that, for simplicity of description, the foregoing method embodiments are all described as a series of acts, but it should be understood by those skilled in the art that the present application is not limited by the order of acts described, as some steps may be performed in other orders or concurrently in accordance with the present application. Further, those skilled in the art will also appreciate that the embodiments described in the specification are all preferred embodiments, and that the acts and modules referred to are not necessarily required for the present application.
In the foregoing embodiments, the descriptions of the embodiments are emphasized, and for parts of one embodiment that are not described in detail, reference may be made to related descriptions of other embodiments.
In the several embodiments provided by the present application, it should be understood that the disclosed apparatus may be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative, such as the above-described division of units, merely a division of logic functions, and there may be additional manners of dividing in actual implementation, such as multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, or may be in electrical or other forms.
The units described above as separate components may or may not be physically separate, and components shown as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in the embodiments of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
The integrated units described above, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable memory. Based on such understanding, the technical solution of the present application may be embodied in essence or a part contributing to the prior art or all or part of the technical solution in the form of a software product stored in a memory, comprising several instructions for causing a computer device (which may be a personal computer, a server or a network device, etc.) to perform all or part of the steps of the above-mentioned method of the various embodiments of the present application. And the aforementioned memory includes: a U-disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a removable hard disk, a magnetic disk, or an optical disk, or other various media capable of storing program codes.
Those of ordinary skill in the art will appreciate that all or a portion of the steps in the various methods of the above embodiments may be implemented by a program that instructs associated hardware, and the program may be stored in a computer readable memory, which may include: flash disk, read-Only Memory (ROM), random access Memory (Random Access Memory, RAM), magnetic disk or optical disk.
The foregoing has outlined rather broadly the more detailed description of embodiments of the application, wherein the principles and embodiments of the application are explained in detail using specific examples, the above examples being provided solely to facilitate the understanding of the method and core concepts of the application; meanwhile, as those skilled in the art will vary in the specific embodiments and application scope according to the idea of the present application, the present disclosure should not be construed as limiting the present application in summary.
Claims (10)
1. A method of signal processing of a demodulated signal in a capacitive sampling circuit, the method comprising:
determining whether noise of the current sampling frequency of the capacitance sampling circuit exceeds a preset noise threshold;
updating the current sampling frequency to a first sampling frequency under the condition that the noise of the current sampling frequency exceeds the preset noise threshold value, wherein the first sampling frequency is a frequency of which the noise is lower than the preset noise threshold value;
Acquiring a first original signal and a second original signal of the capacitance sampling circuit, wherein the first original signal is a pulse signal at the current sampling frequency, and the second original signal is a pulse signal at the first sampling frequency;
respectively determining the edge position of the first original signal and the edge position of the second original signal;
setting the level of the edge position of the first original signal to be a first level, so that the set first original signal is positively correlated with the duty ratio of the set first original signal;
setting the level of the edge position of the second original signal to the first level, so that the set second original signal is positively correlated with the duty ratio of the set second original signal;
processing the set first original signal to obtain a first demodulation signal, wherein the first demodulation signal is a demodulation signal of the set first original signal;
and calculating a second demodulation signal according to the first demodulation signal, the duty ratio of the set first original signal and the duty ratio of the set second original signal, wherein the second demodulation signal is the demodulation signal of the set second original signal.
2. The method of claim 1, wherein the determining edge positions of the first original signal and the second original signal, respectively, comprises:
determining edge time and edge width, wherein the edge time is the time when rising edges and falling edges of pulse signals start to appear, and the edge width is the time when the rising edges and the falling edges continue, and the pulse signals comprise pulse signals corresponding to the first original signals and pulse signals corresponding to the second original signals;
and determining the edge position of the first original signal and the edge position of the second original signal according to the edge time and the edge width.
3. The method according to claim 1 or 2, wherein said calculating a second demodulation signal from the first demodulation signal, the set duty cycle of the first original signal and the set duty cycle of the second original signal comprises:
determining the duty ratio of the set first original signal according to the sampling period of the capacitance sampling circuit at the current sampling frequency and the edge position of the set first original signal;
Determining the duty ratio of the set second original signal according to the sampling period of the capacitance sampling circuit at the first sampling frequency and the edge position of the set second original signal;
and calculating the second demodulation signal according to the first demodulation signal, the set duty ratio of the first original signal, the set duty ratio of the second original signal and the preset corresponding relation.
4. A method according to any of claims 1-3, wherein said determining whether noise of a current sampling frequency of the capacitive sampling circuit exceeds a preset noise threshold comprises:
detecting noise of the current sampling frequency of the capacitance sampling circuit;
converting the detection result of the noise of the current sampling frequency into a noise current signal or a noise voltage signal;
determining that the noise of the current sampling frequency exceeds a preset noise threshold value under the condition that the noise current signal exceeds a preset noise current threshold value or the noise voltage signal exceeds a preset noise voltage threshold value, wherein the preset noise threshold value corresponds to the preset noise current threshold value and the preset noise voltage threshold value;
And determining that the noise of the current sampling frequency does not exceed the preset noise threshold value under the condition that the noise current signal is smaller than or equal to the preset noise current threshold value or the noise voltage signal is smaller than or equal to the preset noise voltage threshold value.
5. The method according to any one of claims 1 to 4, wherein said processing said set first original signal to obtain a first demodulated signal comprises:
and carrying out quadrature demodulation and low-pass filtering on the set first original signal to obtain the first demodulation signal.
6. The method according to any one of claims 1 to 5, wherein the first sampling frequency is a frequency at which noise is below the preset noise threshold, comprising:
the first sampling frequency is the sampling frequency closest to the current sampling frequency in a plurality of sampling frequencies with noise lower than the preset noise threshold value.
7. A signal processing apparatus for demodulating a signal in a capacitive sampling circuit, the apparatus comprising:
a noise determining unit, configured to determine whether noise of a current sampling frequency of the capacitance sampling circuit exceeds a preset noise threshold;
A frequency updating unit, configured to update the current sampling frequency to a first sampling frequency when the noise of the current sampling frequency exceeds the preset noise threshold, where the first sampling frequency is a frequency where the noise is lower than the preset noise threshold;
the acquisition unit is used for acquiring a first original signal and a second original signal of the capacitance sampling circuit, wherein the first original signal is a pulse signal at the current sampling frequency, and the second original signal is a pulse signal at the first sampling frequency;
a determining unit configured to determine an edge position of the first original signal and an edge position of the second original signal, respectively;
a level adjustment unit, configured to set a level of an edge position of the first original signal to a first level, so that the set first original signal is positively correlated with a duty cycle of the set first original signal;
the level adjusting unit is further configured to set a level of an edge position of the second original signal to the first level, so that the set second original signal is positively correlated with a duty cycle of the set second original signal;
The demodulation unit is used for processing the set first original signal to obtain a first demodulation signal, wherein the first demodulation signal is a demodulation signal of the set first original signal;
and the calculating unit is used for calculating a second demodulation signal according to the first demodulation signal, the duty ratio of the set first original signal and the duty ratio of the set second original signal, wherein the second demodulation signal is the demodulation signal of the set second original signal.
8. An electronic device comprising a processor, a memory and a computer program or instructions stored on the memory, characterized in that the processor executes the computer program or instructions to implement the steps of the method of any one of claims 1-6.
9. A computer readable storage medium, characterized in that it has stored thereon a computer program or instructions which, when executed by a processor, implement the steps of the method of any of claims 1-6.
10. A computer program, characterized in that the computer program, when being executed by a processor, implements the steps of the method according to any one of claims 1-6.
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| DE2738279C3 (en) * | 1977-08-25 | 1980-03-13 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | Method and arrangement for deriving a reception clock |
| ES2081405T3 (en) * | 1990-09-11 | 1996-03-01 | Stefan Brinkhaus | PROCEDURE AND DEVICE FOR THE MINIMIZATION OF DISTURBANCES, ESPECIALLY IN THE RECEPTION OF FM. |
| US5227741A (en) * | 1992-01-22 | 1993-07-13 | Glenayre Electronics Ltd. | Variable speed asynchronous modem |
| JP2005012411A (en) * | 2003-06-18 | 2005-01-13 | Hitachi Kokusai Electric Inc | Radio communication apparatus |
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| CN109120564A (en) * | 2018-07-11 | 2019-01-01 | 中国科学院地质与地球物理研究所 | A kind of digital demodulation signal method and apparatus |
| CN114740996A (en) * | 2022-04-07 | 2022-07-12 | 维沃移动通信有限公司 | Signal acquisition method and electronic equipment |
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