CN116840538A - Current detection circuit and chip - Google Patents
Current detection circuit and chip Download PDFInfo
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- CN116840538A CN116840538A CN202210308655.XA CN202210308655A CN116840538A CN 116840538 A CN116840538 A CN 116840538A CN 202210308655 A CN202210308655 A CN 202210308655A CN 116840538 A CN116840538 A CN 116840538A
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- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
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Abstract
The application discloses a current detection circuit, which comprises: the power module is used for acquiring a driving signal in a preset mode and entering a working state under the control of the driving signal; the control module is connected with the power module and used for acquiring a power signal from the power module and controlling the output of the power signal; the sampling module is connected with the control module and is used for acquiring the power signal output by the control module and sampling the power signal output by the control module to obtain a sampling signal; and the output module is connected with the sampling module and is used for acquiring the sampling signal, converting the sampling signal into detection current and outputting the detection current. The application can realize current detection only by using the analog circuit, and is beneficial to reducing the detection cost.
Description
Technical Field
The present application relates to the field of electronic circuits, and in particular, to a current detection circuit and a chip.
Background
At present, an inductance driving power integrated switch circuit adopts an off-chip current detection mode to detect current. However, the off-chip current detection method requires an off-chip digital circuit detection device, and cannot detect the current by using only an analog circuit inside the chip, which increases the detection cost.
Disclosure of Invention
Aiming at the technical problems, the application provides a current detection circuit and a chip, which can realize current detection only by using an analog circuit and are beneficial to reducing the detection cost.
The embodiment of the application provides a current detection circuit, which comprises:
the power module is used for acquiring a driving signal in a preset mode and entering a working state under the control of the driving signal;
the control module is connected with the power module and used for acquiring a power signal from the power module and controlling the output of the power signal;
the sampling module is connected with the control module and is used for acquiring the power signal output by the control module and sampling the power signal output by the control module to obtain a sampling signal;
and the output module is connected with the sampling module and is used for acquiring the sampling signal, converting the sampling signal into detection current and outputting the detection current.
Optionally, the sampling module includes:
the first sampling unit is used for acquiring a positive power signal, sampling the positive power signal and then outputting a positive sampling signal;
and the second sampling unit is used for acquiring the inverted power signal, sampling the inverted power signal and then outputting an inverted sampling signal.
Optionally, the first sampling unit includes:
the first sampling subunit is used for sampling the positive phase power signal to obtain a positive phase sampling signal;
and the first amplifying subunit is connected with the first sampling subunit and is used for amplifying the sampling signal of the positive phase.
Optionally, the second sampling unit includes:
the second sampling subunit is used for sampling the inverted power signal to obtain an inverted sampling signal;
and the second amplifying subunit is connected with the second sampling subunit and is used for amplifying the inverted sampling signal.
Optionally, the output module includes:
the first output unit is used for acquiring a positive sampling signal, converting the positive sampling signal into a positive detection current and outputting the positive detection current;
and the second output unit is used for acquiring an inverted sampling signal, converting the inverted sampling signal into an inverted detection current and outputting the inverted detection current.
Optionally, the power module comprises a power tube;
the first end of the power tube is a first output end of the power module, the second end of the power tube is a second output end of the power module, a first control signal is input through a third end of the power tube, and the switching state of the power tube is controlled according to the first control signal.
Optionally, the control module includes a differential operational amplifier;
the first input end of the differential operational amplifier is connected with the first output end of the power module, the second input end of the differential operational amplifier is connected with the second output end of the power module, and the output end of the differential operational amplifier is the output end of the control module.
Optionally, the first sampling subunit includes a first detection tube;
the first end of the first detection tube is the output end of the first sampling subunit, the second end of the first detection tube is used for inputting a first reference voltage, a second control signal is input through the third end of the first detection tube, and the switching state of the first detection tube is controlled according to the second control signal.
Optionally, the first amplifying subunit includes a first gain amplifier;
the first input end of the first gain amplifier is connected with the output end of the control module, the second input end of the first gain amplifier is connected with the output end of the first sampling subunit, and the output end of the first gain amplifier is used for outputting amplified normal phase sampling signals.
Optionally, the second sampling subunit includes a second detection tube;
the first end of the second detection tube is the output end of the second sampling subunit, the second end of the second detection tube is used for inputting a second reference voltage, a third control signal is input through the third end of the second detection tube, and the switching state of the second detection tube is controlled according to the third control signal.
Optionally, the second amplifying subunit includes a second gain amplifier;
the first input end of the second gain amplifier is connected with the output end of the control module, the second input end of the second gain amplifier is connected with the output end of the second sampling subunit, and the output end of the second gain amplifier is used for outputting the amplified inverted sampling signal.
Optionally, the first output unit includes a first follower and a first current mirror;
the input end of the first follower is connected with the output end of the first sampling subunit, and the control end of the first follower is connected with the output end of the first amplifying subunit;
the input end of the first current mirror is connected with the output end of the first follower, and the output end of the first current mirror is used for outputting normal-phase detection current.
Optionally, the second output unit includes a second follower and a second current mirror;
the input end of the second follower is connected with the output end of the second sampling subunit, and the control end of the second follower is connected with the output end of the second amplifying subunit;
the input end of the second current mirror is connected with the output end of the second follower, and the output end of the second current mirror is used for outputting reversed-phase detection current.
The embodiment of the application provides a chip which comprises the current detection circuit.
Compared with the prior art, the embodiment of the application has the following beneficial effects:
the embodiment of the application provides a current detection circuit and a chip, wherein the current detection circuit comprises a power module, a control module and a control module, wherein the power module is used for acquiring a driving signal in a preset mode and entering a working state under the control of the driving signal; the control module is connected with the power module and used for acquiring a power signal from the power module and controlling the output of the power signal; the sampling module is connected with the control module and is used for acquiring the power signal output by the control module and sampling the power signal output by the control module to obtain a sampling signal; and the output module is connected with the sampling module and is used for acquiring the sampling signal, converting the sampling signal into detection current and outputting the detection current. Therefore, the digital circuit detection equipment outside the chip is not needed in the embodiment, and the current is detected only by the analog circuit inside the chip, so that the detection cost is saved.
Drawings
Fig. 1 is a schematic diagram of a first structure of a current detection circuit according to an embodiment of the present application;
fig. 2 is a schematic diagram of a first structure of a sampling module according to an embodiment of the present application;
FIG. 3 is a schematic diagram of a second structure of a sampling module according to an embodiment of the present application;
fig. 4 is a schematic structural diagram of an output module according to an embodiment of the present application;
fig. 5 is a second schematic diagram of a current detection circuit according to an embodiment of the present application;
FIG. 6 is a schematic diagram of a chip according to an embodiment of the present application;
1000, a power module; 2000. a control module; 3000. a sampling module; 4000. an output module; 5000. a chip; 3100. a first sampling unit; 3200. a second sampling unit; 3110. a first amplifying subunit; 3120. a first sampling subunit; 3210. a second amplifying subunit; 3220. a second sampling subunit; 4100. a first output unit; 4200. a second output unit; 1001. a power tube; 2001. a differential operational amplifier; 3111. a first gain amplifier; 3121. a first detection tube; 3211. a second gain amplifier; 3221. a second detection tube; 4110. a first follower; 4120. a first current mirror; 4121. a first field effect transistor; 4122. a second field effect transistor; 4210. a second follower; 4220. a second current mirror; 4221. a third field effect transistor; 4222. and a fourth field effect transistor.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
Referring to fig. 1, fig. 1 is a schematic diagram of a first structure of a current detection circuit according to an embodiment of the application. The current detection circuit includes:
the power module 1000 is configured to obtain a driving signal in a preset manner, and enter a working state under the control of the driving signal.
It may be understood that, acquiring the driving signal in a preset manner means that the driving signal is transmitted to the power module 1000 after passing through an impedance element, where the impedance element includes a resistor, an inductor, and the like; alternatively, the driving signal may be directly transmitted to the power module 1000. After receiving the driving signal, the power module 1000 enters an operating state, and further performs other operations, such as starting a power supply and providing power to other electronic devices.
And the control module 2000 is connected with the power module 1000 and is used for acquiring a power signal from the power module 1000 and controlling the output of the power signal.
In this embodiment, the control module 2000 may control the output of the power signal after acquiring the power signal from the power module 1000. For example, the control power signal outputs and stops outputting the power signal, thereby achieving the control effect of when the power signal is output. In addition, when the power module 1000 is operated under the condition of ac current and the control module 2000 obtains a positive power signal and/or an inverted power signal, the control module 2000 may also control the output power signal to be the positive power signal or the inverted power signal.
The sampling module 3000 is connected to the control module 2000, and is configured to obtain a power signal output by the control module 2000, and sample the power signal output by the control module 2000 to obtain a sampled signal.
It will be appreciated that, in order to detect the current of the power module 1000, the power module 1000 is sampled by the sampling module 3000. When the power module 1000 is operated under the condition of direct current, the sampling module 3000 can sample from the power module 1000 to obtain a direct current sampling signal; when power module 1000 is operating under alternating current, sampling module 3000 may sample a positive sampling signal and/or a negative sampling signal from power module 1000.
And the output module 4000 is connected with the sampling module 3000 and is used for acquiring the sampling signal, converting the sampling signal into a detection current and outputting the detection current.
It will be appreciated that since the sampling signal is also subjected to signal processing to obtain the detection current, the sampling signal is converted into the detection current by the output module 4000, for example, signal amplification processing, noise reduction processing, signal conversion processing, and the like, to obtain the required detection current.
The current detection circuit provided by the embodiment of the application comprises a power module 1000, a control module and a control module, wherein the power module is used for acquiring a driving signal in a preset mode and entering a working state under the control of the driving signal; the sampling module 3000 is connected to the power module 1000, and is configured to sample the power module 1000 to obtain a sampling signal; and the output module 4000 is connected with the sampling module 3000 and is used for acquiring the sampling signal, converting the sampling signal into a detection current and outputting the detection current. Therefore, the digital circuit detection equipment outside the chip 5000 is not needed in the embodiment, and the current is detected only by the analog circuit inside the chip 5000, so that the detection cost is saved.
Referring to fig. 2, fig. 2 is a schematic diagram of a first structure of a sampling module 3000 according to an embodiment of the present application.
In one embodiment, the sampling module 3000 includes a first sampling unit 3100, configured to obtain a positive phase power signal, and sample the positive phase power signal and output a positive phase sampling signal; the second sampling unit 3200 is configured to obtain an inverted power signal, sample the inverted power signal, and output an inverted sampling signal.
It can be appreciated that the present embodiment samples a positive sampling signal by the first sampling unit 3100 and samples a negative sampling signal by the second sampling unit 3200, that is, a manner of bi-directional detection is achieved. In addition, since the sampling unit is divided into the first sampling unit 3100 and the second sampling unit 3200, the bias voltages are set to the first sampling unit 3100 and the second sampling unit 3200, respectively, compared with the bias voltages are set to the sampling units, so that the bias modes of the circuit can be more diversified, and the bias of the analog output can be more flexibly realized.
Referring to fig. 3, fig. 3 is a second schematic structural diagram of a sampling module 3000 according to an embodiment of the present application.
Optionally, the first sampling unit 3100 includes a first sampling subunit 3120, configured to sample the positive phase power signal to obtain a positive phase sampled signal; a first amplifying subunit 3110 is connected to the first sampling subunit 3120, and is configured to amplify the sampling signal in the normal phase.
Optionally, the second sampling unit 3200 includes a second sampling subunit 3220, configured to sample the inverted power signal to obtain an inverted sampled signal; a second amplifying subunit 3210 is connected to the second sampling subunit 3220 and is configured to amplify the inverted sampling signal.
It can be appreciated that the positive or negative sampling signals sampled by the first sampling subunit 3120 or the second sampling subunit 3220 may be too weak to be detected, so that the first amplifying subunit 3110 and the second amplifying subunit 3210 amplify the positive sampling signals and the negative sampling signals respectively, before converting to the detection current, so as to improve the signal processing capability of the circuit and the accuracy of the detection current.
Referring to fig. 4, fig. 4 is a schematic structural diagram of an output module 4000 according to an embodiment of the application.
In one embodiment, the output module 4000 includes a first output unit 4100 for obtaining a positive sampling signal, and converting the positive sampling signal into a positive detection current for output; the second output unit 4200 is configured to obtain an inverted sampling signal, convert the inverted sampling signal into an inverted detection current, and output the inverted detection current.
It can be appreciated that the first output unit 4100 and the second output unit 4200 convert the positive sampling signal and the negative sampling signal, and output the positive detection current and the negative detection current correspondingly, so that the positive sampling signal and the negative sampling signal do not affect each other during the conversion process, thereby being beneficial to improving the signal-to-noise ratio of the positive sampling signal and the negative sampling signal.
Alternatively, the output module 4000 may convert the sampling signal of the positive phase and the sampling signal of the negative phase at the same time, and output the detection current of the positive phase and the detection current of the negative phase correspondingly. Therefore, the circuit scale can be reduced, and the production cost can be saved.
Referring to fig. 5, fig. 5 is a schematic diagram of a second structure of a current detection circuit according to an embodiment of the application.
In one embodiment, the power module 1000 includes a power tube 1001; the first end of the power tube 1001 is a first output end of the power module 1000, the second end of the power tube 1001 is a second output end of the power module 1000, a first control signal is input through a third end of the power tube 1001, and a switching state of the power tube 1001 is controlled according to the first control signal.
In this embodiment, the power module 1000 includes, but is not limited to, one or more power tubes 1001, and further includes other electronic devices connected to each other in a power circuit. Specifically, in one example, the internal circuit structure of the power module 1000 is a power supply circuit of an existing inductively-driven power integrated switching circuit. It is to be understood that the power tube 1001 in this embodiment may be a field effect tube, or may be a transistor, and the specific choice of the power tube 1001 needs to be determined according to the specific setting of the power circuit.
Optionally, the control module 2000 includes a differential operational amplifier 2001; a first input terminal of the differential operational amplifier 2001 is connected to a first output terminal of the power module 1000, a second input terminal of the differential operational amplifier 2001 is connected to a second output terminal of the power module 1000, and an output terminal of the differential operational amplifier 2001 is an output terminal of the control module 2000.
In the present embodiment, the control module 2000 is provided with devices including, but not limited to, a differential operational amplifier 2001, and further includes other electronic devices interconnected with the differential operational amplifier 2001. For example, in order to enhance stability, a negative feedback circuit may be provided on the basis of the differential operational amplifier 2001. In addition, in addition to the differential operational amplifier 2001, other operational amplifier circuits having a common mode voltage suppression function may be used.
Optionally, the first sampling subunit 3120 includes a first detection tube 3121; the first end of the first detection tube 3121 is an output end of the first sampling subunit 3120, the second end of the first detection tube 3121 is used for inputting a first reference voltage, inputting a second control signal through the third end of the first detection tube 3121, and controlling the on-off state of the first detection tube 3121 according to the second control signal.
It is to be understood that the first detecting tube 3121 in this embodiment may be a field effect tube, or a transistor, and the specific selection of the first detecting tube 3121 needs to be determined according to the specific setting of the power circuit.
Optionally, the first amplifying sub-unit 3110 includes a first gain amplifier 3111; a first input terminal of the first gain amplifier 3111 is connected to the output terminal of the control module 2000, a second input terminal of the first gain amplifier 3111 is connected to the output terminal of the first sampling subunit 3120, and the output terminal of the first gain amplifier 3111 is used for outputting amplified positive phase sampling signal.
It is to be understood that the first gain amplifier 3111 in this embodiment is an amplifier that can provide gain, including but not limited to a differential amplifier, a primary amplifier, and a secondary amplifier.
Optionally, the second sampling subunit 3220 includes a second detection tube 3221; the first end of the second detection tube 3221 is an output end of the second sampling subunit 3220, the second end of the second detection tube 3221 is used for inputting a second reference voltage, a third control signal is input through a third end of the second detection tube 3221, and the on-off state of the second detection tube 3221 is controlled according to the third control signal.
It is understood that the second detecting tube 3221 in this embodiment may be a field effect tube, or a transistor, and the specific selection of the second detecting tube 3221 needs to be determined according to the specific setting of the power circuit.
Optionally, the second amplifying subunit 3210 includes a second gain amplifier 3211; a first input end of the second gain amplifier 3211 is connected to an output end of the control module 2000, a second input end of the second gain amplifier 3211 is connected to an output end of the second sampling subunit 3220, and an output end of the second gain amplifier 3211 is configured to output an amplified inverted sampling signal.
It is understood that the second gain amplifier 3211 in the present embodiment is an amplifier that may provide gain, including but not limited to a differential amplifier, a primary amplifier, and a secondary amplifier.
Optionally, the first output unit 4100 includes a first follower 4110 and a first current mirror 4120; an input terminal of the first follower 4110 is connected to an output terminal of the first sampling subunit 3120, and a control terminal of the first follower 4110 is connected to an output terminal of the first amplifying subunit 3110; an input end of the first current mirror 4120 is connected to an output end of the first follower 4110, and an output end of the first current mirror 4120 is configured to output a positive detection current.
Optionally, the second output unit 4200 includes a second follower 4210 and a second current mirror 4220; an input end of the second follower 4210 is connected to an output end of the second sampling subunit 3220, and a control end of the second follower 4210 is connected to an output end of the second amplifying subunit 3210; an input terminal of the second current mirror 4220 is connected to an output terminal of the second follower 4210, and an output terminal of the second current mirror 4220 is configured to output an inverted detection current.
In this embodiment, the first follower 4110 is an NMOS tube, and the second follower 4210 is a PMOS tube.
Optionally, the first current mirror 4120 includes a first field effect transistor 4121 and a second field effect transistor 4122; a first end of the first fet 4121 is an input end of the first current mirror 4120, and a second end of the first fet 4121 is grounded; the first end of the second fet 4122 is the output end of the first current mirror 4120, and the second end of the second fet 4122 is grounded; the third end of the first fet 4121 is connected to the third end of the second fet 4122 and is used as the input end of the first current mirror 4120.
Optionally, the second current mirror 4220 comprises a third field effect transistor 4221 and a fourth field effect transistor 4222; the first end of the third fet 4221 is an input end of the second current mirror 4220, and the second end of the third fet 4221 is grounded; the first end of the fourth fet 4222 is an output end of the second current mirror 4220, and the second end of the fourth fet 4222 is grounded; the third end of the third fet 4221 is connected to the third end of the fourth fet 4222, and is used as the input end of the second current mirror 4220.
In this embodiment, the first control signal is equal to the second control signal and the third control signal. When a driving signal flows in from the outside of the current, the driving signal is input from a first end of the power tube 1001, flows through the inside of the power tube 1001, and is grounded through a second end of the power tube 1001 under the control of the first control signal. The differential operational amplifier 2001 acquires a power signal from the first end of the power tube 1001 and the second end of the power tube 1001, and the differential operational amplifier 2001 performs differential operation to obtain a positive power signal or an inverted power signal output from the differential operational amplifier 2001. If the differential operational amplifier 2001 outputs a positive power signal, the positive power signal is transmitted to the first input terminal of the first gain amplifier 3111. Meanwhile, under the control of the second control signal, on the one hand, the first reference voltage is transmitted to the second input terminal of the first gain amplifier 3111 through the second terminal of the first detection tube 3121 and the first terminal of the first detection tube 3121 through the inside of the first detection tube 3121, so that the first gain amplifier 3111 amplifies, and the positive phase sampling signal amplified by the first gain amplifier 3111 is transmitted to the control terminal of the first follower 4110 (i.e. the gate of the NMOS tube). In this embodiment, the first reference voltage is equal to the second reference voltage. Similarly, if the differential operational amplifier 2001 outputs an inverted power signal, the second gain amplifier 3211 amplifies the power signal, and the inverted sampling signal amplified by the second gain amplifier 3211 is transmitted to the control terminal (i.e., the gate of the PMOS transistor) of the second follower 4210. On the other hand, the first reference voltage is transmitted through the second end of the first detection tube 3121, through the inside of the first detection tube 3121, through the first end of the first detection tube 3121 to the input end of the first follower 4110, then flows through the inside of the first follower 4110, and is transmitted through the output end of the first follower 4110 to the input end of the first current mirror 4120. Finally, the positive detection current is output at the output terminal of the first current mirror 4120. Similarly, an inverted sense current is output at the output of the second current mirror 4220. As can be seen from the above process, the positive sense current or the negative sense current is equal to Ids/n×g, where Ids is the measured current, and the current flowing through the drain and the source of the power tube 1001; ids/n represents the current sampled through the first detection tube 3121 or the second detection tube 3221, and it is known that the width ratio of the first detection tube 3121 or the second detection tube 3221 to the power tube 1001 is 1:n; g is the gain of the first gain amplifier 3111 or the second gain amplifier 3211.
Referring to fig. 6, fig. 6 is a schematic structural diagram of a chip 5000 according to an embodiment of the application.
The embodiment of the application provides a chip 5000 comprising any one of the current detection circuits described above.
That is, the foregoing embodiments of the present application are merely examples, and are not intended to limit the scope of the present application, and all equivalent structures or equivalent processes using the descriptions of the present application and the accompanying drawings, such as the combination of technical features of the embodiments, or direct or indirect application in other related technical fields, are included in the scope of the present application.
In addition, the present application may be identified by the same or different reference numerals for structural elements having the same or similar characteristics. Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more features. In the description of the present application, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
In the present application, the word "e.g." is used to mean "serving as an example, instance, or illustration". Any embodiment described as "for example" in this disclosure is not necessarily to be construed as preferred or advantageous over other embodiments. The previous description is provided to enable any person skilled in the art to make or use the present application. In the above description, various details are set forth for purposes of explanation.
It will be apparent to one of ordinary skill in the art that the present application may be practiced without these specific details. In other instances, well-known structures and processes have not been shown in detail to avoid unnecessarily obscuring the description of the application. Thus, the present application is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.
Claims (14)
1. A current detection circuit, comprising:
the power module is used for acquiring a driving signal in a preset mode and entering a working state under the control of the driving signal;
the control module is connected with the power module and used for acquiring a power signal from the power module and controlling the output of the power signal;
the sampling module is connected with the control module and is used for acquiring the power signal output by the control module and sampling the power signal output by the control module to obtain a sampling signal;
and the output module is connected with the sampling module and is used for acquiring the sampling signal, converting the sampling signal into detection current and outputting the detection current.
2. The current detection circuit of claim 1, wherein the sampling module comprises:
the first sampling unit is used for acquiring a positive power signal, sampling the positive power signal and then outputting a positive sampling signal;
and the second sampling unit is used for acquiring the inverted power signal, sampling the inverted power signal and then outputting an inverted sampling signal.
3. The current detection circuit according to claim 2, wherein the first sampling unit includes:
the first sampling subunit is used for sampling the positive phase power signal to obtain a positive phase sampling signal;
and the first amplifying subunit is connected with the first sampling subunit and is used for amplifying the sampling signal of the positive phase.
4. A current detection circuit according to claim 3, wherein the second sampling unit comprises:
the second sampling subunit is used for sampling the inverted power signal to obtain an inverted sampling signal;
and the second amplifying subunit is connected with the second sampling subunit and is used for amplifying the inverted sampling signal.
5. The current detection circuit of claim 4, wherein the output module comprises:
the first output unit is used for acquiring a positive sampling signal, converting the positive sampling signal into a positive detection current and outputting the positive detection current;
and the second output unit is used for acquiring an inverted sampling signal, converting the inverted sampling signal into an inverted detection current and outputting the inverted detection current.
6. The current detection circuit of claim 5, wherein the power module comprises a power tube;
the first end of the power tube is a first output end of the power module, the second end of the power tube is a second output end of the power module, a first control signal is input through a third end of the power tube, and the switching state of the power tube is controlled according to the first control signal.
7. The current detection circuit of claim 6, wherein the control module comprises a differential operational amplifier;
the first input end of the differential operational amplifier is connected with the first output end of the power module, the second input end of the differential operational amplifier is connected with the second output end of the power module, and the output end of the differential operational amplifier is the output end of the control module.
8. The current detection circuit of claim 5, wherein the first sampling sub-unit comprises a first detection tube;
the first end of the first detection tube is the output end of the first sampling subunit, the second end of the first detection tube is used for inputting a first reference voltage, a second control signal is input through the third end of the first detection tube, and the switching state of the first detection tube is controlled according to the second control signal.
9. The current detection circuit of claim 8, wherein the first amplifying subunit comprises a first gain amplifier;
the first input end of the first gain amplifier is connected with the output end of the control module, the second input end of the first gain amplifier is connected with the output end of the first sampling subunit, and the output end of the first gain amplifier is used for outputting amplified normal phase sampling signals.
10. The current detection circuit of claim 5, 8 or 9, wherein the second sampling subunit comprises a second detection tube;
the first end of the second detection tube is the output end of the second sampling subunit, the second end of the second detection tube is used for inputting a second reference voltage, a third control signal is input through the third end of the second detection tube, and the switching state of the second detection tube is controlled according to the third control signal.
11. The current detection circuit of claim 10, wherein the second amplifying subunit comprises a second gain amplifier;
the first input end of the second gain amplifier is connected with the output end of the control module, the second input end of the second gain amplifier is connected with the output end of the second sampling subunit, and the output end of the second gain amplifier is used for outputting the amplified inverted sampling signal.
12. The current detection circuit of claim 5, wherein the first output unit comprises a first follower and a first current mirror;
the input end of the first follower is connected with the output end of the first sampling subunit, and the control end of the first follower is connected with the output end of the first amplifying subunit;
the input end of the first current mirror is connected with the output end of the first follower, and the output end of the first current mirror is used for outputting normal-phase detection current.
13. The current detection circuit of claim 12, wherein the second output unit comprises a second follower and a second current mirror;
the input end of the second follower is connected with the output end of the second sampling subunit, and the control end of the second follower is connected with the output end of the second amplifying subunit;
the input end of the second current mirror is connected with the output end of the second follower, and the output end of the second current mirror is used for outputting reversed-phase detection current.
14. A chip comprising a current detection circuit according to any one of claims 1 to 13.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210308655.XA CN116840538A (en) | 2022-03-24 | 2022-03-24 | Current detection circuit and chip |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202210308655.XA CN116840538A (en) | 2022-03-24 | 2022-03-24 | Current detection circuit and chip |
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| CN116840538A true CN116840538A (en) | 2023-10-03 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210308655.XA Pending CN116840538A (en) | 2022-03-24 | 2022-03-24 | Current detection circuit and chip |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN116840538A (en) |
-
2022
- 2022-03-24 CN CN202210308655.XA patent/CN116840538A/en active Pending
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