CN116823738A - PCB bare board surface defect detection method based on YOLOv8 - Google Patents

PCB bare board surface defect detection method based on YOLOv8 Download PDF

Info

Publication number
CN116823738A
CN116823738A CN202310655010.8A CN202310655010A CN116823738A CN 116823738 A CN116823738 A CN 116823738A CN 202310655010 A CN202310655010 A CN 202310655010A CN 116823738 A CN116823738 A CN 116823738A
Authority
CN
China
Prior art keywords
defect detection
network
bare board
detection network
optimized
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202310655010.8A
Other languages
Chinese (zh)
Inventor
关荣锋
王旭伟
阳韬
喻杰
陆立文
代薇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yancheng Institute of Technology
Yancheng Institute of Technology Technology Transfer Center Co Ltd
Original Assignee
Yancheng Institute of Technology
Yancheng Institute of Technology Technology Transfer Center Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yancheng Institute of Technology, Yancheng Institute of Technology Technology Transfer Center Co Ltd filed Critical Yancheng Institute of Technology
Priority to CN202310655010.8A priority Critical patent/CN116823738A/en
Publication of CN116823738A publication Critical patent/CN116823738A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T7/00Image analysis
    • G06T7/0002Inspection of images, e.g. flaw detection
    • G06T7/0004Industrial image inspection
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/04Architecture, e.g. interconnection topology
    • G06N3/0464Convolutional networks [CNN, ConvNet]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/08Learning methods
    • G06N3/082Learning methods modifying the architecture, e.g. adding, deleting or silencing nodes or connections
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00Indexing scheme for image analysis or image enhancement
    • G06T2207/30Subject of image; Context of image processing
    • G06T2207/30108Industrial image inspection
    • G06T2207/30141Printed circuit board [PCB]
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P90/00Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
    • Y02P90/30Computing systems specially adapted for manufacturing

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Biophysics (AREA)
  • Evolutionary Computation (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Artificial Intelligence (AREA)
  • Biomedical Technology (AREA)
  • Software Systems (AREA)
  • Computational Linguistics (AREA)
  • Data Mining & Analysis (AREA)
  • Mathematical Physics (AREA)
  • General Health & Medical Sciences (AREA)
  • Molecular Biology (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Quality & Reliability (AREA)
  • Image Analysis (AREA)

Abstract

The invention relates to the technical field of defect detection, in particular to a PCB bare board surface defect detection method based on YOLOv 8. The method comprises the following steps: acquiring and processing a surface image of a PCB bare board to obtain an image to be detected; constructing a defect detection network, improving the defect detection network, and obtaining an optimized defect detection network, wherein the defect detection network comprises the following concrete steps: adding a small target detection layer on a feature fusion network of the defect detection network; replacing a preset number of C2f layers in a feature extraction network in a defect detection network, and adding a mixed domain attention mechanism module; modifying the loss function of the defect detection network to obtain an optimized loss function; training an optimized defect detection network by utilizing the preprocessed sample data; and detecting the defects of the PCB bare board by using the trained optimized defect detection network and the images to be detected. The invention can improve the accuracy and efficiency of defect detection of the PCB bare board.

Description

PCB bare board surface defect detection method based on YOLOv8
Technical Field
The invention relates to the technical field of defect detection, in particular to a PCB bare board surface defect detection method based on YOLOv 8.
Background
The high-speed development of the emerging technology further has higher and higher requirements on the performance and quality of electronic products. The role of the printed circuit board (Printed Circuit Board, PCB) is to connect electronic components, forming a connection for a circuit, which is a critical device for almost all electronic products. The rapid development of the electronics industry and emerging technologies has led to an increasing demand for PCBs. In mass production, since the PCB production process is quite complex, each process may cause defects on the surface of the bare PCB, such as fine defects of circuit breaking, short circuit, leakage hole, etc., which greatly affect the performance and the safety quality of the final electronic product. The tiny complex defects on the surface of the PCB bare board mainly comprise: leakage holes, burrs, mouse bites, short circuits, circuit breaks, and residual copper, which can greatly affect the performance and safety quality of the final electronic product.
The traditional PCB defect detection method is to manually detect quality, but when the detection is performed manually, the phenomena of missing detection and false detection are easy to occur along with the increase of working time and subjectivity of workers, and the defects of the PCB bare board are detected through computer vision and neural network technology along with the increasing maturity of the computer vision and neural network technology; if the defects are detected by using the traditional YOLOv8 defect detection network, but because some defects on the PCB bare board belong to tiny defects, the characteristics are not obvious, so when the defects of the PCB bare board are detected by using the traditional YOLOv8 defect detection network, the detection effect is not good, and the production requirement of the current PCB bare board cannot be met.
Disclosure of Invention
In order to solve the technical problems, the invention aims to provide a method for detecting surface defects of a PCB bare board based on YOLOv8, which adopts the following technical scheme:
the embodiment of the invention provides a method for detecting surface defects of a PCB bare board based on YOLOv8, which comprises the following steps:
acquiring and processing a surface image of a PCB bare board to obtain an image to be detected;
constructing a defect detection network, improving the defect detection network, and obtaining an optimized defect detection network, wherein the defect detection network comprises the following concrete steps: adding a small target detection layer on a feature fusion network of the defect detection network; replacing a preset number of C2f layers in a feature extraction network in a defect detection network, and adding a mixed domain attention mechanism module; modifying the loss function of the defect detection network to obtain an optimized loss function; wherein the defect detection network is a YOLOv8 network;
acquiring a sample data set, preprocessing the sample data set, and training an optimized defect detection network by utilizing the preprocessed sample data; and detecting the defects of the PCB bare board by using the trained optimized defect detection network and the images to be detected.
Preferably, the feature fusion network of the defect detection network adds a small target detection layer, comprising:
an up-sampling processing layer is added to a first appointed layer in the feature fusion network, and a small target detection layer is added after the added up-sampling processing layer.
Preferably, replacing a preset number of C2f layers in a feature extraction network in the defect detection network comprises:
the first, second and third C2f layers in the feature extraction network are replaced with deformable convolution Deformable Conv v modules.
Preferably, the means for adding a mixed domain attention mechanism comprises:
the hybrid domain attention mechanism module CBAM is added to the layer preceding the SPPF layer of the last layer in the feature extraction network in the defect detection network.
Preferably, the optimized loss function is:
L WIoUv3 =rL WIoUv1
L WIoUv1 =R WIoU L IoU
wherein L is WIoUv3 Representing an optimization loss function; r represents the gradient gain; beta represents a defined outlier; delta and alpha represent super parameters, and the values of the delta and the alpha are adjusted by an implementer according to actual conditions; l (L) WIoUv1 Representing a v1 loss function;represents L WIoUv1 Is a monotonic focusing coefficient of (a); l (L) IoU Representing IoU loss function; r is R WIoU Representing a first loss function; w (W) g And H g Representing the width and height of the minimum bounding box, respectively; x and y represent the abscissa and ordinate, respectively, of the target frame, x gt And y gt Respectively representing the abscissa and the ordinate of the prediction boundary box; exp () represents an exponential function based on e; w (W) i And H i Representing the height and width of the intersection of the prediction bounding box and the target box, respectively, S u Representing the area of the union of the prediction bounding box and the target box.
Preferably, acquiring a sample data set, preprocessing the sample data set, includes:
obtaining a sample data set, wherein the images in the sample data set are in jpg image format, labeling the images in the sample data set by labelimg software, and the label format is a txt label file applicable to an optimized target detection model; the labeled sample data set is divided into a training set, a testing set and a verification set, and preprocessing of the sample data set is completed.
Preferably, detecting the defects of the PCB bare board by using the trained optimized defect detection network and the image to be detected comprises:
inputting the image to be detected into a trained optimized target detection model, and outputting a defect detection image of the PCB bare board; wherein the defect type of each defect is included in the defect detection image, and the position of each defect in the defect detection image is marked.
The embodiment of the invention has at least the following beneficial effects: according to the invention, a target detection model is built, a small target detection layer is added in a feature fusion network of a defect detection network, and as some tiny defects exist on a PCB bare board, the tiny defects are complex and have unobvious features, the small target detection layer is added so as to better acquire the feature information of the tiny defects, and the accuracy of defect detection is improved; meanwhile, the C2f layers with the preset number in the defect detection network are replaced, so that the receptive field of the activation unit can be changed into the self-adaptive receptive field after replacement, the effect of extracting the fine target features can be improved, and the defect detection can be more accurate later; meanwhile, a mixing and attention mechanism module is added in a feature extraction network in the defect detection network, so that the feature extraction capability of the feature extraction network can be enhanced, the feature extraction network can better extract the features of small defects, the accuracy of detecting the defects of the PCB bare board is improved, meanwhile, the loss function of the defect detection network is optimized, and the detection accuracy is further improved; according to the invention, the accuracy of detecting the surface defects of the PCB bare board is effectively improved through optimization of the target detection model, and meanwhile, the network is utilized for detection, so that the time for detecting the surface defects of the PCB bare board is shortened, the detection efficiency is improved, and the requirements of industrial production can be met.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions and advantages of the prior art, the following description will briefly explain the drawings used in the embodiments or the description of the prior art, and it is obvious that the drawings in the following description are only some embodiments of the invention, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.
Fig. 1 is a flowchart of a method for detecting a surface defect of a PCB bare board based on YOLOv8 according to an embodiment of the present invention;
FIG. 2 is a diagram of a defect detection network according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a 3*3 deformable convolution module according to an embodiment of the present disclosure;
FIG. 4 is a schematic diagram of a CBAM mixed domain attention mechanism according to an embodiment of the present invention;
fig. 5 is a diagram of an optimized defect detection network according to an embodiment of the present invention.
Detailed Description
In order to further illustrate the technical means and effects adopted by the invention to achieve the preset aim, the following is a detailed description of specific implementation, structure, characteristics and effects of the method for detecting surface defects of a PCB bare board based on YOLOv8 according to the invention, which is provided by the invention, with reference to the accompanying drawings and preferred embodiments. In the following description, different "one embodiment" or "another embodiment" means that the embodiments are not necessarily the same. Furthermore, the particular features, structures, or characteristics of one or more embodiments may be combined in any suitable manner.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs.
The specific scheme of the PCB bare board surface defect detection method based on YOLOv8 provided by the invention is specifically described below with reference to the accompanying drawings.
Examples:
the main application scene of the invention is as follows: in the process of producing a printed circuit board, namely a PCB bare board, defects with different shapes can appear on the PCB bare board due to a production process or other reasons, so that the defects on the PCB bare board need to be detected so as to improve the production method; therefore, the invention mainly works as the research of the PCB defect detection algorithm based on deep learning and the optimization of the detection algorithm, so that the detection algorithm can detect tiny, complex and various defects in the PCB defects more efficiently.
Referring to fig. 1, a flowchart of a method for detecting a surface defect of a PCB bare board based on YOLOv8 according to an embodiment of the present invention is shown, and the method includes the following steps:
and S1, acquiring a surface image of the PCB bare board and processing to obtain an image to be detected.
Over time, the conventional PCB defect detection method cannot meet the current PCB production requirements, and as deep learning is mature gradually, the research of the target detection algorithm reaches a new level at present and becomes a hot spot research problem in the PCB defect detection field. Because the target detection needs to shoot the surface image of the object, but in the process of shooting the surface image, the shooting surface image may be in different formats, and the subsequent detection is influenced, the format of the surface image needs to be converted, and the surface image is converted into an image in a uniform format, preferably, the surface image is converted into an image in a jpg format, and an implementer can convert the surface image into an image in a proper format according to specific conditions; thus, the surface image of the PCB bare board in the jpg format can be obtained and used as an image to be detected.
It should be noted that, the specifications of each PCB bare board may be different, so when the image to be detected is obtained, only one image may be needed to cover the surface information of the PCB bare board, and multiple combined photos may be needed to cover the complete surface of the PCB bare board, so that an operator needs to determine according to the actual situation during actual operation.
So far, the image to be detected for detecting the defects of the PCB bare board can be obtained.
And S2, constructing a defect detection network, improving the defect detection network, and obtaining an optimized defect detection network.
After the image to be detected is obtained, a defect detection network needs to be constructed, and it is to be noted that the defect detection network in the invention is a YOLOv8 network, but the detection effect of the traditional YOLOv8 network on the tiny defects in the PCB bare board is not accurate, and the industrial production requirement cannot be met, so that the defect detection network needs to be further improved, and the defects of the PCB bare board can be detected more accurately.
Constructing a defect detection network, wherein the defect detection is a YOLOv8 network, the defect detection network comprises a backbone network and a detection head, the backbone network is used for extracting features, and the detection head comprises two parts, namely a neg and a prediction; and the characteristics extracted from the backbone network are subjected to multi-scale fusion processing by using a top-down and bottom-up connection mode (FPN+PAN), and then are sent to a detection layer, wherein the specific structure of the detection layer is shown in figure 2.
Firstly, because the targets detected by the method are all tiny and complex defects on the surface of the PCB bare board, the current detection algorithm is not friendly to small target detection, and the small target possibly occupies less pixels in the last layer of downsampling due to the excessive downsampling rate in the feature extraction network. Therefore, the invention continues to perform up-sampling once after the last layer of the up-sampling of the feature fusion network, so that the feature map is further expanded, the pixel ratio of the small target in the feature map is increased, and the space and channel information of the small target can be better acquired.
The addition of a small target detection layer in the defect detection network is therefore in particular: after the 15 th layer in the feature fusion network in the defect detection network, continuing to perform up-sampling processing on the feature map so as to enable the feature map to be continuously expanded, and simultaneously, when the 18 th layer is used, performing concat fusion on the obtained feature map and the 2 nd layer feature map in the feature extraction network so as to obtain a larger feature map for small target detection; after an up-sampling process is added to the top of the feature fusion network, the original three detection layers [15,18,21] are extended to be [21,24,27], then an up-sampling process layer is added to a first designated layer, and up-sampling is performed on the feature map again, wherein the first designated layer is the top of the feature fusion network, a small target detection layer is added after the added up-sampling process layer, namely, a small target detection layer for detecting the largest feature map is added after the added up-sampling process layer, namely, 18 layers after the added up-sampling process layer, and four layers [18,21,24,27] are used for detection.
Furthermore, as the surface defects of the PCB bare board are tiny and complex, the shapes of the occupied pixels in the feature map are different, and the excessive receptive field in the existing algorithm can lead the receptive field of the feature points on the feature map in the convolution network to be much larger than the downsampling rate, so that in one point on the feature map, the small target occupies fewer features and can contain the features of a large number of surrounding areas, thereby influencing the detection result. The receptive field of the activation unit is also relatively fixed due to the fixed size and shape of the conventional convolution kernel. However, in practice, the same object may correspond to different dimensions or deformations at different locations, so that an adaptive receptive field is required for accurate positioning, especially for complex and fine target detection. The method comprises the steps of replacing a deformable convolution Deformable Conv v module with a first layer, a second layer and a third layer of C2f layers in a feature extraction network of a defect detection network, obtaining the center point position of a convolution kernel of an original feature map after offset convolution, generating offset pixel values one by one, and directly processing by using a rear common convolution kernel to obtain a pixel value of an output feature map.
The improvement directions of the deformable convolution Deformable Conv v module are mainly two, and the first is the expansion of the deformable convolution layer; by adding offset learning (stacking of convolutional layers) to more convolutional layers, the module can control sampling over a wider range of feature levels. The second is the modulation scheme in the deformable convolution module, each sample not only having a learned offset, but also being characteristic amplitude modulated. In order to further enhance the ability of the deformable convolution network to control the minimum image area, the Deformable Conv v module also introduces a modulation mechanism, so that the deformable convolution network structure not only can learn and adjust the offset, but also can modulate the input characteristic amplitude of different spatial positions. The modulation formula of Deformable Conv v module is as follows:
wherein y (p) represents any one pixel point, W, on the output characteristic diagram y k Representing the weight corresponding to the kth sampling point, namely the weight parameter in the convolution kernel; Δp k And Δm k Respectively representing the position offset and the characteristic adjustment coefficient of the sampling point k, wherein the position offset and the characteristic adjustment coefficient are obtained by taking the characteristic x as input through different convolution kernels; p represents the abscissa of the pixel point; p is p k Representing the kth sampling point;
assuming that K sampling points (3 x3 convoluting 9 sampling points) are arranged, the resolution of a resolution convolution layer of the feature map after the convolution layer outputs is the same as the resolution of the input feature x; outputs 3×K channels, corresponding to the offset Δp of each sampling point k (x, y two directions, i.e. 2 XK channels) and corresponding modulation coefficients Δm k (K channels). Δp k And Δm k Respectively initializing to 0 and 0.5 (default offset is 0, sampling point contribution rate cannot be distinguished), corresponding convolution kernel parameters are initially 0, and the learning rate of a convolution layer is set to be 0.1 of an existing layer.
Next, a mixed domain attention mechanism module CBAM is added to the SPPF layer preceding the last layer in the feature extraction network in the defect detection network to enhance the ability of the network to learn feature extraction. Structurally, CBAM includes a space and a channel attention, both of which primarily utilize global averaging pooling to abstract features into a series of point attention weights, and then link these weights and append to the original space or channel features. However, the prediction targets of the invention are defects such as leakage holes, burrs, mouse bites, short circuits, open circuits and residual copper generated in the production process of the PCB bare board, the defects are very tiny, the proportion of pixels occupied in the whole PCB bare board image is very low, channel information at the beginning of a network is extracted from an extraction position, channel attention of rgb3 weights and spatial attention of the whole image size are extracted from an rgb image, and the common sense can strongly infer that the method is meaningless. Then later layers are the same and the spatial signature is too large and the number of channels too small. The extracted channel weight is too large to fall on some specific characteristics, the extracted space attention is insufficient due to the fact that the number of channels is small, the space attention is sensitive and difficult to learn, and negative effects are more likely to be caused. Thus, focusing attention on the last layer of sampling on the feature fusion network, and focusing attention on the channel and space information on the smallest feature map after the c2f module convolves, attention is normally enhanced with the increase of the channels, which is the result of superposition of effects. The small defect here, many spatial signatures may represent one feature of the original.
The attention mechanism module is schematically shown in fig. 4. CBAM is intended to enhance the expressive power of mobile network learning features, CBAM (Convolutional Block Attention Module) mixed domain attention mechanism is a lightweight convolution attention module that contains two sub-modules, CAM (Channel Attention Module) channel attention module and SAM (Spartial Attention Module) spatial attention module, which take channel and spatial attention, respectively.
The CBAM consists of an input part, a channel attention module, a space attention module and an output part, wherein the input part is characterized in that F epsilon R C*H*W The input feature map is changed from C, W, H to C, 1*1 through two parallel global maximum pooling layers and average pooling layers, and then is processed through a shared multi-layer perceptron (Share MLP) module, in the module, two one-dimensional vectors after pooling are sent to a full-connection layer to be calculated and added, and a one-dimensional convolution M of a channel attention module is generated c ∈R C*1*1 The convolution result multiplication chart is changed back to the original size, a characteristic chart F 'after channel attention adjustment is obtained, and the CAM output result F' is taken as an inputObtaining two characteristic graphs of 1 x H x W through a global maximum pooling layer and a mean pooling layer, then splicing two-dimensional vectors generated by pooling, and performing convolution operation to generate a two-dimensional convolution M of a spatial attention module c ∈R 1*W*H And multiplying the output result with the original image to change the original size, and obtaining a characteristic image F after the spatial attention adjustment. Thus, parameters and computational power can be saved, and the integration of the module into the existing network architecture as a plug-and-play module is ensured.
The formula of the CBAM mixed domain attention mechanism is as follows:
finally, there is a need to design the loss function of the defect detection network, and locating this strategy as one of the main tasks of detection reduces the competitive power of high quality anchor frames while also reducing the detrimental gradients created by low quality examples. This allows the WIoU to focus on the anchor frame of normal quality and improves the overall performance of the detector. Therefore, the loss function of the defect detection network is designed based on WIoU, the designed loss function is recorded as an optimized loss function, and the optimized loss function is as follows:
L WIoUv3 =rL WIoUv1
L WIoUv1 =R WIoU L IoU
wherein L is WIoUv3 Representing an optimization loss function; r represents the gradient gain; beta represents a defined outlier; delta and alpha represent super parameters, and the values of the delta and the alpha are adjusted by an implementer according to actual conditions; l (L) WIoUv1 Representing a v1 loss function;represents L WIoUv1 Is a monotonic focusing coefficient of (a); l (L) IoU Representing IoU loss function; r is R WIoU Representing a first loss function; w (W) g And H g Representing the width and height of the minimum bounding box, respectively; x and y represent the abscissa and ordinate, respectively, of the target frame, x gt And y gt Respectively representing the abscissa and the ordinate of the prediction boundary box; exp () represents an exponential function based on e; w (W) i And H i Representing the height and width of the intersection of the prediction bounding box and the target box, respectively, S u Representing the area of the union of the prediction bounding box and the target box.
WIoU v3 constructs L WIoUv1 Monotonic focusing coefficient of (a)And define an outlier β to describe the quality of the anchor box. For L WIoUv1 Because low quality examples are inevitably contained in the training data, geometric metrics such as distance, aspect ratio, etc. exacerbate the penalty on low quality examples and thus degrade the generalization performance of the model. The Wise-IoU weakens the penalty of the geometric measurement when the prediction boundary box is better coincident with the target box, does not excessively interfere with training, builds distance attention according to the distance measurement, and obtains the WIoU v1 with a two-layer attention mechanism so that the model has better generalization capability.
The optimized loss function is obtained, and the structure and the loss function of the defect detection network are optimized, so that the optimized defect detection network is optimized aiming at the characteristics of small defects on the PCB bare board, and the defect detection of the PCB bare board is more accurate.
Step S3, a sample data set is obtained, the sample data set is preprocessed, and the preprocessed sample data is utilized to train the optimized defect detection network; and detecting the defects of the PCB bare board by using the trained optimized defect detection network and the images to be detected.
After the defect detection network is optimized to obtain an optimized defect detection network, the optimized defect detection network also needs to be trained.
Firstly, a sample data set is obtained, wherein the sample data set for training is a public data set, the format of an image in the sample data set is jpg format, then the image in the sample data set is labeled through labelimg software, the label format is txt label file applicable to yolo algorithm, in addition, the labeled sample data set is divided into a training set, a test set and a verification set, specifically, a folder named images is created, wherein the three folders comprise train, val and test, respectively store the training set, the test set and the picture file of the verification set. Then, creating a folder named labels, wherein three folders including train, val and test respectively store the tag files of the training set, the test set and the verification set, and finishing the pretreatment of the sample data set.
In the process of training the optimized defect detection network, scaling the surface defect image of the PCB bare board in the sample data set to a preset size, and then sending the image into the improved optimized defect detection network for training, wherein the specific process is as follows: 640 x 640 pixels are selected as the image size of the input model, official weights are selected as the initial weights of the model, the learning rate of the initial weights is set to 0.0005, the weight decay is set to 0.0005, the number of model training times is 300, and the batch size is set to 16.
The superiority of optimizing the defect detection network can be determined by evaluating the indexes through various models in the training process. The indexes for evaluating the superiority specifically comprise: precision, recall, AP (Average Precision ) and on the Recall horizontal axis, the Precision vertical axis, a PR curve can be drawn, and the area under the PR curve is defined as AP, mAP (average value of each AP). The calculation formula of each evaluation index is as follows:
wherein TP represents predicting a positive class as a positive class number; TN represents predicting positive class as negative class number; FP denotes predicting a negative class as a positive class number; FN denotes predicting negative classes as negative class numbers; r (k) represents the kth large recall; max (p (r (k))) is the maximum exact value at the point r. Comparing the training result of the optimized defect detection network with the unmodified defect detection network, wherein the result shows that the optimized defect detection network has better accuracy in the defect detection of the PCB bare board, and the results are shown in the table 1 and the table 2, wherein the table 1 shows the data of the defect detection network, and the table 2 shows the data of the modified optimized defect detection network;
table 1 defect detection network detection data
Defect detection network P R MAP
all 0.915 0.909 0.921
missing_hole 0.984 0.994 0.979
mouse_bite 0.927 0.903 0.930
open_circuit 0.918 0.938 0.963
short 0.853 0.875 0.891
spurious_copper 0.876 0.946 0.914
spur 0.933 0.798 0.851
Table 2 optimizing defect detection network detection data
After the training of the optimized defect detection network is completed, inputting the image to be detected into the trained optimized defect detection network, and outputting a defect detection image of the PCB bare board, wherein the defect detection image comprises the defect type of each defect, and each defect is marked in the defect detection image.
It should be noted that: the sequence of the embodiments of the present invention is only for description, and does not represent the advantages and disadvantages of the embodiments. And the foregoing description has been directed to specific embodiments of this specification. In addition, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.
In this specification, each embodiment is described in a progressive manner, and identical and similar parts of each embodiment are all referred to each other, and each embodiment mainly describes differences from other embodiments.
The above embodiments are only preferred embodiments of the present invention, and are not intended to limit the present invention, and any modifications, equivalent substitutions, improvements, etc. within the scope of the present invention should be included.

Claims (7)

1. A PCB bare board surface defect detection method based on YOLOv8 is characterized by comprising the following steps:
acquiring and processing a surface image of a PCB bare board to obtain an image to be detected;
constructing a defect detection network, improving the defect detection network, and obtaining an optimized defect detection network, wherein the defect detection network comprises the following concrete steps: adding a small target detection layer on a feature fusion network of the defect detection network; replacing a preset number of C2f layers in a feature extraction network in a defect detection network, and adding a mixed domain attention mechanism module; modifying the loss function of the defect detection network to obtain an optimized loss function; wherein the defect detection network is a YOLOv8 network;
acquiring a sample data set, preprocessing the sample data set, and training an optimized defect detection network by utilizing the preprocessed sample data; and detecting the defects of the PCB bare board by using the trained optimized defect detection network and the images to be detected.
2. The YOLOv 8-based surface defect detection method for a PCB bare board of claim 1, wherein a feature fusion network of the defect detection network adds a small target detection layer, comprising:
an up-sampling processing layer is added to a first appointed layer in the feature fusion network, and a small target detection layer is added after the added up-sampling processing layer.
3. The YOLOv 8-based surface defect detection method of a PCB bare board according to claim 1, wherein the replacing a preset number of C2f layers in a feature extraction network in a defect detection network comprises:
the first, second and third C2f layers in the feature extraction network are replaced with deformable convolution Deformable Conv v modules.
4. The YOLOv 8-based surface defect detection method of a PCB bare board of claim 1, wherein the means for adding mixed domain attention mechanisms comprises:
the hybrid domain attention mechanism module CBAM is added to the layer preceding the SPPF layer of the last layer in the feature extraction network in the defect detection network.
5. The YOLOv 8-based surface defect detection method for a bare PCB of claim 1, wherein the optimized loss function is:
L WIoUv3 =rL WIoUv1
L WIoUv1 =R WIoU L IoU
wherein L is WIoUv3 Representing an optimization loss function; r represents the gradient gain; beta represents a defined outlier; delta and alpha represent super parameters, and the values of the delta and the alpha are adjusted by an implementer according to actual conditions; l (L) WIoUv1 Representing a v1 loss function;represents L WIoUv1 Is a monotonic focusing coefficient of (a); l (L) IoU Representing IoU loss function; r is R WIoU Representing a first loss function; w (W) g And H g Representing the width and height of the minimum bounding box, respectively; x and y represent the abscissa and ordinate, respectively, of the target frame, x gt And y gt Respectively representing the abscissa and the ordinate of the prediction boundary box; exp () represents an exponential function based on e; w (W) i And H i Representing the height and width of the intersection of the prediction bounding box and the target box, respectively, S u Representing the area of the union of the prediction bounding box and the target box.
6. The YOLOv 8-based surface defect detection method of a PCB bare board of claim 1, wherein the obtaining a sample dataset, preprocessing the sample dataset, comprises:
obtaining a sample data set, wherein the images in the sample data set are in jpg image format, labeling the images in the sample data set by labelimg software, and the label format is a txt label file applicable to an optimized target detection model; the labeled sample data set is divided into a training set, a testing set and a verification set, and preprocessing of the sample data set is completed.
7. The YOLOv 8-based surface defect detection method of a PCB bare board according to claim 1, wherein the detecting defects of the PCB bare board using the trained optimized defect detection network and the image to be detected comprises:
inputting the image to be detected into a trained optimized target detection model, and outputting a defect detection image of the PCB bare board; wherein the defect type of each defect is included in the defect detection image, and the position of each defect in the defect detection image is marked.
CN202310655010.8A 2023-06-05 2023-06-05 PCB bare board surface defect detection method based on YOLOv8 Pending CN116823738A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310655010.8A CN116823738A (en) 2023-06-05 2023-06-05 PCB bare board surface defect detection method based on YOLOv8

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310655010.8A CN116823738A (en) 2023-06-05 2023-06-05 PCB bare board surface defect detection method based on YOLOv8

Publications (1)

Publication Number Publication Date
CN116823738A true CN116823738A (en) 2023-09-29

Family

ID=88126760

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310655010.8A Pending CN116823738A (en) 2023-06-05 2023-06-05 PCB bare board surface defect detection method based on YOLOv8

Country Status (1)

Country Link
CN (1) CN116823738A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117191816A (en) * 2023-11-08 2023-12-08 广东工业大学 Method and device for detecting surface defects of electronic component based on multispectral fusion
CN117237745A (en) * 2023-11-13 2023-12-15 合肥天帷信息安全技术有限公司 Method, device and medium for improving fire extinguisher state identification accuracy
CN117611998A (en) * 2023-11-22 2024-02-27 盐城工学院 Optical remote sensing image target detection method based on improved YOLOv7
CN117745684A (en) * 2023-12-22 2024-03-22 上海第二工业大学 PCB defect detection method and system based on improved YOLOv7 algorithm

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117191816A (en) * 2023-11-08 2023-12-08 广东工业大学 Method and device for detecting surface defects of electronic component based on multispectral fusion
CN117191816B (en) * 2023-11-08 2024-02-20 广东工业大学 Method and device for detecting surface defects of electronic component based on multispectral fusion
CN117237745A (en) * 2023-11-13 2023-12-15 合肥天帷信息安全技术有限公司 Method, device and medium for improving fire extinguisher state identification accuracy
CN117611998A (en) * 2023-11-22 2024-02-27 盐城工学院 Optical remote sensing image target detection method based on improved YOLOv7
CN117745684A (en) * 2023-12-22 2024-03-22 上海第二工业大学 PCB defect detection method and system based on improved YOLOv7 algorithm

Similar Documents

Publication Publication Date Title
CN116823738A (en) PCB bare board surface defect detection method based on YOLOv8
CN111223088B (en) Casting surface defect identification method based on deep convolutional neural network
CN116258707A (en) PCB surface defect detection method based on improved YOLOv5 algorithm
CN115719338A (en) PCB (printed circuit board) surface defect detection method based on improved YOLOv5
CN111814741A (en) Method for detecting embryo-sheltered pronucleus and blastomere based on attention mechanism
CN112163602A (en) Target detection method based on deep neural network
CN115131797B (en) Scene text detection method based on feature enhancement pyramid network
CN111833237A (en) Image registration method based on convolutional neural network and local homography transformation
CN117788402A (en) Industrial product defect detection method based on LIDD-Net high real-time light-weight network
CN116543433A (en) Mask wearing detection method and device based on improved YOLOv7 model
CN112381794B (en) Printing defect detection method based on deep convolution generation network
CN113205511B (en) Electronic component batch information detection method and system based on deep neural network
CN114359387A (en) Bag cultivation mushroom detection method based on improved YOLOV4 algorithm
CN116934696A (en) Industrial PCB defect detection method and device based on YOLOv7-Tiny model improvement
CN115830302B (en) Multi-scale feature extraction fusion power distribution network equipment positioning identification method
CN113536896A (en) Small target detection method, device and storage medium based on improved fast RCNN
CN112270404A (en) Detection structure and method for bulge defect of fastener product based on ResNet64 network
CN113870262B (en) Printed circuit board classification method and device based on image processing and storage medium
CN115661094A (en) Industrial flaw detection method based on improved YOLOX model
CN112001388B (en) Method for detecting circular target in PCB based on YOLOv3 improved model
CN115049611A (en) Continuous casting billet crack defect identification method based on improved yolov5
JP7070308B2 (en) Estimator generator, inspection device, estimator generator method, and estimator generator
Hu et al. Printed Circuit Board (PCB) Surface Micro Defect Detection Model Based on Residual Network with Novel Attention Mechanism.
CN107123105A (en) Images match defect inspection method based on FAST algorithms
CN112949730B (en) Method, device, storage medium and equipment for detecting target with few samples

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination