CN116820256A - Multi-cascade key detection method and device - Google Patents
Multi-cascade key detection method and device Download PDFInfo
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Abstract
The invention relates to a multi-cascade key detection method and a device, wherein the method comprises the following steps: setting up a multi-stage series MCU; generating key state information by using the MCU in multiple stages; the key state information of each level of MCU comprises key state information of the current level and key state information of the previous level; and identifying the working state of the keys connected to the MCU of each stage by monitoring the key state information of the last stage. According to the invention, the plurality of MCUs are connected in series, and the state detection communication of the key is changed into the communication among the plurality of MCUs by utilizing the communication among the MCUs, so that the remote signal transmission is facilitated. Meanwhile, each MCU participates in key state monitoring, and a large number of input pins are not occupied during multi-key detection; each stage of MCU is an independent unit, can work independently, and can be used in series, combination and collocation in any number.
Description
Technical Field
The invention relates to the technical field of key detection, in particular to a multi-cascade key detection method and device.
Background
Physical keys of entities are applied everywhere in life, and the implementation schemes are different from single-key light switches to computer keyboard keys with more than 100 keys. In either case, the final objective is to enable the system receiving the key signals to correctly identify which key is pressed, and then the system responds accordingly to implement the corresponding key function.
The key detection scheme in the prior art comprises the following steps: scheme 1, a key corresponds to a special GPIO interface, wherein GPIO is called General-purpose input/output, and represents General-purpose input/output; scheme 2, detecting the voltage difference of GPIO interfaces by using ADC to identify the corresponding key function; scheme 3, key matrix detection scheme of computer keyboard.
Scheme 1: as shown in fig. 3, each key occupies a single input signal pin, which is suitable for application scenarios with a small number of keys, and the plurality of keys do not interfere with each other. However, when the number of the keys is large, for example, the number of the keys is hundreds to thousands, a large number of input signal pins are occupied, and hardware resources are wasted.
Scheme 2: as shown in fig. 4, the ADC is used to detect the voltage of the input pins, which occupies a small number of input pins and is suitable for short-distance use. However, as the number of keys increases, the requirements on the detection accuracy of the ADC are higher, and the ADC is not suitable for long-distance transmission.
Scheme 3: as shown in fig. 5, the matrix key detection scheme has an inherent problem that three or more keys are pressed simultaneously in the matrix key, and a situation that the key value of the key is judged to be wrong occurs, and a diode needs to be added to solve the problem. The method is more suitable for short-distance intensive application scenes, like a computer keyboard. If the distribution area of the keys is large, the construction is complicated.
Therefore, the key detection method in the prior art is not suitable for the long-distance detection condition, and occupies a large number of input signal pins, so that the problems of resource waste and the like are caused.
Disclosure of Invention
The invention provides a multi-cascade key detection method and device, which aims to solve the technical problems that in the prior art, a key detection method is not suitable for long-distance detection, and resources are wasted due to the fact that a large number of input signal pins are occupied.
The technical scheme for solving the technical problems is as follows:
a multi-cascade key detection method comprises the following steps:
setting up a multi-stage series MCU;
generating key state information by using the MCU in multiple stages; the key state information of each level of MCU comprises key state information of the current level and key state information of the previous level;
and identifying the working state of the keys connected to the MCU of each stage by monitoring the key state information of the last stage.
The beneficial effects of the invention are as follows: through establishing ties a plurality of MCU, utilize the communication between the MCU, change the state detection communication of button into the communication between a plurality of MCU, the remote signal transmission of being convenient for. Meanwhile, each MCU participates in key state monitoring, and a large number of input pins are not occupied during multi-key detection; each stage of MCU is an independent unit, can work independently, and can be used in series, combination and collocation in any number.
On the basis of the technical scheme, the invention can be improved as follows.
Further, keys are connected to the MCU of each stage, and a key state detection interface of the MCU of each stage is grounded or connected to a power supply through the keys.
Further, in the two cascaded MCUs, the signal output end of the upper stage of the MCU is connected with the signal input end of the lower stage of the MCU.
Further, the key state information is specifically a key state code.
Further, the method for generating key state information by using the MCU comprises the following steps:
after receiving the key state code of the MCU of the previous stage, the MCU of the current stage stores the received key state code;
if the working state of the current-stage key is changed, the MCU at the current stage recompiles the current-stage key state information, integrates the received key state code and recompiled current-stage key state information and compiles the integrated key state code and recompiled current-stage key state information into the current-stage key state code;
if the working state of the current-stage key is not changed, the last-stage key state information in the previous-stage key state information is updated to the received key state code.
In order to solve the technical problems, the invention also provides a multi-cascade key detection device, which comprises the following specific technical contents:
a multi-cascade key detection device comprises a multi-stage series MCU,
for generating key state information; the key state information of each level of MCU comprises key state information of the current level and key state information of the previous level; and identifying the working state of the keys connected to the MCU of each stage by monitoring the key state information of the last stage.
Further, keys are connected to the MCU of each stage, and a key state detection interface of the MCU of each stage is grounded or connected to a power supply through the keys.
Further, in the two cascaded MCUs, the signal output end of the upper stage of the MCU is connected with the signal input end of the lower stage of the MCU.
Further, the key state information is specifically a key state code.
Further, after the MCU of the current stage receives the key state code of the MCU of the previous stage, the received key state code is stored;
if the working state of the current-stage key is changed, the MCU at the current stage recompiles the current-stage key state information, integrates the received key state code and recompiled current-stage key state information and compiles the integrated key state code and recompiled current-stage key state information into the current-stage key state code;
if the working state of the current-stage key is not changed, the last-stage key state information in the previous-stage key state information is updated to the received key state code.
Drawings
FIG. 1 is a schematic circuit diagram of a multi-cascaded key detection device according to an embodiment of the present invention;
FIG. 2 is a timing diagram of the encoding of key status codes according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a circuit structure of a key corresponding to a dedicated GPIO in the prior art;
FIG. 4 is a schematic diagram of a circuit structure for identifying a corresponding key function by detecting voltage differences of GPIO by using ADC in the prior art;
fig. 5 is a schematic circuit diagram of a key matrix detection scheme of a computer keyboard in the prior art.
Detailed Description
The principles and features of the present invention are described below with reference to the drawings, the examples are illustrated for the purpose of illustrating the invention and are not to be construed as limiting the scope of the invention.
Fig. 1 is a schematic circuit diagram of a multi-cascade key detection apparatus, which includes MCUs connected in series in multiple stages,
for generating key state information; the key state information of each level of MCU comprises key state information of the current level and key state information of the previous level; and identifying the working state of the keys connected to the MCU of each stage by monitoring the key state information of the last stage.
Specifically, each stage of MCU is connected with a key, and the key state detection interface of each stage of MCU is grounded or connected to a power supply through the key, and in the two cascaded MCUs, the signal output end of the MCU at the upper stage is connected with the signal input end of the MCU at the lower stage.
The DO pin of MCU1, i.e. the signal output end, outputs the Code compiled with KEY KEY1, i.e. the KEY status Code, the DO pin of MCU2, i.e. the Code compiled with KEYs KEY1 and KEY2, the DO pin of MCU3, i.e. the Code compiled with KEYs KEY1, KEY2 and KEY3, and so on, the DO pin of MCUn, i.e. the Code compiled with KEYs KEY1, KEY2, KEY3, … and KEYn.
In some embodiments, the MCU is internally provided with a crystal oscillator circuit and a RAM storage space, the clock frequency is Y Hz, and the storage space is n bits. One bit of RAM memory space corresponds to the state of one key. The first MCU, namely, the first bit of the RAM storage space of MCU1 corresponds to the status Code KEY1 Code of the first KEY KEY 1; the second MCU, namely the first bit of the RAM storage space of MCU2, corresponds to the status Code KEY1 Code of KEY1 in MCU1, and the second bit of the RAM storage space of MCU2 corresponds to the status Code KEY2 Code of the second KEY KEY 2; the third MCU, namely the first bit of the RAM storage space of MCU3, is bit corresponding to the status Code KEY1 Code of KEY KEY1 in MCU1, the second bit of the RAM storage space of MCU3 is bit corresponding to the status Code KEY2 Code of KEY KEY2 in MCU2, the third bit of the RAM storage space of MCU3 is bit corresponding to the status Code KEY3 Code of KEY KEY3 in MCU 3;
and so on, the nth MCU, namely the first to nth bits of the RAM storage space of the MCUn, sequentially corresponds to the status Code KEY1 Code of the KEY KEY1, the status Code KEY2 Code of the KEY KEY2, the status Code KEY3 Code of the KEY KEY3, … and the status Code KEYn Code of the KEY.
In some embodiments, when the key is not closed when the key state detection interface of each stage of the MCU of each stage passes through the key ground, the MCU writes the corresponding key state code as 1; when the key is closed, the MCU writes the corresponding key state code as 0.
When the key state detection interface of each MCU of each stage is connected with a power supply through the key, and the key is not closed, the MCU writes the corresponding key state code into 0; when the key is closed, the MCU writes the corresponding key state code as 1.
In some embodiments, the code issued by each MCU contains three pieces of content: a start section, a coding section and an end section. The beginning segment represents the formal beginning of the encoding and may be composed of 5 sets of high and low level signals at a frequency of 1/2Y hz. The code segment represents the formal beginning of the key state code and consists of a plurality of groups of high or low levels with the frequency of Y Hz, wherein Y can be selected to be proper according to the requirement. The first bit after the start section is the state code of the first key, the second bit represents the state code of the second key, the third bit represents the state code of the third key, and so on, the nth bit represents the state code of the nth key. The end section represents the end of the key state code and can be composed of 10 groups of high-low level signals with the frequency of 1/2Y Hz.
In some embodiments, the key state detection system includes two processes of power-on initialization and coding when detecting the key state.
The power-on initialization process specifically comprises the following steps:
in order to ensure the normal operation of the whole key state detection circuit, the key state detection system is powered on, namely the system is powered on, and the power-on initialization process is actively triggered. In this process, all MCUs will initialize, record the initial state of each KEY after power-up, and store in the corresponding RAM storage space built in the MCU, for example, in the initialization process, the initial state information of KEY1 will be stored in the RAM storage space built in MCU1, the initial state information of KEY2 will be stored in the RAM storage space built in MCU2, the initial state information of KEY3 will be stored in the RAM storage space built in MCU3, and so on, the initial state information of KEY KEYn will be stored in the RAM storage space built in MCUn. In the power-on initialization process, the key state detection system can record the number of detection points of the whole circuit and the initial state of each key by identifying the position of the first detection point. The first detection point position can be the serial number of the MCU positioned at the first stage in the multi-stage MCU; the number of detection points of the whole circuit can be the number of MCUs; the initial state of each key may be represented by a binary machine code "0" or "1".
The coding process specifically comprises the following steps:
when the key state in any stage changes, the current stage, namely the stage with the changed key state and all stages after the current stage, are triggered to recode.
There are two ways in which the MCU re-encoding can be triggered: first, any detection point, namely the working state of the KEY corresponding to any MCU changes, namely the KEY pin level state of the MCU is different from the state in the power-on initialization, and the active encoding of the MCU is triggered. Second, the code of the previous level update is passively received. Although the key of the current stage does not actively trigger the coding process, the last stage of updated codes are passively received, and the MCU of the current stage copies the last stage of updated codes to be stored in the internal RAM space.
When the first condition of triggering MCU recoding occurs, the MCU of the present stage updates the byte section of the corresponding coding section of the key of the present stage in the space of the built-in RAM, and then outputs the updated code to the MCU of the next stage through the DO pin, namely the signal output pin.
When the second trigger MCU recoding condition occurs, after the MCU of the current stage detection point receives the codes of the MCU of the previous stage through the DI pin signal input pin, the received code segment is updated into the storage space of the built-in RAM; then, updating the byte section of the current-level key state in the coding section; and finally, respectively adding a start section and an end section before and after the coding section to finish the coding of the current stage. After the coding of the stage is finished, the MCU outputs the complete coding to the MCU of the next stage through DO.
In some embodiments, the key is mainly in two working states, namely pressed and not pressed, the types of the keys are different, and the effects of the working states are different, for example, some keys indicate that circuits connected to two ends of the key are on in the pressed working state, and some keys indicate that circuits connected to two ends of the key are off in the not pressed working state; conversely, some keys indicate that the circuits connected to both ends of the key are open in the pressed operation state, and some keys indicate that the circuits connected to both ends of the key are closed in the non-pressed operation state.
In some embodiments, fig. 2 is a timing diagram of coding a key status code, and a specific coding method is as follows: the code segment sent by the MCU of the first detection point has only 1 byte, the code segment sent by the second MCU has 2 bytes, …, and so on, the code segment sent by the nth MCU has n bytes, and "+" in fig. 2 indicates an inclusion meaning, for example, key1+key2+key3 indicates a status code including KEYs KEY1, KEY2, and KEY 3.
The foregoing description of the preferred embodiments of the invention is not intended to limit the invention to the precise form disclosed, and any such modifications, equivalents, and alternatives falling within the spirit and principles of the invention are intended to be included within the scope of the invention.
Claims (10)
1. The multi-cascade key detection method is characterized by comprising the following steps of:
setting up a multi-stage series MCU;
generating key state information by using the MCU in multiple stages; the key state information of each level of MCU comprises key state information of the current level and key state information of the previous level;
and identifying the working state of the keys connected to the MCU of each stage by monitoring the key state information of the last stage.
2. The multi-cascade key detection method according to claim 1, wherein keys are connected to the MCUs of each stage, and key state detection interfaces of the MCUs of each stage are grounded or connected to a power supply through the keys.
3. The multi-cascade key detection method according to claim 2, wherein, in the two cascaded MCUs, a signal output end of the upper stage of the MCU is connected with a signal input end of the lower stage of the MCU.
4. The method according to claim 1, wherein the key status information is a key status code.
5. The multi-cascade key detection method of claim 4, wherein generating key state information using the MCUs comprises the steps of:
after receiving the key state code of the MCU of the previous stage, the MCU of the current stage stores the received key state code;
if the working state of the current-stage key is changed, the MCU at the current stage recompiles the current-stage key state information, integrates the received key state code and recompiled current-stage key state information and compiles the integrated key state code and recompiled current-stage key state information into the current-stage key state code;
if the working state of the current-stage key is not changed, the last-stage key state information in the previous-stage key state information is updated to the received key state code.
6. A multi-cascade key detection device is characterized by comprising a multi-stage series MCU,
for generating key state information; the key state information of each level of MCU comprises key state information of the current level and key state information of the previous level; and identifying the working state of the keys connected to the MCU of each stage by monitoring the key state information of the last stage.
7. The multi-cascade key detection apparatus of claim 6, wherein each stage of the MCU is connected with a key, and a key state detection interface of each stage of the MCU is grounded or connected to a power supply through the key.
8. The multi-cascade key detection apparatus of claim 7, wherein the signal output terminal of the MCU of the upper stage is connected to the signal input terminal of the MCU of the lower stage in the two cascaded MCUs.
9. The multi-tandem key detection apparatus of claim 6, wherein the key status information is a key status code.
10. The multi-cascade key detection apparatus of claim 9, wherein the MCU of the current stage stores the key status code received after receiving the key status code of the MCU of the previous stage;
if the working state of the current-stage key is changed, the MCU at the current stage recompiles the current-stage key state information, integrates the received key state code and recompiled current-stage key state information and compiles the integrated key state code and recompiled current-stage key state information into the current-stage key state code;
if the working state of the current-stage key is not changed, the last-stage key state information in the previous-stage key state information is updated to the received key state code.
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