CN116795425A - Chip front-end development system and method based on git - Google Patents
Chip front-end development system and method based on git Download PDFInfo
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- CN116795425A CN116795425A CN202310766981.XA CN202310766981A CN116795425A CN 116795425 A CN116795425 A CN 116795425A CN 202310766981 A CN202310766981 A CN 202310766981A CN 116795425 A CN116795425 A CN 116795425A
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- 238000011161 development Methods 0.000 title claims abstract description 30
- 238000000034 method Methods 0.000 title claims abstract description 27
- 238000013461 design Methods 0.000 claims abstract description 72
- 238000012795 verification Methods 0.000 claims abstract description 40
- 238000004590 computer program Methods 0.000 claims description 13
- 238000001514 detection method Methods 0.000 claims description 4
- 230000008859 change Effects 0.000 abstract description 13
- 230000008569 process Effects 0.000 abstract description 6
- 238000007726 management method Methods 0.000 description 7
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- 238000005516 engineering process Methods 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/70—Software maintenance or management
- G06F8/73—Program documentation
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/3604—Software analysis for verifying properties of programs
- G06F11/3608—Software analysis for verifying properties of programs using formal methods, e.g. model checking, abstract interpretation
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/30—Creation or generation of source code
- G06F8/38—Creation or generation of source code for implementing user interfaces
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/70—Software maintenance or management
- G06F8/71—Version control; Configuration management
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Abstract
A chip front-end development system and method based on git is characterized in that through a system comprising a design module and a verification module, design files in the design module are updated after design files are submitted by design personnel, and meanwhile, the design files under branches of all development personnel (comprising the design personnel and the verification personnel) are updated, so that the development personnel can timely acquire updated information of the design files and acquire latest design file versions. During the updating process of the design file, the system can detect code conflict, and the conflict part is reserved and marked with a bright color. After the verification personnel submits the verification report, the system can compare the latest version verification report with the updated version report, record the change content and sort the change content into a report, and send the report to the verification personnel, so that the efficiency of the verification personnel in reviewing the verification report is improved.
Description
Technical Field
The application relates to a chip front-end development system and method based on git, and belongs to the technical field of chip development.
Background
The traditional method is to build a remote server to detect developer information, acquire codes and detect whether the codes conflict, and then automatically classify code files and format typesetting. Although the patent has the characteristic of adapting to various types of code submission, in the field of chip development, we need to pay attention not only to the fact that the system can merge the design files with code conflicts, but also to how to inform all developers (including designers and verifiers) of the updated information of the design files in real time and acquire the latest version of the design files. If the designer cannot know the updating of the design file in real time, on one hand, the repeated labor can be caused, and on the other hand, more code conflicts can occur when submitting codes, so that the updating efficiency of the design file is affected. If the verifier cannot acquire the update of the design file in real time, the latest version of the design file cannot be verified in time, and the verification work propulsion efficiency is affected.
Disclosure of Invention
The application solves the technical problems that: the method enables all developers in the system to branch off design files and update the design files when the design files are updated, and issues update time and remark information to all developers after the update is completed, so that the developers can timely acquire the updated information of the design files and acquire the latest version of the design files. Meanwhile, the system can detect code conflict in the updating process of the design file, and the conflict part of the code conflict and the code conflict is reserved and marked with a bright color, so that a designer can solve the potential code conflict problem before submitting the code, and the programming efficiency is improved. Finally, the system can compare the latest version verification report with the updated version report, record the change content and arrange the change content into a report to be sent to the verification personnel, and the efficiency of the verification personnel to review the verification report is improved.
The technical scheme of the application is as follows: a chip front-end development method based on git comprises the following steps:
receiving a file submitted by a developer at the front end of a chip and remarking related information;
detecting the attribute of the developer according to the received file; if the attribute is a designer, updating the corresponding design file stored in the git database, and simultaneously searching the design files under all developer branches and updating; if the attribute is a verifier, updating a verification report stored in the git database and feeding back information to the verifier; if the attribute is neither a designer nor a verifier, the submitting file operation is refused and a warning message is sent.
Further, in the process of updating the corresponding design file stored in the git database, whether code conflict with the design file under the current branch occurs is detected; if no conflict exists, updating the file; if the conflict exists, a prompt message is sent to the branch responsible person, and meanwhile, the conflict part of the prompt message and the branch responsible person is reserved and marked; after the update is completed, the update time and remark information are issued to all developers.
Further, the feedback information includes a comparison of the results of the latest version report with the updated version report.
Further, the remark related information includes: the time of uploading the file and the information the developer informs other developers.
A chip front-end development system based on git comprises a detection module, a design module and a verification module;
the design module and the verification module comprise a git database, and the git databases of the design module and the verification module are respectively used for storing design files and verification reports;
the detection module is used for detecting the attribute of the developer according to the file submitted by the developer at the front end of the chip; if the attribute is a designer, updating the corresponding design file in the design module, and simultaneously searching the design files under all developer branches and updating; if the attribute is the verifier, updating a verification report in the verification module and feeding back information to the verifier; if the attribute is neither a designer nor a verifier, the submitting file operation is refused and a warning message is sent.
Further, in the process of updating the corresponding design file in the design module, whether code conflict with the design file under the current branch occurs is detected; if no conflict exists, updating the file; if the conflict exists, a prompt message is sent to the branch responsible person, and meanwhile, the conflict part of the prompt message and the branch responsible person is reserved and marked; after the update is completed, the update time and remark information are issued to all developers.
Further, the feedback information includes a comparison of the results of the latest version report with the updated version report.
Further, the remark related information includes: the time of uploading the file and the information the developer informs other developers.
A computer readable storage medium storing a computer program which when executed by a processor performs the steps of the git-based chip front end development method.
The chip front-end development equipment based on the git comprises a memory, a processor and a computer program which is stored in the memory and can run on the processor, wherein the processor realizes the steps of the chip front-end development method based on the git when executing the computer program.
Compared with the prior art, the application has the advantages that:
(1) The system updates the design files under all developer branches to the latest version in time, reduces repeated labor of the designers, can solve the problem of code conflict in advance, and improves programming efficiency. The verification personnel can verify the latest version of design file in time, so that the verification work propulsion efficiency is improved.
(2) The system can improve the efficiency of checking the report by the verifier by comparing the latest version of the verification report with the updated version of the report, recording the change content and arranging the change content into the report and sending the report to the verifier.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the application. Also, like reference numerals are used to designate like parts throughout the figures. In the drawings:
FIG. 1 is a schematic flow chart of the method of the application.
Detailed Description
In order to better understand the above technical solutions, the following detailed description of the technical solutions of the present application is made by using the accompanying drawings and specific embodiments, and it should be understood that the specific features of the embodiments and the embodiments of the present application are detailed descriptions of the technical solutions of the present application, and not limiting the technical solutions of the present application, and the technical features of the embodiments and the embodiments of the present application may be combined with each other without conflict.
The following is a detailed description of a system and a method for developing a chip front end based on git provided in the embodiments of the present application in conjunction with the accompanying drawings, and a specific implementation manner may include (as shown in fig. 1): the chip front end development management method based on git comprises the following steps:
(1) A developer submits a file and remarks related information at the front end of the chip by a development management system;
(2) Detecting the attribute of the developer by the system, and jumping to the step (3) if the attribute is a designer; if the attribute is a verification person, jumping to the step (4); otherwise refusing to submit file operation and sending out warning information;
(3) The system updates the design files in the design module and simultaneously searches the design files under the branches of all developers in the system and updates the design files;
(4) And the system updates the verification report in the verification module and feeds back information to the verification personnel.
In the step (3), the system detects whether code conflict occurs with the design file under the current branch in the updating process: if no conflict exists, directly updating the file; if the conflict exists, a prompt message is sent to the branch responsible person, and the conflict part of the prompt message and the branch responsible person is reserved and marked with a bright color. After the update is completed, the update time and remark information are issued to all developers.
And (3) comparing the latest version report with the updated version report by the system in the step (4), and if the change occurs, recording the change content and finishing the change content into a report to be sent to a verifier.
In the scheme provided by the embodiment of the application, as shown in fig. 1, the method is a specific step of a chip front-end development management method based on git. Now, assume that a chip front-end development project requires two designers A1, A2 and a verifier B1 to complete together.
The specific implementation mode is as follows:
(1) Designer A1 submits design files and remarks related information in the front-end development management system of the chip.
(2) After detecting that the attribute A1 is a designer, the system updates design files in the design module, fully reserves and marks the conflict part of the code of the design files submitted by the designer A1 and the design files under the branch of the designer A2 and the verifier B1, directly updates the rest design files, and sends prompt information to the designer A2 and the verifier B1. After the update is completed, update time and remark information are issued to the designer A2 and the verifier B1.
(3) And the verifier B1 completes verification work on the basis of the updated design file, and submits the file and remarks related information at the front-end development management system of the chip.
(4) And after detecting that the B1 attribute is a verifier, the system updates the verification report in the verification module, compares the latest version report with the updated version report, records the change content, and collates the change content into a report to be sent to the verifier B1.
(5) The designer A2 modifies the design file based on the updated design file, and then submits the file and remarks related information in the front-end development management system of the chip.
(6) After detecting that the attribute A2 is a designer, the system updates design files in the design module, fully reserves and marks the conflict part of the code of the design files submitted by the designer A1 and the designer B1 under the branch of the designer A1 and the verifier B1 by using a bright color, directly updates other design files, and sends prompt information to the designer A1 and the verifier B1. After the update is completed, update time and remark information are issued to the designer A1 and the verifier B1.
(7) And the verifier B1 completes verification work on the basis of the updated design file, and submits the file and remarks related information at the front-end development management system of the chip.
(8) And after detecting that the B1 attribute is a verifier, the system updates the verification report in the verification module, compares the latest version report with the updated version report, records the change content, and collates the change content into a report to be sent to the verifier B1.
The present application provides a computer readable storage medium storing computer instructions that, when run on a computer, cause the computer to perform the method described in fig. 1.
It will be appreciated by those skilled in the art that embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, magnetic disk storage, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present application without departing from the spirit or scope of the application. Thus, it is intended that the present application also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.
What is not described in detail in the present specification is a well known technology to those skilled in the art.
Claims (10)
1. The chip front-end development method based on git is characterized by comprising the following steps of:
receiving a file submitted by a developer at the front end of a chip and remarking related information;
detecting the attribute of the developer according to the received file; if the attribute is a designer, updating the corresponding design file stored in the git database, and simultaneously searching the design files under all developer branches and updating; if the attribute is a verifier, updating a verification report stored in the git database and feeding back information to the verifier; if the attribute is neither a designer nor a verifier, the submitting file operation is refused and a warning message is sent.
2. The git-based chip front end development method of claim 1, wherein the updating of the corresponding design file stored in the git database detects whether a code conflict occurs with the design file under the current branch; if no conflict exists, updating the file; if the conflict exists, a prompt message is sent to the branch responsible person, and meanwhile, the conflict part of the prompt message and the branch responsible person is reserved and marked; after the update is completed, the update time and remark information are issued to all developers.
3. The git-based chip front end development method of claim 1, wherein the feedback information includes a comparison of the latest version report with the updated version report.
4. The git-based chip front end development method of claim 1, wherein the remark-related information comprises: the time of uploading the file and the information the developer informs other developers.
5. The chip front-end development system based on git is characterized by comprising a detection module, a design module and a verification module;
the design module and the verification module comprise a git database, and the git databases of the design module and the verification module are respectively used for storing design files and verification reports;
the detection module is used for detecting the attribute of the developer according to the file submitted by the developer at the front end of the chip; if the attribute is a designer, updating the corresponding design file in the design module, and simultaneously searching the design files under all developer branches and updating; if the attribute is the verifier, updating a verification report in the verification module and feeding back information to the verifier; if the attribute is neither a designer nor a verifier, the submitting file operation is refused and a warning message is sent.
6. The git-based chip front end development system of claim 5, wherein the updating of the corresponding design file in the design module detects whether a code conflict occurs with the design file under the current branch; if no conflict exists, updating the file; if the conflict exists, a prompt message is sent to the branch responsible person, and meanwhile, the conflict part of the prompt message and the branch responsible person is reserved and marked; after the update is completed, the update time and remark information are issued to all developers.
7. The git-based chip front end development system of claim 5, wherein the feedback information includes a comparison of the results of the latest version report with the updated version report.
8. The git-based chip front end development system of claim 5, wherein the remark-related information comprises: the time of uploading the file and the information the developer informs other developers.
9. A computer readable storage medium storing a computer program, which when executed by a processor performs the steps of the method according to any one of claims 1 to 4.
10. A git-based chip front end development device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized by: the processor, when executing the computer program, performs the steps of the method according to any one of claims 1 to 4.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310766981.XA CN116795425A (en) | 2023-06-27 | 2023-06-27 | Chip front-end development system and method based on git |
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| CN202310766981.XA CN116795425A (en) | 2023-06-27 | 2023-06-27 | Chip front-end development system and method based on git |
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| CN116795425A true CN116795425A (en) | 2023-09-22 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117744588A (en) * | 2024-02-19 | 2024-03-22 | 深圳市楠菲微电子有限公司 | Chip verification system and method |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117744588A (en) * | 2024-02-19 | 2024-03-22 | 深圳市楠菲微电子有限公司 | Chip verification system and method |
| CN117744588B (en) * | 2024-02-19 | 2024-05-31 | 深圳市楠菲微电子有限公司 | Chip verification system and method |
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