CN116794472A - Thyristor-level damping loop test system and method for different converter valves - Google Patents

Abstract

The invention discloses a system and a method for testing thyristor-level damping loops of different converter valves, wherein the system comprises a man-machine interaction module, a damping loop testing module and a thyristor-level loop of the converter valves, and the man-machine interaction module is used for executing testing instructions; the damping loop test module is used for receiving a test instruction to generate a first test signal; the damping loop test module comprises a processor, an analog switch and a second test signal output module; the processor is used for receiving the test instruction to generate a first test signal and transmitting the first test signal to the analog switch; the analog switch receives the first test signal and then outputs a second test signal, wherein the second test signal comprises a direct current signal and alternating current signals with different frequencies; and after receiving the second test signal, the second test signal output module selects a corresponding wiring mode according to the type of the thyristor-level loop of the converter valve so as to test the equalizing resistance value, the damping capacitance value and the impedance value under different frequencies in different loops.

Description

Thyristor-level damping loop test system and method for different converter valves

Technical Field

The invention relates to the field of equipment inspection, in particular to a thyristor-level damping loop test system and method aiming at different converter valves.

Background

The DC converter valve is high-end electrical equipment for realizing the conversion of AC and DC electric energy and the rapid regulation of DC power in a high-voltage DC converter station, and is a composite technology with high comprehensive and high complexity integrating more than ten professions of power system analysis, power electronic technology, power transmission and distribution engineering, high voltage, engineering thermodynamics and the like. As a core device for high-voltage direct-current transmission, if a fault abnormality occurs in the operation of a converter valve, the whole direct-current transmission project can be directly stopped. The converter valve is complex power equipment consisting of hundreds of components such as a thyristor, a damping resistor, a equalizing resistor, a reactor, a thyristor-level triggering monitoring unit, a water cooling pipeline, various structural components and the like, wherein any component fault can bring serious influence to the reliable operation of the converter valve. Meanwhile, the converter valve has the characteristics of high manufacturing cost, precision, fragility, harsh environmental requirements and the like.

At present, routine power failure maintenance plans are arranged in each year of a converter station, and after power failure, carefully and carefully checking, testing and eliminating defects are carried out on all the components of the converter valve, so that the long-period safe and stable operation of the converter valve is ensured. However, the existing maintenance mode only can detect whether the converter valve has a fault or not, and cannot judge the specific position of the fault, so that the fault detection is not facilitated. Moreover, because the electrical principles of the thyristor stages of the converter valves of different manufacturers are different, corresponding detection equipment is required to be selected according to the manufacturers during detection, and the existing detection equipment has no universality and low detection efficiency. Therefore, how to determine the fault position more accurately through a high-quality and high-efficiency overhaul mode, discover the possible deep defects and hidden dangers of the converter valve, timely combine power failure to perform defect elimination treatment, avoid the shutdown of a high-voltage direct-current system caused by abnormal operation of the converter valve, and provide a test method capable of being compatible with thyristor levels of the converter valves of different manufacturers, which are key points and technical difficulties of urgent breakthrough in operation, maintenance and overhaul work of a converter station.

Disclosure of Invention

In view of the above, the present invention provides a system and a method for testing thyristor level damping loops of different converter valves, so as to solve the problems that the fault location cannot be precisely determined, the fault maintenance efficiency is low, and the existing detection equipment cannot be compatible with the thyristor levels of the converter valves of different manufacturers.

In order to solve the above problems, the present invention provides a thyristor-level damping loop test system for different converter valves, including: the device comprises a man-machine interaction module, a damping loop test module and a thyristor-level loop of a converter valve; the man-machine interaction module is connected with the damping loop testing module, and the damping loop testing module is connected with the thyristor-level loop of the converter valve; the man-machine interaction module is used for executing the test instruction; the damping loop test module is used for receiving a test instruction sent by the man-machine interaction module and generating a first test signal, wherein the first test signal comprises an alternating current signal; the damping loop test module includes: the processor, the analog switch and the second test signal output module; the processor is used for receiving the test instruction sent by the man-machine interaction module, generating a first test signal and transmitting the first test signal to the analog switch; the analog switch is used for converting a first test signal into a second test signal, the analog switch outputs the second test signal after receiving the first test signal, and the second test signal comprises: a direct current signal and an alternating current signal of different frequencies; after the second test signal output module receives the second test signal output by the analog switch, a corresponding wiring mode is selected according to the type of the thyristor level loop of the converter valve so as to test the equalizing resistance value, the damping capacitance value and the impedance value under different frequencies in different thyristor level loops of the converter valve, and further determine whether the equalizing resistance, the damping resistance or the damping capacitance at corresponding positions have faults or not respectively.

Optionally, the damping loop test module further includes: a direct digital frequency synthesizer for receiving a first test signal from the processor;

said transmitting said first test signal to said analog switch comprising:

and transmitting the first test signal to the direct digital frequency synthesizer, and transmitting the first test signal to the analog switch after the direct digital frequency synthesizer receives the first test signal.

Optionally, the damping loop test module further includes: the power amplifier comprises an operational amplifier module and a power operational amplifier module;

the operational amplifier module is used for carrying out smoothing processing on sine wave signals in the alternating current signals to obtain smoothed sine wave signals;

the power operational amplifier module is used for amplifying a second test signal output by the analog switch;

the second test signal output module receives a second test signal output by the analog switch, and the second test signal output module comprises: the second test signal output module receives a second test signal amplified by the power operational amplifier module;

said transmitting said second test signal to a different converter valve thyristor-level loop comprising: and transmitting a second test signal subjected to signal amplification by the power operational amplifier module to different thyristor-level loops of the converter valve.

Optionally, the damping loop test module further includes: the system comprises an analog quantity acquisition module, an analog-to-digital conversion module and a zero crossing point monitoring module;

the analog quantity acquisition module is used for acquiring voltage signals and current signals in a second test signal output by the analog switch and transmitting the voltage signals and the current signals to the analog-to-digital conversion module and the zero crossing point monitoring module;

the analog-to-digital conversion module is used for converting the voltage signal and the current signal into a voltage value and a current value and sending the voltage value and the current value to the processor; the processor calculates a voltage equalizing resistance value and impedance values under different frequencies in a thyristor level loop of the converter valve according to the voltage value and the current value;

the processor calculates the phase difference between the voltage and the current according to the zero crossing point monitoring module; and the processor calculates a damping resistance value and a damping capacitance value in a thyristor level loop of the converter valve according to the phase difference.

Optionally, the processor calculates a phase difference between the voltage and the current according to the zero crossing monitoring module, including:

the zero crossing point monitoring module is used for detecting a voltage zero crossing point and detecting a current zero crossing point;

the zero crossing point monitoring module comprises an isolation level conversion and an AND gate, and the voltage signal and the current signal are converted into high level through the isolation level conversion, and the voltage signal and the current signal after the positive zero crossing point are converted into low level;

The AND gate combines the voltage signal and the current signal into one signal;

the processor judges a phase difference between the voltage and the current by detecting a time of the high level.

Optionally, the selecting a corresponding connection mode according to the type of the thyristor level loop of the converter valve includes:

the second test signal output module is connected with the thyristor level loop of the converter valve through a first test line, a second test line and a third test line, when the thyristor level loop of the converter valve is a thyristor level loop comprising a thyristor trigger monitoring plate, the first test line is connected with an anode radiator in the thyristor level loop of the converter valve, the second test line is connected with a cathode radiator in the thyristor level loop of the converter valve, and the third test line is connected with a low-voltage side of a series resistor in the thyristor level loop of the converter valve; shorting the low voltage side of the series resistor to the low voltage side of the parallel resistor with a shorting wire; when the thyristor-level loop of the converter valve is a thyristor-level loop comprising a gate unit, the first test line is connected with the anode of the thyristor, and the second test line and the third test line are connected with the cathode of the thyristor.

Optionally, the damping loop test module further includes: the output switching relay is used for providing different testing methods by adopting different connection modes according to different converter valve thyristor level loops;

if the converter valve thyristor level loop is a thyristor level loop comprising a thyristor trigger monitoring plate, setting the output switching relay to be in a normally-closed state when testing the equalizing resistance in the converter valve thyristor level loop, wherein the test instruction is used for instructing the processor to provide negative direct-current voltage signals for the converter valve thyristor level loop, and the processor calculates the equalizing resistance value in the converter valve thyristor level loop and the impedance value under different frequencies according to the acquired voltage value and current value;

when the damping resistor and the damping capacitor in the thyristor level loop of the converter valve are tested, the output switching relay is set to be in a state of being connected with a public end and a normally open end, the test instruction is used for instructing the processor to provide an alternating current signal under test frequency for the thyristor level loop of the converter valve, and the processor calculates a damping resistor value and a damping capacitor value in the thyristor level loop of the converter valve according to the phase difference.

Optionally, the processor calculates a damping resistance value and a damping capacitance value in a thyristor-level loop of the converter valve according to the phase difference, including:

the processor performs Fourier transformation on the received voltage and current two paths of data to obtain real part Re and imaginary part Im data of corresponding frequency points, and the ratio |Z| and the phase difference theta of the modulus values of the two paths of signals under the test frequency are obtained through complex calculation;

θ＝T3-P÷2，|Z|＝U/I

wherein P is the period of the transmitted signal, T3 is the time of high level;

θ＝|artan(UIm/URe)-artan(IIm/IRe)|；

damping resistor rs= |z|cos θ=u/I cos θ;

damping capacitance cs=1/(U/I sin θ)/(2×pi×f);

where Re is real part data of a frequency point, im is imaginary part data of a frequency point, URe is real part data of a voltage frequency point, UIm is imaginary part data of a voltage frequency point, IRe is real part data of a current frequency point, IIm is imaginary part data of a current frequency point, f is a test frequency, U is a voltage module value at the test frequency, u=sqrt (URe × URe +uim×uim), I is a current module value at the test frequency, i=sqrt (IRe × IRe +iim), pi is pi, and pi=3.14.

Optionally, the determining whether the voltage equalizing resistor, the damping resistor or the damping capacitor at the corresponding position has a fault includes: the processor respectively compares the voltage-equalizing resistance value, the damping resistance value and the damping capacitance value obtained through calculation with corresponding standard values to obtain differences between the voltage-equalizing resistance value, the damping resistance value and the damping capacitance value and the corresponding standard values, and the differences are used as corresponding parameter values;

The processor judges whether the voltage equalizing resistor, the damping resistor and the damping capacitor have faults or not according to the corresponding parameter values;

if the corresponding parameter value is within the preset threshold value, judging that the voltage equalizing resistor, the damping resistor or the damping capacitor has no fault;

if the corresponding parameter value exceeds the preset threshold value, judging that the voltage equalizing resistor, the damping resistor or the damping capacitor has faults.

The invention also provides a method for testing the thyristor level damping loops of different converter valves by adopting the thyristor level damping loop testing system of different converter valves, which comprises the following steps:

step 1, a damping loop test module is added to a system in advance and is connected with the man-machine interaction module and a thyristor-level loop of a converter valve;

step 2, starting a damping loop testing module, receiving a testing instruction sent by the man-machine interaction module, and outputting a second testing signal;

and 3, selecting a corresponding wiring mode according to the type of the thyristor level loop of the converter valve through a damping loop test module, obtaining test signals aiming at a voltage-equalizing resistance value, a damping capacitance value and impedance values under different frequencies in the thyristor level loop of the converter valve, and further determining whether the voltage-equalizing resistance, the damping resistance or the damping capacitance at corresponding positions have faults.

The invention also provides a testing method for the thyristor-level damping loop of the different converter valves, which comprises the following steps: receiving a test instruction; generating a first test signal according to the test instruction, wherein the first test signal comprises an alternating current signal; generating a second test signal from the first test signal, the second test signal comprising: a direct current signal and/or an alternating current signal of different frequencies; and testing voltage equalizing resistance values and/or damping capacitance values and/or impedance values at different frequencies in different thyristor level loops of the converter valve according to the second test signals.

Optionally, the generating a second test signal according to the first test signal includes:

and transmitting the first test signal to an analog switch, and generating a second test signal after the analog switch receives the first test signal.

Optionally, the method further comprises:

smoothing the sine wave signals in the alternating current signals to obtain smoothed sine wave signals; and carrying out signal amplification processing on the second test signal to obtain a second test signal after signal amplification.

Optionally, the method further comprises:

collecting a voltage signal and a current signal in the second test signal, and converting the voltage signal and the current signal into a voltage value and a current value;

And calculating the equalizing resistance value and the impedance value under different frequencies in the thyristor level loop of the converter valve according to the voltage value and the current value.

Optionally, after collecting the voltage signal and the current signal in the second test signal, the method further includes:

monitoring and calculating the phase difference between voltage and current through a zero crossing point of the voltage signal and the current signal;

and calculating a damping resistance value and a damping capacitance value in a thyristor level loop of the converter valve according to the phase difference.

Optionally, the calculating the voltage equalizing resistance value and the impedance value under different frequencies in the thyristor level loop of the converter valve according to the voltage value and the current value includes:

when the voltage-sharing resistance value in the thyristor level loop of the converter valve is tested, the test instruction comprises an instruction for providing a negative direct-current voltage signal for the thyristor level loop of the converter valve, and the voltage-sharing resistance value in the thyristor level loop of the converter valve and the impedance value under different frequencies are calculated according to the voltage value and the current value;

optionally, the calculating a damping resistance value and a damping capacitance value in a thyristor-level loop of the converter valve according to the phase difference includes:

when testing the damping resistance value and/or the damping capacitance value in the thyristor level loop of the converter valve, the test instructions comprise instructions for providing an alternating current signal at a test frequency to the thyristor level loop of the converter valve, and calculating the damping resistance value and the damping capacitance value in the thyristor level loop of the converter valve according to the phase difference.

The invention also provides a device for testing the thyristor-level damping loop of different converter valves, which comprises: the receiving unit is used for receiving the test instruction; the first generation unit is used for generating a first test signal according to the test instruction, wherein the first test signal comprises an alternating current signal; a second generating unit, configured to generate a second test signal according to the first test signal, where the second test signal includes: a direct current signal and an alternating current signal of different frequencies; and the test unit is used for testing the equalizing resistance value, the damping capacitance value and the impedance value under different frequencies in different thyristor-level loops of the converter valve according to the second test signal.

The invention also provides electronic equipment, which comprises a processor and a memory; the memory stores a computer program, and the processor executes the method after running the computer program.

The invention also provides a computer storage medium, which is characterized in that the computer storage medium stores a computer program, and the computer program executes the method after being executed by a processor.

The invention provides a thyristor-level damping loop test system for different converter valves, which comprises: the device comprises a man-machine interaction module, a damping loop test module and a thyristor-level loop of a converter valve; the man-machine interaction module is connected with the damping loop testing module, and the damping loop testing module is connected with the thyristor-level loop of the converter valve; the man-machine interaction module is used for executing the test instruction; the damping loop test module is used for receiving a test instruction sent by the man-machine interaction module and generating a first test signal, wherein the first test signal comprises an alternating current signal; the damping loop test module includes: the processor, the analog switch and the second test signal output module; the processor is used for receiving the test instruction sent by the man-machine interaction module, generating a first test signal and transmitting the first test signal to the analog switch; the analog switch is used for converting a first test signal into a second test signal, the analog switch outputs the second test signal after receiving the first test signal, and the second test signal comprises: a direct current signal and an alternating current signal of different frequencies; and after the second test signal output module receives the second test signal output by the analog switch, a corresponding wiring mode is selected according to the type of the thyristor level loop of the converter valve so as to test the voltage equalizing resistance value, the damping capacitance value and the impedance value under different frequencies in different thyristor level loops of the converter valve, and further determine whether the voltage equalizing resistance, the damping resistance or the damping capacitance at corresponding positions have faults or not.

According to the thyristor-level damping loop test system for different converter valves, the analog switch is arranged, so that alternating current signals and direct current signals can be output in the damping loop, meanwhile, the system can not only measure impedance values at different frequencies in the damping loop, but also measure voltage-sharing resistance values, damping resistance values and damping capacitance values in the damping loop, and further determine whether the voltage-sharing resistance, the damping resistance or the damping capacitance at corresponding positions have faults or not, and therefore the fault position can be accurately determined when the converter valve has faults, and the fault maintenance efficiency is improved.

In addition, the invention can select a corresponding wiring mode according to the type of the thyristor level loop of the converter valve, thereby realizing the test of the thyristor level damping loops of the converter valves of different manufacturers and having good compatibility.

Drawings

FIG. 1 is a schematic diagram of a thyristor level damping loop test system for different converter valves according to the present invention;

FIG. 2 is a schematic diagram of the analog switch principle provided by the present invention;

FIG. 3 is a schematic diagram of the zero crossing point monitoring principle provided by the invention;

FIG. 4 is an electrical schematic of a thyristor level incorporating a TTM board according to the present invention;

FIG. 5 is an electrical schematic diagram of a thyristor level incorporating a gate cell according to the present invention;

FIG. 6 is a schematic diagram of a method for determining phase difference in a test method for thyristor-level damping loops of different converter valves;

FIG. 7 is a flow chart of a method for testing a thyristor level damping loop for different converter valves using a thyristor level damping loop test system for different converter valves provided by the invention;

FIG. 8 is a flow chart of a method of testing thyristor-level damping loops for different converter valves provided by the invention;

FIG. 9 is a schematic diagram of a thyristor level damping loop test device for different converter valves according to the present invention;

fig. 10 is a schematic diagram of an electronic device provided by the present invention.

Detailed Description

In order to clearly illustrate the aspects of the present invention, preferred embodiments are described below in detail with reference to the accompanying drawings.

The invention provides a thyristor-level damping loop test system for different converter valves, referring to fig. 1, fig. 1 is a schematic diagram of the thyristor-level damping loop test system for different converter valves.

Before introducing a thyristor-level damping loop test system for different converter valves, the background technology of the invention is briefly introduced, and the converter valve is complex power equipment consisting of hundreds of components such as thyristors, damping resistors, equalizing resistors, reactors, thyristor-level trigger monitoring units, water-cooling pipelines, various structural components and the like, wherein any component fault can bring serious influence to the reliable operation of the converter valve. The thyristor stage is a basic unit of the electric structure of the direct current converter valve, and comprises a thyristor, a damping absorption loop, a voltage equalizing loop, a gate stage unit and the like. The damping absorption circuit is used for inhibiting overshoot voltage in the opening and closing processes of the valve and realizing voltage equalizing distribution of a converter valve chain structure. In the prior art, aiming at the test of a converter valve damping resistor, a damping capacitor and a voltage equalizing resistor, the existing equipment only can test whether the existing equipment is qualified or not, and can not give an impedance value, a voltage equalizing resistor value, a damping resistor value and a damping capacitor value in a thyristor-level damping loop of the converter valve. If a certain component in the loop fails, the loop can only be tested to fail, and whether the fault is located in the damping resistance part, the damping capacitance part or the equalizing resistance part cannot be judged. Based on this, the invention provides a thyristor-level damping loop test system for different converter valves, comprising: the device comprises a man-machine interaction module, a damping loop test module and a thyristor-level loop of a converter valve; the man-machine interaction module is connected with the damping loop testing module, and the damping loop testing module is connected with the thyristor-level loop of the converter valve; the man-machine interaction module is used for executing the test instruction; the damping loop test module is used for receiving a test instruction sent by the man-machine interaction module and generating a first test signal, wherein the first test signal comprises an alternating current signal; the damping loop test module includes: the processor, the analog switch and the second test signal output module; the processor is used for receiving the test instruction sent by the man-machine interaction module, generating a first test signal and transmitting the first test signal to the analog switch; the analog switch is used for converting a first test signal into a second test signal, the analog switch outputs the second test signal after receiving the first test signal, and the second test signal comprises: a direct current signal and an alternating current signal of different frequencies; and after the second test signal output module receives the second test signal output by the analog switch, a corresponding wiring mode is selected according to the type of the thyristor level loop of the converter valve so as to test the voltage equalizing resistance value, the damping capacitance value and the impedance value under different frequencies in different thyristor level loops of the converter valve, and further determine whether the voltage equalizing resistance, the damping resistance or the damping capacitance at corresponding positions have faults or not.

According to the thyristor-level damping loop test system for different converter valves, the analog switch is arranged, so that alternating current signals and direct current signals can be output in the damping loop, meanwhile, the system can measure impedance values at different frequencies in the damping loop, and can measure equalizing resistance values, damping resistance values and damping capacitance values in the damping loop, so that fault positions can be accurately determined when the converter valve fails, and the fault maintenance efficiency is improved.

The following describes a detailed description of a thyristor-level damping loop test system for different converter valves according to the present invention with reference to fig. 1.

The thyristor-level damping loop test system for different converter valves comprises: the system comprises a man-machine interaction module 10, a damping loop test module 20 and a converter valve thyristor level loop 30; the man-machine interaction module 10 is connected with the damping loop testing module 20, and the damping loop testing module 20 is connected with the converter valve thyristor level loop 30; the man-machine interaction module 10 is used for executing a test instruction; the damping loop test module 20 is configured to receive a test instruction sent by the man-machine interaction module 10, and generate a first test signal, where the first test signal includes an ac signal.

It should be noted that, the man-machine interaction module 10 is mainly used for executing a test instruction, and when in implementation, a user sets the test instruction and the test frequency according to the test requirement of the thyristor level of the converter valve to be tested. For example, when the voltage-sharing resistance value in the thyristor-level loop of the converter valve needs to be calculated, the test instruction is used for indicating to provide negative direct-current voltage signals to the two ends of the thyristor-level loop of the converter valve; when the damping resistance value and the damping capacitance value in the thyristor-level loop of the converter valve need to be calculated, the test instruction is used for indicating to provide alternating current signals to two ends of the thyristor-level loop of the converter valve. Meanwhile, when the impedance values of the converter valve thyristor level loop under different frequencies need to be calculated, a user can set the corresponding frequencies through the man-machine interaction module.

In the present invention, the damping loop test module 20 includes: a processor 201, an analog switch 202, and a second test signal output module 203; the processor 201 is configured to receive a test instruction sent by the man-machine interaction module 10, generate a first test signal, and transmit the first test signal to the analog switch 202; the analog switch 202 is configured to convert a first test signal into a second test signal, and the analog switch 202 outputs the second test signal after receiving the first test signal, where the second test signal includes: a direct current signal and an alternating current signal of different frequencies.

The damping loop test module 20 further includes: a direct digital frequency synthesizer 204, wherein the direct digital frequency synthesizer 204 is configured to receive a first test signal sent by the processor 201; the transmitting the first test signal to the analog switch 202 includes: the first test signal is transmitted to the direct digital frequency synthesizer 204, and after the direct digital frequency synthesizer 204 receives the first test signal, the first test signal is transmitted to the analog switch 202.

It should be noted that, after receiving the test instruction sent by the man-machine interaction module 10, the processor 201 sends data to the direct digital frequency synthesizer 204 through an SPI (serial peripheral interface, serial Peripheral Interface, abbreviated as SPI) interface. A direct digital frequency synthesizer (Direct Digital Frequency Synthesis, DDS for short) is a digital synthesis technique that converts a series of digital signals into analog signals through a D/a converter. After the DDS204 receives the data, a corresponding sine wave signal is output, and in general, the DDS204 outputs a differential signal, in order to perform filtering processing on the high-frequency interference signal, in the present invention, the damping loop test module 20 further includes: an operational amplifier module 205; the op-amp module 205 is configured to perform smoothing processing on a sine wave signal in the ac signal, so as to obtain a smoothed sine wave signal. The op-amp module 205 includes: in the implementation of the high pass filter and the operational amplifier, the signal output by the DDS204 is a unidirectional positive polarity signal. The signal is converted into a bipolar sine wave signal through a high-pass filter and an analog switch, and the bipolar sine wave signal is shaped through a low-voltage operational amplifier to form a smooth sine wave signal.

The damping loop test module 20 further includes: a power op-amp module 206; the power op-amp module 206 is configured to amplify a second test signal output by the analog switch 202, where the second test signal includes: a direct current signal and an alternating current signal of different frequencies. In the present invention, a 1-way one-out-of-four analog switch 202 is added to the loop, and the signal output from the loop may be either a sine wave signal or a direct current signal by using the analog switch 202. Specifically, referring to fig. 2, fig. 2 is a schematic diagram of an analog switch according to the present invention. The invention realizes the conversion of alternating current and direct current output by utilizing the ADG5204 multipath analog switch, thereby leading the test signal to have the capability of outputting alternating current signals and positive voltage signals or negative voltage signals. Meanwhile, by using the analog switch 202, the loop can test not only the impedance value of alternating current but also the impedance value of direct current.

In the present invention, after the second test signal output module 203 receives the second test signal output by the analog switch 202, the second test signal is transmitted to different converter valve thyristor level loops 30 to test the equalizing resistance value, the damping capacitance value and the impedance value under different frequencies in different converter valve thyristor level loops 30. Specifically, the second test signal output module receives the second test signal output by the analog switch, and includes: the second test signal output module receives a second test signal amplified by the power operational amplifier module; said transmitting said second test signal to a different converter valve thyristor-level loop comprising: and transmitting a second test signal subjected to signal amplification by the power operational amplifier module to different thyristor-level loops of the converter valve.

It should be noted that, the analog switch 202 specifically outputs a sine wave signal or a dc signal, which is selected by the processor 201 controlling the address line of the analog switch 202, and the output signal of the analog switch 202 passes through the power op-amp module 206 to amplify the test signal and provide a stronger driving capability.

In the present invention, the damping loop test module 20 further includes: an analog quantity acquisition module 207 and an analog-to-digital conversion module 208; the analog acquisition module 207 is configured to acquire a voltage signal and a current signal in the second test signal output by the analog switch 202, and transmit the voltage signal and the current signal to the analog-to-digital conversion module 208; the analog-to-digital conversion module 208 is configured to convert the voltage signal and the current signal into a voltage value and a current value, and send the voltage value and the current value to the processor 201; the processor 201 calculates the voltage-sharing resistance value and the impedance value at different frequencies in the thyristor-level loop 30 of the converter valve based on the voltage value and the current value.

The damping loop test module 20 further includes: a zero crossing monitoring module 209; the analog acquisition module 207 acquires the voltage signal and the current signal in the second test signal output by the analog switch 202, and then transmits the voltage signal and the current signal to the zero crossing point monitoring module 209; the processor 201 calculates a phase difference between the voltage and the current according to the zero crossing monitoring module 209; the processor 201 calculates a damping resistance value and a damping capacitance value in the converter valve thyristor level loop 30 from the phase difference.

The processor 201 calculates a phase difference between the voltage and the current according to the zero crossing monitoring module 209, including: the zero crossing point monitoring module 209 is used for detecting a voltage zero crossing point and detecting a current zero crossing point; the zero crossing point monitoring module 209 includes an isolation level conversion and an and gate, and the voltage signal and the current signal convert the voltage signal or the current signal after the positive zero crossing point to a high level and convert the voltage signal or the current signal after the negative zero crossing point to a low level through the isolation level conversion; the AND gate combines the voltage signal and the current signal into one signal; the processor 201 determines the phase difference of the voltage and the current by detecting the time of the high level.

Here, when the power op-amp module 206 tests the signal output, the analog acquisition module 207 acquires the voltage value and the current value in the loop output. The collected voltage and current values are sent to an Analog-to-digital conversion module 208, i.e., an Analog-to-digital converter (Analog-to-digital converter or Analog-to-digital converter, abbreviated as ADC), to convert the Analog quantity into a digital quantity, and then sent to the processor 201. The processor 201 calculates the impedance value in the loop from the voltage current value. Meanwhile, the collected voltage value and current value are sent to a zero crossing point monitoring circuit, please refer to fig. 3, fig. 3 is a schematic diagram of the zero crossing point monitoring principle provided by the invention. The zero crossing point monitoring circuit is mainly used for detecting voltage zero crossing points and detecting current zero crossing points. The voltage signal and the current signal are isolated by the LTM2882 and the voltage or current signal after the positive zero crossing is all changed to high level, and the voltage or current signal after the negative zero crossing is all changed to low level. Then the voltage signal and the current signal are combined into one signal through the and gate, and the processor 201 only needs to detect the high level time to determine the phase difference of the voltage and the current. The purpose of the above operation is because: when the phase difference between the voltage and the current is smaller due to the difference of the test loops or the test frequencies during the test, if the processor is used for independently collecting and judging the phase difference between the voltage and the current, a large amount of resources of the processor are consumed, so that the zero-crossing detection loop is introduced, and the processor resources are saved.

The damping loop test module 20 further includes: the output switching relay 210 is used for providing different testing methods according to different connection modes of the thyristor level loop 30 of the converter valve. The output switching relay 210 includes: common (COM), normally Open (NO), and Normally Closed (NC). The system further includes a plurality of test lines and shorting bars that are connected to corresponding locations in the thyristor level loop of the converter valve to test different thyristor level loops of the converter valve.

It should be noted that, for different thyristor stages, the connection manner between the test line and the two ends of the thyristor is different, please refer to fig. 4 and fig. 5, and fig. 4 and fig. 5 are two different electrical schematic diagrams of the thyristor stages. During specific test, the selecting a corresponding wiring mode according to the type of the thyristor level loop of the converter valve comprises the following steps: the second test signal output module is connected with the thyristor level loop of the converter valve through a first test line, a second test line and a third test line, and specifically comprises: when the converter valve thyristor level loop is a thyristor level loop comprising a thyristor trigger monitoring plate, connecting the first test line with an anode radiator in the converter valve thyristor level loop, connecting the second test line with a cathode radiator in the converter valve thyristor level loop, and connecting the third test line with a low-voltage side of a series resistor in the converter valve thyristor level loop; shorting the low voltage side of the series resistor to the low voltage side of the parallel resistor with a shorting wire; when the thyristor-level loop of the converter valve is a thyristor-level loop comprising a gate unit, the first test line is connected with the anode of the thyristor, and the second test line and the third test line are connected with the cathode of the thyristor.

In specific implementation, the thyristor-level loop 30 of the converter valve is a thyristor-level loop including a thyristor-triggered monitoring board (Thyristor triggered monitoring board, abbreviated as TTM board), when the voltage-sharing resistance value in the thyristor-level loop 30 of the converter valve is tested, the output switching relay 210 is set to be in a normally-closed state, that is, the output switching relay 210 is set to be in a COM and NC connection state, the test instruction is used for instructing the processor 201 to provide a negative direct-current voltage signal to the thyristor-level loop 30 of the converter valve, and the processor 201 calculates the voltage-sharing resistance value and the impedance value at different frequencies in the thyristor-level loop 30 of the converter valve according to the collected voltage value and current value; when the damping resistance and the damping capacitance in the thyristor-level loop 30 are tested, the output switching relay 210 is set to the COM and NO connection state, the test instruction is used to instruct the processor 201 to provide the ac signal at the test frequency to the thyristor-level loop 30, and the processor 201 calculates the damping resistance and the damping capacitance in the thyristor-level loop 30 according to the phase difference.

The following describes the above test method in detail:

Fig. 4 is an electrical schematic diagram of a thyristor level containing TTM boards according to the present invention, using three test lines: the test line A, the test line K, the test line RC and a shorting stub, wherein the first test line A is an anode connecting line and is used for connecting the anode of the second test signal output module 203 and the anode of the thyristor level loop 30 of the converter valve; the second test line, i.e. the test line K, is a cathode connection line, and is used for connecting the cathode of the second test signal output module 203 and the cathode of the thyristor level loop 30 of the converter valve; the third test line, i.e. the test line RC, is a damping loop connection line. When testing a thyristor-level loop with TTM board, please refer to fig. 4, in which the user connects test line a to the thyristor anode heat sink, connects test line K to the thyristor cathode test line, connects test line RC to the low-voltage side of series resistor Rd2, i.e. the position 9 in fig. 4, and shorts the low-voltage side of series resistor Rd2 and the low-voltage side of parallel resistor Rd3, i.e. the position 7 and the position 9 in fig. 4, with shorting lines. During testing, the output switching relay K1 is kept in a normally closed state, the testing loop outputs negative direct-current voltage, and the voltage equalizing resistance values of the resistor Rj1 and the resistor Rj2 are tested according to the collected voltage value and current value. And then the output switching relay K1 is operated to keep the connection between COM and NO, and the test loop outputs an alternating current test signal. At this time, the parallel resistance value of the resistor Rd1 and the resistor Rd3 and the capacitance value of the Cd capacitor are tested after the resistor Rd1 and the resistor Rd2 are connected in series. When testing a thyristor level loop including a gate unit, please refer to fig. 5, fig. 5 is an electrical schematic diagram of a thyristor level including a gate unit according to the present invention. When testing the thyristor-level loop of the converter valve of fig. 5, only the test line a is connected to the anode of the thyristor, the test line K and the test line RC are simultaneously connected to the cathode of the thyristor, and the rest steps are the same as the test method of the thyristor-level loop containing the TTM board.

Referring to fig. 6, fig. 6 is a schematic diagram of a phase difference determining method in a testing method for thyristor level damping loops of different converter valves according to the present invention. The processor calculates a damping resistance value and a damping capacitance value in a thyristor level loop of the converter valve according to the phase difference, and the processor comprises the following steps: the processor performs Fourier transformation on the received voltage and current two paths of data to obtain real part Re and imaginary part Im data of corresponding frequency points, and the ratio |Z| and the phase difference theta of the modulus values of the two paths of signals under the test frequency are obtained through complex calculation; θ=t3-p≡2, |z|=u/I, where P is the signal period transmitted and T3 is the time of high level; θ= |artan (UIm/URe) -artan (IIm/IRe) |; damping resistor rs= |z|cos θ=u/I cos θ; damping capacitance cs=1/(U/I sin θ)/(2×pi×f); where Re is real part data of a frequency point, im is imaginary part data of a frequency point, URe is real part data of a voltage frequency point, UIm is imaginary part data of a voltage frequency point, IRe is real part data of a current frequency point, IIm is imaginary part data of a current frequency point, f is a test frequency, U is a voltage module value at the test frequency, u=sqrt (URe × URe +uim×uim), I is a current module value at the test frequency, i=sqrt (IRe × IRe +iim), pi is pi, and pi=3.14.

In the invention, the determining whether the voltage equalizing resistor, the damping resistor or the damping capacitor at the corresponding position has faults comprises the following steps: the processor 201 respectively compares the voltage-equalizing resistance value, the damping resistance value and the damping capacitance value obtained by calculation with corresponding standard values to obtain differences between the voltage-equalizing resistance value, the damping resistance value and the damping capacitance value and the corresponding standard values, and the differences serve as corresponding parameter values, and the processor 201 respectively judges whether the voltage-equalizing resistance, the damping resistance and the damping capacitance have faults according to the corresponding parameter values. The processor 201 determines whether the voltage equalizing resistor, the damping resistor and the damping capacitor have faults according to the corresponding parameter values, including: if the corresponding parameter value is within the preset threshold value, judging that the voltage equalizing resistor, the damping resistor or the damping capacitor has no fault; if the corresponding parameter value exceeds the preset threshold value, judging that the voltage equalizing resistor, the damping resistor or the damping capacitor has faults. The threshold value may be set accordingly for each resistor/capacitor.

The present invention also provides a method for testing the thyristor-level damping loop of the different converter valves by using the thyristor-level damping loop testing system of the different converter valves, and the same parts of the method as those of the system are not repeated, please refer to the corresponding parts of the system.

Referring to fig. 7, fig. 7 is a method for testing thyristor level damping loops of different converter valves by using a testing system for thyristor level damping loops of different converter valves according to the present invention, including:

step 701: a damping loop test module is added to the system in advance and is connected with the man-machine interaction module and the thyristor-level loop of the converter valve;

step 702: the damping loop testing module is started, receives the testing instruction sent by the man-machine interaction module and outputs the second testing signal;

step 703: and selecting a corresponding wiring mode according to the type of the thyristor level loop of the converter valve by a damping loop test module to obtain test signals aiming at the equalizing resistance value, the damping capacitance value and the impedance value under different frequencies in the thyristor level loop of the converter valve, so as to determine whether the equalizing resistance, the damping resistance or the damping capacitance at corresponding positions has faults.

The invention further provides a testing method for the thyristor-level damping loop of the different converter valves, and parts of the method, which are the same as the system, are not repeated, and reference is made to corresponding parts in the system.

Referring to fig. 8, fig. 8 is a flowchart of a method for testing a thyristor level damping loop of a different converter valve according to the present invention, where the method for testing a thyristor level damping loop of a different converter valve includes:

step S801: receiving a test instruction;

step S802: generating a first test signal according to the test instruction, wherein the first test signal comprises an alternating current signal;

step S803: generating a second test signal from the first test signal, the second test signal comprising: a direct current signal and an alternating current signal of different frequencies;

step S804: and testing voltage equalizing resistance values, damping capacitance values and impedance values under different frequencies in different thyristor-level loops of the converter valve according to the second test signals.

The generating a second test signal according to the first test signal includes:

and transmitting the first test signal to an analog switch, and generating a second test signal after the analog switch receives the first test signal.

Optionally, the method further comprises:

and carrying out smoothing processing on the sine wave signals in the alternating current signals to obtain smoothed sine wave signals.

Optionally, the method further comprises:

And carrying out signal amplification processing on the second test signal to obtain a second test signal after signal amplification.

Optionally, the method further comprises:

collecting a voltage signal and a current signal in the second test signal, and converting the voltage signal and the current signal into a voltage value and a current value;

and calculating the equalizing resistance value and the impedance value under different frequencies in the thyristor level loop of the converter valve according to the voltage value and the current value.

Optionally, after collecting the voltage signal and the current signal in the second test signal, the method further includes:

monitoring and calculating the phase difference between voltage and current through a zero crossing point of the voltage signal and the current signal;

and calculating a damping resistance value and a damping capacitance value in a thyristor level loop of the converter valve according to the phase difference.

Optionally, the calculating the voltage equalizing resistance value and the impedance value under different frequencies in the thyristor level loop of the converter valve according to the voltage value and the current value includes:

when the voltage-sharing resistance value in the thyristor level loop of the converter valve is tested, the test instruction comprises an instruction for providing a negative direct-current voltage signal for the thyristor level loop of the converter valve, and the voltage-sharing resistance value in the thyristor level loop of the converter valve and the impedance value under different frequencies are calculated according to the voltage value and the current value;

Optionally, the calculating a damping resistance value and a damping capacitance value in a thyristor-level loop of the converter valve according to the phase difference includes:

when testing the damping resistance value and/or the damping capacitance value in the thyristor level loop of the converter valve, the test instructions comprise instructions for providing an alternating current signal at a test frequency to the thyristor level loop of the converter valve, and calculating the damping resistance value and the damping capacitance value in the thyristor level loop of the converter valve according to the phase difference.

The invention further provides a device for testing the thyristor-level damping loop of the different converter valves, and parts of the device, which are the same as the method, are not repeated, and reference is made to corresponding parts in the method.

Referring to fig. 9, fig. 9 is a schematic diagram of a thyristor-level damping loop testing device for different converter valves according to the present invention, where the thyristor-level damping loop testing device 900 for different converter valves includes:

a receiving unit 901, configured to receive a test instruction;

a first generating unit 902, configured to generate a first test signal according to the test instruction, where the first test signal includes an ac signal;

A second generating unit 903, configured to generate a second test signal according to the first test signal, where the second test signal includes: a direct current signal and an alternating current signal of different frequencies;

and the test unit 904 is used for testing the equalizing resistance value, the damping capacitance value and the impedance value at different frequencies in different thyristor-level loops of the converter valve according to the second test signal.

Corresponding to the method of the invention, the invention also provides electronic equipment. Fig. 10 is a schematic diagram of an electronic device according to the present invention, as shown in fig. 10. The electronic device includes: at least one processor 1001, at least one communication interface 1002, at least one memory 1003, and at least one communication bus 1004; alternatively, the communication interface 1002 may be an interface of a communication module, such as an interface of a GSM module; the processor 1001 may be a processor CPU or a specific integrated circuit ASIC (Application Specific Integrated Circuit) or one or more integrated circuits configured to implement embodiments of the present invention. Memory 1003 may include high-speed RAM memory or may also include non-volatile memory (non-volatile memory), such as at least one disk memory. The memory 1003 stores a program, and the processor 1001 calls the program stored in the memory 1003 to execute the method provided by the present invention.

The invention also provides a computer storage medium corresponding to the method. The computer storage medium stores a computer program that is executed by a processor to perform the method of the present invention provided above.

Any modification, equivalent replacement, improvement, etc. made in the embodiments of the present invention shall fall within the scope of the present invention, as long as they are within the spirit and principle of the present invention.

Claims (10)

1. A thyristor-level damping loop test system for different converter valves, comprising: the device comprises a man-machine interaction module, a damping loop test module and a thyristor-level loop of a converter valve;

the man-machine interaction module is connected with the damping loop testing module, and the damping loop testing module is connected with the thyristor-level loop of the converter valve; the man-machine interaction module is used for executing the test instruction; the damping loop test module is used for receiving a test instruction sent by the man-machine interaction module and generating a first test signal, wherein the first test signal comprises an alternating current signal;

the damping loop test module includes: the processor, the analog switch and the second test signal output module;

The processor is used for receiving the test instruction sent by the man-machine interaction module, generating a first test signal and transmitting the first test signal to the analog switch; the analog switch is used for converting a first test signal into a second test signal, the analog switch outputs the second test signal after receiving the first test signal, and the second test signal comprises: a direct current signal and an alternating current signal of different frequencies;

after the second test signal output module receives the second test signal output by the analog switch, a corresponding wiring mode is selected according to the type of the thyristor level loop of the converter valve so as to test the equalizing resistance value, the damping capacitance value and the impedance value under different frequencies in different thyristor level loops of the converter valve, and further determine whether the equalizing resistance, the damping resistance or the damping capacitance at corresponding positions have faults or not respectively.

2. The thyristor-level damping loop test system for a different converter valve according to claim 1, wherein said damping loop test module further comprises: a direct digital frequency synthesizer for receiving a first test signal from the processor;

Said transmitting said first test signal to said analog switch comprising:

and transmitting the first test signal to the direct digital frequency synthesizer, and transmitting the first test signal to the analog switch after the direct digital frequency synthesizer receives the first test signal.

3. The thyristor-level damping loop test system for a different converter valve according to claim 1, wherein said damping loop test module further comprises: the power amplifier comprises an operational amplifier module and a power operational amplifier module;

the operational amplifier module is used for carrying out smoothing processing on sine wave signals in the alternating current signals to obtain smoothed sine wave signals;

the power operational amplifier module is used for amplifying a second test signal output by the analog switch;

the second test signal output module receives a second test signal output by the analog switch, and the second test signal output module comprises: the second test signal output module receives a second test signal amplified by the power operational amplifier module;

said transmitting said second test signal to a different converter valve thyristor-level loop comprising: and transmitting a second test signal subjected to signal amplification by the power operational amplifier module to different thyristor-level loops of the converter valve.

4. The thyristor-level damping loop test system for a different converter valve according to claim 1, wherein said damping loop test module further comprises: the system comprises an analog quantity acquisition module, an analog-to-digital conversion module and a zero crossing point monitoring module;

the analog quantity acquisition module is used for acquiring voltage signals and current signals in a second test signal output by the analog switch and transmitting the voltage signals and the current signals to the analog-to-digital conversion module and the zero crossing point monitoring module;

the analog-to-digital conversion module is used for converting the voltage signal and the current signal into a voltage value and a current value and sending the voltage value and the current value to the processor; the processor calculates a voltage equalizing resistance value and impedance values under different frequencies in a thyristor level loop of the converter valve according to the voltage value and the current value;

the processor calculates the phase difference between the voltage and the current according to the zero crossing point monitoring module; and the processor calculates a damping resistance value and a damping capacitance value in a thyristor level loop of the converter valve according to the phase difference.

5. The thyristor level damping loop test system for a different converter valve according to claim 4, wherein said processor calculates a phase difference of voltage and current from said zero crossing monitoring module, comprising:

The zero crossing point monitoring module is used for detecting a voltage zero crossing point and detecting a current zero crossing point;

the zero crossing point monitoring module comprises an isolation level conversion and an AND gate, and the voltage signal and the current signal are converted into high level through the isolation level conversion, and the voltage signal and the current signal after the positive zero crossing point are converted into low level;

the AND gate combines the voltage signal and the current signal into one signal;

the processor judges a phase difference between the voltage and the current by detecting a time of the high level.

6. The system for testing thyristor level damping loops for different converter valves according to claim 5, wherein said selecting a corresponding wiring scheme according to a type of thyristor level loop for a converter valve comprises:

the second test signal output module is connected with the thyristor level loop of the converter valve through a first test line, a second test line and a third test line, when the thyristor level loop of the converter valve is a thyristor level loop comprising a thyristor trigger monitoring plate, the first test line is connected with an anode radiator in the thyristor level loop of the converter valve, the second test line is connected with a cathode radiator in the thyristor level loop of the converter valve, and the third test line is connected with a low-voltage side of a series resistor in the thyristor level loop of the converter valve; shorting the low voltage side of the series resistor to the low voltage side of the parallel resistor with a shorting wire; or when the thyristor-level loop of the converter valve is a thyristor-level loop comprising a gate unit, the first test line is connected with the anode of the thyristor, and the second test line and the third test line are connected with the cathode of the thyristor.

7. The thyristor level damping loop test system for a different converter valve according to claim 6, wherein said damping loop test module further comprises: the output switching relay is used for providing different testing methods by adopting different connection modes according to different converter valve thyristor level loops;

if the converter valve thyristor level loop is a thyristor level loop comprising a thyristor trigger monitoring plate, setting the output switching relay to be in a normally-closed state when testing the equalizing resistance in the converter valve thyristor level loop, wherein the test instruction is used for instructing the processor to provide negative direct-current voltage signals for the converter valve thyristor level loop, and the processor calculates the equalizing resistance value in the converter valve thyristor level loop and the impedance value under different frequencies according to the acquired voltage value and current value;

when the damping resistor and the damping capacitor in the thyristor level loop of the converter valve are tested, the output switching relay is set to be in a state of being connected with a public end and a normally open end, the test instruction is used for instructing the processor to provide an alternating current signal under test frequency for the thyristor level loop of the converter valve, and the processor calculates a damping resistor value and a damping capacitor value in the thyristor level loop of the converter valve according to the phase difference.

8. The system for testing a thyristor level damping loop for different converter valves according to claim 7, wherein said processor calculates a damping resistance value and a damping capacitance value in a thyristor level loop for a converter valve from said phase difference, comprising:

the processor performs Fourier transformation on the received voltage and current two paths of data to obtain real part Re and imaginary part Im data of corresponding frequency points, and the ratio |Z| and the phase difference theta of the modulus values of the two paths of signals under the test frequency are obtained through complex calculation;

θ＝T3-P÷2，|Z|＝U/I

wherein P is the period of the transmitted signal, T3 is the time of high level;

θ＝|artan(UIm/URe)-artan(IIm/IRe)|；

damping resistor rs= |z|cos θ=u/Icos θ;

damping capacitance cs=1/(U/isinθ)/(2 pi×f);

where Re is real part data of a frequency point, im is imaginary part data of a frequency point, URe is real part data of a voltage frequency point, UIm is imaginary part data of a voltage frequency point, IRe is real part data of a current frequency point, IIm is imaginary part data of a current frequency point, f is a test frequency, U is a voltage module value at the test frequency, u=sqrt (URe × URe +uim×uim), I is a current module value at the test frequency, i=sqrt (IRe × IRe +iim), pi is pi, and pi=3.14.

9. The system of claim 4, wherein determining whether there is a fault in the voltage grading resistor, or the damping capacitor at the corresponding location comprises: the processor respectively compares the voltage-equalizing resistance value, the damping resistance value and the damping capacitance value obtained through calculation with corresponding standard values to obtain differences between the voltage-equalizing resistance value, the damping resistance value and the damping capacitance value and the corresponding standard values, and the differences are used as corresponding parameter values;

The processor judges whether the voltage equalizing resistor, the damping resistor and the damping capacitor have faults or not according to the corresponding parameter values;

if the corresponding parameter value is within the preset threshold value, judging that the voltage equalizing resistor, the damping resistor or the damping capacitor has no fault;

if the corresponding parameter value exceeds the preset threshold value, judging that the voltage equalizing resistor, the damping resistor or the damping capacitor has faults.

10. A method of testing thyristor-level damping loops for different converter valves using the system of claim 1, comprising:

step 1, a damping loop test module is added to a system in advance and is connected with the man-machine interaction module and a thyristor-level loop of a converter valve;

step 2, starting a damping loop testing module, receiving a testing instruction sent by the man-machine interaction module, and outputting a second testing signal;

and 3, selecting a corresponding wiring mode according to the type of the thyristor level loop of the converter valve through a damping loop test module, obtaining test signals aiming at a voltage-equalizing resistance value, a damping capacitance value and impedance values under different frequencies in the thyristor level loop of the converter valve, and further determining whether the voltage-equalizing resistance, the damping resistance or the damping capacitance at corresponding positions have faults.