CN116779694A - Preparation method of Topcon battery with back line type poly structure - Google Patents
Preparation method of Topcon battery with back line type poly structure Download PDFInfo
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- CN116779694A CN116779694A CN202310788510.9A CN202310788510A CN116779694A CN 116779694 A CN116779694 A CN 116779694A CN 202310788510 A CN202310788510 A CN 202310788510A CN 116779694 A CN116779694 A CN 116779694A
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- 238000002360 preparation method Methods 0.000 title abstract description 8
- 239000002184 metal Substances 0.000 claims abstract description 24
- 229910052751 metal Inorganic materials 0.000 claims abstract description 24
- 230000005641 tunneling Effects 0.000 claims abstract description 22
- 239000000126 substance Substances 0.000 claims abstract description 17
- 238000005498 polishing Methods 0.000 claims abstract description 15
- 239000000758 substrate Substances 0.000 claims abstract description 15
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 13
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 13
- 239000010703 silicon Substances 0.000 claims abstract description 13
- 238000007747 plating Methods 0.000 claims abstract description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 30
- 238000000034 method Methods 0.000 claims description 28
- 229920005591 polysilicon Polymers 0.000 claims description 28
- 238000009792 diffusion process Methods 0.000 claims description 21
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 13
- 238000000137 annealing Methods 0.000 claims description 12
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 10
- 238000000151 deposition Methods 0.000 claims description 9
- 229910052698 phosphorus Inorganic materials 0.000 claims description 8
- 239000011574 phosphorus Substances 0.000 claims description 8
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 8
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 6
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 6
- 229910020776 SixNy Inorganic materials 0.000 claims description 6
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 6
- 229910052796 boron Inorganic materials 0.000 claims description 6
- 238000005406 washing Methods 0.000 claims description 6
- 239000002253 acid Substances 0.000 claims description 5
- 238000004140 cleaning Methods 0.000 claims description 5
- 230000008021 deposition Effects 0.000 claims description 5
- 230000003213 activating effect Effects 0.000 claims description 4
- 238000007639 printing Methods 0.000 claims description 4
- 238000011109 contamination Methods 0.000 claims description 3
- 238000005530 etching Methods 0.000 claims description 3
- 239000012535 impurity Substances 0.000 claims description 3
- 230000003071 parasitic effect Effects 0.000 claims description 3
- 210000002268 wool Anatomy 0.000 claims description 3
- 238000002425 crystallisation Methods 0.000 claims description 2
- 230000008025 crystallization Effects 0.000 claims description 2
- 239000011159 matrix material Substances 0.000 claims description 2
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 2
- 238000002161 passivation Methods 0.000 abstract description 10
- 230000003746 surface roughness Effects 0.000 abstract description 4
- 238000006243 chemical reaction Methods 0.000 abstract description 2
- 230000007547 defect Effects 0.000 abstract description 2
- 230000000694 effects Effects 0.000 abstract description 2
- 238000012545 processing Methods 0.000 abstract description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 abstract 2
- 239000010931 gold Substances 0.000 abstract 2
- 229910052737 gold Inorganic materials 0.000 abstract 2
- 238000004519 manufacturing process Methods 0.000 abstract 1
- 239000002585 base Substances 0.000 description 11
- 230000000052 comparative effect Effects 0.000 description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 229910052593 corundum Inorganic materials 0.000 description 2
- 229910001845 yogo sapphire Inorganic materials 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
- 239000003513 alkali Substances 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000031700 light absorption Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 238000011056 performance test Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- Photovoltaic Devices (AREA)
Abstract
The invention provides a preparation method of a Topcon battery with a back side linear poly structure, and relates to the technical field of Topcon battery processing. The preparation of the Topcon battery with the back side linear POLY structure mainly comprises the steps of plating a linear tunneling oxide layer on a silicon-based low back side positive metal grid line, and manufacturing a layer of POLY on the tunneling oxide layer, wherein the height difference between a substrate and the tunneling oxide layer is 0.1-5um. The chemical polishing surface is arranged below the tunneling layer, the size of the polishing surface gold foundation is 8um-12um, the substrate between the poly finger is the chemical polishing surface, and the size of the polishing surface gold foundation is 12 um-25 um. The invention overcomes the defects of the prior art, reduces the surface roughness, improves the passivation effect and effectively improves the conversion efficiency of the solar cell by changing the size of the chemically polished pyramid base between the tunneling layer and the polyfinger.
Description
Technical Field
The invention relates to the technical field of Topcon battery processing, in particular to a method for preparing a Topcon battery with a back side linear poly structure.
Background
In recent years, the technology of N-Topcon batteries has been rapidly developed, high efficiency and low cost are currently an unavoidable topic, and in 2013 Fraunhofer ISE proposes a surface passivation method in which a tunneling passivation contact structure is formed on the back surface of an N-type battery by using a stacked structure of a tunneling oxide layer and a doped amorphous silicon layer or a doped polysilicon layer.
The structure forms energy band bending by utilizing the contact of two different semiconductors, so that minority carriers cannot pass through the structure, and the majority carriers can tunnel through an ultrathin oxide layer to carry out short/multi-channel transportation in a polycrystalline silicon layer so as to be collected by an electrode. In order to improve the efficiency of the battery piece, a tunneling oxide layer and a doped amorphous silicon layer or a doped polycrystalline silicon layer laminated structure are introduced to the front surface to form a tunneling passivation contact structure for surface passivation, but the realization and application of the tunneling passivation contact structure are limited by equipment configuration at present, and the whole surface deposition is mainly carried out. Since the absorption coefficient of the polysilicon layer for light is relatively high, when part of light is transmitted to the layer, it is easily absorbed by the polysilicon layer and carrier collection cannot be formed, thereby affecting the performance of the battery. Therefore, if the polysilicon layer is applied to the front surface of the battery, the problem of extremely reduced current density of the battery is easily caused; although the light absorption probability can be reduced by thinning the polysilicon layer, the problem of poor contact such as easy burning-through of the ohmic contact of the electrode can be caused. Therefore, in the process of preparing the tunneling passivation contact structure solar cell, further optimization of the application of the polysilicon doped layer is required.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides the preparation method of the Topcon battery with the back side linear poly structure, which reduces the surface roughness, improves the passivation effect and effectively improves the conversion efficiency of the solar battery by changing the size of the chemically polished pyramid base between the tunneling layer and the poly finger.
In order to achieve the above object, the technical scheme of the present invention is realized by the following technical scheme:
a method for preparing a Topcon battery with a back side linear poly structure, the method comprising the steps of:
(1) And (3) wool making: selecting an N-type monocrystalline silicon wafer as a matrix, performing double-sided texturing treatment, and eliminating organic contamination and metal impurities on the surface of the silicon wafer by using acid-base chemicals to form a pyramid-based structure on the surface of the monocrystalline silicon wafer;
(2) Boron diffusion doping: doping a P+ layer on the front surface of the silicon wafer;
(3) Washing the BSG by back acid, removing PN junction formed by parasitic diffusion on the back, etching metal grid lines, controlling the size of a pyramid base of a substrate polishing surface at the metal grid lines to be 8-12 um by chemical polishing, and controlling the size of the pyramid base of the substrate polishing surface between the metal grid lines to be 12-25um;
(4) Plating a linear tunneling oxide layer on a metal grid line on the back surface of the silicon wafer, and then regrowing a POLY silicon layer;
(5) Performing phosphorus doping treatment and annealing crystallization on the POLY silicon layer to form a highly doped POLY silicon layer;
(6) Removing BSG and PSG on the front and back surfaces by chemical cleaning, and simultaneously removing poly silicon on the front surface;
(7) Front surface deposition of Al using ALD 2 O 3 A film;
(8) Deposition of Si on front surface by PECVD x N y Or SiON y A film;
(9) Depositing SixNy or SiONy films on the back surface by PECVD;
(10) And (5) electrode printing is carried out on the front side and the back side, and the Topcon battery is manufactured.
Preferably, the monocrystalline silicon piece in the step (1) is a phosphorus doped N-type monocrystalline silicon piece, the resistivity is 0.1-10 Ω cm, and the thickness is 100-200um.
Preferably, in the step (2), a low-pressure high-temperature diffusion furnace is used for carrying out boron diffusion on the front surface of the N-type monocrystalline silicon wafer, the diffusion temperature is 800-1100 ℃, the diffusion time is 10-50 minutes, the square resistance of the P+ doped layer after diffusion is 100-180Ω/≡, the junction depth is 0.1-0.4 μm, and the thickness of the BSG layer is 110-160nm.
Preferably, in the step (3), the width of the metal gate lines is 50-150nm, and the spacing between the metal gate lines is 0.5-1.5mm.
Preferably, the thickness of the tunneling oxide layer in the step (4) is 1.5-2nm, and a height difference is formed between the silicon wafer substrate and the tunneling oxide layer between the metal gate lines, wherein the height difference is 0.1-5um.
Preferably, the thickness of the poly silicon layer in the step (4) is 100-200nm.
Preferably, the doping concentration in the step (5) is 8e19cm3-1e21cm3.
Preferably, the annealing mode in the step (5) is that the N is dried by a tubular annealing furnace 2 And (3) carrying out thermal annealing treatment in the environment to recrystallize and convert the amorphous silicon into polysilicon, and activating the phosphorus part into an ionic state.
Preferably, the chemical cleaning in the step (6) is performed by using hydrofluoric acid.
The invention provides a preparation method of a Topcon battery with a back line type poly structure, which has the advantages compared with the prior art that:
the novel Topcon battery with the linear poly structure on the back surface controls the sizes of pyramid bases in different areas through chemical polishing treatment, and a smaller-size pyramid base is arranged on a chemical polishing surface below a tunneling layer so as to increase contact; the chemically polished surface of the substrate between poly fingers is larger in size to reduce surface roughness and improve passivation.
Description of the drawings:
fig. 1 is a schematic diagram of a cross-sectional side view of a Topcon battery according to an embodiment of the present invention;
FIG. 2 is an electron microscope view of a substrate pyramid-based structure between poly fingers on the back side of a Topcon cell in accordance with an embodiment of the present invention;
fig. 3 is a schematic view of the structure of a comparative battery.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions in the embodiments of the present invention will be clearly and completely described in the following in conjunction with the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Examples:
preparation of Topcon cell with backside linear poly structure:
(1) And (3) wool making: n-type monocrystalline silicon wafer with resistivity of 6 omega cm and thickness of 150um is selected as a substrate, double-sided texturing treatment is carried out, organic contamination and metal impurities on the surface of the silicon wafer are eliminated by using acid-base chemicals, and a pyramid-based structure is formed on the surface of the monocrystalline silicon wafer, and the specific structure is shown in the following table 1:
TABLE 1
(2) Boron diffusion doping: performing boron diffusion on the front surface of the N-type monocrystalline silicon wafer by using a low-pressure high-temperature diffusion furnace, wherein the diffusion temperature is 900 ℃, the diffusion time is 30 minutes, the square resistance of a P+ doped layer after diffusion is 140 Ω/≡s, the junction depth is 0.2 μm, and the thickness of a BSG layer is 140nm;
(3) Washing the BSG by back acid, removing PN junctions formed by parasitic diffusion on the back, etching metal grid lines, wherein the width of each metal grid line is 100nm, the distance between each metal grid line is 1mm, controlling the size of a substrate polished surface pyramid base at the metal grid line to be 8-12 um by chemical polishing, and controlling the size of the substrate polished surface pyramid base between the metal grid lines to be 12-25um;
(4) Plating a linear tunneling oxide layer with the thickness of 1.5-2nm on a metal grid line on the back surface of the silicon wafer, and growing a POLY silicon layer with the thickness of 150nm after a height difference between a silicon wafer substrate and the tunneling oxide layer is 3 um;
(5) Performing phosphorus doping treatment on the POLY silicon layer, wherein the doping concentration is 1e21cm < 3 >, and performing thermal annealing treatment in a dry N2 environment through a tubular annealing furnace to recrystallize and convert amorphous silicon into polysilicon, and meanwhile, partially activating phosphorus into an ionic state to form a highly doped POLY silicon layer;
(6) Adopting hydrofluoric acid to chemically clean the front and back surfaces to remove BSG and PSG on the front and back surfaces, and simultaneously removing poly silicon on the front surface;
(7) The front surface utilizes ALD to deposit an Al2O3 film;
(8) The front surface is deposited with SixNy or SiONy film by PECVD;
(9) Depositing SixNy or SiONy films on the back surface by PECVD;
(10) And (5) performing Ag electrode printing on the front side and the back side to obtain the Topcon battery.
Comparative example:
preparation of a conventional Topcon battery:
steps (1) - (2) are consistent with the steps of example 1;
(3) Washing the back surface with acid to remove BSG, and then performing alkaline washing and polishing on the back surface to enable the size of the pyramid base of the polished surface to be 8-12 um;
(4) Forming a SiO layer with the thickness of 1.5-2nm at the high temperature on the front side and the back side, and then regrowing a poly silicon layer with the thickness of 100nm;
(5) Performing phosphorus doping treatment on the POLY silicon layer, wherein the doping concentration is 1e21cm < 3 >, and performing thermal annealing treatment in a dry N2 environment through a tubular annealing furnace to recrystallize and convert amorphous silicon into polysilicon, and meanwhile, partially activating phosphorus into an ionic state to form a highly doped POLY silicon layer, so that the sheet resistance of the back surface of the N-type silicon wafer is 40 omega;
(6) Removing BSG and PSG on the front and back surfaces by acid and alkali washing on the front and back surfaces, and simultaneously removing poly silicon on the front surface;
(7) The front surface utilizes ALD to deposit an Al2O3 film;
(8) The front surface is deposited with SixNy or SiONy film by PECVD;
(9) Depositing SixNy or SiONy films on the back surface by PECVD;
(10) And (5) performing Ag electrode printing on the front side and the back side to obtain the Topcon battery.
And (3) detection:
the batteries prepared in the above examples and comparative examples were subjected to performance tests, as shown in table 2 below:
TABLE 2
The embodiment adopts a novel Topcon battery with a linear back side and a poly structure, the size of pyramid bases in different areas is controlled by the length of chemical polishing time, and the size of a chemical polished surface below a tunneling layer is smaller so as to increase contact; the chemical polished surface of the substrate between poly fingers has larger size so as to reduce the surface roughness, improve passivation and improve the performance of the whole battery.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims (9)
1. A method for preparing a Topcon battery with a back side linear poly structure, which is characterized by comprising the following steps:
(1) And (3) wool making: selecting an N-type monocrystalline silicon wafer as a matrix, performing double-sided texturing treatment, and eliminating organic contamination and metal impurities on the surface of the silicon wafer by using acid-base chemicals to form a pyramid-based structure on the surface of the monocrystalline silicon wafer;
(2) Boron diffusion doping: doping a P+ layer on the front surface of the silicon wafer;
(3) Washing the BSG by back acid, removing PN junction formed by parasitic diffusion on the back, etching metal grid lines, controlling the size of a pyramid base of a substrate polishing surface at the metal grid lines to be 8-12 um by chemical polishing, and controlling the size of the pyramid base of the substrate polishing surface between the metal grid lines to be 12-25um;
(4) Plating a linear tunneling oxide layer on a metal grid line on the back surface of the silicon wafer, and then regrowing a POLY silicon layer;
(5) Performing phosphorus doping treatment and annealing crystallization on the POLY silicon layer to form a highly doped POLY silicon layer;
(6) Removing BSG and PSG on the front and back surfaces by chemical cleaning, and simultaneously removing poly silicon on the front surface;
(7) Front surface deposition of Al using ALD 2 O 3 A film;
(8) Deposition of Si on front surface by PECVD x N y Or SiON y A film;
(9) Depositing SixNy or SiONy films on the back surface by PECVD;
(10) And (5) electrode printing is carried out on the front side and the back side, and the Topcon battery is manufactured.
2. The method for preparing a Topcon battery with a back side linear poly structure according to claim 1, wherein the method comprises the steps of: the monocrystalline silicon piece in the step (1) is a phosphorus doped N-type monocrystalline silicon piece, the resistivity is 0.1-10 omega cm, and the thickness is 100-200um.
3. The method for preparing a Topcon battery with a back side linear poly structure according to claim 1, wherein the method comprises the steps of: the specific mode in the step (2) is that a low-pressure high-temperature diffusion furnace is used for carrying out boron diffusion on the front surface of the N-type monocrystalline silicon wafer, the diffusion temperature is 800-1100 ℃, the diffusion time is 10-50 minutes, the square resistance of the P+ doped layer after diffusion is 100-180Ω/≡, the junction depth is 0.1-0.4 mu m, and the thickness of the BSG layer is 110-160nm.
4. The method for preparing a Topcon battery with a back side linear poly structure according to claim 1, wherein the method comprises the steps of: the width of the metal grid lines in the step (3) is 50-150nm, and the distance between the metal grid lines is 0.5-1.5mm.
5. The method for preparing a Topcon battery with a back side linear poly structure according to claim 1, wherein the method comprises the steps of: the thickness of the tunneling oxide layer in the step (4) is 1.5-2nm, and the height difference between the silicon wafer substrate and the tunneling oxide layer between the metal grid lines is 0.1-5um.
6. The method for preparing a Topcon battery with a back side linear poly structure according to claim 1, wherein the method comprises the steps of: the thickness of the poly silicon layer in the step (4) is 100-200nm.
7. The method for preparing a Topcon battery with a back side linear poly structure according to claim 1, wherein the method comprises the steps of: the doping concentration in the step (5) is 8e19cm3-1e21cm3.
8. The method for preparing a Topcon battery with a back side linear poly structure according to claim 1, wherein the method comprises the steps of: the annealing mode in the step (5) is that the N is dried by a tubular annealing furnace 2 And (3) carrying out thermal annealing treatment in the environment to recrystallize and convert the amorphous silicon into polysilicon, and activating the phosphorus part into an ionic state.
9. The method for preparing a Topcon battery with a back side linear poly structure according to claim 1, wherein the method comprises the steps of: the chemical cleaning mode in the step (6) is to adopt hydrofluoric acid for cleaning.
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