CN116743709A

CN116743709A - Address allocation method and communication equipment

Info

Publication number: CN116743709A
Application number: CN202310496559.7A
Authority: CN
Inventors: 王龙奇
Original assignee: Hangzhou Silergy Semiconductor Technology Ltd
Current assignee: Hangzhou Silergy Semiconductor Technology Ltd
Priority date: 2023-04-27
Filing date: 2023-04-27
Publication date: 2023-09-12

Abstract

The invention discloses a communication device and an address allocation method, which are characterized in that one end of a switch clamping circuit connected in series between a communication input end and a communication output end of a slave is detected, and a first voltage and a second voltage are respectively generated when the switch circuit is in a conducting state and a disconnecting state; and comparing the second voltage and the first voltage with the magnitude relation of the sum of voltages across the clamp circuit connected across the switch circuit in parallel when the switch circuit is turned off to determine whether the slave is a target slave, address information in the address allocation command being allocated to the slave when determined as the target slave, and the slave being marked as addressed. And even if the preceding slave fails to be addressed, it will not affect all slaves in the latter position to receive commands from the master.

Description

Address allocation method and communication equipment

Technical Field

The present invention relates to the field of communications technologies, and in particular, to an address allocation method and a communications device.

Background

One type of communication network that is being increasingly used in vehicles is LIN (for local internet). The LIN includes a master and several slaves, wherein the master controls the LIN during communication.

Fig. 1 is a block diagram of a conventional LIN network-based communication device. When the address of the Slave is set, the Master firstly sends a diagnosis frame to inform all Slave to detect the position of the Slave node, i.e., SNPD (Slave Node Position Detection), all slaves Slave receive the diagnostic frame, turn off their internal switches, so only the Slave1 closest to the Master can receive the command at this point, the Master can assign address information to Slave1, then the Slave machine Slave1 closes an internal switch thereof; then the Master gives the Slave immediately adjacent to the Master Slave2 of 1 allocates address information, after Slave2 is assigned address information, slave2 closes its internal switch; the Master can then assign address information to the Slave3 next to Slave2, after Slave3 is assigned address information, slave3 closes its internal switch; and so on until all slave address settings are complete. The disadvantage of this approach is that when the switch of any slave in the front position fails, all slaves in the rear position no longer receive any signal from the Master.

Disclosure of Invention

In view of the above, the present invention provides a new address allocation method and a communication device to solve the problems in the prior art.

In a first aspect, the present invention provides an address allocation method for allocating addresses to a plurality of slaves connected in series on a bus, wherein each slave comprises a switch clamp, the method comprising:

and judging whether the corresponding slave is the unaddressed target slave closest to the master according to the difference value of the voltage at one end of the switch clamping circuit when the switch clamping circuit is in a first state and a second state, wherein the voltage at two ends of the switch clamping circuit is close to the first state, and the voltage at two ends of the switch clamping circuit is different in the second state.

Preferably, the switch clamping circuit comprises a switch circuit coupled to a communication input terminal and a communication output terminal of the slave, and a clamping circuit connected in parallel with the switch circuit, wherein the switch circuit is turned on in the first state; the switching circuit is turned off in the second state.

Preferably, the clamp circuit has at least a path that is conductive from a subsequent slave to a previous slave or master, and the difference in voltage across the switch clamp circuit is made a fixed value when the switch clamp circuit is in the second state.

Preferably, in response to an address allocation command, detecting a voltage at the same end of the switch clamp circuit to obtain a first voltage and a second voltage when the switch clamp circuit is in the first state and the second state, respectively; determining whether the slave is a target slave according to the difference between the second voltage and the first voltage and the magnitude relation of the first threshold, and when the slave is determined to be the target slave, the address information in the address allocation command is allocated to the slave, and the slave is marked as addressed.

Preferably, the master also issues an auto-address command, and all slaves respond to the auto-address command to enable the switch clamp to be in the first state.

Preferably, the switch clamp circuit does not block signal transfer to an immediately adjacent slave when in both the first state and the second state.

Preferably, the addressed slave is configured to have the switch clamp circuit within it always in the first state.

Preferably, the level of the address allocation command has a first level state and a second level state, and the first voltage and the second voltage are detected and obtained when the level of the address allocation command is the first level state.

Preferably, when the second voltage is less than the sum of the first voltage and a first threshold value, the slave is determined to be the target slave.

Preferably, when the switch clamping circuit is in the first state and the second state, the voltage of one end of the switch clamping circuit, which is close to the communication input end, is detected to obtain the first voltage and the second voltage.

Preferably, the first threshold is a voltage across the switch clamp when the switch clamp is in the second state.

Preferably, when the switch clamping circuit is in the first state and the second state, the voltage of one end of the switch clamping circuit, which is close to the communication output end, is detected to obtain the first voltage and the second voltage.

Preferably, the first threshold is twice the voltage across the switch clamp when the switch clamp is in the second state.

Preferably, the clamping circuit includes a first diode, a cathode of the first diode is coupled to the communication input terminal of the slave, and an anode of the first diode is coupled to the communication output terminal of the slave.

Preferably, the clamping circuit further comprises a second diode connected in parallel to both ends of the first diode, and the connection direction is opposite to the first diode.

Preferably, the clamping circuit comprises a first transistor, two power terminals of the first transistor are respectively connected to two ends of the switching circuit, and a control terminal of the first transistor is connected with one power terminal.

Preferably, the clamp circuit further includes a second transistor connected in parallel to both ends of the first transistor, and connected in a direction opposite to the first transistor.

In a second aspect, the present invention provides a communication device, including a master and at least one slave coupled in series with each other, where the communication device adopts the address allocation method described above.

The invention aims to provide an address allocation method, which is characterized in that one end of a switch clamping circuit connected in series between a communication input end and a communication output end of a slave is detected, and a first voltage and a second voltage are respectively generated when the switch circuit is in a conducting state and a disconnecting state; and comparing the second voltage and the first voltage with the magnitude relation of the sum of voltages across the clamp circuit connected across the switch circuit in parallel when the switch circuit is turned off to determine whether the slave is a target slave, address information in the address allocation command being allocated to the slave when determined as the target slave, and the slave being marked as addressed. And even if the preceding slave fails to be addressed, it will not affect all slaves in the latter position to receive commands from the master.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present invention, and that other drawings can be obtained according to the provided drawings without inventive effort for a person skilled in the art.

Fig. 1 is a block diagram of a conventional LIN network-based communication device;

fig. 2 is a block diagram of a communication device according to a first embodiment of the present invention;

fig. 3 is a first operation procedure of address assignment of a communication device according to a first embodiment of the present invention;

fig. 4 is a schematic diagram of a data format of a LIN standard protocol adopted by a communication device according to a first embodiment of the present invention;

fig. 5 is a second operation procedure of address assignment of the communication device according to the first embodiment of the present invention;

fig. 6 is a block diagram of a communication device according to a second embodiment of the present invention;

FIG. 7 is a schematic diagram of a clamp circuit according to the present invention.

Detailed Description

The present invention is described below based on examples, but the present invention is not limited to only these examples. In the following detailed description of the present invention, certain specific details are set forth in detail. The present invention will be fully understood by those skilled in the art without the details described herein. Well-known methods, procedures, flows, components and circuits have not been described in detail so as not to obscure the nature of the invention.

Moreover, those of ordinary skill in the art will appreciate that the drawings are provided herein for illustrative purposes and that the drawings are not necessarily drawn to scale.

Meanwhile, it should be understood that in the following description, "circuit" refers to a conductive loop constituted by at least one element or sub-circuit through electrical connection or electromagnetic connection. When an element or circuit is referred to as being "connected to" another element or being "connected between" two nodes, it can be directly coupled or connected to the other element or intervening elements may be present and the connection between the elements may be physical, logical, or a combination thereof. In contrast, when an element is referred to as being "directly coupled to" or "directly connected to" another element, it means that there are no intervening elements present between the two.

Unless the context clearly requires otherwise, throughout the description and the claims, the words "comprise", "comprising", and the like are to be construed in an inclusive sense as opposed to an exclusive or exhaustive sense; that is, it is the meaning of "including but not limited to".

In the description of the present invention, it should be understood that the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. Furthermore, in the description of the present invention, unless otherwise indicated, the meaning of "a plurality" is two or more.

Fig. 2 is a block diagram of a communication device according to a first embodiment of the present invention. In fig. 2, the communication device includes a Master and a plurality of Slave computers Slave1 to Slave n, where n is greater than or equal to 2, and the Master mate and the plurality of Slave computers Slave1 to Slave n are connected in series. Specifically, each Slave comprises at least a communication input end SDI and a communication output end SDO, and the communication input end SDI of the first Slave1 is coupled with the output port MDO of the Master; the communication input ends SDI of the 2 nd Slave machine Slave2 to the n nd Slave machine Slave are respectively connected with the communication output end SDO of the last Slave machine Slave. In this embodiment, the SDO of the last slave is not connected to the input port of the Master, so long as unidirectional data transmission can be achieved, and annular serial communication is not required. In another embodiment, the communication output SDO of the last slave is connected to the input port (not shown in fig. 2) of the Master to form a ring serial communication, which the present invention is not limited to. Each Slave also comprises other communication processing units, and the communication processing units are used for forwarding communication data packets or commands received by the chip or forwarding the communication data packets or commands after execution.

Since the plurality of Slave1 to Slave n are the same type of device, it is challenging for the Master to identify each Slave. Thus, each Slave needs to receive unique address information so that each Slave can be addressed. The communication device of the present embodiment adopts an address allocation method for allocating addresses to a plurality of Slave computers Slave connected in series on a bus and connected to a Master, each Slave computer Slave including a switch clamp circuit including a switch circuit 21 and a clamp circuit 22 connected in parallel, the switch circuit 21 being turned on when the switch clamp circuit is in a first state; when the switch clamp is in the second state, the switch circuit 21 is turned off. When the switch clamping circuit is in the first state and the second state, the signal transmission to the slave machine in the close vicinity is not blocked. The switch circuit 21 is turned on and then used to short the communication input terminal SDI and the communication output terminal SDO of the slave. The address allocation method comprises the following steps:

when the Master sends out an automatic addressing command, all Slave computers respond to the automatic addressing command to turn on the internal switching circuit 21 so that the switching clamp circuit is in a first state to enter a state to be addressed; when the Slave is in the state to be addressed, the Master sends out an address allocation command, and the Slave responds to the address allocation command to detect the voltage at one end of the switch clamping circuit so as to obtain a first voltage V _OFF1 The method comprises the steps of carrying out a first treatment on the surface of the Then turning off the switch circuits 21 of all Slave circuits not addressed so that the switch clamp circuits are in the second state, and detecting the voltage at the same end of the switch clamp circuits to obtain the second voltage V _OFF2 . Comparing the second voltage V _OFF2 First voltage V _OFF1 And a first threshold V _H To determine whether the slave is the target slave, in particular, when the second voltage V _OFF2 Less than the first voltage V _OFF1 And a first threshold V _H And (3) determining the Slave as a target Slave. When being determined as the target Slave, the address information in the address allocation command is allocated to the Slave, and the Slave is marked as addressed. The Slave that has been addressed is configured to turn on its internal switching circuit 21 in the next auto-addressing phase and the switching circuit 21 remains on all the time thereafter without any response, so that the switching clamp remains in the first state all the time. And then, address allocation of the Slave computers Slave in close proximity is carried out until all Slave computers Slave are addressed.

Specifically, the switch circuit 21 is connected between the communication input end SDI and the communication output end SDO of the Slave, and the switch circuit 21 is turned on to short the communication input end SDI and the communication output end SDO of the Slave. In a preferred embodiment, the switching circuit 21 comprises a switch S which is turned on in response to an automatic addressing command, turned off after a predetermined period of time in response to an address allocation command, and remains on all the time after the Slave is marked as addressed, and does not respond any more. It is to be understood that in the present invention, it is not limited to what type of electrically controlled switching device the switch S is, for example, a metal oxide field effect transistor (MOSFET), a bipolar transistor (BJT), and an insulated gate transistor (IGBT) may be used as the switch S of the present embodiment.

Further, the clamping circuit 22 is connected in parallel to two ends of the switch circuit 21, so as to generate a voltage difference between the two ends of the switch circuit 21 after the switch circuit 21 is turned off, and determine whether the current Slave is the target Slave. In a preferred embodiment, the clamping circuit 22 includes a first diode D1 and a second diode D2, wherein the cathode of the first diode D1 is coupled to the communication input SDI of the Slave, and the anode of the first diode D1 is coupled to the communication output SDO of the Slave; the second diode D2 is connected to two ends of the first diode D1 in parallel, and the connection direction is opposite to that of the first diode D1, that is, the anode of the second diode D2 is coupled to the communication input terminal SDI of the Slave, and the cathode of the second diode D2 is coupled to the communication output terminal SDO of the Slave. When the structure of the clamping circuit 22 according to the embodiment of the present invention is adopted, the voltage difference across the clamping circuit 22 does not exceed the voltage of one diode, so that the switch S can be a low-voltage tube. It should be understood that, in the present invention, the specific structure of the clamp circuit 22 is not limited, as long as it can generate a voltage difference across the switch circuit 21 after the switch circuit 21 is turned off, and determine whether the Slave is the non-addressed Slave closest to the Master according to the voltage difference, and can not block the signal from being transmitted to the immediately adjacent Slave when the switch clamp circuit is in the first state or the second state.

Further, each Slave unit Slave also includes a pull-up circuit and a pull-down circuit for determining the level of the high and low potential.

Fig. 3 is a first operation procedure of address allocation of a communication device according to a first embodiment of the present invention. Wherein 3a-3c are schematic diagrams of states of the communication device at different stages in the address allocation process. Fig. 4 is a schematic diagram of a data format of a LIN standard protocol adopted by the communication device according to the first embodiment of the present invention.

When the communication device starts address allocation, the Master firstly sends out a first command, namely an automatic addressing command, and all Slave computers respond to the automatic addressing command to turn on the internal switch circuits 21 so as to enter a state to be addressed.

When the Slave is in the to-be-addressed state, the Master issues a second command, i.e., an address allocation command, and, referring to fig. 4, in the data format of the LIN standard protocol, has a low-level state for a long period of time, called a break phase, in which, the pull-down switch in the pull-down circuit is in a conducting state, wherein the pull-down switch refers to a switch connected in series between an input end or an output end and the ground in the Master and Slave.

Preferably, in the t1-t2 interval of the break phase, all Slave computers respond to the address allocation command to detect the voltage at one end of the switch clamp circuit to obtain the first voltage V _OFF1 . In this embodiment, when the switch circuit 21 is turned on, the voltage of one end of the switch clamp circuit close to the slave salve communication input terminal SD1 is detected to obtain the first voltage V _OFF1 As shown in fig. 3 a;

in the period t2-t3 of break phase, the switch circuits 21 of all Slave units are turned off for a period of time sufficient to ensure that all the switch circuits 21 of all Slave units Slave unit Slave units are turned off, which should be noted, this working interval is not necessary, and the invention is not limited thereto, and is only to solve the difference in the off-time of the switching circuits 21 due to the Slave computers Slave, so as to prevent the second voltage V from being detected _OFF2 In this case, there is a switching circuit of the SlaveThe fact that 21 is not turned off causes a problem of inaccurate detection. It should be understood that in an ideal situation, if all Slave units can be turned off at the same time in a shorter time, the working interval may not be set, as shown in fig. 3 b;

in the interval t3-t4 of the break phase, all Slave devices, when the switching circuit 21 is turned off, detecting a voltage of the switch circuit 21 near one end of the Slave salve communication input terminal SDI to obtain a second voltage V _OFF2 As shown in 3 c; thereafter comparing the second voltage V _OFF2 First voltage V _OFF1 And a first threshold V _H And a size relationship of the sum to determine whether the slave is the target slave for the time. Specifically, when the second voltage V _OFF2 Less than the first voltage V _OFF1 And a first threshold V _H And (3) determining the Slave as a target Slave. Here, the first threshold V _H The voltage across the clamp 22 when the switch circuit 21 is open, i.e. the voltage across the switch circuit 21, is denoted here as VD. When being determined as the target Slave, the address information in the address allocation command is allocated to the Slave, and the Slave is marked as addressed. The Slave that has been addressed is configured to turn on its internal switching circuit 21 in the next auto-addressing phase, and the switching circuit 21 remains on all the time after that, and does not respond any more. And then, address allocation of the Slave computers Slave in close proximity is carried out until all Slave computers Slave are addressed.

Since the communication devices are addressed sequentially when performing address assignment, in this embodiment, when the address information needs to be allocated to the first Slave1, second voltage V obtained by Slave machine Slave1 detection _OFF2 First voltage V _OFF1 Because the Master and the pull-down switches of all Slave computers are in the on state in the break stage, the second voltage V in the first Slave computer Slave1 _OFF2 First voltage V _OFF1 The detection point of (2) is always in a low level state, so that the second voltage V in the first Slave1 _OFF2 First voltage V _OFF1 Are equal. In the Slave2 to Slave, the first voltage V is detected _OFF1 At the time due toThe switching circuits 21 of the Slave computers Slave are all in an on state, thus, the Slave2 detects the obtained first voltage V _OFF1 With a first voltage V in a first Slave1 _OFF1 The same is true of the fact that, and the Slave2 detects the second voltage V _OFF2 Due to the clamp circuit 22, the second voltage V is equal to the second voltage V in the first Slave1 _OFF2 Different, and sequentially increasing the voltage value VD across the clamp circuit 21 when the switch circuit 21 is open, e.g. a second voltage V in a second Slave2 _OFF2 At a first voltage V _OFF1 +VD, the second voltage V in the third Slave3 _OFF2 At a first voltage V _OFF1 +2vd, and so on. Therefore, only the second voltage V in the first Slave Slave1 _OFF2 Less than the first voltage V _OFF1 Sum of the voltage value VD across the clamp circuit 21, the second voltage V from Slave Slave2 to Slave Slave n _OFF2 Are not smaller than the first voltage V _OFF1 And the sum of the voltage values VD across the clamp circuit 21, the first Slave1 is selected.

Next, when address information needs to be allocated to the second Slave2, the Slave is still in the state to be addressed, the Master issues an address allocation command, at this time, the switch circuit 21 in the first Slave1 always keeps on, and only the second voltage V in the second Slave2 is the same _OFF2 Less than the first voltage V _OFF1 And the sum of the voltage value VD across the clamping circuit 21, the second voltage V from Slave Slave3 to Slave Slave n _OFF2 Are not smaller than the first voltage V _OFF1 And the sum of the voltage values VD across the clamp circuit 21, the second Slave2 is selected. And then, address allocation of the next Slave3 is performed until all Slave is addressed.

Further, the data formats of the address assignment command and the auto-addressing command of the present invention are the same. The level of the address allocation command has a first level state and a second level state, and when the level of the address allocation command is the first level state, the first voltage V is detected and obtained _OFF1 Second voltage V _OFF2 . Here, the first levelThe state is a low state and the second state is a high state.

It should be further noted that the present invention does not limit that the Slave devices receive the second voltage V in the break stage _OFF2 First voltage _VOFF1 As long as it is in a low state of the address assignment command. In this embodiment, the Slave devices Slave all detect and obtain the second voltage V in break stage _OFF2 First voltage _VOFF1 Only because the address allocation command is always in a low level state in the break stage, the detection time is convenient to control. In other embodiments, the second voltage V may be detected at other low state moments of the address allocation command _OFF2 First voltage _VOFF1 And detect the second voltage V _OFF2 First voltage _VOFF1 Is not limited in the order of the sequence. For example, the second voltage V may be obtained by first detecting _OFF2 Detecting again to obtain a first voltage _VOFF1 The switching clamp circuit may be in a state suitable for the switching clamp circuit.

Thus, the address allocation method adopted by the communication equipment of the invention detects the first voltage and the second voltage respectively in the first state and the second state at one end of the switch clamping circuit connected in series between the communication input end and the communication output end of the slave; and comparing the second voltage and the first voltage with the magnitude relationship of the sum of voltages across the clamp circuit connected across the switch circuit in parallel in the second state to determine whether the slave is a target slave, address information in the address allocation command being allocated to the slave when determined to be a target slave, and the slave being marked as addressed. The present invention aims to provide a new address allocation method.

Fig. 5 is a second operation procedure of address allocation of the communication device according to the first embodiment of the present invention. It differs from the first embodiment only in that: the communication device detects the voltage at one end of the switch clamp circuit near the slave salve communication output end SDO to obtain the first voltage when the switch circuit 21 is in the on and off states, i.e. the switch clamp circuit is in the first state and the second state, respectivelyVoltage V _OFF1 Second voltage V _OFF2 The method comprises the steps of carrying out a first treatment on the surface of the When the second voltage V _OFF2 Less than the first voltage V _OFF1 And a first threshold V _H When the sum is over, determining that the Slave is the target Slave, wherein the first threshold value V _H Twice the voltage across the clamp 22 when the switch circuit 21 is open.

Since the communication devices are addressed sequentially when performing address assignment, in this embodiment, when the address information needs to be allocated to the first Slave1, the second voltage V in the first Slave1 due to the existence of the clamp circuit 22 _OFF2 Has the value of the first voltage V _OFF1 And the sum of the voltages VD across the clamp 21. From Slave Slave2 to Slave Slave, the first voltage V _OFF1 With a first voltage V in a first Slave1 _OFF1 The same is true of the fact that, and the Slave2 detects the second voltage V _OFF2 The voltage value VD across the clamping circuit 21 when the switching circuit 21 is turned off, e.g. the second voltage V in the second Slave2 _OFF2 At a first voltage V _OFF1 +2VD, the second voltage V in the third Slave3 _OFF2 At a first voltage V _OFF1 +3vd, and so on. Therefore, only the second voltage V in the first Slave Slave1 _OFF2 Less than the first voltage V _OFF1 And the sum of the voltage value VD across the two clamp circuits 21, the second voltage V from Slave Slave2 to Slave Slave n _OFF2 Are not smaller than the first voltage V _OFF1 And twice the voltage value VD across the clamp 21, the first Slave1 is selected.

Next, when it is necessary to assign address information to the second Slave2, the Master issues an address assignment command, at this time, the switch circuit 21 in the first Slave1 always keeps on, and only the second voltage V in the second Slave2 is the same _OFF2 Less than the first voltage V _OFF1 And the sum of the voltage value VD across the two clamp circuits 21, the second voltage V from Slave Slave3 to Slave Slave n _OFF2 Are not smaller than the first voltage V _OFF1 And twice the sum of the voltage value VD across the clamp 21, thus the second slaveSlave2 is selected. And then, address allocation of the next Slave3 is performed until all Slave is addressed.

Fig. 6 is a block diagram of a communication device according to a second embodiment of the present invention. It differs from the first embodiment only in that: the specific implementation of clamp 32 differs from clamp 22. In the present embodiment, the clamping circuit 32 includes only the first diode D1, the cathode of the first diode D1 is coupled to the communication input terminal SDI of the Slave, and the anode of the first diode D1 is coupled to the communication output terminal SDO of the Slave. The clamp circuit 32 has only one diode and thus has only one-way clamping effect, so that the switch circuit 31 needs to use a high-voltage switching tube.

It should be noted that, although the clamp circuit 32 includes only the first diode D1 in the present embodiment, the function of the clamp circuit is not affected, and the clamp circuit 32 may also generate a voltage difference between the two ends of the switch circuit 31 after the switch circuit 31 is turned off, so as to determine whether the Slave is the current target Slave or not by using the voltage difference; further, such a connection direction of the first diode D1 does not affect all slaves in the latter position to receive commands from the Master even if the preceding Slave is not addressed. Taking the example of the failure of the switching circuit 31 of the first Slave1, which results in the switch S not being turned on in the normal communication phase, when the command issued by the Master is in the high level state, the first diode D1 is in a cut-off state, and the level state of the communication output end SDO of the Slave1 is determined by an internal pull-up circuit, so that the Slave is in a high level state; when the command sent by the Master is in a low level state, the first diode D1 is in a conducting state, and the level state of the communication output terminal SDO of the Slave1 is determined by the command sent by the Master, so that the state is in a low level state. Therefore, even if a Slave fails to be addressed, the normal operation of the communication circuit is not affected.

Thus, the address allocation method adopted by the communication equipment of the invention detects the first voltage and the second voltage respectively when the switch circuit is in the on and off states by detecting one end of the switch clamping circuit which is connected in series between the communication input end and the communication output end of the slave; and comparing the second voltage and the first voltage with the magnitude relation of the sum of voltages across the clamp circuit connected across the switch circuit in parallel when the switch circuit is turned off to determine whether the slave is a target slave, address information in the address allocation command being allocated to the slave when determined as the target slave, and the slave being marked as addressed. And even if the preceding slave fails to be addressed, it will not affect all slaves in the latter position to receive commands from the master.

FIG. 7 is a schematic diagram of another embodiment of the clamping circuit of the present invention. As shown in fig. 7, the clamp circuit is not limited to the diode implementation, and may be implemented by a controllable device such as a transistor. Referring to fig. 7b and 7d, the clamp circuit may include only a first transistor having two power terminals connected to both ends of the switching circuit, respectively, and a control terminal of the first transistor connected to one power terminal. In fig. 7b, the first transistor is a power field effect transistor (MOSFET), the source of the first transistor is connected to the end of the switch circuit close to the Slave communication input SDI, the drain is connected to the end of the switch circuit close to the Slave communication output SDO, and the gate and the drain are shorted. In fig. 7d, the first transistor is an Insulated Gate Bipolar Transistor (IGBT), and the emitter of the first transistor is connected to the end of the switch circuit close to the Slave communication input SDI, and the collector is connected to the end of the switch circuit close to the Slave communication output SDO, and the gate and the collector are shorted.

In addition, referring to fig. 7a and 7c, the clamp circuit may further include a first transistor connected in the same manner as the first transistor in fig. 7b and 7d, and a second transistor connected in parallel with the first transistor and in an opposite direction to the first transistor. It should be understood that although only N-type transistors are shown in fig. 7, the present invention is not limited to the type of transistors, and P-type transistors are also within the scope of the present invention.

The above description is only of the preferred embodiments of the present invention and is not intended to limit the present invention, and various modifications and variations may be made to the present invention by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. An address allocation method for allocating addresses to a plurality of slaves connected in series on a bus, each slave comprising a switch clamp, the method comprising:

2. The address assignment method as claimed in claim 1, wherein the switch clamp circuit comprises a switch circuit coupled to a communication input and a communication output of the slave, and a clamp circuit connected in parallel with the switch circuit, wherein the switch circuit is turned on in the first state; the switching circuit is turned off in the second state.

3. The address allocation method according to claim 1, wherein the clamp circuit has at least a path that is conductive from a subsequent slave to a previous slave or master, and the difference in voltage across the switch clamp circuit is made a fixed value when the switch clamp circuit is in the second state.

4. The address allocation method according to claim 1, wherein in response to an address allocation command, detecting a voltage at a same end of the switch clamp circuit to obtain a first voltage and a second voltage when the switch clamp circuit is in the first state and the second state, respectively; determining whether the slave is a target slave according to the difference between the second voltage and the first voltage and the magnitude relation of the first threshold, and when the slave is determined to be the target slave, the address information in the address allocation command is allocated to the slave, and the slave is marked as addressed.

5. The method of claim 4, further comprising the master issuing an auto-address command, all of the slaves causing the switch clamp to be in the first state in response to the auto-address command.

6. The address allocation method of claim 1, wherein the switch clamp circuit does not block signal transfer to an immediately adjacent slave when in both the first state and the second state.

7. The address allocation method of claim 4, wherein the addressed slave is configured to have the switch clamp circuit within it always in the first state.

8. The method according to claim 4, wherein the level of the address assignment command has a first level state and a second level state, and the first voltage and the second voltage are detected and obtained when the level of the address assignment command is the first level state.

9. The address allocation method according to claim 4, wherein the slave is determined to be the target slave when the second voltage is smaller than a sum of the first voltage and a first threshold.

10. The address allocation method according to claim 4, wherein the voltage of the end of the switch clamp close to the communication input terminal is detected when the switch clamp is in the first state and the second state, respectively, to obtain the first voltage and the second voltage.

11. The address assignment method as claimed in claim 10, wherein the first threshold is a voltage across the switch clamp when the switch clamp is in the second state.

12. The method of claim 4, wherein the voltage at the end of the switch clamp near the communication output terminal is detected when the switch clamp is in the first state and the second state, respectively, to obtain the first voltage and the second voltage.

13. The address assignment method as claimed in claim 12, wherein the first threshold is twice a voltage across the switch clamp when the switch clamp is in the second state.

14. The address assignment method as claimed in claim 2, wherein the clamp circuit comprises a first diode, a cathode of the first diode being coupled to the communication input terminal of the slave, and an anode of the first diode being coupled to the communication output terminal of the slave.

15. The address allocation method according to claim 14, wherein the clamp circuit further comprises a second diode connected in parallel to both ends of the first diode in a direction opposite to the first diode.

16. The address allocation method according to claim 2, wherein the clamp circuit comprises a first transistor, two power terminals of the first transistor are respectively connected to two terminals of the switch circuit, and a control terminal of the first transistor is connected to one power terminal.

17. The address allocation method according to claim 16, wherein the clamp circuit further comprises a second transistor connected in parallel to both ends of the first transistor and in a direction opposite to the first transistor.

18. A communication device comprising a master and at least one slave coupled in series with each other, characterized in that,

the communication apparatus employs the address allocation method of any one of claims 1 to 17.