CN116719669B

CN116719669B - Super capacitor calibration method, alarm method and device and disk array card

Info

Publication number: CN116719669B
Application number: CN202310995818.0A
Authority: CN
Inventors: 刘德; 王刚; 王见; 刘涛; 钟戟; 李瑞东
Original assignee: Suzhou Inspur Intelligent Technology Co Ltd
Current assignee: Suzhou Inspur Intelligent Technology Co Ltd
Priority date: 2023-08-09
Filing date: 2023-08-09
Publication date: 2023-11-03
Anticipated expiration: 2043-08-09
Also published as: CN116719669A

Abstract

The invention relates to the technical field of data storage, and discloses a super capacitor calibration method, an alarm device and a disk array card, wherein the method comprises the following steps: in the process of controlling the discharge of the super capacitor, determining the electric quantity or energy released by the super capacitor in the current acquisition period; determining the total electric quantity released by the super capacitor according to the electric quantity released in the current acquisition period, or determining the total energy released by the super capacitor according to the energy released in the current acquisition period; controlling the super capacitor to stop discharging under the condition that the total electric quantity reaches the discharge allowable electric quantity or the total energy reaches the discharge allowable energy; acquiring a first voltage value of the super capacitor at the time of stopping discharging; and determining the current actual capacitance of the super capacitor according to the first voltage value. The calibration method can avoid the problem that one-time power-down protection operation cannot be completed due to excessive discharge of the super capacitor while the calibration of the super capacitor is not affected.

Description

Super capacitor calibration method, alarm method and device and disk array card

Technical Field

The invention relates to the technical field of data storage, in particular to a super capacitor calibration method, an alarm device and a disk array card.

Background

To improve performance, disk array (Redundant Arrays of Independent Disks, RAID) cards typically store received write requests in a cache unit and then flush the data in the write requests down to the persistent medium through a series of optimization algorithms. In this process, in order to cope with the problem of cache data loss caused by power failure, the RAID card is provided with a super capacitor to provide power support for the cache unit after power failure, so that the cache unit can store cache data in a nonvolatile random access storage medium (for example, NAND Flash).

The super-capacitor experiences capacity fade during use, so that the capacitor calibration needs to be performed at intervals. The current super capacitor calibration method comprises the steps that a capacitor management chip controls super capacitor discharge, and the actual capacitor capacity of the super capacitor is determined through the voltage difference and the time difference before and after the discharge. However, in the above process, if the super capacitor discharges too much, the remaining capacity of the super capacitor may not support the operation of the cache unit to store the cache data in the NAND Flash, i.e. the super capacitor may not complete one-time power-down protection operation, so that the cache data is lost, and the reliability of the RAID card is affected.

Disclosure of Invention

In view of the above, the invention provides a method and a device for calibrating a super capacitor, and a disk array card, so as to solve the problem that one-time power-down protection operation cannot be supported due to excessive discharge in the process of calibrating the super capacitor.

In a first aspect, the present invention provides a method for calibrating a supercapacitor, the method comprising: in the process of controlling the discharge of the super capacitor, determining the electric quantity or energy released by the super capacitor in the current acquisition period; determining the total electric quantity released by the super capacitor according to the electric quantity released by the current acquisition period, or determining the total energy released by the super capacitor according to the energy released by the current acquisition period, wherein the total electric quantity is the sum of the electric quantity released by all the acquisition periods, and the total energy is the sum of the energy released by all the acquisition periods; controlling the super capacitor to stop discharging under the condition that the total electric quantity reaches the discharge allowable electric quantity or the total energy reaches the discharge allowable energy; acquiring a first voltage value of the super capacitor at the time of stopping discharging; and determining the current actual capacitance of the super capacitor according to the first voltage value.

According to the method for calibrating the super capacitor, after the super capacitor starts to discharge, the electric quantity (or energy) released by the super capacitor in the current acquisition period is determined, and the total electric quantity (or total energy) released by the super capacitor is determined according to the electric quantity (or energy) released in the current acquisition period, so that the stop of the discharge of the super capacitor can be controlled in time under the condition that the total electric quantity (or total energy) reaches the discharge allowable electric quantity (or discharge allowable energy). And then determining the current actual capacitance capacity of the super capacitor through the first voltage value of the super capacitor at the discharge stopping moment so as to calibrate the actual capacitance capacity of the super capacitor. Through the steps, the method and the device can accurately control the discharge stopping time of the super capacitor in the calibration process of the super capacitor, so that the problem that one-time power-down protection operation cannot be completed due to excessive discharge of the super capacitor is avoided while the calibration of the super capacitor is not influenced, and the integrity and the reliability of the cache data are further ensured.

In some alternative embodiments, before the controlling the supercapacitor to stop discharging, the method further comprises: determining the minimum capacitance required by the super capacitor to finish one-time power-down protection operation; determining the minimum electric quantity or the minimum energy required by the super capacitor to finish one-time power-down protection operation according to the minimum capacitance; and determining the allowable discharge electric quantity according to the minimum electric quantity or determining the allowable discharge energy according to the minimum energy, wherein the allowable discharge electric quantity is the difference between the actual electric quantity and the minimum electric quantity, the allowable discharge energy is the difference between the actual energy and the minimum energy, and the actual electric quantity or the actual energy is determined according to the last actual capacitance of the super capacitor.

According to the method for calibrating the super capacitor, the minimum capacitor capacity required by the super capacitor for completing one-time power-down protection operation is determined, and the discharge allowable electric quantity or the discharge allowable energy of the super capacitor in the discharge process can be accurately determined, so that the processor can more accurately control the discharge stopping time of the super capacitor.

In some alternative embodiments, the determining the minimum capacitance required by the supercapacitor to complete a power-down protection operation includes: according to the constant current load current value, the duration required by the constant current load current value, the working voltage value of the super capacitor and the cut-off working voltage value of the super capacitor, determining the capacity of the lowest capacitor by the following formula:

；

wherein ,for the lowest capacitance capacity, < >>For the constant current load current value, +.>For the duration required for the constant load current value, +.>For the operating voltage value of the super capacitor, < >>And the cut-off working voltage value of the super capacitor.

In this embodiment, the minimum capacitance is determined by a formula, so that the processor can dynamically adjust the minimum capacitance according to the actual situation of the supercapacitor, thereby more accurately determining the minimum electric quantity or the minimum energy required by the supercapacitor to complete the power-down protection operation once, further more accurately determining the allowable discharge electric quantity or allowable discharge energy, and enabling the processor to more accurately control the discharge stopping time of the supercapacitor.

In some alternative embodiments, the determining the minimum capacitance required by the supercapacitor to complete a power-down protection operation includes: and determining the minimum capacitance according to the standard capacitance of the super capacitor and a preset percentage parameter.

In this embodiment, the minimum capacitance is determined according to the standard capacitance and the preset percentage parameter of the supercapacitor, so that the minimum capacitance can be configured in the processor in advance, so that the processor can determine the minimum electric quantity or the minimum energy more quickly, and further determine the allowable discharge electric quantity or the allowable discharge energy more quickly, and the processor can control the supercapacitor to stop discharging more timely.

In some optional embodiments, determining the minimum amount of power required by the supercapacitor to complete a power-down protection operation according to the minimum capacity of the capacitor includes: and obtaining the minimum electric quantity according to the minimum capacitance and the working voltage value of the super capacitor by the following formula:

；

wherein ,for the minimum power, +.>For the lowest capacitance capacity, < >>And the working voltage value of the super capacitor.

In some alternative embodiments, determining the minimum energy required by the supercapacitor to complete a power-down protection operation according to the minimum capacitance capacity includes: and obtaining the minimum energy according to the minimum capacitance, the working voltage value of the super capacitor and the cut-off working voltage value of the super capacitor by the following formula:

；

wherein ,for the lowest energy +.>For the lowest capacitance capacity, < >>For the operating voltage value of the super capacitor, < >>For the cut-off of the super capacitorVoltage value.

In some alternative embodiments, before the determining the amount of power released by the supercapacitor in the current acquisition period, the method further includes: acquiring a current value of a current acquisition time, wherein the time interval between the current acquisition time and the last acquisition time is the current acquisition period; the determining the electric quantity released by the super capacitor in the current acquisition period comprises the following steps: and determining the electric quantity released in the current acquisition period according to the current value of the current acquisition time.

In some alternative embodiments, prior to said determining the energy released by the supercapacitor during the current harvesting cycle, the method further comprises: acquiring a second voltage value of the current acquisition time, wherein the time interval between the current acquisition time and the last acquisition time is the current acquisition period; the determining the energy released by the super capacitor in the current acquisition period comprises the following steps: and determining the energy released in the current acquisition period according to the second voltage value of the current acquisition time.

In some alternative embodiments, before the determining the energy released in the current acquisition period according to the second voltage value at the current acquisition time, the method further comprises: acquiring a current value of the current acquisition time; the determining the energy released in the current acquisition period according to the second voltage value of the current acquisition time comprises the following steps: and determining the energy released in the current acquisition period according to the second voltage value and the current value of the current acquisition time.

In some alternative embodiments, the method further comprises: under the condition that the total electric quantity does not reach the discharge allowable electric quantity, determining the electric quantity released by the super capacitor in the next acquisition period; or if the total energy does not reach the discharge allowable energy, determining the energy released by the super capacitor in the next acquisition period.

In this embodiment, by periodically determining the electric quantity and the energy, the total electric quantity (or total energy) of the supercapacitor can be monitored in real time, and whether the total electric quantity (or total energy) reaches the discharge allowable electric quantity (discharge allowable energy) or not is determined, so that the discharge stopping time of the supercapacitor is accurately controlled.

In some alternative embodiments, the method further comprises: determining a target acquisition period according to a first acquisition period and a second acquisition period, wherein the duration of the current acquisition period is the duration of the target acquisition period, the duration of the first acquisition period is the shortest time interval between two adjacent acquisition moments, the duration of the second acquisition period is the longest time interval between two adjacent acquisition moments, the target acquisition period is a third acquisition period with the largest duration in one or more third acquisition periods with different durations, the duration of the third acquisition period is greater than or equal to the duration of the first acquisition period, the duration of the third acquisition period is less than or equal to the duration of the second acquisition period, and the error between the actual capacitance capacity of the supercapacitor determined according to the third acquisition period and the actual capacitance capacity of the supercapacitor determined according to the first acquisition period is less than a first threshold.

In this embodiment, the duration of the current acquisition period is the duration of the target acquisition period, and when the actual capacitance capacity of the supercapacitor is calibrated each time, the duration of the acquisition period is dynamically adjusted, so that under the condition that the accuracy of the current actual capacitance capacity is ensured, the occupation of processor resources is reduced, the power consumption of the system in the supercapacitor calibration process is further reduced, and the problem that other tasks cannot be responded in time when the system performs supercapacitor calibration is avoided.

In a second aspect, an embodiment of the present application further provides a supercapacitor alarm method, where the method includes: in the process of controlling the discharge of the super capacitor, determining the electric quantity or energy released by the super capacitor in the current acquisition period; determining the total electric quantity released by the super capacitor according to the electric quantity released by the current acquisition period, or determining the total energy released by the super capacitor according to the energy released by the current acquisition period, wherein the total electric quantity is the sum of the electric quantity released by all the acquisition periods, and the total energy is the sum of the energy released by all the acquisition periods; controlling the super capacitor to stop discharging under the condition that the total electric quantity reaches the discharge allowable electric quantity or the total energy reaches the discharge allowable energy; acquiring a first voltage value of the super capacitor at the time of stopping discharging; determining the current actual capacitance of the super capacitor according to the first voltage value; determining the minimum capacitance required by the super capacitor to finish one-time power-down protection operation; and under the condition that the current actual capacitance capacity is smaller than or equal to the minimum capacitance capacity, sending first alarm information to a host.

According to the super capacitor alarm method, the first alarm information is sent to the host computer under the condition that the current actual capacitance is smaller than or equal to the lowest capacitance, so that a user can be reminded of replacing the super capacitor in time, the situation that the super capacitor cannot complete one-time power-down protection operation due to insufficient capacitance is avoided, and the integrity and stability of cached data are guaranteed.

In some alternative embodiments, the method further comprises: and under the condition that the current actual capacitance is larger than the lowest capacitance, controlling the super capacitor to discharge after a preset period of time.

According to the super capacitor alarming method, the current actual capacitance of the super capacitor can be periodically monitored by controlling the super capacitor to discharge after the preset time period under the condition that the current actual capacitance is larger than the minimum capacitance, and a user can be more timely reminded of replacing the super capacitor under the condition that the current actual capacitance of the super capacitor is abnormal.

In some alternative embodiments, the method further comprises: acquiring a current value and/or a second voltage value of a current acquisition time, wherein the time interval between the current acquisition time and a last acquisition time is the current acquisition period; sending second alarm information to the host under the condition that the current value at the current acquisition time is greater than or equal to a preset current value; and/or sending third alarm information to the host under the condition that the second voltage value at the current acquisition time is greater than or equal to a preset voltage value.

According to the super capacitor alarming method, the current value and/or the second voltage value at the current acquisition time are detected, so that the processor can know the current value and/or the second voltage value of the super capacitor in the discharging process in real time, and alarming information is sent to the host when the current value or the second voltage value is abnormal, and the host executes corresponding protection measures (such as interruption) to avoid damage of the super capacitor.

In a third aspect, the present invention provides a supercapacitor calibration device, the device comprising: the first determining module is used for determining the electric quantity or energy released by the super capacitor in the current acquisition period in the process of controlling the discharge of the super capacitor; the second determining module is used for determining the total electric quantity released by the super capacitor according to the electric quantity of the current acquisition period or determining the total energy released by the super capacitor according to the energy of the current acquisition period, wherein the total electric quantity is the sum of the electric quantity released by all the acquisition periods, and the total energy is the sum of the energy released by all the acquisition periods; the control module is used for controlling the super capacitor to stop discharging under the condition that the total electric quantity reaches the discharge allowable electric quantity or the total energy reaches the discharge allowable energy; the acquisition module is used for acquiring a first voltage value of the super capacitor at the time of stopping discharging; and the calibration module is used for determining the current actual capacitance of the super capacitor according to the first voltage value.

In some alternative embodiments, the apparatus further comprises: the third determining module is used for determining the minimum capacitance required by the super capacitor to finish one-time power-down protection operation; the fourth determining module is used for determining the minimum electric quantity or the minimum energy required by the super capacitor to finish one-time power-down protection operation according to the minimum capacitance; and a fifth determining module, configured to determine the allowable discharge electric quantity according to the minimum electric quantity, or determine the allowable discharge energy according to the minimum energy, where the allowable discharge electric quantity is a difference between an actual electric quantity and the minimum electric quantity, and the allowable discharge energy is a difference between an actual energy and the minimum energy, and the actual electric quantity or the actual energy is determined according to a last actual capacitance of the supercapacitor.

In some alternative embodiments, the third determining module includes: the first determining unit is used for determining the capacity of the lowest capacitor according to a constant current load current value, a duration required by the constant current load current value, a working voltage value of the super capacitor and a cut-off working voltage value of the super capacitor through the following formula:

；

In some alternative embodiments, the third determining module includes: and the second determining unit is used for determining the lowest capacitance according to the standard capacitance capacity of the super capacitor and a preset percentage parameter.

In some alternative embodiments, the fourth determination module includes: the third determining unit is configured to obtain the minimum electric quantity according to the minimum capacitance and the working voltage value of the supercapacitor according to the following formula:

；

In some alternative embodiments, the fourth determination module includes: the fourth determining unit is configured to obtain the minimum energy according to the minimum capacitance, the working voltage value of the supercapacitor, and the cut-off working voltage value of the supercapacitor, by using the following formula:

；

wherein ,for the lowest energy +. >For the lowest capacitance capacity, < >>For the operating voltage value of the super capacitor, < >>And the cut-off working voltage value of the super capacitor.

In some alternative embodiments, the obtaining module includes: the first acquisition unit is used for acquiring a current value of the current acquisition time, and the time interval between the current acquisition time and the last acquisition time is the current acquisition period; the first determination module includes: and a fifth determining unit, configured to determine an amount of electricity released in the current collection period according to the current value at the current collection time.

In some alternative embodiments, the obtaining module includes: the second acquisition unit is used for acquiring a second voltage value of the current acquisition time, and the time interval between the current acquisition time and the last acquisition time is the current acquisition period; the first determining module includes: and a sixth determining unit, configured to determine energy released in the current acquisition period according to the second voltage value at the current acquisition time.

In some alternative embodiments, the obtaining module includes: the third acquisition unit is used for acquiring the current value at the current acquisition time; the sixth determination unit includes: and the first determining subunit is used for determining the energy released in the current acquisition period according to the second voltage value and the current value of the current acquisition time.

In some alternative embodiments, the apparatus further comprises: a sixth determining module, configured to determine, when the total electric quantity does not reach the discharge allowable electric quantity, an electric quantity released by the supercapacitor in a next acquisition period; or, the energy releasing module is used for determining the energy released by the super capacitor in the next acquisition period when the total energy does not reach the discharge allowable energy.

In some alternative embodiments, the apparatus further comprises: a seventh determining module, configured to determine a target acquisition period according to a first acquisition period and a second acquisition period, where the duration of the current acquisition period is the duration of the target acquisition period, the duration of the first acquisition period is the shortest time interval between two adjacent acquisition moments, the duration of the second acquisition period is the longest time interval between two adjacent acquisition moments, the target acquisition period is a third acquisition period with the largest duration in one or more third acquisition periods with different durations, the duration of the third acquisition period is greater than or equal to the duration of the first acquisition period, and the duration of the third acquisition period is less than or equal to the duration of the second acquisition period, and an error between an actual capacitance capacity of the supercapacitor determined according to the third acquisition period and an actual capacitance capacity of the supercapacitor determined according to the first acquisition period is less than a first threshold.

In a fourth aspect, an embodiment of the present invention provides a supercapacitor alarm device, including: the first determining module is used for determining the electric quantity or energy released by the super capacitor in the current acquisition period in the process of controlling the discharge of the super capacitor; the second determining module is used for determining the total electric quantity released by the super capacitor according to the electric quantity of the current acquisition period or determining the total energy released by the super capacitor according to the energy of the current acquisition period, wherein the total electric quantity is the sum of the electric quantity released by all the acquisition periods, and the total energy is the sum of the energy released by all the acquisition periods; the control module is used for controlling the super capacitor to stop discharging under the condition that the total electric quantity reaches the discharge allowable electric quantity or the total energy reaches the discharge allowable energy; the acquisition module is used for acquiring a first voltage value of the super capacitor at the time of stopping discharging; the calibration module is used for determining the current actual capacitance of the super capacitor according to the first voltage value; the third determining module is used for determining the minimum capacitance required by the super capacitor to finish one-time power-down protection operation; and the alarm module is used for sending first alarm information to the host computer under the condition that the current actual capacitance capacity is smaller than or equal to the minimum capacitance capacity.

In some alternative embodiments, the control module includes: and the first control unit is used for controlling the super capacitor to discharge after a preset time length under the condition that the current actual capacitance is larger than the minimum capacitance.

In some alternative embodiments, the obtaining module includes: the first acquisition unit is used for acquiring a current value and/or a second voltage value at the current acquisition time, and the time interval between the current acquisition time and the last acquisition time is the current acquisition period; the alarm module comprises: the first alarm unit is used for sending second alarm information to the host computer when the current value at the current acquisition time is greater than or equal to a preset current value; and/or a second alarm unit, configured to send third alarm information to the host when the second voltage value at the current acquisition time is greater than or equal to a preset voltage value.

In a fifth aspect, an embodiment of the present invention further provides a disk array card, including: the super capacitor is used for supplying power to the cache module under the condition that the main power supply is powered off; the processor is used for determining the electric quantity or energy released by the super capacitor in the current acquisition period in the process of controlling the discharge of the super capacitor; the processor is further configured to determine a total electric quantity released by the supercapacitor according to the electric quantity of the current acquisition period, or determine a total energy released by the supercapacitor according to the energy of the current acquisition period, where the total electric quantity is a sum of electric quantities released by all the acquisition periods, and the total energy is a sum of energies released by all the acquisition periods; the processor is further configured to control the super capacitor to stop discharging when the total electric quantity reaches a discharge allowable electric quantity or when the total energy reaches a discharge allowable energy; the processor is further used for obtaining a first voltage value of the super capacitor at the time of stopping discharging; the processor is further configured to determine an actual capacitance of the supercapacitor under the current calibration according to the first voltage value.

In some alternative embodiments, the disk array card further comprises a universal input output interface module; the processor controls the discharge circuit of the super capacitor to discharge through the input/output interface module, and controls the discharge circuit of the super capacitor to stop discharging through the input/output interface module under the condition that the total electric quantity reaches the discharge allowable electric quantity or the total energy reaches the discharge allowable energy.

In this embodiment, the original general input/output interface module on the disk array card processor replaces the capacitor management chip to control the discharge of the super capacitor discharge circuit or stop the discharge, so that the function of the processor can be fully utilized, and the cost is saved.

In some alternative embodiments, the disk array card further comprises an analog-to-digital converter; the processor obtains the first voltage value through the analog-to-digital converter.

In this embodiment, the original analog-digital converter on the disk array card processor replaces the capacitance management chip to obtain the first voltage value, so that the function of the processor can be fully utilized, and the cost is saved.

In a sixth aspect, an embodiment of the present invention further provides a disk array card, including: the super capacitor is used for supplying power to the cache module under the condition that the main power supply is powered off; the processor is used for determining the electric quantity or energy released by the super capacitor in the current acquisition period in the process of controlling the discharge of the super capacitor; the processor is further configured to determine a total electric quantity released by the supercapacitor according to the electric quantity of the current acquisition period, or determine a total energy released by the supercapacitor according to the energy of the current acquisition period, where the total electric quantity is a sum of electric quantities released by all the acquisition periods, and the total energy is a sum of energies released by all the acquisition periods; the processor is further configured to control the super capacitor to stop discharging when the total electric quantity reaches a discharge allowable electric quantity or when the total energy reaches a discharge allowable energy; the processor is further used for obtaining a first voltage value of the super capacitor at the time of stopping discharging; the processor is further used for determining the current actual capacitance of the super capacitor according to the first voltage value; the processor is further used for determining the minimum capacitance required by the super capacitor to complete one-time power-down protection operation;

The processor is further configured to send first alarm information to a host when the current actual capacitance capacity is less than or equal to the minimum capacitance capacity.

In a seventh aspect, an embodiment of the present invention provides a server, where the server includes the disk array card of the fifth aspect or any implementation manner corresponding to the fifth aspect; or, a disk array card including any one of the embodiments of the sixth aspect or its correspondence.

In an eighth aspect, the present invention provides a computer device comprising: the memory and the processor are in communication connection, the memory stores computer instructions, and the processor executes the computer instructions to perform the method of the first aspect or any corresponding implementation mode thereof or perform the method of the second aspect or any corresponding implementation mode thereof.

In a ninth aspect, the present invention provides a computer readable storage medium having stored thereon computer instructions for causing a computer to perform the method of the first aspect or any of its corresponding embodiments, or to perform the method of the second aspect or any of its corresponding embodiments.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are needed in the description of the embodiments or the prior art will be briefly described, and it is obvious that the drawings in the description below are some embodiments of the present invention, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.

FIG. 1 is a flow chart of a method for calibrating a supercapacitor according to an embodiment of the invention;

FIG. 2 is a flow chart of another method of calibrating a supercapacitor according to an embodiment of the invention;

FIG. 3 is a flow chart of yet another method of calibrating a supercapacitor according to an embodiment of the invention;

FIG. 4 is a schematic diagram showing the variation of the current value of the super capacitor during discharging according to the embodiment of the invention;

FIG. 5 is a flow chart of yet another method of calibrating a supercapacitor according to an embodiment of the invention;

FIG. 6 is a schematic diagram of a variation of a second voltage value of a supercapacitor during discharge according to an embodiment of the present invention;

FIG. 7 is a flow chart of a super capacitor alarm method according to an embodiment of the invention;

FIG. 8 is a schematic diagram of a specific flow chart of a super capacitor alarm method according to an embodiment of the invention;

FIG. 9 is a schematic diagram of a supercapacitor calibration device according to an embodiment of the invention;

FIG. 10 is a schematic diagram of a super capacitor alarm device according to an embodiment of the present invention;

FIG. 11 is a schematic diagram of a disk array card according to an embodiment of the present invention;

fig. 12 is a schematic diagram of a hardware structure of a computer device according to an embodiment of the present invention.

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.

The invention provides a super capacitor calibration method, which can accurately control the discharge stopping time of a super capacitor in the super capacitor calibration process, so that the problem that one-time power-down protection operation cannot be completed due to excessive discharge of the super capacitor is avoided while the super capacitor calibration is not influenced, and the integrity and the reliability of cache data are further ensured.

The method for calibrating the super capacitor can be applied to a system supporting abnormal power-down data protection, namely, the method for calibrating the super capacitor can be applied to a system requiring the super capacitor to supply power to the cache unit so as to ensure that the cache data is stored in a nonvolatile storage medium. Such as solid state disk (Solid State Drive, SSD) systems, RAID cards, etc.

In accordance with embodiments of the present invention, a supercapacitor calibration method embodiment and a supercapacitor alarm method embodiment are provided, it being noted that the steps shown in the flowchart of the figures may be performed in a computer system, such as a set of computer-executable instructions, and, although a logical sequence is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than what is shown or described herein.

In this embodiment, a method for calibrating a super capacitor is provided, which may be used for the processor of the SSD system, the processor of the RAID card, and the like. Fig. 1 is a flow chart of a method for calibrating a super capacitor according to an embodiment of the present invention, as shown in fig. 1, the method includes the following steps:

step S101, in the process of controlling the discharge of the super capacitor, determining the electric quantity or energy released by the super capacitor in the current acquisition period.

In particular, the super-capacitor experiences capacity decay during use, and therefore requires calibration of the capacity of the super-capacitor once at intervals (e.g., 1 month). When the super capacitor is calibrated, the super capacitor is controlled to start discharging. In this embodiment, in the process of controlling the discharge of the supercapacitor, the electric quantity released by the supercapacitor in the current acquisition period is also determined, or the energy released by the supercapacitor in the current acquisition period is determined, so that the total electric quantity or total energy released by the supercapacitor in the discharge process is determined, and the discharge stopping moment of the supercapacitor is accurately controlled according to the total electric quantity or total energy.

The acquisition period is a time interval between two adjacent acquisition moments. The current acquisition period is the time interval between the current acquisition time and the last acquisition time. The time interval may be a preset value, may be configured by a worker, and may be, for example, 5 milliseconds (ms), 10ms, 30ms, or the like. The 1 st acquisition period is the time interval between the discharge starting time of the super capacitor and the 1 st acquisition time.

Step S102, determining the total electric quantity released by the super capacitor according to the electric quantity released in the current acquisition period, or determining the total energy released by the super capacitor according to the energy released in the current acquisition period.

The total electric quantity is the sum of the electric quantity released in all the acquisition periods. The total energy is the sum of the energy released for all acquisition cycles. For example, if the current acquisition period is the nth acquisition period, the total electric quantity is an accumulated value of electric quantity released by each of the N acquisition periods, and the total energy is an accumulated value of energy released by each of the N acquisition periods. N is a positive integer.

For example, if the current acquisition period is the 3 rd acquisition period, the electric quantity released in the 1 st acquisition period is 10 coulombs (C), the electric quantity released in the 2 nd acquisition period is 15C, and the electric quantity released in the 3 rd acquisition period is 12C, the total electric quantity is 37 c=10c+15c+12c.

For another example, if the current acquisition cycle is the 3 rd acquisition cycle, the energy released in the 1 st acquisition cycle is 8 joules (joules, J), the amount of electricity released in the 2 nd acquisition cycle is 12J, and the amount of electricity released in the 3 rd acquisition cycle is 10J, the total energy is 30 j=8j+12j+10j.

Step S103, controlling the super capacitor to stop discharging under the condition that the total electric quantity reaches the discharge allowable electric quantity or the total energy reaches the discharge allowable energy.

The discharge allowable power can be the maximum power which can be released by the super capacitor and determined by a worker or a processor. The discharge allowable energy may be the maximum energy that the supercapacitor can release as determined by the worker or the processor. If the total electric quantity exceeds the discharge allowable electric quantity or the total energy exceeds the discharge allowable energy, the super capacitor may not complete one power-down protection operation. That is, the capacity of the capacitor remaining in the super capacitor may not support the operation of the buffer unit to store the buffer data in the NAND Flash.

Illustratively, the discharge allowable power amount may be 150C, 180C, 200C, or the like. The discharge allowable energy may be 400J, 440J, 460J, etc. For example, if the total electric quantity reaches (is greater than or equal to) 180C (discharge allowable electric quantity), the super capacitor is controlled to stop discharging. For another example, if the total energy is 440J (discharge allowable energy) or more, the super capacitor is controlled to stop discharging.

Step S104, a first voltage value of the super capacitor at the time of stopping discharging is obtained.

Specifically, the first voltage value is a voltage value of the super capacitor collected at the moment when the super capacitor stops discharging.

Step S105, determining the current actual capacitance of the super capacitor according to the first voltage value.

Specifically, when the super capacitor is calibrated, after the super capacitor is controlled to stop discharging, the actual capacitor capacity (namely the current actual capacitor capacity) of the super capacitor under the current calibration can be determined according to the voltage value of the super capacitor collected at the moment when the super capacitor starts to discharge and the voltage value (first voltage value) of the super capacitor collected at the moment when the super capacitor stops discharging.

By way of example, the current actual capacitance capacity of the supercapacitor can be determined by the following equation (1).

；

wherein ,Cfor the current actual capacitance capacity,is the current value of the super capacitor, +.>Collecting the voltage value of the super capacitor at the moment of starting discharging the super capacitor, < >>For the first voltage value, +.>The time interval between the discharge stopping time of the super capacitor and the discharge starting time of the super capacitor. Wherein (1)>The current value of the constant current load can be regarded as a constant value.

For example, if the current value of the super capacitor1 Ampere (A) of the voltage value of the super capacitor, which is acquired at the moment when the super capacitor starts to discharge +.>12 volts (V), a first voltage value>11V, the time interval between the moment when the super capacitor stops discharging and the moment when the super capacitor starts discharging ∈>40 seconds (Second, s), the current actual capacitance capacity is 40 Farad (F).

Further, in the above embodiment, if the total electric quantity does not reach (is smaller than) the discharge allowable electric quantity, the electric quantity released by the super capacitor in the next acquisition period is continuously determined, and then the total electric quantity released by the super capacitor is determined again until the total electric quantity reaches (is greater than or equal to) the discharge allowable electric quantity. Similarly, if the total energy does not reach the discharge allowable energy, the energy released by the super capacitor in the next acquisition period is continuously determined, and then the total energy released by the super capacitor is determined again until the total energy reaches the discharge allowable energy.

In this embodiment, by periodically determining the electric quantity (or energy), the total electric quantity (or total energy) of the supercapacitor can be monitored in real time, and whether the total electric quantity (or total energy) reaches the discharge allowable electric quantity (discharge allowable energy) or not is determined, so that the discharge stopping time of the supercapacitor is accurately controlled.

From the above, the acquisition period is the time interval between two adjacent acquisition moments, the shorter the time interval between two adjacent acquisition moments is, the higher the determined electricity quantity or energy accuracy of the current acquisition period is, so that the discharge stop moment of the super capacitor can be controlled more accurately, the accuracy of determining the current actual capacitance is improved, but the higher the occupancy rate of the processor resource is, the system power consumption is increased, and the system may not respond to other tasks in time. In order to reduce system power consumption while improving the accuracy of the current actual capacitance capacity of the supercapacitor, in some alternative embodiments, the duration of the acquisition period may be different each time the actual capacitance capacity of the supercapacitor is calibrated. The target acquisition period is determined according to the first acquisition period and the second acquisition period, and the time length of the target acquisition period is confirmed to be the time length of the current acquisition period when the calibration is performed for the current time.

The first acquisition period is the shortest time interval between two adjacent acquisition moments, and the second acquisition period is the longest time interval between two adjacent acquisition moments. The shortest time interval and the longest time interval may be determined according to the chemical characteristics of the supercapacitor.

The time length of the third acquisition period is greater than or equal to the time length of the first acquisition period, and the time length of the third acquisition period is less than or equal to the time length of the second acquisition period. For example, if the duration of the first acquisition period is 10ms and the duration of the second acquisition period is 500ms, the duration T of the third acquisition period ₃ The range of (2) is: t is more than or equal to 10ms ₃ And less than or equal to 500ms. The error between the actual capacitance capacity of the supercapacitor determined according to the third acquisition period and the time capacitance capacity of the supercapacitor determined according to the first acquisition period is smaller than a first threshold value.

Illustratively, the first threshold may be a preset value, configurable by a worker, e.g., the first threshold may be 5%, 6%, etc. For example, the first threshold is 5%, the duration of the first acquisition period is 10ms, the duration of the second acquisition period is 500ms, if the actual capacitance of the supercapacitor determined according to the acquisition period (duration of 10 ms) is 40F, the actual capacitance of the supercapacitor determined according to the acquisition period (duration of 50 ms) is 39F, the actual capacitance of the supercapacitor determined according to the acquisition period (duration of 100 ms) is 38.5F, and the actual capacitance of the supercapacitor determined according to the acquisition period (duration of 500 ms) is 37F, the third acquisition period is the acquisition period (duration of 50 ms) and the acquisition period (duration of 100 ms).

The target acquisition period is the third acquisition period with the largest duration in one or more third acquisition periods with different durations. That is, if there is only one third acquisition period, the target acquisition period is the third acquisition period, and if there are a plurality of third acquisition periods with different durations, the third acquisition period is the third acquisition period with the longest duration among the plurality of third acquisition periods. For example, if the third acquisition period is an acquisition period (50 ms in length) and an acquisition period (100 ms in length), the target acquisition period is an acquisition period (100 ms in length).

For example, the target acquisition period may be determined according to a dichotomy. Specifically, first, the actual capacitance C of the super-capacitor is determined according to the first acquisition period ₁ . Secondly, determining the actual capacitance C of the super capacitor according to the second acquisition period ₂ . If C ₁ and C₂ And if the error is smaller than the first threshold value, the target acquisition period is a second acquisition period. For example, C ₁ and C₂ Error w= |c between ₁ -C ₂ ∣/C ₁ . If C ₁ and C₂ And if the error is greater than or equal to the first threshold value, taking the intermediate number of the duration of the first acquisition period and the duration of the second acquisition period as the duration of the acquisition period (fourth acquisition period) according to a dichotomy. For example, the duration of the first acquisition period is 10ms, the duration of the second acquisition period is 500ms, and at this time, the duration of the fourth acquisition period And is 255ms long. And determining the actual capacitance C of the super capacitor according to the fourth acquisition period ₃ If C ₁ and C₃ And if the error is smaller than the first threshold value, the target acquisition period is a fourth acquisition period. At this time, the fourth acquisition period is a third acquisition period. If C ₁ and C₃ And if the error is greater than or equal to the first threshold value, taking the intermediate number of the duration of the first acquisition period and the duration of the fourth acquisition period as the duration of the acquisition period according to a dichotomy, and analogizing until a third acquisition period is found, wherein the third acquisition period is the target acquisition period.

The process of determining the discharge allowable amount of electricity or the discharge allowable energy is described in detail with reference to the accompanying drawings.

In this embodiment, a method for calibrating a super capacitor is provided, which may be used for the processor of the SSD system, the processor of the RAID card, and the like. Fig. 2 is a flow chart of another method for calibrating a supercapacitor according to an embodiment of the invention, as shown in fig. 2, the method includes the following steps:

step S201, in the process of controlling the discharge of the super capacitor, determining the electric quantity or energy released by the super capacitor in the current acquisition period.

Please refer to step S101 in the embodiment shown in fig. 1 in detail, which is not described herein.

Step S202, determining the total electric quantity released by the super capacitor according to the electric quantity released in the current acquisition period, or determining the total energy released by the super capacitor according to the energy released in the current acquisition period.

Please refer to step S102 in the embodiment shown in fig. 1 in detail, which is not described herein.

Step S203, determining the minimum capacitance required by the super capacitor to complete one-time power-down protection operation.

Specifically, the minimum capacity of the capacitor can be determined, so that the minimum electric quantity or the minimum energy of the super capacitor for completing one power-down protection operation can be determined, and the allowable discharge electric quantity or the allowable discharge energy can be determined through the minimum electric quantity or the minimum energy.

In some alternative embodiments, the minimum capacitance capacity may be determined according to the constant current load current value, the duration of time required for the constant current load current value, the operating voltage value of the super capacitor, and the off-operating voltage value of the super capacitor by the following formula (2).

；

wherein ,for the lowest capacitance capacity, +.>Is a constant current load current value->For the duration required for constant load current value, +.>Is the working voltage value of the super capacitor, +.>The cut-off working voltage value of the super capacitor.

For example, if the constant current load current value is 1A, a duration of time required for constant current load current value +.>50s, the operating voltage value of the super capacitor +.>The cut-off operating voltage value of the super capacitor is 12V +.>12V, the lowest capacitance capacity->25 F= (1 A×50s)/(12V-10)V)。

In this embodiment, the minimum capacitance is determined by the formula (2), so that the processor can dynamically adjust the minimum capacitance according to the actual situation of the supercapacitor, thereby more accurately determining the minimum electric quantity or the minimum energy required by the supercapacitor to complete one-time power-down protection operation, further more accurately determining the allowable discharge electric quantity or allowable discharge energy, and enabling the processor to more accurately control the discharge stop time of the supercapacitor.

In other alternative embodiments, the minimum capacitance may be determined based on the canonical capacitance of the supercapacitor and a preset percentage parameter.

Specifically, the canonical capacitance capacity may be a capacitance capacity of the supercapacitor that is determined by the manufacturer at the time of shipment of the supercapacitor. The preset percentage parameter is a preset value and can be set by a worker. For example, the preset percentage parameter may be 60%, 70%, 80%, etc.

For example, the minimum capacitance capacity may be a product of the normalized capacitance capacity and a preset percentage parameter. For example, if the normalized capacitance is 40F and the preset percentage parameter is 70%, the minimum capacitance is 28 f=40 f×70%.

Step S204, determining the minimum electric quantity or the minimum energy required by the super capacitor to complete one-time power-down protection operation according to the minimum capacitance.

For example, the manner of determining the minimum electric quantity required by the super capacitor to complete the power-down protection operation according to the minimum capacitance may specifically be: and obtaining the minimum electric quantity according to the minimum capacitance and the working voltage value of the super capacitor by the following formula (3).

；

wherein ,is the lowest power level>For the lowest capacitance capacity, +.>The working voltage value of the super capacitor.

For example, if the capacitance is the lowest25F, the working voltage value of the super capacitor +.>12V, the lowest power300 c=25f×12v.

The method for determining the minimum energy required by the super capacitor to complete the power-down protection operation according to the minimum capacitance can be specifically: and obtaining the lowest energy according to the lowest capacitance, the working voltage value of the super capacitor and the cut-off working voltage value of the super capacitor by the following formula (4).

；

wherein ,is the lowest energy>For the lowest capacitance capacity, +.>Is the working voltage value of the super capacitor, +.>The cut-off working voltage value of the super capacitor.

For example, if the capacitance is the lowest25F, the working voltage value of the super capacitor +.>The cut-off operating voltage value of the super capacitor is 12V +.>10V, the lowest energy->550 j=25f× ((12V) ² -（10V） ² ）/2。

In step S205, a discharge allowable power amount is determined according to the minimum power amount, or a discharge allowable power amount is determined according to the minimum power amount.

Wherein the discharge allowable power is the difference between the actual power and the minimum power. The discharge allowable energy is the difference between the actual energy and the lowest energy. The actual electrical quantity and the actual energy may be determined from the last actual capacitance of the supercapacitor. The last actual capacitance may be the actual capacitance of the supercapacitor at the last calibration.

For example, the actual power may be the product of the last actual capacitance and the operating voltage value of the supercapacitor. For example, if the previous actual capacitance is 40F and the operating voltage of the super capacitor is 12V, the actual power is 480 c=40f×12v. At this time, if the minimum electric quantity is 300C, the discharge allowable electric quantity is 180 c=480C-300C.

The actual energy may be determined by the following formula (5), for example.

；

wherein ,for the actual energy>For the last actual capacitance, +.>Is the working voltage value of the super capacitor, +.>The cut-off working voltage value of the super capacitor. For example, if the last actual capacitance is + ->45F, working voltage value of super capacitorThe cut-off operating voltage value of the super capacitor is 12V +.>10V, the actual energy is 990 j=45f× ((12V) ² -（10V） ² )/2. At this time, if the minimum energy is 550J, the discharge allowable power is 440 j=990J-550J.

In step S206, the super capacitor is controlled to stop discharging when the total power reaches the discharge allowable power or when the total power reaches the discharge allowable power.

Please refer to step S103 in the embodiment shown in fig. 1 in detail, which is not described herein.

Step S207, a first voltage value of the super capacitor at the time of stopping discharging is obtained.

Please refer to step S104 in the embodiment shown in fig. 1 in detail, which is not described herein.

Step S208, determining the current actual capacitance of the super capacitor according to the first voltage value.

Please refer to step S105 in the embodiment shown in fig. 1 in detail, which is not described herein.

In some alternative embodiments, the discharge allowable amount of electricity or the discharge allowable energy may be a preset value, which may be configured by a worker according to empirical data.

In this embodiment, a method for calibrating a super capacitor is provided, which may be used for the processor of the SSD system, the processor of the RAID card system, and the like. Fig. 3 is a flow chart of yet another method for calibrating a supercapacitor according to an embodiment of the invention, as shown in fig. 3, the method includes the steps of:

step S301, a current value at the current acquisition time is obtained.

The time interval between the current acquisition time and the last acquisition time is the current acquisition period. The current value is the current value of the super capacitor at the current acquisition time.

Step S302, in the process of controlling the discharge of the super capacitor, determining the electric quantity released by the super capacitor in the current collection period according to the current value at the current collection time.

Specifically, step S302 is one possible implementation of step S101 in the embodiment shown in fig. 1.

For example, according to the current value at the current collection time, the electric quantity released by the super capacitor in the current collection period can be determined by the following formula (6).

；

wherein ,for the amount of power released in the current acquisition cycle, n=1, 2,3, … …, +. >The amount of power released for the fifth acquisition period, < >>For the current value at the current acquisition instant, n=1, 2,3, … …, +.>For the duration of the acquisition period, i.e. +.>The time interval between the current acquisition time and the last acquisition time. Illustratively, if the current acquisition period is the 3 rd acquisition period, then n is 3.

It should be understood that, as shown in fig. 4, although the current value of the super capacitor fluctuates during the discharging process, according to the differential principle, when the duration of the acquisition period is small, the current can be regarded as a constant value. That is, the current value at any time in the current acquisition period can be regarded as the current value acquired at the current acquisition time.

Step S303, determining the total electric quantity released by the super capacitor according to the electric quantity released in the current acquisition period.

Specifically, step S303 is one of the cases of step S102 in the embodiment shown in fig. 1, please refer to step S102 in the embodiment shown in fig. 1 in detail, and the details are not repeated here.

And step S304, under the condition that the total electric quantity reaches the discharge allowable electric quantity, controlling the super capacitor to stop discharging.

Specifically, step S304 is one of the cases of step S103 in the embodiment shown in fig. 1, please refer to step S103 in the embodiment shown in fig. 1 in detail, and details are not repeated here.

Step S305, a first voltage value of the super capacitor at the time of stopping discharging is obtained.

Step S306, determining the current actual capacitance of the super capacitor according to the first voltage value.

According to the method for calibrating the super capacitor, the current value of the super capacitor at the current acquisition time is periodically acquired, so that the electric quantity released by the super capacitor in each acquisition period can be monitored in real time, the total electric quantity released by the super capacitor in the discharging process can be known in real time by a processor, the super capacitor is timely controlled to stop discharging, and the situation that the super capacitor cannot complete one-time power-down protection operation is avoided.

In this embodiment, a method for calibrating a super capacitor is provided, which may be used for the processor of the SSD system, the processor of the RAID card system, and the like. Fig. 5 is a flow chart of yet another method for calibrating a supercapacitor according to an embodiment of the invention, as shown in fig. 5, the method includes the steps of:

step S501, a second voltage value at the current acquisition time is obtained.

The time interval between the current acquisition time and the last acquisition time is the current acquisition period. The second voltage value is the voltage value of the super capacitor at the current acquisition time.

Step S502, in the process of controlling the discharge of the super capacitor, determining the energy released by the super capacitor in the current acquisition period according to the second voltage value at the current acquisition time.

Specifically, step S502 is one possible implementation of step S101 in the embodiment shown in fig. 1.

Illustratively, according to the second voltage value at the current acquisition time, the energy released by the supercapacitor in the current acquisition period can be determined by the following formula (7).

；

wherein ,for the amount of power released in the current acquisition cycle, n=1, 2,3, … …, +.>For the second voltage value at the current acquisition instant, n=1, 2,3, … …, < >>For the duration of the acquisition period, i.e. +.>And for the time interval between the current acquisition time and the last acquisition time, I is the current value of the super capacitor, and I is a fixed value. For example, the current value I of the supercapacitor may be the current value of the supercapacitor acquired at the 1 st acquisition time. Illustratively, if the current acquisition period is the 5 th acquisition period, then n is 5.

It should be understood that, as shown in fig. 6, although the second voltage value of the supercapacitor is constantly changing during the discharging process, according to the differential principle, when the duration of the acquisition period is small, the second voltage value may be regarded as a constant value. That is, the second voltage value at any time in the current acquisition period can be regarded as the second voltage value acquired at the current acquisition time.

Step S503, determining the total energy released by the super capacitor according to the energy released by the current acquisition period.

Specifically, step S503 is another case of step S102 in the embodiment shown in fig. 1, please refer to step S102 in the embodiment shown in fig. 1 in detail, and the details are not repeated here.

In step S504, the super capacitor is controlled to stop discharging when the total energy reaches the discharge allowable energy.

Specifically, step S504 is another case of step S103 in the embodiment shown in fig. 1, please refer to step S103 in the embodiment shown in fig. 1 in detail, and details are not repeated here.

Step S505, a first voltage value of the super capacitor at the time of stopping discharging is obtained.

Step S506, determining the current actual capacitance of the super capacitor according to the first voltage value.

According to the super capacitor calibration method, the second voltage value of the super capacitor at the current acquisition time is periodically acquired, so that the energy released by the super capacitor in each acquisition period can be monitored in real time, the total energy released by the super capacitor in the discharging process can be known in real time by a processor, the super capacitor is timely controlled to stop discharging, and the situation that the super capacitor cannot complete one-time power-down protection operation is avoided.

In order to improve the accuracy of the energy released by the determined current acquisition period, in the embodiment shown in fig. 5, the method for calibrating the super capacitor further includes acquiring the current value at the current acquisition time. At this time, step S502 may specifically be: and determining the energy released by the super capacitor in the current acquisition period through a formula (7) according to the second voltage value and the current value at the current acquisition time.

The embodiment also provides a super capacitor alarm method which can be used for the processor of the SSD system, the processor of the RAID card system and the like. Fig. 7 is a flow chart of a super capacitor alarm method according to an embodiment of the present invention, as shown in fig. 7, the method includes the following steps:

in step S701, in the process of controlling the discharge of the supercapacitor, the amount of electricity or energy released by the supercapacitor in the current acquisition period is determined.

Step S702, determining the total electric quantity released by the super capacitor according to the electric quantity released in the current acquisition period, or determining the total energy released by the super capacitor according to the energy released in the current acquisition period.

In step S703, in the case that the total electric quantity reaches the discharge allowable electric quantity or in the case that the total energy reaches the discharge allowable energy, the super capacitor is controlled to stop discharging.

Step S704, a first voltage value of the super capacitor at the time of stopping discharging is obtained.

Step S705, determining the current actual capacitance of the super capacitor according to the first voltage value.

Step S706, determining the minimum capacitance required by the super capacitor to complete the power-down protection operation once.

Please refer to step S203 in the embodiment shown in fig. 2 in detail, which is not described herein.

In step S707, in the case where the current actual capacitance capacity is less than or equal to the minimum capacitance capacity, the first alarm information is sent to the host.

Specifically, if the current actual capacitance capacity is smaller than or equal to the minimum capacitance capacity, the current actual capacitance capacity of the super capacitor is abnormal, and first alarm information is sent to the host. The first alarm information indicates the host computer to prompt a user to replace the super capacitor.

Further, in the embodiment shown in fig. 7, the supercapacitor alert method further includes controlling the supercapacitor to discharge after the preset period of time in the case that the current actual capacitance is greater than the minimum capacitance.

The preset time length is a preset value and can be configured by a worker. For example, the preset duration may be 1 month, 3 months, etc.

In some alternative embodiments, the supercapacitor alert method further comprises the steps of:

Step a1, obtaining a current value and/or a second voltage value at the current acquisition time.

In this embodiment, only the current value at the current acquisition time may be obtained, only the second voltage value at the current acquisition time may be obtained, and both the current value at the current acquisition time and the second voltage value at the current acquisition time may be obtained.

In the case where only the current value at the current acquisition time is acquired, step a2 is performed. And (c) executing the step a3 under the condition that only the second voltage value at the current acquisition time is acquired. And under the condition that the current value and the second voltage value at the current acquisition time are acquired, executing the step a2 and the step a3.

And a step a2, sending second alarm information to the host computer under the condition that the current value at the current acquisition time is greater than or equal to a preset current value.

Specifically, the second alarm information is used for prompting the abnormal current of the super capacitor of the host.

Step a3, sending third alarm information to the host computer under the condition that the second voltage value at the current acquisition time is larger than or equal to the preset voltage value.

Specifically, the third alarm information is used for prompting the voltage abnormality of the super capacitor of the host.

The calibration process of the supercapacitor is described in detail below with reference to fig. 8.

For example, when calibration of the supercapacitor is required, the minimum capacity required for the supercapacitor to complete one power-down protection operation may be determined according to formula (2), i.e. step S801 may be performed. And then determining the minimum electric quantity required by the super capacitor for completing one-time power-down protection operation according to the minimum capacitance, and determining the allowable discharge electric quantity according to the minimum electric quantity, namely executing step S802 and step S803. And then, controlling the discharge of the super capacitor, and acquiring (collecting) the voltage value of the super capacitor at the moment of starting the discharge, namely executing step S804. Then, in the process of controlling the discharging of the super capacitor, acquiring a current value at the current acquisition time, determining the electric quantity released by the super capacitor in the current acquisition period according to the current value at the current acquisition time through a formula (6), and determining the total electric quantity released by the super capacitor according to the electric quantity released in the current acquisition period, namely sequentially executing step S805, step S806, step S807 and step S808. After that, it is determined whether the total amount of electricity reaches the discharge allowable amount of electricity, that is, step S809 is performed. If the total electric quantity reaches the discharge allowable electric quantity, the super capacitor is controlled to stop discharging, and step S810 is executed. Meanwhile, a first voltage value of the super capacitor at the time of stopping discharging is collected, and the current actual capacitance of the super capacitor is determined according to the first voltage value through a formula (1), namely, step S811 and step S812 are sequentially executed. If the total electric quantity does not reach the allowable discharge electric quantity, acquiring a current value at the next acquisition time (new current acquisition time), determining the electric quantity released by the super capacitor in the current acquisition period again, determining the total electric quantity released by the super capacitor again, and so on until the total electric quantity reaches the allowable discharge electric quantity, namely, executing step S805, step S806, step S807 and step S808 again until the total electric quantity reaches the allowable discharge electric quantity.

Further, after determining the current actual capacitance capacity and the lowest capacitance capacity of the supercapacitor, it may also be determined whether the current actual capacitance capacity is greater than the lowest capacitance capacity, i.e. step S813 is performed. If the current actual capacitance is greater than the minimum actual capacitance, determining the minimum capacitance again after the preset time, that is, after the preset time, executing step S801 again. If the current actual capacitance is less than or equal to the minimum capacitance, a first alarm message is sent to the host, and step S814 is performed.

For example, when the supercapacitor needs to be calibrated, the minimum capacitance required by the supercapacitor to complete the power-down protection operation once may be determined according to the formula (2), then the minimum energy required by the supercapacitor to complete the power-down protection operation once may be determined according to the minimum capacitance through the formula (4), and the discharge allowable energy may be determined according to the minimum energy. And then, controlling the super capacitor to start discharging, and collecting the voltage value of the super capacitor at the moment of starting discharging. Then, in the discharging process of the super capacitor, a second voltage value at the current collecting time is obtained, the energy released by the super capacitor in the current collecting period is determined through a formula (7), and the total energy released by the super capacitor is determined according to the energy released in the current collecting period. And if the total energy reaches the discharge allowable energy, controlling the super capacitor to stop discharging. Meanwhile, a first voltage value of the super capacitor at the time of stopping discharging is acquired, and the current actual capacitance of the super capacitor is determined according to the first voltage value through a formula (1). If the total energy does not reach the discharge allowable energy, determining the energy released by the super capacitor in the next acquisition period (namely, the new current acquisition period), determining the total energy released by the super capacitor again, and the like until the total energy reaches the discharge allowable energy.

In this embodiment, a device for calibrating a super capacitor and a device for alarming a super capacitor are further provided, and the device is used for implementing the above corresponding embodiment and preferred implementation, which have already been described and will not be repeated. As used below, the term "module" may be a combination of software and/or hardware that implements a predetermined function. While the means described in the following embodiments are preferably implemented in software, implementation in hardware, or a combination of software and hardware, is also possible and contemplated.

The present embodiment provides a supercapacitor calibration device, as shown in fig. 9, including:

the first determining module 901 is configured to determine, in a process of controlling discharge of the supercapacitor, an amount of electricity or energy released by the supercapacitor in a current acquisition period.

The second determining module 902 is configured to determine a total amount of electricity released by the supercapacitor according to an amount of electricity in a current acquisition period, or determine a total amount of energy released by the supercapacitor according to an amount of energy in the current acquisition period, where the total amount of electricity is a sum of amounts of electricity released by all acquisition periods, and the total amount of energy is a sum of amounts of energy released by all acquisition periods.

The control module 903 is configured to control the supercapacitor to stop discharging when the total electric quantity reaches the discharge allowable electric quantity or when the total energy reaches the discharge allowable energy.

The obtaining module 904 is configured to obtain a first voltage value of the super capacitor at a time when discharge of the super capacitor is stopped.

The calibration module 905 is configured to determine a current actual capacitance of the supercapacitor according to the first voltage value.

In some alternative embodiments, the supercapacitor calibration device further comprises:

and the third determining module is used for determining the minimum capacitance required by the super capacitor to finish one-time power-down protection operation.

And the fourth determining module is used for determining the minimum electric quantity or the minimum energy required by the super capacitor to finish one power-down protection operation according to the minimum capacitance.

And the fifth determining module is used for determining the allowable discharge electric quantity according to the minimum electric quantity or determining the allowable discharge energy according to the minimum energy, wherein the allowable discharge electric quantity is the difference between the actual electric quantity and the minimum electric quantity, the allowable discharge energy is the difference between the actual energy and the minimum energy, and the actual electric quantity or the actual energy is determined according to the last actual capacitance of the super capacitor.

In some alternative embodiments, the third determining module includes:

the first determining unit is used for determining the capacity of the lowest capacitor according to the constant current load current value, the duration required by the constant current load current value, the working voltage value of the super capacitor and the cut-off working voltage value of the super capacitor by the following formula:

；

In some alternative embodiments, the third determination module further comprises:

and the second determining unit is used for determining the lowest capacitance according to the standard capacitance of the super capacitor and the preset percentage parameter.

In some alternative embodiments, the fourth determination module includes:

the third determining unit is configured to obtain, according to the minimum capacitance and the operating voltage value of the supercapacitor, the minimum electric quantity according to the following formula:

；

wherein ,is the lowest power level>For the lowest capacitance capacity, +.>Is of the super typeThe operating voltage value of the stage capacitor.

In some alternative embodiments, the fourth determination module further comprises:

the fourth determining unit is configured to obtain the lowest energy according to the lowest capacitance, the working voltage value of the super capacitor, and the cut-off working voltage value of the super capacitor, by using the following formula:

；/>

In some alternative embodiments, the obtaining module 904 includes:

the first acquisition unit is used for acquiring a current value at the current acquisition time, and the time interval between the current acquisition time and the last acquisition time is the current acquisition period.

The first determination module includes:

and the fifth determining unit is used for determining the electric quantity released in the current acquisition period according to the current value at the current acquisition time.

In some alternative embodiments, the obtaining module 904 further includes:

the second acquisition unit is used for acquiring a second voltage value at the current acquisition time, and the time interval between the current acquisition time and the last acquisition time is the current acquisition period.

The first determination module includes:

and the sixth determining unit is used for determining the energy released in the current acquisition period according to the second voltage value at the current acquisition time.

In some alternative embodiments, the obtaining module 904 includes:

the third acquisition unit is used for acquiring the current value at the current acquisition time;

the sixth determination unit further includes:

the first determining subunit is used for determining the energy released in the current acquisition period according to the second voltage value and the current value at the current acquisition time.

A sixth determining module, configured to determine, when the total electric quantity does not reach the discharge allowable electric quantity, an electric quantity released by the supercapacitor in a next acquisition period; or the energy released by the super capacitor in the next acquisition period is determined under the condition that the total energy does not reach the discharge allowable energy.

the seventh determining module is configured to determine a target acquisition period according to a first acquisition period and a second acquisition period, where the duration of the current acquisition period is the duration of the target acquisition period, the duration of the first acquisition period is the shortest time interval between two adjacent acquisition moments, the duration of the second acquisition period is the longest time interval between two adjacent acquisition moments, the target acquisition period is a third acquisition period with the largest duration in one or more third acquisition periods with different durations, the duration of the third acquisition period is greater than or equal to the duration of the first acquisition period, the duration of the third acquisition period is less than or equal to the duration of the second acquisition period, and an error between an actual capacitance capacity of the supercapacitor determined according to the third acquisition period and an actual capacitance capacity of the supercapacitor determined according to the first acquisition period is less than a first threshold.

The present embodiment provides a super capacitor alarm device, as shown in fig. 10, including:

the first determining module 1001 is configured to determine, during a process of controlling discharge of the supercapacitor, an amount of electricity or energy released by the supercapacitor in a current acquisition period.

The second determining module 1002 is configured to determine a total amount of electricity released by the supercapacitor according to an amount of electricity in a current collection period, or determine a total amount of energy released by the supercapacitor according to an amount of energy in the current collection period, where the total amount of electricity is a sum of amounts of electricity released by all collection periods, and the total amount of energy is a sum of amounts of energy released by all collection periods.

The control module 1003 is configured to control the supercapacitor to stop discharging when the total power reaches the discharge allowable power or when the total power reaches the discharge allowable power.

The obtaining module 1004 is configured to obtain a first voltage value of the super capacitor at a time when discharge of the super capacitor is stopped.

A calibration module 1005 is configured to determine a current actual capacitance of the supercapacitor according to the first voltage value.

A third determining module 1006 is configured to determine a minimum capacitance required for the supercapacitor to complete a power-down protection operation.

And the alarm module 1007 is configured to send first alarm information to the host when the current actual capacitance is less than or equal to the minimum capacitance.

In some alternative embodiments, the control module 1003 includes:

the first control unit is used for controlling the super capacitor to discharge after a preset time length under the condition that the current actual capacitance is larger than the lowest capacitance.

In some alternative embodiments, the obtaining module 1004 further includes:

the first acquisition unit is used for acquiring a current value and/or a second voltage value at the current acquisition time, and the time interval between the current acquisition time and the last acquisition time is the current acquisition period.

The alarm module 1007 includes:

the first alarm unit is used for sending second alarm information to the host computer when the current value at the current acquisition time is greater than or equal to a preset current value; and/or the number of the groups of groups,

and the second alarm unit is used for sending third alarm information to the host computer under the condition that the second voltage value at the current acquisition time is greater than or equal to the preset voltage value.

Further functional descriptions of the above respective modules and units are the same as those of the above corresponding embodiments, and are not repeated here.

The supercapacitor calibration device and supercapacitor alarm device in this embodiment are presented in the form of functional units, where the units are application specific integrated circuits (Application Specific Integrated Circuit, ASIC), processors and memories executing one or more software or fixed programs, and/or other devices that can provide the above-described functions.

The embodiment of the invention also provides a disk array card, as shown in fig. 11, which comprises a super capacitor 1101 and a processor 1102.

The super capacitor 1101 is configured to supply power to the cache module in the event of power failure of the main power supply.

The processor 1102 is configured to determine an amount of electricity or energy released by the supercapacitor in a current acquisition period during a process of controlling discharge of the supercapacitor; the method is also used for determining the total electric quantity released by the super capacitor according to the electric quantity of the current acquisition period, or determining the total energy released by the super capacitor according to the energy of the current acquisition period, wherein the total electric quantity is the sum of the electric quantity released by all the acquisition periods, and the total energy is the sum of the energy released by all the acquisition periods; the super capacitor is also used for controlling the super capacitor to stop discharging under the condition that the total electric quantity reaches the discharge allowable electric quantity or the total energy reaches the discharge allowable energy; the method is also used for obtaining a first voltage value of the super capacitor at the moment of stopping discharging; and the method is also used for determining the actual capacitance capacity of the super capacitor under the current calibration according to the first voltage value.

By way of example, the processor 1102 may be a microprocessor controller (Microcontroller Unit, MCU).

In some alternative embodiments, the disk array card further includes a General-Purpose Input/Output Ports (GPIO) module, the processor 1102 controls the discharge circuit of the supercapacitor to discharge through the GPIO module, and the processor 1102 controls the discharge circuit of the supercapacitor to stop discharging through the GPIO module if the total power reaches the discharge allowable power or if the total power reaches the discharge allowable power.

In this embodiment, the original GPIO module on the disk array card processor 1102 replaces the capacitor management chip to control the discharge of the super capacitor discharge circuit or stop the discharge, so that the function of the processor 1102 can be fully utilized, and the cost is saved.

In some alternative embodiments, the disk array card further includes an Analog-to-Digital Converter (ADC) converter, and the processor 1102 obtains the first voltage value via the ADC.

In this embodiment, the original ADC on the disk array card processor 1102 replaces the capacitance management chip to obtain the first voltage value, so that the function of the processor 1102 can be fully utilized, and the cost is saved.

The embodiment of the invention also provides another disk array card, which comprises a super capacitor and a processor.

The super capacitor is used for supplying power to the cache module under the condition that the main power supply is powered down.

The processor is used for determining the electric quantity or energy released by the super capacitor in the current acquisition period in the process of controlling the discharge of the super capacitor; the method is also used for determining the total electric quantity released by the super capacitor according to the electric quantity of the current acquisition period, or determining the total energy released by the super capacitor according to the energy of the current acquisition period, wherein the total electric quantity is the sum of the electric quantity released by all the acquisition periods, and the total energy is the sum of the energy released by all the acquisition periods; the super capacitor is also used for controlling the super capacitor to stop discharging under the condition that the total electric quantity reaches the discharge allowable electric quantity or the total energy reaches the discharge allowable energy; the method is also used for obtaining a first voltage value of the super capacitor at the moment of stopping discharging; the current actual capacitance of the super capacitor is determined according to the first voltage value; the method is also used for determining the minimum capacitance required by the super capacitor to finish one-time power-down protection operation; and the system is also used for sending the first alarm information to the host computer under the condition that the current actual capacitance capacity is smaller than or equal to the lowest capacitance capacity.

The embodiment of the invention also provides a server, which comprises the disk array card in any embodiment.

The embodiment of the invention also provides computer equipment, which is provided with the super capacitor calibration device or the super capacitor alarm device.

Referring to fig. 12, fig. 12 is a schematic structural diagram of a computer device according to an alternative embodiment of the present invention, as shown in fig. 12, the computer device includes: one or more processors 1210, memory 1220, and interfaces for connecting the components, including high-speed interfaces and low-speed interfaces. The various components are communicatively coupled to each other using different buses and may be mounted on a common motherboard or in other manners as desired. The processor may process instructions executing within the computer device, including instructions stored in or on memory to display graphical information of the GUI on an external input/output device, such as a display device coupled to the interface. In some alternative embodiments, multiple processors and/or multiple buses may be used, if desired, along with multiple memories and multiple memories. Also, multiple computer devices may be connected, each providing a portion of the necessary operations (e.g., as a server array, a set of blade servers, or a multiprocessor system). One processor 1210 is illustrated in fig. 12.

Processor 1210 may be a central processor, a network processor, or a combination thereof. The processor 1210 may further include a hardware chip, among others. The hardware chip may be an application specific integrated circuit, a programmable logic device, or a combination thereof. The programmable logic device may be a complex programmable logic device, a field programmable gate array, a general-purpose array logic, or any combination thereof.

Wherein the memory 1220 stores instructions executable by the at least one processor 1210 to cause the at least one processor 1210 to perform the methods illustrated by implementing the above embodiments.

Memory 1220 may include a storage program area that may store an operating system, at least one application program required for functions, and a storage data area; the storage data area may store data created according to the use of the computer device, etc. In addition, memory 1220 may include high-speed random access memory, and may also include non-transitory memory, such as at least one magnetic disk storage device, flash memory device, or other non-transitory solid-state storage device. In some alternative embodiments, memory 1220 may optionally include memory located remotely from processor 1210, which may be connected to the computer device via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.

Memory 1220 may include volatile memory, such as random access memory; the memory may also include non-volatile memory, such as flash memory, hard disk, or solid state disk; memory 1120 may also include a combination of the above types of memory.

The computer device also includes a communication interface 1230 for the computer device to communicate with other devices or communication networks.

The embodiments of the present invention also provide a computer readable storage medium, and the method according to the embodiments of the present invention described above may be implemented in hardware, firmware, or as a computer code which may be recorded on a storage medium, or as original stored in a remote storage medium or a non-transitory machine readable storage medium downloaded through a network and to be stored in a local storage medium, so that the method described herein may be stored on such software process on a storage medium using a general purpose computer, a special purpose processor, or programmable or special purpose hardware. The storage medium can be a magnetic disk, an optical disk, a read-only memory, a random access memory, a flash memory, a hard disk, a solid state disk or the like; further, the storage medium may also comprise a combination of memories of the kind described above. It will be appreciated that a computer, processor, microprocessor controller or programmable hardware includes a storage element that can store or receive software or computer code that, when accessed and executed by the computer, processor or hardware, implements the methods illustrated by the above embodiments.

Although embodiments of the present invention have been described in connection with the accompanying drawings, various modifications and variations may be made by those skilled in the art without departing from the spirit and scope of the invention, and such modifications and variations fall within the scope of the invention as defined by the appended claims.

Claims

1. A method of calibrating a supercapacitor, the method comprising:

in the process of controlling the discharge of the super capacitor, determining the electric quantity or energy released by the super capacitor in the current acquisition period;

determining the total electric quantity released by the super capacitor according to the electric quantity released by the current acquisition period, or determining the total energy released by the super capacitor according to the energy released by the current acquisition period, wherein the total electric quantity is the sum of the electric quantity released by all the acquisition periods, and the total energy is the sum of the energy released by all the acquisition periods;

determining the minimum capacitance required by the super capacitor to finish one-time power-down protection operation;

determining the minimum electric quantity or the minimum energy required by the super capacitor to finish one-time power-down protection operation according to the minimum capacitance;

determining a discharge allowable power according to the minimum power or determining a discharge allowable power according to the minimum power, wherein the discharge allowable power is a difference value between an actual power and the minimum power, and the actual power or the actual power is determined according to a last actual capacitance of the super capacitor;

Controlling the super capacitor to stop discharging under the condition that the total electric quantity reaches the discharge allowable electric quantity or the total energy reaches the discharge allowable energy;

acquiring a first voltage value of the super capacitor at the time of stopping discharging;

and determining the current actual capacitance of the super capacitor according to the first voltage value.

2. The method of claim 1, wherein determining a minimum capacitance required for the supercapacitor to complete a power-down protection operation comprises:

determining the capacity of the lowest capacitor according to a constant current load current value, a duration required by the constant current load current value, a working voltage value of the super capacitor and a cut-off working voltage value of the super capacitor by the following formula:

3. The method of claim 1, wherein determining a minimum capacitance required for the supercapacitor to complete a power-down protection operation comprises:

And determining the minimum capacitance according to the standard capacitance of the super capacitor and a preset percentage parameter.

4. A method according to any one of claims 1 to 3, wherein determining the minimum amount of power required by the supercapacitor to complete a power-down protection operation based on the minimum capacity of the capacitor comprises:

and obtaining the minimum electric quantity according to the minimum capacitance and the working voltage value of the super capacitor by the following formula:

5. A method according to any one of claims 1 to 3, wherein determining the minimum energy required by the supercapacitor to complete a power-down protection operation based on the minimum capacitance capacity comprises:

and obtaining the minimum energy according to the minimum capacitance, the working voltage value of the super capacitor and the cut-off working voltage value of the super capacitor by the following formula:

wherein ,for the lowest energy +.>For the lowest capacitance capacity, < >>For the operating voltage value of the super capacitor, < >>And the cut-off working voltage value of the super capacitor.

6. A method according to any one of claims 1 to 3, wherein prior to said determining the amount of power released by the supercapacitor during the current acquisition period, the method further comprises:

acquiring a current value of a current acquisition time, wherein the time interval between the current acquisition time and the last acquisition time is the current acquisition period;

the determining the electric quantity released by the super capacitor in the current acquisition period comprises the following steps:

and determining the electric quantity released in the current acquisition period according to the current value of the current acquisition time.

7. A method according to any one of claims 1 to 3, wherein prior to said determining the energy released by the supercapacitor during the current harvesting cycle, the method further comprises:

acquiring a second voltage value of the current acquisition time, wherein the time interval between the current acquisition time and the last acquisition time is the current acquisition period;

the determining the energy released by the super capacitor in the current acquisition period comprises the following steps:

and determining the energy released in the current acquisition period according to the second voltage value of the current acquisition time.

8. The method of claim 7, wherein prior to said determining the energy released for the current acquisition period from the second voltage value for the current acquisition time, the method further comprises:

Acquiring a current value of the current acquisition time;

the determining the energy released in the current acquisition period according to the second voltage value of the current acquisition time comprises the following steps:

and determining the energy released in the current acquisition period according to the second voltage value and the current value of the current acquisition time.

9. A method according to any one of claims 1 to 3, further comprising:

under the condition that the total electric quantity does not reach the discharge allowable electric quantity, determining the electric quantity released by the super capacitor in the next acquisition period; or alternatively, the process may be performed,

and under the condition that the total energy does not reach the discharge allowable energy, determining the energy released by the super capacitor in the next acquisition period.

10. A method according to any one of claims 1 to 3, further comprising:

determining a target acquisition period according to a first acquisition period and a second acquisition period, wherein the duration of the current acquisition period is the duration of the target acquisition period, the duration of the first acquisition period is the shortest time interval between two adjacent acquisition moments, the duration of the second acquisition period is the longest time interval between two adjacent acquisition moments, the target acquisition period is a third acquisition period with the largest duration in one or more third acquisition periods with different durations, the duration of the third acquisition period is greater than or equal to the duration of the first acquisition period, the duration of the third acquisition period is less than or equal to the duration of the second acquisition period, and the error between the actual capacitance capacity of the supercapacitor determined according to the third acquisition period and the actual capacitance capacity of the supercapacitor determined according to the first acquisition period is less than a first threshold.

11. A supercapacitor warning method, the method comprising:

determining the current actual capacitance of the super capacitor according to the first voltage value;

and under the condition that the current actual capacitance capacity is smaller than or equal to the minimum capacitance capacity, sending first alarm information to a host.

12. The method of claim 11, wherein the method further comprises:

and under the condition that the current actual capacitance is larger than the lowest capacitance, controlling the super capacitor to discharge after a preset period of time.

13. The method according to claim 11 or 12, characterized in that the method further comprises:

acquiring a current value and/or a second voltage value of a current acquisition time, wherein the time interval between the current acquisition time and a last acquisition time is the current acquisition period;

sending second alarm information to the host under the condition that the current value at the current acquisition time is greater than or equal to a preset current value; and/or the number of the groups of groups,

And sending third alarm information to the host under the condition that the second voltage value at the current acquisition time is larger than or equal to a preset voltage value.

14. A supercapacitor calibration device, the device comprising:

the first determining module is used for determining the electric quantity or energy released by the super capacitor in the current acquisition period in the process of controlling the discharge of the super capacitor;

the second determining module is used for determining the total electric quantity released by the super capacitor according to the electric quantity of the current acquisition period or determining the total energy released by the super capacitor according to the energy of the current acquisition period, wherein the total electric quantity is the sum of the electric quantity released by all the acquisition periods, and the total energy is the sum of the energy released by all the acquisition periods;

the third determining module is used for determining the minimum capacitance required by the super capacitor to finish one-time power-down protection operation;

the fourth determining module is used for determining the minimum electric quantity or the minimum energy required by the super capacitor to finish one-time power-down protection operation according to the minimum capacitance;

a fifth determining module, configured to determine a discharge allowable power according to the minimum power, or determine a discharge allowable power according to the minimum power, where the discharge allowable power is a difference between an actual power and the minimum power, and the actual power or the actual power is determined according to a last actual capacitance of the supercapacitor;

The control module is used for controlling the super capacitor to stop discharging under the condition that the total electric quantity reaches the discharge allowable electric quantity or the total energy reaches the discharge allowable energy;

the acquisition module is used for acquiring a first voltage value of the super capacitor at the time of stopping discharging;

and the calibration module is used for determining the current actual capacitance of the super capacitor according to the first voltage value.

15. A supercapacitor warning device, the device comprising:

the calibration module is used for determining the current actual capacitance of the super capacitor according to the first voltage value;

and the alarm module is used for sending first alarm information to the host computer under the condition that the current actual capacitance capacity is smaller than or equal to the minimum capacitance capacity.

16. A disk array card, comprising:

the super capacitor is used for supplying power to the cache module under the condition that the main power supply is powered off;

the processor is used for determining the electric quantity or energy released by the super capacitor in the current acquisition period in the process of controlling the discharge of the super capacitor;

the processor is further configured to determine a total electric quantity released by the supercapacitor according to the electric quantity of the current acquisition period, or determine a total energy released by the supercapacitor according to the energy of the current acquisition period, where the total electric quantity is a sum of electric quantities released by all the acquisition periods, and the total energy is a sum of energies released by all the acquisition periods;

the processor is further used for determining the minimum capacitance required by the super capacitor to complete one-time power-down protection operation;

the processor is further configured to determine, according to the minimum capacitance, a minimum electric quantity or a minimum energy required by the super capacitor to complete a power-down protection operation once;

the processor is further configured to determine a discharge allowable power according to the minimum power, or determine a discharge allowable power according to the minimum power, where the discharge allowable power is a difference between an actual power and the minimum power, and the actual power or the actual power is determined according to a last actual capacitance of the supercapacitor;

The processor is further configured to control the supercapacitor to stop discharging when the total electric quantity reaches the discharge allowable electric quantity or when the total energy reaches the discharge allowable energy;

the processor is further used for obtaining a first voltage value of the super capacitor at the time of stopping discharging;

the processor is further configured to determine an actual capacitance of the supercapacitor under the current calibration according to the first voltage value.

17. The disk array card of claim 16, wherein the disk array card further comprises a universal input output interface module;

the processor controls the discharge circuit of the super capacitor to discharge through the input/output interface module, and controls the discharge circuit of the super capacitor to stop discharging through the input/output interface module under the condition that the total electric quantity reaches the discharge allowable electric quantity or the total energy reaches the discharge allowable energy.

18. The disk array card of claim 16, wherein the disk array card further comprises an analog-to-digital converter;

the processor obtains the first voltage value through the analog-to-digital converter.

19. A disk array card, comprising:

the processor is further used for determining the current actual capacitance of the super capacitor according to the first voltage value;

20. A computer device, comprising:

a memory and a processor in communication with each other, the memory having stored therein computer instructions which, upon execution, perform the method of any one of claims 1 to 10 or the method of any one of claims 11 to 13.

21. A computer-readable storage medium having stored thereon computer instructions for causing a computer to perform the method of any one of claims 1 to 10 or to perform the method of any one of claims 11 to 13.