CN116709663A - Circuit board manufacturing method and circuit board - Google Patents

Circuit board manufacturing method and circuit board Download PDF

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Publication number
CN116709663A
CN116709663A CN202310741955.1A CN202310741955A CN116709663A CN 116709663 A CN116709663 A CN 116709663A CN 202310741955 A CN202310741955 A CN 202310741955A CN 116709663 A CN116709663 A CN 116709663A
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CN
China
Prior art keywords
circuit board
layer
copper foil
windowing
solder mask
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202310741955.1A
Other languages
Chinese (zh)
Inventor
朱万
黄英潮
麦锦潮
邹其昱
谭叶峰
贺玲玲
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Guangdong Zecheng Technology Co ltd
Original Assignee
Guangdong Zecheng Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Guangdong Zecheng Technology Co ltd filed Critical Guangdong Zecheng Technology Co ltd
Priority to CN202310741955.1A priority Critical patent/CN116709663A/en
Publication of CN116709663A publication Critical patent/CN116709663A/en
Pending legal-status Critical Current

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Abstract

The embodiment of the application provides a circuit board manufacturing method and a circuit board, wherein the method comprises the steps of attaching a solder mask to an original circuit board; pressing a dry film layer on the copper foil layer; exposing the original circuit board and developing a windowing position on the dry film layer; etching the copper foil layer corresponding to the windowing position and removing the film of the ink layer corresponding to the windowing position to form a BGA cavity; solidifying the solder mask; removing the copper foil layer to obtain a target circuit board; the solder resist film with the copper foil layer can expose the position of the BGA exposed copper, so that the small-size windowing position and the BGA cavity can be formed to meet the requirements of the patch; the copper exposure position can be effectively controlled, the exposure tolerance can be controlled, the windowing precision can be improved, and the gold surface can meet the SMT requirement during SMT welding; solves the problem that the exposure and development of small solder resist windowing ink in the precise solder joint area can not meet the windowing requirement.

Description

Circuit board manufacturing method and circuit board
Technical Field
The embodiment of the application relates to the field of circuit board manufacturing, but is not limited to the field of circuit board manufacturing, in particular to a circuit board manufacturing method and a circuit board.
Background
The solder mask layer refers to a part of green oil on the printed circuit board, and is mainly used for protecting a surface conductor from being exposed in the air to cause physical damages such as oxidization, scratching and the like. The solder mask layer usually has only an insulating ink layer, the ink is attached by whole-plate screen printing or using vacuum equipment, and then the bonding pads or pins are exposed in an exposing and developing mode. However, such a production process has difficulty in satisfying small-sized windowing such as 80um or less.
Disclosure of Invention
The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.
The application aims to at least solve one of the technical problems existing in the related art to a certain extent, and the embodiment of the application provides a circuit board manufacturing method and a circuit board, which solve the problem that exposure and development of small solder mask windowing ink in a precise solder joint area cannot meet windowing requirements.
An embodiment of a first aspect of the present application is a circuit board manufacturing method, including:
attaching a solder mask to an original circuit board, wherein the original circuit board comprises a dielectric layer and a circuit layer, and the solder mask comprises an ink layer and a copper foil layer;
pressing a dry film layer on the copper foil layer;
exposing the original circuit board and developing a windowing position on the dry film layer;
etching the copper foil layer corresponding to the windowing position and removing the film of the ink layer corresponding to the windowing position to form a BGA cavity;
solidifying the solder mask;
and removing the copper foil layer to obtain the target circuit board.
In certain embodiments of the first aspect of the present application, before the curing of the solder mask, the circuit board manufacturing method further includes: and removing the dry film layer.
In certain embodiments of the first aspect of the present application, the curing the solder mask comprises: and placing the original circuit board on a baking board for baking so as to cure the solder mask.
In certain embodiments of the first aspect of the present application, the curing temperature corresponding to curing the solder mask is 150 ℃.
In certain embodiments of the first aspect of the present application, the curing time corresponding to curing the solder mask is 2 hours.
In certain embodiments of the first aspect of the present application, the copper foil layer has a thickness in the range of 3 microns to 5 microns.
In certain embodiments of the first aspect of the present application, one side or two opposite sides of the dielectric layer are provided with the circuit layer.
In certain embodiments of the first aspect of the present application, the ink layer is located outside of the wiring layer; the copper foil layer is positioned on one side of the ink layer away from the original circuit board.
In certain embodiments of the first aspect of the present application, the BGA cavity has a length of less than 80 microns.
An embodiment of the second aspect of the present application is a circuit board manufactured by the circuit board manufacturing method as described above.
The scheme has at least the following beneficial effects: the solder resist film with the copper foil layer can expose the position of the BGA exposed copper, so that the small-size windowing position and the BGA cavity can be formed to meet the requirements of the patch; the method can effectively control the position of exposed copper and the exposure tolerance, improve the windowing precision, and ensure that the gold surface of the copper can meet the SMT requirement during SMT welding. The problem that the exposure and development of the small solder mask windowing ink in the precise solder joint area can not meet the windowing requirement is solved, and the application of the circuit board in high-density and small packaging devices is improved.
Drawings
The accompanying drawings are included to provide a further understanding of the application and are incorporated in and constitute a part of this specification, illustrate and do not limit the application.
Fig. 1 is a step diagram of a circuit board manufacturing method according to an embodiment of the present application;
FIG. 2 is a block diagram of an original circuit board;
fig. 3 is a block diagram of the original wiring board processed through step S100;
fig. 4 is a block diagram of the original wiring board processed through step S200;
fig. 5 is a block diagram of the original wiring board processed through step S300;
fig. 6 is a block diagram of the original wiring board processed through step S400;
fig. 7 is a structural view of an original circuit board from which a dry film layer is removed;
fig. 8 is a structural diagram of the target wiring board.
Detailed Description
The present application will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present application more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application.
It should be noted that although functional block division is performed in a device diagram and a logic sequence is shown in a flowchart, in some cases, the steps shown or described may be performed in a different order than the block division in the device, or in the flowchart. The terms first, second and the like in the description, in the claims and in the above-described figures, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order.
Embodiments of the present application will be further described below with reference to the accompanying drawings.
The solder mask layer refers to a part of green oil on the printed circuit board, and is mainly used for protecting a surface conductor from being exposed in the air to cause physical damages such as oxidization, scratching and the like. The solder mask layer usually has only an insulating ink layer, the ink is attached by whole-plate screen printing or using vacuum equipment, and then the bonding pads or pins are exposed in an exposing and developing mode. However, such a production process has difficulty in satisfying small-sized windowing such as 80um or less.
In order to solve the above problems, an embodiment of the present application provides a circuit board manufacturing method.
Referring to fig. 1, the circuit board manufacturing method includes:
step S100, attaching a solder mask to an original circuit board;
step S200, pressing a dry film layer on the copper foil layer;
step S300, exposing the original circuit board and developing a windowing position on the dry film layer;
step S400, etching the copper foil layer corresponding to the windowing position and stripping the ink layer corresponding to the windowing position to form a BGA cavity;
step S500, solidifying the solder mask;
and S600, removing the copper foil layer to obtain the target circuit board.
Referring to fig. 2, for step S100, the original circuit board includes a dielectric layer 10 and a circuit layer 20, it is understood that one side of the dielectric layer 10 is provided with the circuit layer 20, or opposite sides of the dielectric layer 10 are provided with the circuit layer 20.
Referring to fig. 3, the solder resist includes an ink layer 30 and a copper foil layer 40, the ink layer 30 is an insulating ink, which can be epoxy, polyurethane, acrylic, or the like, for insulating and protecting the wiring layer 20.
Specifically, the thickness of the copper foil layer 40 ranges from 3 micrometers to 5 micrometers.
Although an example in which the thickness of the copper foil layer 40 ranges from 3 micrometers to 5 micrometers is exemplified in this embodiment, this does not impose a limitation on the thickness range of the copper foil layer 40. In other embodiments, the thickness of the copper foil layer 40 may be set according to actual production requirements.
When the circuit layer 20 is disposed on one side of the dielectric layer 10, a solder mask is attached to the original circuit board on the side on which the circuit layer 20 is disposed. When the two sides of the dielectric layer 10 are provided with the circuit layer 20, the original circuit board is attached with the solder resist on the two opposite sides provided with the circuit layer 20.
And, the ink layer 30 is located outside the circuit layer 20, and the copper foil layer 40 is located at a side of the ink layer 30 away from the original circuit board.
It will be appreciated that the insulating ink is coated on the copper foil layer 40 to form the ink layer 30, so as to obtain a solder mask, and then the solder mask is attached to the original circuit board by a vacuum attaching device.
Referring to fig. 4, for step S200, the dry film layer 50 is laminated on the copper foil layer 40 by a vacuum lamination apparatus.
When the copper foil layer 40 is attached to one side of the dielectric layer 10, the dry film layer 50 is pressed on the copper foil layer 40 on the side; when the copper foil layers 40 are attached to opposite sides of the dielectric layer 10, the dry film layer 50 is laminated on the copper foil layers 40 on the opposite sides.
The Dry film (Dry film) is a polymer material, and can generate a polymerization reaction after irradiation of ultraviolet rays to form a stable substance attached to a plate surface, so that the functions of electroplating and etching are achieved.
The photosensitive dry film is generally a three-layer sandwich structure composed of a polyester film, a polyolefin film and a photosensitive film.
The polyester film is used as a carrier for supporting the photoresist layer, so that the film is coated and formed, the photosensitive film layer is protected from being damaged or stained in the operation process, the film is removed after exposure and before development in use, oxygen is prevented from diffusing to the resist layer in the exposure process, free radicals are destroyed, and the photosensitivity is reduced; the polyester film is generally a PET film having a thickness of 16. Mu.m. The polyolefin film is a protective film covering the photoresist layer to prevent dirt such as dust from adhering to the dry film, and each layer of resist film is prevented from adhering to each other when the film is rolled. Removing the film before film pressing; polyolefin films generally use polyethylene films about 25 μm thick. The photosensitive film is negative photosensitive film, namely photo-polymerization crosslinking photosensitive film; the components of the photoresist film generally comprise film forming resins, photopolymerization monomers, photoinitiators, plasticizers, adhesion promoters, thermal polymerization inhibitors and the like.
For step S300, the original circuit board is exposed and the fenestration site 60 is developed in the dry film layer 50. The length of the fenestration locations 60 is less than 80 microns.
Referring to fig. 5, an original circuit board is placed under an exposure lamp, and a mask corresponding to a windowing position 60 is placed on top of the original circuit board; the light emitted from the exposure lamp is uniformly reflected on the photosensitive dry film layer 50, and the negative pattern is transferred to the photosensitive dry film layer 50.
The dry film layer 50 that has not been exposed is dissolved and rinsed away by weak alkalinity of the developer, leaving the exposed portion to develop the fenestration site 60 in the dry film layer 50.
When an organic solvent is used as the developer and the stripping agent, for example, trichloroethane is used for development and methylene chloride is used for stripping, a solvent type dry film is used; when the full water-soluble dry film developer and the stripping agent are aqueous solutions of alkali, then the full water-soluble dry film is required; when a semi-water-soluble dry film developer and a film remover are used, it is necessary to use a semi-water-soluble dry film.
Referring to fig. 6, for step S400, the copper foil layer 40 corresponding to the window-opening position 60 is etched and the ink layer 30 corresponding to the window-opening position 60 is annealed to form the BGA cavity 70.
Specifically, the length of BGA cavity 70 is less than 80 microns.
Placing the original circuit board into an etching groove, and etching the solder mask corresponding to the window opening position 60 by using an etchant; it should be noted that the etchant does not affect other layers. The ink layer 30 corresponding to the window position 60 is removed by the film removing liquid. Thereby forming BGA cavity 70.
And cleaning the original circuit board through the cleaning agent, cleaning the etchant and other pollutants remained on the original circuit board, and drying the original circuit board to remove the residual cleaning agent.
Referring to fig. 7, the dry film layer 50 is removed and a film stripping process is performed.
For step S500, curing the solder mask includes: the original circuit board is placed on a baking plate to be baked, so that the solder resist film is cured.
Specifically, the curing temperature corresponding to the cured solder resist is 150 ℃.
Although an example in which the curing temperature corresponding to the cured solder resist film is 150 degrees celsius is cited in this embodiment, this is not limited to a specific value of the curing temperature. In other embodiments, the curing temperature may be set according to actual production requirements, such as 200 degrees celsius, etc.
The curing time corresponding to the curing of the solder resist was 2 hours.
Although an example is exemplified in which the curing time corresponding to curing the solder resist film is 2 hours in this embodiment, this is not limited to a specific value of the curing time. In other embodiments, the value of the curing time may be set according to actual production needs, such as 2.5 hours, etc.
Referring to fig. 8, for step S600, the copper foil layer 40 is removed to obtain a target circuit board. For example, chemical attack, thermal pressure stripping, or mechanical removal may be employed.
In this embodiment, exposing the position of BGA exposed copper is achieved by a solder resist film with copper foil layer 40, facilitating the formation of small sized fenestration sites 60 and BGA cavities 70 to meet the needs of the patch; the method can effectively control the position of exposed copper and the exposure tolerance, improve the windowing precision, and ensure that the gold surface of the copper can meet the SMT requirement during SMT welding.
The problem that the exposure and development of the small solder mask windowing ink in the precise solder joint area can not meet the windowing requirement is solved, and the application of the circuit board in high-density and small packaging devices is improved.
In another embodiment of the present application, a circuit board is provided.
The circuit board is manufactured by the circuit board manufacturing method.
Specifically, a solder mask is attached to an original circuit board; namely, insulating ink is coated on the copper foil layer 40 to form the ink layer 30, so that a solder mask is obtained, and then the solder mask is attached to an original circuit board through a vacuum attaching device, and the ink layer 30 faces one side of the original circuit board, and the copper foil layer 40 faces the outer side.
The dry film layer 50 is laminated on the copper foil layer 40 by a vacuum lamination apparatus.
Placing the original circuit board under an exposure lamp, and placing a mask corresponding to the windowing position 60 on top of the original circuit board; the light emitted from the exposure lamp is uniformly reflected on the photosensitive dry film layer 50, and the negative pattern is transferred to the photosensitive dry film layer 50. The dry film layer 50 that has not been exposed is dissolved and rinsed away by weak alkalinity of the developer, leaving the exposed portion to develop the fenestration site 60 in the dry film layer 50.
The original circuit board is placed in an etching bath and the solder mask corresponding to the fenestration site 60 is etched by an etchant to form a BGA cavity 70. And cleaning the original circuit board through the cleaning agent, cleaning the etchant and other pollutants remained on the original circuit board, and drying the original circuit board to remove the residual cleaning agent.
The original circuit board is placed on a baking plate to be baked, so that the solder resist film is cured. The corresponding curing temperature of the cured solder resist is 150 ℃. The curing time corresponding to the curing of the solder resist was 2 hours.
The copper foil layer 40 may be removed by chemical etching, thermal pressure peeling, mechanical removal, or the like to obtain a circuit board as a target product.
In this embodiment, exposing the position of BGA exposed copper is achieved by a solder resist film with copper foil layer 40, facilitating the formation of small sized fenestration sites 60 and BGA cavities 70 to meet the needs of the patch; the method can effectively control the position of exposed copper and the exposure tolerance, improve the windowing precision, and ensure that the gold surface of the copper can meet the SMT requirement during SMT welding.
The problem that the exposure and development of the small solder mask windowing ink in the precise solder joint area can not meet the windowing requirement is solved, and the application of the circuit board in high-density and small packaging devices is improved.
While embodiments of the present application have been shown and described, it will be understood by those of ordinary skill in the art that: many changes, modifications, substitutions and variations may be made to the embodiments without departing from the spirit and principles of the application, the scope of which is defined by the claims and their equivalents.
While the preferred embodiment of the present application has been described in detail, the present application is not limited to the embodiments, and those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present application, and the equivalent modifications or substitutions are intended to be included in the scope of the present application as defined in the appended claims.

Claims (10)

1. A method of manufacturing a circuit board, comprising:
attaching a solder mask to an original circuit board, wherein the original circuit board comprises a dielectric layer and a circuit layer, and the solder mask comprises an ink layer and a copper foil layer;
pressing a dry film layer on the copper foil layer;
exposing the original circuit board and developing a windowing position on the dry film layer;
etching the copper foil layer corresponding to the windowing position and removing the film of the ink layer corresponding to the windowing position to form a BGA cavity;
solidifying the solder mask;
and removing the copper foil layer to obtain the target circuit board.
2. The method of claim 1, further comprising, prior to said curing said solder mask: and removing the dry film layer.
3. The method of claim 1, wherein the curing the solder mask comprises: and placing the original circuit board on a baking board for baking so as to cure the solder mask.
4. The method of claim 1, wherein the curing temperature for curing the solder mask is 150 ℃.
5. The method of claim 1, wherein the curing time for curing the solder mask is 2 hours.
6. The method of claim 1, wherein the copper foil layer has a thickness in the range of 3 microns to 5 microns.
7. The method of claim 1, wherein the dielectric layer is provided with the circuit layer on one side or on opposite sides.
8. The method of claim 1, wherein the ink layer is located outside the circuit layer; the copper foil layer is positioned on one side of the ink layer away from the original circuit board.
9. The method of claim 1, wherein the BGA cavity has a length of less than 80 microns.
10. A circuit board, characterized in that the circuit board is manufactured by the circuit board manufacturing method according to any one of claims 1 to 9.
CN202310741955.1A 2023-06-20 2023-06-20 Circuit board manufacturing method and circuit board Pending CN116709663A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310741955.1A CN116709663A (en) 2023-06-20 2023-06-20 Circuit board manufacturing method and circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310741955.1A CN116709663A (en) 2023-06-20 2023-06-20 Circuit board manufacturing method and circuit board

Publications (1)

Publication Number Publication Date
CN116709663A true CN116709663A (en) 2023-09-05

Family

ID=87840856

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310741955.1A Pending CN116709663A (en) 2023-06-20 2023-06-20 Circuit board manufacturing method and circuit board

Country Status (1)

Country Link
CN (1) CN116709663A (en)

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