CN116684185A - Automatic road condition data synthesizing method - Google Patents
Automatic road condition data synthesizing method Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 10
- 230000002194 synthesizing effect Effects 0.000 title claims description 7
- 238000012360 testing method Methods 0.000 claims abstract description 64
- 230000002159 abnormal effect Effects 0.000 claims abstract description 20
- 230000009191 jumping Effects 0.000 claims abstract description 12
- 230000005856 abnormality Effects 0.000 claims abstract description 7
- 230000015572 biosynthetic process Effects 0.000 abstract description 10
- 238000003786 synthesis reaction Methods 0.000 abstract description 10
- 238000010998 test method Methods 0.000 abstract description 3
- 239000003990 capacitor Substances 0.000 description 109
- 230000005540 biological transmission Effects 0.000 description 28
- 238000003745 diagnosis Methods 0.000 description 10
- 238000010586 diagram Methods 0.000 description 10
- 230000001052 transient effect Effects 0.000 description 8
- 239000013078 crystal Substances 0.000 description 5
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- 101000734572 Homo sapiens Phosphoenolpyruvate carboxykinase, cytosolic [GTP] Proteins 0.000 description 1
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- 101000701286 Pseudomonas aeruginosa (strain ATCC 15692 / DSM 22644 / CIP 104116 / JCM 14847 / LMG 12228 / 1C / PRS 101 / PAO1) Alkanesulfonate monooxygenase Proteins 0.000 description 1
- 101100420795 Schizosaccharomyces pombe (strain 972 / ATCC 24843) sck1 gene Proteins 0.000 description 1
- 101000983349 Solanum commersonii Osmotin-like protein OSML13 Proteins 0.000 description 1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L63/00—Network architectures or network communication protocols for network security
- H04L63/14—Network architectures or network communication protocols for network security for detecting or protecting against malicious traffic
- H04L63/1408—Network architectures or network communication protocols for network security for detecting or protecting against malicious traffic by monitoring network traffic
- H04L63/1416—Event detection, e.g. attack signature detection
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L63/00—Network architectures or network communication protocols for network security
- H04L63/14—Network architectures or network communication protocols for network security for detecting or protecting against malicious traffic
- H04L63/1408—Network architectures or network communication protocols for network security for detecting or protecting against malicious traffic by monitoring network traffic
- H04L63/1425—Traffic logging, e.g. anomaly detection
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L63/00—Network architectures or network communication protocols for network security
- H04L63/14—Network architectures or network communication protocols for network security for detecting or protecting against malicious traffic
- H04L63/1433—Vulnerability analysis
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L2012/40208—Bus networks characterized by the use of a particular bus standard
- H04L2012/40215—Controller Area Network CAN
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L2012/40267—Bus for use in transportation systems
- H04L2012/40273—Bus for use in transportation systems the transportation system being a vehicle
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
- Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]
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Abstract
The invention provides an automatic road condition data synthesis test method, which comprises the following steps: step A: accessing test equipment, and receiving the whole vehicle data packet 1 for a period of time by using a CAN bus signal receiving and transmitting unit; and (B) step (B): the method comprises the steps of accessing test equipment, receiving a whole vehicle message by using a CAN bus signal receiving and transmitting unit, and transmitting an undefined ID of the whole vehicle by using the CAN signal receiving and transmitting unit, wherein a data section of the undefined ID of the whole vehicle defines the message according to experience; step C: judging whether the vehicle has an abnormal condition or not in the traversing period, if so, jumping to D, otherwise, continuing until the traversing is completed; step D: searching an abnormal message through a CAN bus abnormality analysis unit, and jumping to E; step E: after the abnormal message is blurred through the CAN bus blurring unit, checking whether other abnormal conditions occur; and after the completion, jumping to B, and continuing traversing the unfinished content. The invention achieves the aim of attack by traversing undefined ID, and verifies the consistency of ECU.
Description
Technical Field
The invention relates to the technical field of vehicle-mounted network attack, in particular to an automatic road condition data synthesizing method.
Background
The CAN is a serial communication protocol bus for real-time application and effectively supporting a distributed control system, is one of the most widely used field buses in global application, has high real-time property and strong anti-interference capability, and is suitable for automobiles and industrial control applications.
With the development of the internet of vehicles technology, the safety of the vehicle-mounted network is paid more attention to, the safety of the vehicle-mounted network system is related to the life and property safety of users, and if the vehicle-mounted network system is attacked maliciously, the whole system network cannot work normally, so that enterprise clients suffer significant losses. In order to improve the safety and stability of the CAN network, problems are found by network attack means in various aspects, and measures are taken in time to avoid risks.
Disclosure of Invention
The invention aims at least solving the technical problems existing in the prior art, and particularly creatively provides an automatic road condition data synthesizing method.
In order to achieve the above object of the present invention, the present invention provides an automatic road condition data synthesizing and testing device, comprising a testing box body, wherein a PCB diagnosis circuit board fixing mount for fixing a PCB diagnosis circuit board is provided in the testing box body, the PCB diagnosis circuit board is fixedly mounted on the PCB diagnosis circuit board fixing mount, and a microcontroller U1, a USB data transmission module and a CAN data transmission module are provided on the PCB diagnosis circuit board;
the front surface of the test box body is provided with a touch display screen fixing and mounting seat for fixedly mounting a touch display screen, and the touch display screen is fixedly mounted on the touch display screen fixing and mounting seat; a USB interface mounting seat for fixedly mounting a USB interface JP4 is arranged on the left side surface of the test box body, the USB interface JP4 is fixedly mounted on the USB interface mounting seat, a CAN interface mounting seat for fixedly mounting a CAN interface JP1 and a CAN interface JP2 is arranged on the right side surface of the test box body, and the CAN interface JP1 and the CAN interface JP2 are fixedly mounted on the CAN interface mounting seat;
the USB data transmission end of the microcontroller U1 is connected with the data transmission end of the USB data transmission module, the CAN data transmission end of the microcontroller U1 is connected with the data transmission end of the CAN data transmission module, and the touch display end of the microcontroller U1 is connected with the touch display end of the touch display screen.
In a preferred embodiment of the present invention, the USB data transmission module includes: the power output end of the USB interface JP4 is respectively connected with the first end of the FUSE1 and the first end of the capacitor C23, the power output end of the USB interface JP4 outputs a power USB_VCC, the second end of the FUSE FUSE1 is respectively connected with the first end of the capacitor C27 and the power input end IN of the voltage reduction chip U2, the second end of the FUSE FUSE1 outputs a power +5V, the second end of the capacitor C27 is connected with the power ground, the power ground end GND of the voltage reduction chip U2 is connected with the power ground, the power output end of the voltage reduction chip U2 is respectively connected with the first end of the capacitor C26, the first end of the capacitor C28 and the first end of the FUSE FUSE2, the second end of the FUSE FUSE2 outputs a power 3V3, and the first end of the capacitor C26 and the first end of the capacitor C28 are respectively connected with the power ground;
the power output grounding end of the USB interface JP4 and the second end of the capacitor C23 are respectively connected with the power ground, the data USB negative end of the USB interface JP4 is connected with the first end of the resistor R6, the second end of the resistor R6 is respectively connected with the first end of the capacitor C24 and the USB data negative end DDM of the microcontroller U1, the data USB positive end of the USB interface JP4 is respectively connected with the first end of the resistor R5 and the first end of the resistor R7, the second end of the resistor R7 is respectively connected with the first end of the capacitor C25 and the USB data positive end DDP of the microcontroller U1, the second end of the capacitor C24 and the second end of the capacitor C25 are respectively connected with the power ground, the second end of the resistor R5 is connected with the collector of the triode Q1, the emitter of the triode Q1 is respectively connected with the power 3V3 and the first end of the resistor R16, and the second end of the resistor R17 is respectively connected with the USB control enabling end PA 8/RTSP 0/NPCS 3 of the microcontroller U1.
In a preferred embodiment of the invention, the CAN data transmission module comprises: the data receiving end RXD of the CAN transceiver U7 is respectively connected with the first end of the resistor R3 and the CAN data transmitting end PA19/CANRX of the microcontroller U1, and the data transmitting end TXD of the CAN transceiver U7 is connected with the CAN data receiving end PA20/CANTX of the microcontroller U1;
the power end VCC of the CAN transceiver U7 is respectively connected with a power supply +5V, the first end of a capacitor C21 and the first end of a capacitor C22, the second end of the capacitor C21 and the second end of the capacitor C22 are respectively connected with power supply ground, the grounding end GND of the CAN transceiver U7 is connected with the power supply ground, and the mode end RS of the CAN transceiver U7 is connected with the additional CAN mode end PA18/SPI0_SPCK of the microcontroller U1;
the CAN data high end CANH of the CAN transceiver U7 is respectively connected with the data high end of the CAN interface JP1 and the data high end of the CAN interface JP2, the CAN data low end CANL of the CAN transceiver U7 is respectively connected with the data low end of the CAN interface JP2 and the first end of the adjustable terminal resistor R4, and the second end of the adjustable terminal resistor R4 is connected with the data low end of the CAN interface JP 1.
The invention also discloses an automatic road condition data synthesis test system, which comprises a vehicle to be diagnosed and automatic road condition data synthesis test equipment;
the road condition data automatic synthesis test equipment is connected with the vehicle to be diagnosed through the CAN bus;
the system also comprises a CAN bus signal receiving and transmitting unit, a CAN bus signal catalog traversing unit, a CAN bus abnormality analyzing unit and a CAN bus blurring unit;
the CAN bus signal receiving and transmitting unit is used for transmitting the generated directory traversal message;
the CAN bus signal catalog traversing unit is used for generating a message to be traversed;
the CAN bus anomaly analysis unit is used for positioning anomaly messages;
the CAN bus blurring unit is used for blurring the message data segment to carry out blurring test attack.
The invention also discloses a road condition data automatic synthesis test method, which comprises the following steps:
step A: accessing test equipment, and receiving the whole vehicle data packet 1 for a period of time by using a CAN bus signal receiving and transmitting unit;
and (B) step (B): the method comprises the steps of accessing test equipment, receiving a whole vehicle message by using a CAN bus signal receiving and transmitting unit, and transmitting an undefined ID of the whole vehicle by using the CAN signal receiving and transmitting unit, wherein a data section of the undefined ID of the whole vehicle defines the message according to experience;
step C: judging whether the vehicle has an abnormal condition or not in the traversing period, if so, jumping to D, otherwise, continuing until the traversing is completed;
step D: searching an abnormal message through a CAN bus abnormality analysis unit, and jumping to E;
step E: after the abnormal message is blurred through the CAN bus blurring unit, checking whether other abnormal conditions occur; and after the completion, jumping to B, and continuing traversing the unfinished content.
In a preferred embodiment of the present invention, the following operations are performed in parallel with the above-described step test:
and observing the current state of the vehicle to be tested, judging whether the obtained current state accords with the expected state, if so, not making any further judgment, otherwise, judging that the state of the vehicle to be tested is changed due to the aggressiveness test.
In summary, by adopting the technical scheme, the method achieves the purpose of attack by traversing the undefined ID, and verifies the consistency of the ECU.
Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
Drawings
The foregoing and/or additional aspects and advantages of the invention will become apparent and may be better understood from the following description of embodiments taken in conjunction with the accompanying drawings in which:
fig. 1 is a schematic block diagram of a flow of the present invention.
Fig. 2 is a schematic block diagram of the connection of the present invention.
Fig. 3 is a schematic circuit connection diagram of a USB data transmission module according to the present invention.
Fig. 4 is a schematic circuit connection diagram of the CAN data transmission module of the present invention.
Fig. 5 is a schematic diagram of circuit connection of the RS232 data transmission module according to the present invention.
Fig. 6 is a schematic circuit connection diagram of a data switching module according to the present invention.
FIG. 7 is a schematic diagram of a key set module circuit connection according to the present invention.
Fig. 8 is a schematic diagram of circuit connection of the indicator light assembly module according to the present invention.
FIG. 9 is a schematic diagram of the circuit connection of the test module of the present invention.
Fig. 10 is a schematic diagram of the circuit connections of the microcontroller of the present invention.
Detailed Description
Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are illustrative only and are not to be construed as limiting the invention.
The invention discloses automatic road condition data synthesis test equipment, which comprises a test box body, wherein a PCB diagnosis circuit board fixed mounting seat for fixedly mounting a PCB diagnosis circuit board is arranged in the test box body, the PCB diagnosis circuit board is fixedly mounted on the PCB diagnosis circuit board fixed mounting seat, and a microcontroller U1, a USB data transmission module, a CAN data transmission module, an RS232 data transmission module, a key set module and an indicator lamp set module are arranged on the PCB diagnosis circuit board as shown in figures 2-10;
the front of the test box body is provided with a touch display screen fixed mounting seat for fixedly mounting a touch display screen, a key set mounting seat for fixedly mounting a key set, and an indicator lamp set mounting seat for fixedly mounting an indicator lamp set, wherein the touch display screen is fixedly mounted on the touch display screen fixed mounting seat, the key set is fixedly mounted on the key set mounting seat, and the indicator lamp set is fixedly mounted on the indicator lamp set mounting seat; the testing device comprises a testing box body, wherein a USB interface mounting seat for fixedly mounting a USB interface JP4 is arranged on the left side face of the testing box body, the USB interface JP4 is fixedly mounted on the USB interface mounting seat, CAN interface mounting seats for fixedly mounting a CAN interface JP1 and a CAN interface JP2 are arranged on the right side face of the testing box body, the CAN interface JP1 and the CAN interface JP2 are fixedly mounted on the CAN interface mounting seat, an RS232 interface mounting seat for fixedly mounting an RS232 interface JP6 is arranged on the front side face of the testing box body, an RS232 interface JP6 is fixedly mounted on the RS232 interface mounting seat, a testing interface mounting seat for fixedly mounting a testing interface JP1 is arranged on the rear side face of the testing box body, and the testing interface JP1 is fixedly mounted on the testing interface mounting seat;
the USB data transmission end of the microcontroller U1 is connected with the data transmission end of the USB data transmission module, the CAN data transmission end of the microcontroller U1 is connected with the data transmission end of the CAN data transmission module, the RS232 data transmission end of the microcontroller U1 is connected with the data transmission end of the RS232 data transmission module, the key group end of the microcontroller U1 is connected with the key end of the key group module, and the indication lamp group end of the microcontroller U1 is connected with the indication end of the indication lamp group module; the touch display end of the microcontroller U1 is connected with the touch display end of the touch display screen.
In a preferred embodiment of the present invention, the USB data transmission module includes: the power output end of the USB interface JP4 is respectively connected with the first end of the FUSE1 and the first end of the capacitor C23, the power output end of the USB interface JP4 outputs a power USB_VCC, the second end of the FUSE FUSE1 is respectively connected with the first end of the capacitor C27 and the power input end IN of the voltage reduction chip U2, the second end of the FUSE FUSE1 outputs a power +5V, the second end of the capacitor C27 is connected with the power ground, the power ground end GND of the voltage reduction chip U2 is connected with the power ground, the power output end of the voltage reduction chip U2 is respectively connected with the first end of the capacitor C26, the first end of the capacitor C28 and the first end of the FUSE FUSE2, the second end of the FUSE FUSE2 outputs a power 3V3, and the first end of the capacitor C26 and the first end of the capacitor C28 are respectively connected with the power ground;
the power output grounding end of the USB interface JP4 and the second end of the capacitor C23 are respectively connected with the power ground, the data USB negative end of the USB interface JP4 is connected with the first end of the resistor R6, the second end of the resistor R6 is respectively connected with the first end of the capacitor C24 and the USB data negative end DDM of the microcontroller U1, the data USB positive end of the USB interface JP4 is respectively connected with the first end of the resistor R5 and the first end of the resistor R7, the second end of the resistor R7 is respectively connected with the first end of the capacitor C25 and the USB data positive end DDP of the microcontroller U1, the second end of the capacitor C24 and the second end of the capacitor C25 are respectively connected with the power ground, the second end of the resistor R5 is connected with the collector of the triode Q1, the emitter of the triode Q1 is respectively connected with the power 3V3 and the first end of the resistor R16, and the second end of the resistor R17 is respectively connected with the USB control enabling end PA 8/RTSP 0/NPCS 3 of the microcontroller U1. The resistance of the resistor R16 is 47K, the resistance of the resistor R17 is 1.2K, the model of the triode Q1 is 8550S, the resistance of the resistor R5 is 1.5K, the resistances of the resistor R6 and the resistor R7 are 25 omega, the capacitance of the capacitor C24 and the capacitor C25 is 15pF, the capacitance of the capacitor C23 is 100nF, the capacitance of the capacitor C27 and the capacitor C28 is 47uF, the capacitance of the capacitor C26 is 0.1F, and the model of the buck chip U2 is REG1117-3.3.
In a preferred embodiment of the invention, the CAN data transmission module comprises: the data receiving end RXD of the CAN transceiver U7 is respectively connected with the first end of the resistor R3 and the CAN data transmitting end PA19/CANRX of the microcontroller U1, and the data transmitting end TXD of the CAN transceiver U7 is connected with the CAN data receiving end PA20/CANTX of the microcontroller U1;
the power end VCC of the CAN transceiver U7 is respectively connected with a power supply +5V, the first end of a capacitor C21 and the first end of a capacitor C22, the second end of the capacitor C21 and the second end of the capacitor C22 are respectively connected with power supply ground, the grounding end GND of the CAN transceiver U7 is connected with the power supply ground, and the mode end RS of the CAN transceiver U7 is connected with the additional CAN mode end PA18/SPI0_SPCK of the microcontroller U1;
the CAN data high end CANH of the CAN transceiver U7 is respectively connected with the data high end of the CAN interface JP1 and the data high end of the CAN interface JP2, the CAN data low end CANL of the CAN transceiver U7 is respectively connected with the data low end of the CAN interface JP2 and the first end of the adjustable terminal resistor R4, and the second end of the adjustable terminal resistor R4 is connected with the data low end of the CAN interface JP 1. The resistance value of the resistor R3 is 1.5K, the model of the CAN transceiver U7 is TJA1050, the capacitor C21 is 104, the capacitance value of the capacitor C22 is 10uF, and the resistance value of the adjustable termination resistor R4 is 120Ω.
In a preferred embodiment of the present invention, the RS232 data transmission module includes: the charge pump end V+ of the RS232 chip U3 is connected with the first end of the capacitor C30, the second end of the capacitor C30 is connected with the power ground, the positive end C1+ of the voltage doubling capacitor of the RS232 chip U3 is connected with the first end of the capacitor C32, the voltage doubling capacitor Rong Fuduan C1-of the RS232 chip U3 is connected with the second end of the capacitor C32, the transmitter input end T1in of the RS232 chip U3 is connected with the data end PA1/TXD0 of the microcontroller U1, the receiver output end R1out of the RS232 chip U3 is connected with the data end PA0/RXD0 of the microcontroller U1, the transmitter input end T2in of the RS232 chip U3 is connected with the data end PA28/DTXD 3 of the microcontroller U1, the receiver output end R2 of the RS232 chip U3 is connected with the data end PA27/DRXD/PCK3 of the microcontroller U1, the charge pump end V-of the RS232 chip U3 is connected with the first end of the capacitor C33, and the second end of the capacitor C33 is connected with the power ground;
the power end VCC of the RS232 chip U3 is connected with a power supply 3V3 and a first end of a capacitor C29 respectively, a second end of the capacitor C29 is connected with power supply ground, a voltage doubling capacitor Rong Fuduan C2-of the RS232 chip U3 is connected with a first end of the capacitor C31, a voltage doubling capacitor positive end C2+ of the RS232 chip U3 is connected with a second end of the capacitor C31, a transmitter output end T1out of the RS232 chip U3 is connected with a data receiving end of an RS232 interface JP6, a receiver input end R1out of the RS232 chip U3 is connected with a data transmitting end of the RS232 interface JP6, a grounding end of the RS232 interface JP6 is connected with power supply ground, a transmitter output end T2out of the RS232 chip U3 is connected with a data receiving end of an RS232 interface JP7, and a grounding end of the RS232 interface JP7 is connected with power supply ground; the ground GND of the RS232 chip U3 is connected to the power ground. The capacitance values of the capacitor C29, the capacitor C30, the capacitor C31, the capacitor C32 and the capacitor C33 are 120nf, and the model number of the rs232 chip U3 is MAX3232.
In a preferred embodiment of the present invention, further comprising a data switching module, the data switching module comprising: the data output end of the data switching chip U6 is connected with the data receiving end PA5/RXD1 of the microcontroller U1, the data input end of the data switching chip U6 is connected with the data transmitting end PA6/TXD1 of the microcontroller U1, and the grounding end GND of the data switching chip U6 is connected with the power supply ground;
the power end of the data switching chip U6 is connected with a power supply +5V and the first end of the capacitor C34 respectively, and the second end of the capacitor C34 is connected with the power supply ground; the receiver data positive end of the data switching chip U6 is respectively connected with the first end of a resistor R9, the input end VIN2 of a transient suppressor U4 and the data first positive end of an interface JP5, the second end of the resistor R9 is connected with the power ground, the receiver data negative end of the data switching chip U6 is respectively connected with the first end of a resistor R8, the input end VIN1 of the transient suppressor U4 and the data first negative end of the interface JP5, the second end of the resistor R8 is connected with the power ground, and the ground end of the transient suppressor U4 is connected with the power ground;
the transmitter data negative terminal of the data switching chip U6 is respectively connected with the input end VIN1 of the transient suppressor U5 and the data second negative terminal of the interface JP5, the transmitter data positive terminal of the data switching chip U6 is respectively connected with the input end VIN2 of the transient suppressor U5 and the data second positive terminal of the interface JP5, and the grounding terminal of the transient suppressor U5 is connected with the power supply ground. The data switching chip U6 has a model number MAX488, the capacitor C34 has a capacitance value of 100nF, the resistors R8 and R9 have a resistance value of 3.3K, and the transient suppressor U4 and the transient suppressor U5 have a model number SM712.
In a preferred embodiment of the present invention, the key set module includes: the first end of the key S4 is connected with the first end of the power supply 3V3, the second end of the key S4 is connected with the ERASE end ERASE of the microcontroller U1, the first end of the key S2 is connected with the power supply ground, the second end of the key S2 is connected with the key end PA11/TWCK of the microcontroller U1, the first end of the key S3 is connected with the power supply ground, the second end of the key S3 is connected with the key end PA10/TWD of the microcontroller U1, the first end of the key S5 is connected with the power supply ground, and the second end of the key S5 is connected with the reset end NRST of the microcontroller U1. Wherein the model of the data switching chip U6 is MAX488, the capacitance value of the capacitor C34 is 100nF, the resistance values of the resistor R8 and the resistor R9 are 3.3K,
in a preferred embodiment of the present invention, the indicator light bank module includes: the cathode of the power indicator light LED3 is connected with power ground, the anode of the power indicator light LED3 is connected with the first end of the resistor R10, and the second end of the resistor R10 is connected with the power supply 3V 3; the negative electrode of the indicator light LED11 is connected with the power ground, the positive electrode of the indicator light LED11 is connected with the first end of the resistor R13, and the second end of the resistor R13 is connected with the indicator end PA13/SPI0_NPCS1/PCK1 of the microcontroller U1; the negative electrode of the indicator light LED22 is connected with the power ground, the positive electrode of the indicator light LED22 is connected with the first end of the resistor R14, and the second end of the resistor R14 is connected with the indicator end PA12/SPI0_NPCS0 of the microcontroller U1; the negative pole of pilot lamp LED44 links to each other with power ground, and the positive pole of pilot lamp LED44 links to each other with the first end of resistance R11, and the second end of resistance R11 links to each other with microcontroller U1's pilot terminal PA7/SCK1/SPI0_NPCS 1. The resistances of the resistors R10, R11, R13, and R14 are 2.2K.
In a preferred embodiment of the present invention, further comprising a test module, the test module comprising: the test data input end TDI of the microcontroller U1 is respectively connected with the first end of a resistor R55 and the test data output end of a test interface JP1, and the second end of the resistor R55 is connected with a power supply 3V 3; the test mode selection end TMS of the microcontroller U1 is respectively connected with the first end of the resistor R53 and the test mode selection end of the test interface JP1, and the second end of the resistor R53 is connected with the power supply 3V 3; the test clock end TCK of the microcontroller U1 is respectively connected with the first end of the resistor R51 and the test clock end of the test interface JP1, and the second end of the resistor R51 is connected with the power supply 3V 3; the test data output end of the microcontroller U1 is connected with the test data input end of the test interface JP 1; the wiper end NRST of the microcontroller U1 is respectively connected with the first end of the resistor R15 and the wiper end of the test interface JP1, and the second end of the resistor R15 is connected with the power supply 3V 3; the power supply 3V3 is connected to the first end of the resistor R57, the second end of the resistor R51 is connected to the first test end of the test interface JP1, the power supply 3V3 is connected to the second test end of the test interface JP1, and the ground end of the test interface JP1 is connected to the power supply ground. The resistance of the resistor R15 is 10K, and the resistances of the resistors R51, R53, R55, and R57 are 4.7K.
In a preferred embodiment of the present invention, the voltage stabilizing output terminal VDDOUT of the microcontroller U1 is connected to the power supply terminal VDDCORE of the microcontroller U1, the first terminal of the capacitor C3, the first terminal of the capacitor C4, the first terminal of the capacitor C5, the first terminal of the capacitor C6 and the first terminal of the capacitor C18, and the second terminal of the capacitor C3, the second terminal of the capacitor C4, the second terminal of the capacitor C5, the second terminal of the capacitor C6 and the second terminal of the capacitor C18 are connected to the power supply ground, respectively; the power supply end VDDIO of the microcontroller U1 is respectively connected with the first end of a capacitor C7, the first end of a capacitor C8, the first end of a capacitor C9, the first end of a capacitor C10, the first end of a capacitor C11 and a power supply 3V3, and the second end of the capacitor C7, the second end of the capacitor C8, the second end of the capacitor C9, the second end of the capacitor C10 and the second end of the capacitor C11 are respectively connected with power supply ground; the grounding end of the microcontroller U1 is connected with the power supply ground; the crystal oscillator end XIN of the microcontroller U1 is respectively connected with the first end of the capacitor C12 and the first end of the crystal oscillator Y1, the crystal oscillator end XOUT of the microcontroller U1 is respectively connected with the first end of the capacitor C13 and the second end of the crystal oscillator Y1, and the second end of the capacitor C12 and the second end of the capacitor C13 are respectively connected with power supply ground; the power supply end VDDCLL of the microcontroller U1 is respectively connected with the first end of the capacitor C14 and the voltage-stabilizing output end VDDOUT of the microcontroller U1, and the second end of the capacitor C14 is connected with power supply ground; the filter end of the microcontroller U1 is respectively connected with the first end of the capacitor C15 and the first end of the resistor R2, the second end of the resistor R2 is connected with the first end of the capacitor C16, and the second end of the capacitor C15 and the second end of the capacitor C16 are respectively connected with power ground; the power supply end VDDIN of the microcontroller U1 is respectively connected with a power supply 3V3, a first end of a capacitor C1 and a first end of a capacitor C17, and a second end of the capacitor C1 and a second end of the capacitor C17 are respectively connected with power supply ground; the power supply end VDDBSH of the microcontroller U1 is respectively connected with the power supply 3V3 and the first end of the capacitor C2, and the second end of the capacitor C2 is respectively connected with the power supply ground; the analog-digital voltage reference end of the microcontroller U1 is respectively connected with the first end of the capacitor C19 and the first end of the inductor L1, the second end of the inductor L1 is respectively connected with the first end of the capacitor C20 and the power supply 3V3, and the second end of the capacitor C19 and the second end of the capacitor C20 are respectively connected with the power supply ground. The capacitance value of the capacitor C18 is 10uF, the capacitance values of the capacitors C3-C11 are 100nF, the capacitance values of the capacitors C12 and C13 are 10pF, the frequency of the crystal oscillator Y1 is 18.4MHz, the capacitance value of the capacitor C15 is 1nF, the capacitance values of the capacitors C1, C2, C14, C17, C19 and C20 are 100nF, the capacitance value of the capacitor C16 is 10nF, and the model of the microcontroller U1 is ATM89C52.
The invention also discloses an automatic road condition data synthesis test system, which comprises a vehicle to be diagnosed and automatic road condition data synthesis test equipment;
the road condition data automatic synthesis test equipment is connected with the vehicle to be diagnosed through the CAN bus; the USB interface JP4 is connected with a +5V power connector, and +5V power is input to the USB interface JP 4.
The system also comprises a CAN bus signal receiving and transmitting unit, a CAN bus signal catalog traversing unit, a CAN bus abnormality analyzing unit and a CAN bus blurring unit;
the CAN bus signal receiving and transmitting unit is used for transmitting the generated directory traversal message;
the CAN bus signal catalog traversing unit is used for generating a message to be traversed;
the CAN bus anomaly analysis unit is used for searching or defining anomaly messages;
the CAN bus blurring unit is used for blurring the message data segment to carry out blurring test attack.
Based on a plurality of messages which are not defined in a communication matrix and play an important role in the vehicle, the loopholes are not normally discovered by users and do not influence the normal use of the functions of the whole vehicle, but unexpected damage can be caused once an attacker finds out, and the conditions such as vehicle function failure abnormality and the like can be caused when serious, so that the life and property safety of the users can be endangered.
The invention also discloses a road condition data automatic synthesis test method, if the ECU uses undefined ID to debug related functions or other contents, the vehicle can be attacked by traversing all undefined ID through the catalogue, as shown in figure 1, comprising the following steps:
step A: accessing test equipment, and receiving the whole vehicle data packet 1 for a period of time by using a CAN bus signal receiving and transmitting unit; the data packet 1 may include, but is not limited to, road condition data;
and (B) step (B): the access test equipment receives a whole vehicle message by using the CAN bus signal receiving and transmitting unit, and sends an undefined ID of the whole vehicle by using the CAN bus signal receiving and transmitting unit, wherein the undefined ID CAN comprise undefined road condition data, and the undefined ID obtaining method comprises the following steps:
firstly, extracting a character string with the length of P of a continuous character string in a normal definition ID of the whole vehicle; p is the length of the character string smaller than the normal definition ID of the whole vehicle;
secondly, performing MD5 abstracting algorithm on the extracted character string to obtain an abstracted ID character string;
third, replacing the extracted character string with an abstract ID character string; the undefined ID is obtained.
The data segment whose ID is not defined may also define the message empirically.
Step C: judging whether the vehicle has an abnormal condition or not in the traversing period, if so, jumping to D, otherwise, continuing until the traversing is completed;
step D: searching an abnormal message through a CAN bus abnormality analysis unit, and jumping to E;
step E: after the abnormal message is blurred through the CAN bus blurring unit, checking whether other abnormal conditions occur; and after the completion, jumping to B, and continuing traversing the unfinished content. In this embodiment, the method for blurring the abnormal message includes:
firstly, extracting character strings with the length of K of continuous character strings in abnormal messages; k is the length of the character string smaller than the abnormal message;
secondly, performing MD5 abstract algorithm on the extracted character strings to obtain abstract character strings;
thirdly, replacing the character string at the extraction position with a abstract character string; obtaining the fuzzy abnormal message.
In a preferred embodiment of the present invention, the following operations are performed in parallel with the above-described step test:
and observing the current state of the vehicle to be tested, judging whether the obtained current state accords with the expected state, if so, not making any further judgment, otherwise, judging that the state of the vehicle to be tested is changed due to the aggressiveness test.
While embodiments of the present invention have been shown and described, it will be understood by those of ordinary skill in the art that: many changes, modifications, substitutions and variations may be made to the embodiments without departing from the spirit and principles of the invention, the scope of which is defined by the claims and their equivalents.
Claims (2)
1. The automatic road condition data synthesizing and testing method is characterized by comprising the following steps:
step A: accessing test equipment, and receiving the whole vehicle data packet 1 for a period of time by using a CAN bus signal receiving and transmitting unit;
and (B) step (B): the method comprises the steps of accessing test equipment, receiving a whole vehicle message by using a CAN bus signal receiving and transmitting unit, and transmitting an undefined ID of the whole vehicle by using the CAN bus signal receiving and transmitting unit;
step C: judging whether the vehicle has an abnormal condition or not in the traversing period, if so, jumping to D, otherwise, continuing until the traversing is completed;
step D: searching an abnormal message through a CAN bus abnormality analysis unit, and jumping to E;
step E: after the abnormal message is blurred through the CAN bus blurring unit, checking whether other abnormal conditions occur; and after the completion, jumping to B, and continuing traversing the unfinished content.
2. The automatic road condition data synthesizing test according to claim 5, wherein the following operations are performed while the above steps are performed:
and observing the current state of the vehicle to be tested, judging whether the obtained current state accords with the expected state, if so, not making any further judgment, otherwise, judging that the state of the vehicle to be tested is changed due to the aggressiveness test.
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