CN116666249A - Wafer testing method - Google Patents
Wafer testing method Download PDFInfo
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- CN116666249A CN116666249A CN202310940049.4A CN202310940049A CN116666249A CN 116666249 A CN116666249 A CN 116666249A CN 202310940049 A CN202310940049 A CN 202310940049A CN 116666249 A CN116666249 A CN 116666249A
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- 238000012360 testing method Methods 0.000 title claims abstract description 144
- 235000012431 wafers Nutrition 0.000 claims abstract description 218
- 239000002994 raw material Substances 0.000 claims abstract description 77
- 239000000463 material Substances 0.000 claims abstract description 74
- 230000007306 turnover Effects 0.000 claims abstract description 64
- 238000000034 method Methods 0.000 claims description 9
- 238000010998 test method Methods 0.000 claims description 9
- 238000007599 discharging Methods 0.000 claims description 4
- 230000006872 improvement Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 230000008859 change Effects 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000739 chaotic effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B07—SEPARATING SOLIDS FROM SOLIDS; SORTING
- B07C—POSTAL SORTING; SORTING INDIVIDUAL ARTICLES, OR BULK MATERIAL FIT TO BE SORTED PIECE-MEAL, e.g. BY PICKING
- B07C5/00—Sorting according to a characteristic or feature of the articles or material being sorted, e.g. by control effected by devices which detect or measure such characteristic or feature; Sorting by manually actuated devices, e.g. switches
- B07C5/02—Measures preceding sorting, e.g. arranging articles in a stream orientating
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B07—SEPARATING SOLIDS FROM SOLIDS; SORTING
- B07C—POSTAL SORTING; SORTING INDIVIDUAL ARTICLES, OR BULK MATERIAL FIT TO BE SORTED PIECE-MEAL, e.g. BY PICKING
- B07C5/00—Sorting according to a characteristic or feature of the articles or material being sorted, e.g. by control effected by devices which detect or measure such characteristic or feature; Sorting by manually actuated devices, e.g. switches
- B07C5/34—Sorting according to other particular properties
- B07C5/344—Sorting according to other particular properties according to electric or electromagnetic properties
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B07—SEPARATING SOLIDS FROM SOLIDS; SORTING
- B07C—POSTAL SORTING; SORTING INDIVIDUAL ARTICLES, OR BULK MATERIAL FIT TO BE SORTED PIECE-MEAL, e.g. BY PICKING
- B07C5/00—Sorting according to a characteristic or feature of the articles or material being sorted, e.g. by control effected by devices which detect or measure such characteristic or feature; Sorting by manually actuated devices, e.g. switches
- B07C5/36—Sorting apparatus characterised by the means used for distribution
- B07C5/361—Processing or control devices therefor, e.g. escort memory
- B07C5/362—Separating or distributor mechanisms
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B07—SEPARATING SOLIDS FROM SOLIDS; SORTING
- B07C—POSTAL SORTING; SORTING INDIVIDUAL ARTICLES, OR BULK MATERIAL FIT TO BE SORTED PIECE-MEAL, e.g. BY PICKING
- B07C5/00—Sorting according to a characteristic or feature of the articles or material being sorted, e.g. by control effected by devices which detect or measure such characteristic or feature; Sorting by manually actuated devices, e.g. switches
- B07C5/36—Sorting apparatus characterised by the means used for distribution
- B07C5/38—Collecting or arranging articles in groups
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/282—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
- G01R31/2831—Testing of materials or semi-finished products, e.g. semiconductor wafers or substrates
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2832—Specific tests of electronic circuits not provided for elsewhere
- G01R31/2834—Automated test systems [ATE]; using microprocessors or computers
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2893—Handling, conveying or loading, e.g. belts, boats, vacuum fingers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
- Y02P90/30—Computing systems specially adapted for manufacturing
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- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
The application provides a wafer testing method which is applied to testing equipment, wherein the testing equipment is provided with a plurality of trays, grabbing components and testing components, and the wafer testing method comprises the following steps: s1, dividing a region of the test equipment for placing a material tray into a raw material region for placing a wafer to be tested and a state region for placing the wafer to be tested, wherein the ratio of the raw material region to the state region is greater than 1; s2, feeding, namely placing the wafer to be tested in the raw material area; s3, controlling the grabbing component to grab the wafer in the material tray of the raw material area to the testing component for testing, and grabbing and placing the wafer in the material tray corresponding to the state area after testing. According to the application, the empty material tray of the material area is defined as the turnover area, and the tested wafers are moved to the turnover area for placement through the grabbing component when the state area is full, so that the number of times of blanking in the single-round test state area is reduced, the wafer test efficiency is improved, and the labor cost is reduced.
Description
Technical Field
The application relates to the technical field of semiconductors, in particular to a wafer testing method.
Background
In the wafer manufacturing process, after the wafer is manufactured, chip detection is performed on the wafer to verify whether the wafer functions normally, and poor products are selected or performance grade classification is performed.
At present, in the semiconductor test, a link is to detect a wafer through a circuit board by adopting test equipment, and divide the wafer into different states according to quality class, while in the conventional test method, a region to be tested of the test equipment is divided into a raw material region and a state region, but because the state region stores wafers in different states, when the raw material region is tested to a certain extent, a certain state of the wafer in the state region can be placed without space, staff needs to perform material collection and disc replacement actions, and needs to wait for next round of material loading after all tests of the raw material region are completed, and in the process of all tests of the raw material region, the wafer in the state region needs to be subjected to material collection for multiple times, so that the test efficiency is reduced, the number of test equipment which can be controlled by a single person is less, and the required labor cost is high.
In view of the foregoing, it is necessary to provide a solution to the above-mentioned problems.
Disclosure of Invention
The application aims at: the wafer testing method is provided to solve the problems of low testing efficiency and high labor cost in the testing method.
In order to achieve the above purpose, the present application adopts the following technical scheme:
a wafer test method applied to a test apparatus having a plurality of trays, the wafer test method comprising the steps of:
s1, dividing a region of the test equipment for placing a material tray into a raw material region for placing a wafer to be tested and a state region for placing the wafer to be tested, wherein the ratio of the raw material region to the state region is greater than 1;
s2, feeding, namely placing the wafer to be tested in the raw material area;
s3, controlling the grabbing component to grab the wafer in the material tray of the raw material area to the testing component for testing, and grabbing and placing the wafer in the material tray corresponding to the state area after the testing is finished;
s4, when an empty tray exists in the raw material area, defining the empty tray as a turnover tray, defining an area corresponding to the turnover tray as a turnover area, and when the state area is full of the tray corresponding to the currently tested wafer, grabbing the currently tested wafer to the corresponding turnover tray by the grabbing component, wherein the area of the raw material area is reduced, and if the turnover area is full of the tray corresponding to the currently tested wafer, discharging the state area and the full tray of the turnover area;
s5, if the tray of the raw material area still has the wafer to be tested, executing the step S3, otherwise, executing the step S6
S6, after the test is finished, blanking the state area and the turnover area, and recovering the area corresponding to the raw material area to the initial setting.
As an improvement of the wafer testing method, in the step S3, the status area is set into a plurality of placement areas, and the plurality of placement areas are used for placing wafers in different statuses, and the testing device places the wafers in the corresponding placement areas according to the tested data.
As an improvement of the wafer testing method, in the step S4, after any one of the placement areas is full, whether the trays corresponding to the placement area in the turnover area are empty or not is detected, if so, the wafer is placed in the turnover area, and if not, the tray full of the placement area and the status area is prompted to be discharged.
As an improvement of the wafer testing method, in the step S3, a plurality of placement areas are classified by the status area according to the integrity of the wafer performance, for distinguishing the good grade of the wafer.
As an improvement of the wafer test method, in the step S1, a material area is provided as the tray near the side of the test part, and the material area is located between the test part and the status area.
As an improvement of the wafer test method, in the step S2, the placement area is divided into at least 4 pieces.
As an improvement of the wafer testing method, in the step S2, the ratio of the four placement areas is controlled and adjusted by wafer output in different states.
Compared with the prior art, the application has the beneficial effects that:
1) The application divides the material tray of the testing equipment into a material area and a state area with the occupation ratio of more than 1, the grabbing component grabs the wafer from the material area until the testing component tests and puts the wafer in the state area, and defines the empty material tray of the material area as a turnover area, and when the wafer in a certain state of the state area is fully loaded, the corresponding material tray of the turnover area is searched for to put, or staff is prompted to carry out blanking on the full-load material tray of the state area and the turnover area; the empty material trays in the raw material area are used for storing the tested wafers, so that the times of receiving materials in the state area are effectively reduced, the number of controllable testing devices by a single person is increased, and the efficiency of wafer testing is improved.
2) According to the application, the ratio of the raw material area to the state area is set to be 3 to 1, so that the number of wafers to be tested in single feeding is greatly increased, the feeding times are shortened, and the testing speed is effectively improved.
3) According to the application, through the division design of the raw material area and the state area, when the state area is not provided with a fully loaded tray, the to-be-tested wafer on the tray at the forefront side of the raw material area is firstly grasped, the to-be-tested wafer is closest to the test seat, the moving stroke is short, when the state area is provided with the fully loaded tray, the to-be-tested wafer is grasped from the raw material area to the test part for testing, the test is completed and placed in the turnover area, and the turnover area is an empty tray at the front side of the raw material area, the to-be-tested tray is still closest to the test seat, the moving stroke is short, the moving distance of the wafer from the to-be-tested to the tested tray is greatly shortened, and the time spent from the test to the test completion is shortened, so that the test efficiency of the test equipment is improved.
Drawings
In order to more clearly illustrate the embodiments of the application or the technical solutions of the prior art, the drawings which are used in the description of the embodiments or the prior art will be briefly described, it being obvious that the drawings in the description below are only some embodiments of the application, and that other drawings can be obtained according to these drawings without inventive faculty for a person skilled in the art.
Fig. 1 is a schematic flow chart of a wafer testing method according to the present application.
FIG. 2 is a second flow chart of a wafer testing method according to the present application.
FIG. 3 is a timing diagram of a wafer test method according to the present application.
FIG. 4 is a second timing diagram of a wafer test method according to the present application.
Fig. 5 is a schematic perspective view of a testing apparatus according to the present application.
FIG. 6 is a schematic diagram of a test apparatus according to a second embodiment of the present application.
Fig. 7 is a partial top view of a test apparatus provided by the present application.
FIG. 8 is a schematic diagram of the structure of the material zone and the status zone of a test apparatus according to the present application.
In the figure: 1-tray, 2-raw material area, 3-state area, 4-test part, 5-grabbing part.
Detailed Description
In order to make the technical scheme and advantages of the present application more apparent, the present application and its advantageous effects will be described in further detail below with reference to the detailed description and the accompanying drawings, but the embodiments of the present application are not limited thereto.
In the description of the present application, unless explicitly stated and limited otherwise, the terms "mounted," "connected," and "secured" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the above terms in the present application will be understood in specific cases by those of ordinary skill in the art.
Standard parts used in the application can be purchased from the market, special-shaped parts can be customized according to the description of the specification and the drawings, the specific connection modes of all parts adopt conventional means such as mature bolts, rivets and welding in the prior art, the machinery, the parts and the equipment adopt conventional models in the prior art, and the circuit connection adopts conventional connection modes in the prior art, so that the details are not described.
As shown in fig. 1, a wafer testing method is applied to a testing apparatus having a plurality of trays 1, and the wafer testing method includes the steps of:
s1, setting test equipment, dividing a region of the test equipment for placing the tray 1 into a raw material region 2 for placing a wafer to be tested and a state region 3 for placing the wafer to be tested, and enabling the ratio of the raw material region 2 to the state region 3 to be greater than 1;
s2, feeding, namely placing the wafer to be tested in the raw material area;
s3, controlling the grabbing component 5 to grab the wafer in the material tray of the raw material area to a testing component for testing, and grabbing and placing the wafer in the material tray corresponding to the state area after the testing;
s4, when an empty material tray exists in the material area, defining the empty material tray as a turnover material tray, defining a region corresponding to the turnover material tray as a turnover area, and when the state area and the material tray corresponding to the currently tested wafer are full, grabbing the currently tested wafer to the corresponding turnover material tray by the grabbing component 5, wherein the capacity of materials which can be placed in the material area is reduced, and if the turnover area corresponds to the full material tray of the currently tested wafer, discharging the material tray with the state area and the full material turnover area;
s5, if the tray of the raw material area still has the wafer to be tested, executing the step S3, otherwise executing the step S6;
s6, after the test is finished, blanking the state area and the turnover area, and recovering the area corresponding to the raw material area to the initial setting.
Specifically, the test component is used for testing data of the wafer about the flash memory, the test equipment is provided with 32 trays 1, the 32 trays 1 are divided into four rows, 8 trays 1 are arranged in each row, the test component 4 is close to the long edge of one side of the square, three trays 1 close to the test component 4 are used as raw material areas 2, and the remaining row is used as a state area 3. The state area 3 defines the wafers into a plurality of different states for classifying and placing, meanwhile, in the testing process, the empty material tray 1 of the material area 2 is defined as a turnover material tray for storing the wafers in the corresponding state, the state corresponds to the state area 3 and is used for storing the wafers overflowed after the state area 3 is full, and the area of the turnover material tray is defined as a turnover area.
When the whole tray of the raw material area 2 is tested, the tray 1 is converted into a turnover tray in a set state from the raw material area 2, the material after being tested by the test component 4 of the test equipment is preferentially placed in the state area 3, when a certain state defined by the state area 3 is full, the material is placed on the turnover tray for storing the wafer in the corresponding state, when the trays 1 of the state area 3 and the turnover area are full of the wafer in the certain state, staff is prompted to discharge the wafer on the full tray 1 in the state area 3 and the turnover area, then the non-whole tray material tested in the raw material area 2 is placed in the turnover area 3, then the grabbing component 5 is used for grabbing the remaining wafer to be tested in the raw material area 2, so that the wafer to be tested in the raw material area 2 is completely tested, the staff is used for discharging the wafer on the full tray 1 in the state area 3, then the wafer to be tested on the full tray 1 in the raw material area 2 is placed on the wafer area 1, and then the wafer to be tested is continuously tested in a circulation mode, and the wafer to be tested is not grabbed.
The test equipment is provided with an alarm, a display screen and a control panel, a control system of the control panel displays and sets the states of 32 trays through the display, when the state area and the turnover area are full, the test equipment starts the alarm through the control panel to send out a prompt bell, prompts a worker to take out wafers on the trays full of the state area and the turnover area for blanking, and meanwhile, the control panel marks red the trays full of the state area and the turnover area through the display, so that the worker is further prompted to carry out blanking.
According to the application, a material tray 1 of the testing equipment is divided into a raw material area 2 and a state area 3 with the ratio of more than 1, the specific ratio is 3 to 1, wafers are grabbed from the raw material area 2 until the testing part 4 is tested and placed in the state area 3, and when the wafers in a certain state of the state area 3 are fully loaded, empty material trays 1 corresponding to the turnover area are searched for placement, or staff is prompted to perform blanking on full-load material trays of the state area 3 and the turnover area; the empty material tray of the raw material area 2 is defined as a turnover material tray and used for storing the tested wafers, so that the number of times of receiving materials for the state area 3 is effectively reduced, the number of single controllable testing devices is increased, and the efficiency of wafer testing is further improved. The ratio of the raw material area 2 to the state area 3 is set to be 3 to 1, so that the number of wafers to be tested in single feeding is greatly increased, the feeding times are shortened, and the testing speed is effectively improved.
In some embodiments, in step S3, the status area 3 is set to a plurality of placement areas, where the plurality of placement areas are used for placing wafers in different statuses, and the test apparatus places the wafers in the corresponding placement areas according to the tested data. Specifically, the eight trays 1 in the state area 3 are split into a plurality of placement areas, the plurality of areas are divided according to data obtained by testing, and then wafers in the corresponding areas are placed in the corresponding placement areas, so that the tested wafers are classified and subdivided, the placement level of the tested wafers is clear, and the wafers are more convenient to receive.
In some embodiments, in step S4, after any one of the placement areas is full, it is detected whether the tray 1 corresponding to the placement area in the transfer area is empty, if so, the wafer is placed in the transfer area, if not, the tray full of the placement area and the status area is prompted to be discharged. Specifically, each empty tray 1 in the raw material area 2 is defined as a turnover tray, the turnover tray is used for storing wafers in the same state as the corresponding placement area in the straight line direction, and when one of the placement areas is full of the trays 1, whether empty trays 1 exist in the same-row turnover area in the placement area is detected, the tested wafers are placed in the tray 1, or a person is prompted to collect the fully loaded placement area. Through dividing the turnover tray 1 of turnover district also according to placing the duty cycle between the district for even the wafer that the test was done is placed in the turnover district, but personnel also can be more clear audio-visual discernment different state's wafer when receiving the material, and under the condition that does not change its duty cycle, the position of receiving the material at every turn is unchangeable, and the wafer of different states is by in proper order and neatly distributed, avoids the test to accomplish, and the wafer of different states is chaotic to be put, makes the personnel receive the material and places the wafer of different states together easily, influences the subsequent process at last, need again give out the wafer of confusion, thereby reduce efficiency and the effect of test.
In some embodiments, in step S3, the plurality of placement areas are classified by the status area 3 according to the integrity of the wafer performance, for distinguishing the good grade of the wafer. Specifically, in semiconductor testing, a link is to divide raw materials into different state categories through circuit board detection, the raw materials are the wafers, so that the state area 3 is divided into a plurality of placement areas for placing the wafers in the different state categories, the category is distinguished by the integrity of the wafer performance, whether the wafer is damaged or not is tested, whether the function is complete or not is divided into a plurality of different state categories, and the quality degree of the wafers is distinguished to realize the classification of good products.
In some embodiments, as shown in fig. 5, 6 and 7, in step S1, the raw material area 2 is provided as a tray 1 near one side of the test part 4, and the raw material area 2 is located between the test part 4 and the status area 3. Specifically, three discharge trays 1 close to the test part 4, that is, 75% of the trays 1 are set as a material area 2, one discharge tray 1 far away from the test part 4 is set as a status area 3, the material area 2 is located between the test part 4 and the status area 3, and thus, when the trays 1 in the status area 3 are fully loaded, the grabbing part 5 grabs wafers in the material area 2, and then the wafers are placed in a turnover area, wherein the turnover area is an empty tray 1 at the forefront side of the material area 2. Therefore, when the state area 3 does not have the fully loaded tray 1, the wafer to be tested on the tray 1 at the forefront side of the raw material area 2 is firstly grabbed, the moving stroke is short, when the state area 3 has the fully loaded tray 1, the wafer to be tested is grabbed from the raw material area 2 to the test part 4 for testing, the wafer is completely placed in the turnover area close to the test part 4, the wafer is still nearest to the test seat, the moving stroke is short, the moving distance of the wafer from the test to the complete placement is greatly shortened, and the time spent for the wafer is shortened, so that the testing efficiency of the testing equipment is improved.
More specifically, as shown in fig. 8, the wafer to be tested is subjected to grabbing test and placement by the grabbing component 5, the 1 st to 24 th trays 1 are the raw material area 2, the 25 th to 32 nd trays 1 are the status area 3, the grabbing component 5 grabs the wafer to be tested from the 1 st tray 1, and the number of the testing components 4 is multiple, specifically 8, so as to form a testing area, and the number of the opening of the testing components 4 can be controlled according to actual production requirements.
In some embodiments, in step S2, the placement area is divided into a number of at least 4. Specifically, the duty ratio of the four placement areas is (60% -75%): (10% -20%): (5% -15%): (2% -10%). The ratio of the four placement areas is set to 70%, 15%, 10% and 5% according to the output of the wafer multi-round test; the wafer is divided into four different state categories by test data, namely a state A, a state B, a state C and a state D, wherein the state A is a wafer with the performance integrity of 100%, the state B is a wafer with the performance integrity of 50% -99%, the state C is a wafer with the performance integrity of 25% -49%, and the state D is a wafer with the performance integrity of below 25%. The four placing areas are respectively a first placing area for placing the state A wafers, a second placing area for placing the state B wafers, a third placing area for placing the state C wafers and a fourth placing area for placing the state D wafers, most of the performance integrity of the wafers is between 90% and 100%, the occupation ratio of the first placing area for storing the state A wafers with the largest quantity is set between 60% and 75%, the occupation ratio of the four placing areas is reasonably divided, the situation that the first placing area and the material area 2 are used for placing the state A after the material disc 1 is fully loaded is avoided, material collection processing is needed, or the wafers are placed on other material discs 1, so that the testing efficiency is affected, the placing of the tested wafers is not regular any more, and the material collection of workers is inconvenient. After the wafers to be tested in the raw material area 2 are tested, the wafers in four states are still arranged in sequence, and the wafers are clear and visual during material collection, so that material collection is facilitated, material collection efficiency is improved, and the number of test equipment which can be controlled by workers at the same time is increased.
In some embodiments, in the step S2, the duty ratios of the four placement areas are controlled and adjusted by wafer output in different states. Specifically, a duty ratio is set according to the set duty ratio range, a round is tested first, if the material is required to be received before the test is finished, the duty ratios of the four placement areas are readjusted by obtaining the output of the wafers in different states of the round, the duty ratio gradually accords with the wafer output duty ratio of the production line, the material is required to be received once after the wafer in the raw material area 2 is tested,
referring to fig. 2, fig. 2 is a flow chart of an embodiment of a wafer testing method according to the present application, the method includes:
s1, feeding a raw material area 2, namely placing a wafer to be tested on a material tray 1 of the raw material area 2 for feeding;
s2, equipment testing, namely starting testing equipment, and grabbing a wafer to be tested in the raw material area 2 to a testing component 4 by the testing equipment to perform testing;
s3, after the test is finished, the test equipment classifies the wafer into four states, namely a state A, a state B, a state C and a state D according to the data obtained by the test;
s4, detecting whether the tray 1 in the placement area for storing the state A wafer, the state B wafer, the state C wafer and the state D wafer in the state area 3 is full, and if the tray 1 in the state area 3 for storing the state A wafer is not full, placing the wafer classified as the state A and the wafer classified as the state A in the tray 1 until the state area 3 is full for storing the tray 1 of the state A wafer; if the tray 1 for storing the state a wafers in the state area 3 is detected to be full, detecting whether the tray 1 in the turnover area defined as the state a wafers in the raw material area 2 is full, otherwise, placing the wafers classified as the state a and the wafers classified as the state a on the tray 1 in the turnover area until the tray 1 in the turnover area for storing the state a wafers is full; if yes, prompting personnel to collect the full tray 1; and the placing treatment of the wafers classified into the state B, the state C and the state D is carried out in the same way;
s5, receiving and feeding for staff: after the tray 1 in the placement area and the tray 1 in the turnover area for storing any one of the state a, the state B, the state C and the state D are full, or after the wafers to be tested in the raw material area 2 are tested, the worker is prompted to collect the tray 1 full of the turnover area and the state area 3, the wafers on the tray 1 which are not full in the turnover area are moved to the state area 3 for storing the state area 3 on the tray 1 in the corresponding state, and then the tray 1 in the raw material area 2 is loaded for continuous testing.
Referring to fig. 3, fig. 3 is a first timing diagram of a wafer testing method according to the present application. The method comprises the following steps:
the first row 1-32 on the left represents 32 trays 1, the second row represents the state set by each tray 1, and the upper 24 trays 1 are marked as YL, YL is the raw material area 2, the upper 24 trays 1 are the raw material area 2, the lower 8 trays 1 are the state area 3, and the 8 trays 1 in the state area 3 are divided into A, B, C, D four states. The third column represents loading of the tray 1 of the feed zone 2, showing that 100% indicates that the wafers on the tray 1 are full. The next 24 columns of columns, which are marked with serial numbers 1-24 at the top, represent twenty-four trays 1 of the stock area 2 after testing all trays 1 for a change in the number of wafers.
The wafers to be tested of the first tray 1 of the raw material area 2 are tested, 70% of the wafers are placed on the first tray 1 for storing the wafers in the state A, 15% of the wafers are placed on the first tray 1 for storing the wafers in the state B, 10% of the wafers are placed on the first tray 1 for storing the wafers in the state C, and 5% of the wafers are placed on the first tray 1 for storing the wafers in the state D in the state area 3.
The wafers to be tested on the trays 1 from 1 to 5 in the raw material area 2 are tested, the trays 1 in the state area 3 for storing the wafers in the state A are all full, the empty tray of the first tray 1 in the raw material area 2 is defined as a turnover area for storing the wafers in the state A, 50% of the wafers are stored in the first tray 1 in the state area 3, 75% of the wafers are placed in the first tray 1 for storing the wafers in the state B, 50% of the wafers are placed in the first tray 1 for storing the wafers in the state C, and 25% of the wafers are placed in the first tray 1 for storing the wafers in the state D.
The sequence is shown as a sequence number 23, the trays 1 in the state area 3 and the turnover area 2 for storing the state A are all full, but 100% of wafers to be tested remain in the 24 th tray 1 in the raw material area 2, the personnel are prompted to receive the wafers, the wafers which are full in the turnover area and the state area 3 and are tested are received, the wafers which are not full of the trays 1 and are tested are placed at the corresponding positions of the state area 3, then when the wafers to be tested in the 24 th tray in the raw material area 2 are tested, the personnel also need to take out the wafers in the full storage tray, the wafers which are not full of the trays 1 and are tested are placed at the corresponding positions of the state area 3, and finally the trays 1 in the raw material area 2 are fed. Therefore, the purpose that only two times of material collection are needed in one round of test is achieved, the test efficiency is effectively improved, the work of testers is reduced, and the labor cost is reduced.
Referring to fig. 4, fig. 4 is a second timing chart of the wafer testing method according to the present application, and the wafer duty ratio of each state is adjusted according to the first timing chart and the test data. The method comprises the following steps: the 22 nd tray 1 of the raw material area 2 is defined as a turnover area for storing the wafers in the state D after empty, and is modified into a turnover area for storing the wafers in the state A after empty, so that the materials do not need to be received before the wafers to be tested of the twenty-four trays 1 of the raw material area 2 are tested, the materials are discharged once after the testing, and finally the raw material area 2 is fed. Further reduces the work of testers, ensures that each wheel only needs to go up and down once, improves the quantity of the test equipment which can be controlled by a single tester, and greatly improves the test efficiency of the wafer.
Variations and modifications of the above embodiments will occur to those skilled in the art to which the application pertains from the foregoing disclosure and teachings. Therefore, the present application is not limited to the above-described embodiments, but is intended to be capable of modification, substitution or variation in light thereof, which will be apparent to those skilled in the art in light of the present teachings. In addition, although specific terms are used in the present specification, these terms are for convenience of description only and do not limit the present application in any way.
Claims (7)
1. The wafer testing method is characterized in that the wafer testing method is applied to testing equipment, the testing equipment is provided with a plurality of trays, grabbing components and testing components, and the wafer testing method comprises the following steps:
s1, dividing a region of the test equipment for placing a material tray into a raw material region for placing a wafer to be tested and a state region for placing the wafer to be tested, wherein the ratio of the raw material region to the state region is greater than 1;
s2, feeding, namely placing the wafer to be tested in the raw material area;
s3, controlling the grabbing component to grab the wafer in the material tray of the raw material area to the testing component for testing, and grabbing and placing the wafer in the material tray corresponding to the state area after the testing is finished;
s4, when an empty tray exists in the raw material area, defining the empty tray as a turnover tray, defining an area corresponding to the turnover tray as a turnover area, and when the state area is full of the tray corresponding to the currently tested wafer, grabbing the currently tested wafer to the corresponding turnover tray by the grabbing component, wherein the area of the raw material area is reduced, and if the turnover area is full of the tray corresponding to the currently tested wafer, discharging the state area and the full tray of the turnover area;
s5, if the wafer to be tested remains in the tray of the raw material area, executing the step S3, otherwise executing the step S6;
s6, after the test is finished, blanking the state area and the turnover area, and recovering the area corresponding to the raw material area to the initial setting.
2. The wafer testing method according to claim 1, wherein in the step S3, the status area is configured as a plurality of placement areas, and the plurality of placement areas are used for placing wafers in different statuses, and the testing apparatus places the wafers in the respective placement areas according to the tested data.
3. The method according to claim 2, wherein in the step S4, after any one of the placement areas is full, whether the trays corresponding to the placement area in the turn-around area are empty or not is detected, if so, the wafer is placed in the turn-around area, and if not, the tray full of the placement area and the status area is prompted to be discharged.
4. The method according to claim 2, wherein in the step S3, a plurality of placement areas are classified by the status area according to the integrity of the wafer performance, for distinguishing the wafer quality level.
5. The wafer test method according to claim 1, wherein in the step S1, a raw material area is provided as the tray near one side of the test part, and the raw material area is located between the test part and the status area.
6. A wafer test method according to any one of claims 2-4, wherein in step S2 the placement area is divided into at least 4 pieces.
7. The method according to claim 6, wherein in the step S2, the ratios of the four placement areas are controlled and adjusted by wafer output in different states.
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