CN116611075A - Detection method, os detection firmware and system for preventing attack chip during XIP starting - Google Patents
Detection method, os detection firmware and system for preventing attack chip during XIP starting Download PDFInfo
- Publication number
- CN116611075A CN116611075A CN202310876051.XA CN202310876051A CN116611075A CN 116611075 A CN116611075 A CN 116611075A CN 202310876051 A CN202310876051 A CN 202310876051A CN 116611075 A CN116611075 A CN 116611075A
- Authority
- CN
- China
- Prior art keywords
- firmware
- detection
- starting
- boot
- key
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000001514 detection method Methods 0.000 title claims abstract description 145
- 238000000034 method Methods 0.000 claims abstract description 33
- 230000002159 abnormal effect Effects 0.000 claims abstract description 27
- 239000002245 particle Substances 0.000 claims abstract description 22
- 230000000737 periodic effect Effects 0.000 claims abstract description 11
- 239000008187 granular material Substances 0.000 claims description 7
- 230000002265 prevention Effects 0.000 claims description 7
- 230000000977 initiatory effect Effects 0.000 claims description 6
- 238000012795 verification Methods 0.000 claims description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000000750 progressive effect Effects 0.000 description 4
- 238000002347 injection Methods 0.000 description 3
- 239000007924 injection Substances 0.000 description 3
- 238000004364 calculation method Methods 0.000 description 2
- 238000013475 authorization Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000010485 coping Effects 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
- 230000001960 triggered effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
- G06F21/57—Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities
- G06F21/575—Secure boot
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/60—Protecting data
- G06F21/602—Providing cryptographic facilities or services
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/60—Protecting data
- G06F21/64—Protecting data integrity, e.g. using checksums, certificates or signatures
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Health & Medical Sciences (AREA)
- Bioethics (AREA)
- General Health & Medical Sciences (AREA)
- Storage Device Security (AREA)
Abstract
The invention relates to a detection method, os detection firmware and a system for preventing attack chips during XIP starting, wherein the method comprises the steps of setting a starting program of a starting component in a CPU chip system by adopting a preset software code, acquiring a power-on signal according to the starting program, sequentially starting bootrom firmware, os guide firmware and os detection firmware by the power-on signal, loading the os firmware into an abnormal vector of the os detection firmware by adopting the os detection firmware according to a preset periodic safety detection triggering condition, carrying out content tampering judgment on a flash particle space by adopting the abnormal vector, carrying out system resetting on the CPU chip system if the content is judged to be tampered, and re-executing the detection process, calling the os firmware to carry out the XIP starting program if the content is judged not to be tampered, judging whether the CPU chip system is attacked and tampered or not by adding a detection method flow of the first-level os detection firmware, and increasing the safety and reliability of chip use.
Description
Technical Field
The invention relates to the technical field of chip protection safety, in particular to a detection method, os detection firmware and system for preventing an attack chip during XIP starting.
Background
In the design of a CPU chip system with a safe starting mode, in order to save resources and cost, a synchronous dynamic random access memory SDRAM is not arranged, but only a static random access memory SRAM with small capacity is arranged in the CPU to be used as a memory space; in order to enable the os firmware to be normally operated, the os firmware needs to be executed on a flash, and the starting mode for executing the os firmware program is called XIP starting.
Because the flash particles are detachable at any time, the used scene is generally only used for storing data, the safe division of the CPU chip to the flash particles is generally unsafe, namely the data in the flash particles is defaulted to be unsafe, and in order to ensure the safety of a CPU chip system, the data in the flash particles need to be copied into a memory before being used, and the copied data in the memory is used after being checked by a plurality of safe encryption and decryption algorithms, so that the safety and reliability of the data in the memory of the CPU chip system are not affected even if the data in the flash particles are maliciously tampered.
However, for the current XIP start scenario, since the os firmware is executed on the flash, an attacker can replace the os firmware provided by the attacker by replacing the flash granule before the CPU chip system starts, or tamper the code in the flash granule in the process of executing the os firmware, so as to achieve the purpose of attack.
Disclosure of Invention
The invention mainly aims to provide a detection method, os detection firmware and a system for preventing an attack chip during XIP starting, which are used for judging whether the CPU chip system is attacked and tampered during XIP starting by adding a detection method flow of the first-level os detection firmware, so that the safety and reliability of chip use are improved, and the risk of chip injection attack is reduced.
In order to achieve the above object, the present invention provides a method for detecting an attack prevention chip during XIP startup, comprising the steps of:
s1, setting a starting program of a starting component in a CPU chip system by adopting a preset software code, wherein the starting component comprises a bootrom firmware, an os guide firmware, an os detection firmware and an os firmware;
s2, acquiring a power-on signal according to the starting program, and starting bootrom firmware, os guide firmware and os detection firmware in sequence through the power-on signal;
s3, loading the os firmware into an abnormal vector of the os detection firmware by adopting the os detection firmware according to a preset periodic safety detection triggering condition;
s4, performing content tampering judgment on a flash particle space through the abnormal vector, wherein the flash particle space is used for storing os firmware;
s41, if the content is judged to be tampered, resetting the CPU chip system, and re-executing the detection process of S2-S4;
s42, if the content is judged not to be tampered, invoking os firmware to perform an XIP startup procedure.
Further, the step of setting a start program for a start component in the CPU chip system by using a preset software code includes:
identifying a boot feature from the initiating component;
and generating an encryption guide program based on the guide characteristic so as to correspondingly create a step-by-step key when the starting program is set by the encryption guide program, wherein the step-by-step key comprises a bootrom key, an os guide key, an os detection key and an os firmware key.
Further, according to the starting program, a power-on signal is obtained, and the bootrom firmware, the os boot firmware and the os detection firmware are started in sequence through the power-on signal, which comprises the following steps:
matching the bootrom secret key with the guide characteristic of the bootrom firmware, and entering the next stage if the bootrom secret key is matched with the guide characteristic of the bootrom firmware;
matching the os boot key with the boot feature of the os boot firmware, and entering the next stage if the os boot key is matched with the boot feature of the os boot firmware;
matching the os detection secret key with the guide characteristic of the os detection firmware, and entering the next stage if the key is matched with the guide characteristic;
and if any stage cannot be matched and/or cannot be matched in sequence, closing the starting program.
Further, the step of loading os firmware into an anomaly vector of the os detection firmware according to a preset periodic security detection triggering condition by adopting the os detection firmware comprises the following steps:
acquiring a current time stamp;
determining a past time stamp of the os detection firmware for loading the abnormal vector by the os detection firmware before executing according to the current time stamp, and generating a time interval between the current time stamp and the past time stamp;
judging whether the time interval is smaller than a preset time period interval or not;
if not, the os detection firmware loads os firmware into an abnormal vector of the os detection firmware to carry out a detection program.
Further, the step of performing content tampering judgment on the flash particle space through the abnormal vector comprises the following steps:
and comparing the abnormal vector with os firmware in the flash particle space to judge whether difference information exists or not.
The invention provides an os detection firmware which is applied to the detection method for preventing an attack chip during starting of the XIP, and the starting sequence of a starting program sequentially comprises the following steps: bootrom firmware, os boot firmware, os detection firmware, and os firmware.
Further, the os detection firmware is stored in a flash granule space.
Further, the os detection firmware is provided with an anomaly vector program and a key verification program.
The invention also provides a CPU chip system, which executes the steps of the detection method for preventing the attack chip when the XIP is started.
The detection method, os detection firmware and system for preventing attack chips during XIP starting provided by the invention have the following beneficial effects:
(1) The software implementation scheme for periodically checking the flash firmware is realized by utilizing the safety interrupt, so that whether the software executed by the XIP is tampered or not is judged, whether the starting of the XIP is legal or not is judged, the CPU is prevented from running an unlicensed software mirror image, and the safety and reliability of the chip use are improved. The risk of the chip being attacked by injection is reduced.
(2) Prevention of attacks: according to the technical scheme, the attack chip is prevented through a plurality of steps and safety detection, so that the safety of the system is improved.
(3) Integrity check: and judging the content tampering of the flash grain space, so that the flash grain space storing the OS firmware is ensured not to be modified or tampered without authorization.
(4) Anomaly vector program and key verification: the os detection firmware comprises an abnormal vector program and a key verification program, which are used for ensuring the safety and the integrity, and performing boot feature matching and key verification in the starting process.
(5) And (3) resetting the system: if the content of the flash particle space is tampered, the system resets the system and re-executes the detection process to ensure the integrity and the safety of the starting component.
(6) Startup procedure security: and the security of the starting assembly is ensured through the generation of preset software codes and step-by-step secret keys, and the execution of malicious codes is prevented.
Drawings
FIG. 1 is a schematic diagram showing steps of a detection method for preventing an attack chip during XIP startup according to an embodiment of the present invention;
FIG. 2 is a block diagram of a prior art three-level start-up scheme for a CPU chip system in accordance with one embodiment of the present invention;
FIG. 3 is a block diagram illustrating a four-level boot mode of a CPU chip system according to an embodiment of the present invention;
fig. 4 is a schematic diagram illustrating the working principle of a CPU chip system according to an embodiment of the present invention.
The achievement of the objects, functional features and advantages of the present invention will be further described with reference to the accompanying drawings, in conjunction with the embodiments.
Detailed Description
The present invention will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
Referring to fig. 1, a flow chart of a detection method for preventing attack on a chip during XIP startup according to the present invention includes the steps of:
s1, setting a starting program of a starting component in a CPU chip system by adopting a preset software code, wherein the starting component comprises a bootrom firmware, an os guide firmware, an os detection firmware and an os firmware;
s2, acquiring a power-on signal according to the starting program, and starting bootrom firmware, os guide firmware and os detection firmware in sequence through the power-on signal;
s3, loading the os firmware into an abnormal vector of the os detection firmware by adopting the os detection firmware according to a preset periodic safety detection triggering condition;
s4, performing content tampering judgment on a flash particle space through the abnormal vector, wherein the flash particle space is used for storing os firmware;
s41, if the content is judged to be tampered, resetting the CPU chip system, and re-executing the detection process of S2-S4;
s42, if the content is judged not to be tampered, invoking os firmware to perform an XIP startup procedure.
In specific implementation, S1: and setting a starting program for a starting component in the CPU chip system by using a preset software code. The startup component includes bootrom firmware, os boot firmware, os detection firmware, and os firmware. These startup components are critical components required at system startup. S2: and acquiring a power-on signal according to a set starting program, and starting bootrom firmware, os boot firmware and os detection firmware in sequence according to a specific sequence. The start-up sequence of these components is to ensure proper start-up and security detection of the system. S3: and loading the os firmware into an abnormal vector of the os detection firmware according to a preset regular safety detection triggering condition by using the os detection firmware. This is done to store the content of the os firmware in the exception vector for later comparison and detection. S4: and carrying out content tampering judgment on the flash particle space through the abnormal vector. The flash granule space is used to store os firmware. In this step, the content in the anomaly vector is compared with os firmware in the flash grain space to determine if there is a content difference. S41: if the content is judged to be tampered, the CPU chip system is subjected to system reset, and the detection processes of S2 to S4 are re-executed. The method is used for coping with potential attacks and content tampering in the starting process of the system, and ensuring the safety and normal operation of the system. S42: if it is determined that the content has not been tampered with, os firmware is invoked XIP (eXecute In Place) to initiate a program. This means that the system will execute the stored os firmware directly from flash granule space without first copying it into memory.
Overall, these steps ensure security, content integrity and proper operation at system start-up. Any sign of tampering with the content triggers security detection and system reset to ensure that the system is not affected by malicious attacks.
In one embodiment, the step of setting a start program for a start component in the CPU chip system by using a preset software code includes:
identifying a boot feature from the initiating component;
and generating an encryption guide program based on the guide characteristic so as to correspondingly create a step-by-step key when the starting program is set by the encryption guide program, wherein the step-by-step key comprises a bootrom key, an os guide key, an os detection key and an os firmware key.
In a specific implementation, the boot feature is identified from the initiating component: the boot component comprises bootrom firmware, os boot firmware, os detection firmware and os firmware. In this step, the system identifies boot features in the initiating component, which may refer to a particular identifier, fixed data structure, or other information that may be used to uniquely identify the initiating component. Generating an encrypted boot program based on the boot feature: based on the identified boot features, the system generates an encrypted boot. This cryptographic boot is a key component used to ensure the security and integrity of the boot process. By encrypting the bootstrap program, a progressive key can be created. Creating a step-by-step secret key: by encrypting the boot program, the system can correspondingly create a progressive key when setting up the boot program. The progressive keys include bootrom keys, os boot keys, os detection keys, and os firmware keys. These progressive keys are used to provide security and protection during system startup, ensuring that only authorized code and components can be executed and accessed.
In one embodiment, the step of acquiring a power-on signal according to the start-up procedure, and sequentially starting bootrom firmware, os boot firmware, and os detection firmware through the power-on signal includes:
matching the bootrom secret key with the guide characteristic of the bootrom firmware, and entering the next stage if the bootrom secret key is matched with the guide characteristic of the bootrom firmware;
matching the os boot key with the boot feature of the os boot firmware, and entering the next stage if the os boot key is matched with the boot feature of the os boot firmware;
matching the os detection secret key with the guide characteristic of the os detection firmware, and entering the next stage if the key is matched with the guide characteristic;
and if any stage cannot be matched and/or cannot be matched in sequence, closing the starting program.
Specifically, matching bootrom keys with boot features of bootrom firmware: in the first step of the boot process, the system matches the bootrom key with the boot feature of the bootrom firmware. If the matching is successful, the next stage of starting is entered. Matching the os boot key with boot features of the os boot firmware: if the bootstrapping key and bootstrapping firmware boot feature were successfully matched in the previous step, the system will continue to match the os boot key with the os boot firmware boot feature. If the matching is successful, the next stage of starting is entered. Matching the os detection key with boot features of the os detection firmware: if the os boot key and the boot feature of the os boot firmware were successfully matched in the previous step, the system will continue to match the os detection key with the boot feature of the os detection firmware. If the matching is successful, the next stage of starting is entered. If any stage cannot be matched and/or cannot be matched in sequence, closing the starting program: if the corresponding key and the guide feature cannot be successfully matched in any stage of starting process or cannot be matched according to a preset sequence, the system closes the starting program so as to ensure the safety and protection.
In one embodiment, the step of loading os firmware into an exception vector of the os detection firmware using the os detection firmware according to a predetermined periodic security detection trigger condition comprises:
acquiring a current time stamp;
determining a past time stamp of the os detection firmware for loading the abnormal vector by the os detection firmware before executing according to the current time stamp, and generating a time interval between the current time stamp and the past time stamp;
judging whether the time interval is smaller than a preset time period interval or not;
if not, the os detection firmware loads os firmware into an abnormal vector of the os detection firmware to carry out a detection program.
Specifically, the current timestamp is obtained: in this step, the system will obtain the current time stamp for subsequent time calculation and judgment. Determining a past timestamp according to the current timestamp: from the current timestamp, the system can determine the past timestamp of the last time the os detection firmware executed the os firmware load exception vector. This is to compare the past and current time differences to make the calculation of the time interval. Generating a time interval: with the past time stamp and the current time stamp, the system generates a time interval. This time interval represents the time difference between the past time and the current time. Judging whether the time interval is smaller than a preset time period interval or not: in this step, the system determines whether the time interval is less than a predetermined time period interval. The time period interval refers to a preset safety detection triggering time interval. If the time interval is not less than the preset time period interval: if the time interval is not less than the preset time period interval, meaning that the specified periodic security detection trigger time has not been reached, the system will continue with other operations without the os firmware loading the detection program in the exception vector. If the time interval is smaller than the preset time period interval: conversely, if the time interval is less than the preset time period interval, meaning that the specified periodic security detection trigger time has been reached, the system will execute the os detection firmware, load the os firmware into the anomaly vector of the os detection firmware, and perform the detection procedure.
Preferably, the abnormal vector is compared with os firmware in the flash granule space to judge whether the difference information exists.
The invention also provides an os detection firmware, which is characterized in that the os detection firmware is applied to the detection method for preventing the attack chip during the starting of the XIP, and the starting sequence of the starting program sequentially comprises the following steps: bootrom firmware, os boot firmware, os detection firmware, and os firmware.
Referring to fig. 2, in the general XIP system boot-up components, there are typically multiple levels of firmware boot-up, in order to simplify the process, three levels of boot-up are used, namely bootrom firmware, os boot firmware and os firmware; BOOTROM firmware typically runs in the ROM of the CPU, so BOOTROM is generally considered secure from attack due to the read-only nature of ROM. The OS boot firmware code amount is smaller, and the OS boot firmware code amount is used for booting OS firmware and is stored in flash, and because the OS boot firmware code amount is copied into SRAM through BOOTROM, and the OS boot firmware code amount is skipped to the SRAM to be executed after encryption and decryption verification is passed, even if the OS boot firmware in the flash is tampered, the OS boot firmware cannot be loaded. The OS boot firmware is also secure from attack. The OS firmware is the system firmware that eventually needs to be executed on the flash.
Referring to fig. 3, in the scheme design of the present invention, a first-stage boot flow, referred to herein as OS detection firmware, may be added, and then the added configuration is bootrom firmware, OS boot firmware, OS detection firmware and OS firmware, where the OS detection firmware is the same as the OS boot firmware, stored in flash, needs to be copied into SRAM through the OS boot firmware, and executed in alignment after the encryption and decryption verification pass, and resides in SRAM, and the OS detection firmware is provided with an abnormal vector program and a key verification program.
The use principle of the OS detection firmware is that the software code loads each level of firmware in sequence, the OS detection firmware needs to be resident in an SRAM with safety in a chip, the used space of the OS detection firmware is not occupied by other firmware, the OS detection firmware needs to be checked when the OS is normally started for the first time, the OS firmware is safe and reliable before being loaded, after the OS firmware is successfully loaded, the safety detection interrupt is triggered periodically, so that the OS detection firmware is trapped in an abnormal vector of the OS detection firmware, after the corresponding OS detection firmware detects the corresponding interrupt, the check is performed on the flash space occupied by the OS firmware, whether the content of the flash space is modified or not is judged, if not modified, the OS firmware is directly returned to continue to execute, if the detection fails, the flash firmware is modified, and therefore the system reset is re-executed, particularly referring to fig. 4
The invention also provides a CPU chip system, which executes the steps of the detection method for preventing the attack chip when the XIP is started.
S1, setting a starting program of a starting component in a CPU chip system by adopting a preset software code, wherein the starting component comprises a bootrom firmware, an os guide firmware, an os detection firmware and an os firmware;
s2, acquiring a power-on signal according to the starting program, and starting bootrom firmware, os guide firmware and os detection firmware in sequence through the power-on signal;
s3, loading the os firmware into an abnormal vector of the os detection firmware by adopting the os detection firmware according to a preset periodic safety detection triggering condition;
s4, performing content tampering judgment on a flash particle space through the abnormal vector, wherein the flash particle space is used for storing os firmware;
s41, if the content is judged to be tampered, resetting the CPU chip system, and re-executing the detection process of S2-S4;
s42, if the content is judged not to be tampered, invoking os firmware to perform an XIP startup procedure.
In summary, a preset software code is adopted to set a starting program of a starting component in a CPU chip system, a power-on signal is obtained according to the starting program, bootrom firmware, os boot firmware and os detection firmware are sequentially started through the power-on signal, the os detection firmware is adopted to load os firmware into an abnormal vector of the os detection firmware according to a preset periodic security detection triggering condition, content tampering judgment is carried out on a flash particle space through the abnormal vector, the flash particle space is used for storing the os firmware, if the content is judged to be tampered, system resetting is carried out on the CPU chip system, the detection process is re-executed, if the content is judged not to be tampered, the os firmware is called to carry out an XIP starting program, whether the CPU chip system is attacked and tampered when XIP is started is judged by adding a detection method flow of the primary os detection firmware, the security reliability of chip use is increased, and the risk of chip injection attack is reduced.
The foregoing description is only of the preferred embodiments of the present invention and is not intended to limit the scope of the invention, and all equivalent structures or equivalent processes using the descriptions and drawings of the present invention or direct or indirect application in other related technical fields are included in the scope of the present invention.
Claims (9)
1. A method for detecting an attack prevention chip during XIP start-up, comprising the steps of:
s1, setting a starting program of a starting component in a CPU chip system by adopting a preset software code, wherein the starting component comprises a bootrom firmware, an os guide firmware, an os detection firmware and an os firmware;
s2, acquiring a power-on signal according to the starting program, and starting bootrom firmware, os guide firmware and os detection firmware in sequence through the power-on signal;
s3, loading the os firmware into an abnormal vector of the os detection firmware by adopting the os detection firmware according to a preset periodic safety detection triggering condition;
s4, performing content tampering judgment on a flash particle space through the abnormal vector, wherein the flash particle space is used for storing os firmware;
s41, if the content is judged to be tampered, resetting the CPU chip system, and re-executing the detection process of S2-S4;
s42, if the content is judged not to be tampered, invoking os firmware to perform an XIP startup procedure.
2. The method for detecting an attack prevention chip at XIP start-up according to claim 1, wherein the step of setting a start-up program for a start-up component in a CPU chip system using a preset software code includes:
identifying a boot feature from the initiating component;
and generating an encryption guide program based on the guide characteristic so as to correspondingly create a step-by-step key when the starting program is set by the encryption guide program, wherein the step-by-step key comprises a bootrom key, an os guide key, an os detection key and an os firmware key.
3. The method for detecting an attack prevention chip at XIP start-up according to claim 2, wherein the steps of acquiring a power-up signal according to the start-up program, and sequentially starting bootrom firmware, os boot firmware, and os detection firmware by the power-up signal, comprise:
matching the bootrom secret key with the guide characteristic of the bootrom firmware, and entering the next stage if the bootrom secret key is matched with the guide characteristic of the bootrom firmware;
matching the os boot key with the boot feature of the os boot firmware, and entering the next stage if the os boot key is matched with the boot feature of the os boot firmware;
matching the os detection secret key with the guide characteristic of the os detection firmware, and entering the next stage if the key is matched with the guide characteristic;
and if any stage cannot be matched and/or cannot be matched in sequence, closing the starting program.
4. The method for detecting an XIP-on-boot attack prevention chip according to claim 1, wherein the step of loading os firmware into an exception vector of os detection firmware using the os detection firmware according to a preset periodic security detection trigger condition comprises:
acquiring a current time stamp;
determining a past time stamp of the os detection firmware for loading the abnormal vector by the os detection firmware before executing according to the current time stamp, and generating a time interval between the current time stamp and the past time stamp;
judging whether the time interval is smaller than a preset time period interval or not;
if not, the os detection firmware loads os firmware into an abnormal vector of the os detection firmware to carry out a detection program.
5. The method for detecting an attack prevention chip at XIP startup according to claim 1, wherein the step of performing content tampering judgment on a flash particle space by using the anomaly vector comprises:
and comparing the abnormal vector with os firmware in the flash particle space to judge whether difference information exists or not.
6. An os detection firmware, wherein the os detection firmware is applied to a detection method for preventing an attack chip when XIP is started according to any one of claims 1 to 5, and a start sequence of a start program sequentially comprises: bootrom firmware, os boot firmware, os detection firmware, and os firmware.
7. The os detection firmware of claim 6, wherein the os detection firmware is stored in a flash granule space.
8. The os detection firmware of claim 6, wherein the os detection firmware is provided with an exception vector procedure and a key verification procedure.
9. A CPU chip system, characterized in that the CPU chip system performs the steps of implementing a detection method for preventing an attack chip at XIP start-up according to any of claims 1 to 5.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310876051.XA CN116611075A (en) | 2023-07-18 | 2023-07-18 | Detection method, os detection firmware and system for preventing attack chip during XIP starting |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310876051.XA CN116611075A (en) | 2023-07-18 | 2023-07-18 | Detection method, os detection firmware and system for preventing attack chip during XIP starting |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN116611075A true CN116611075A (en) | 2023-08-18 |
Family
ID=87675031
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202310876051.XA Withdrawn CN116611075A (en) | 2023-07-18 | 2023-07-18 | Detection method, os detection firmware and system for preventing attack chip during XIP starting |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN116611075A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116628767A (en) * | 2023-07-20 | 2023-08-22 | 常州楠菲微电子有限公司 | Method for preventing flash system firmware attack after system start and flash controller |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108287999A (en) * | 2017-01-10 | 2018-07-17 | 厦门雅迅网络股份有限公司 | A kind of startup method that system based on TrustZone is credible |
| US20210367781A1 (en) * | 2020-05-20 | 2021-11-25 | Realtek Semiconductor Corp. | Method and system for accelerating verification procedure for image file |
| CN113806811A (en) * | 2021-07-16 | 2021-12-17 | 苏州浪潮智能科技有限公司 | Method and device for automatically recovering tampered firmware and storage medium |
| CN115062292A (en) * | 2022-06-16 | 2022-09-16 | 烽火通信科技股份有限公司 | Equipment safety starting and authentication method and device based on hierarchical encryption |
-
2023
- 2023-07-18 CN CN202310876051.XA patent/CN116611075A/en not_active Withdrawn
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108287999A (en) * | 2017-01-10 | 2018-07-17 | 厦门雅迅网络股份有限公司 | A kind of startup method that system based on TrustZone is credible |
| US20210367781A1 (en) * | 2020-05-20 | 2021-11-25 | Realtek Semiconductor Corp. | Method and system for accelerating verification procedure for image file |
| CN113806811A (en) * | 2021-07-16 | 2021-12-17 | 苏州浪潮智能科技有限公司 | Method and device for automatically recovering tampered firmware and storage medium |
| CN115062292A (en) * | 2022-06-16 | 2022-09-16 | 烽火通信科技股份有限公司 | Equipment safety starting and authentication method and device based on hierarchical encryption |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116628767A (en) * | 2023-07-20 | 2023-08-22 | 常州楠菲微电子有限公司 | Method for preventing flash system firmware attack after system start and flash controller |
| CN116628767B (en) * | 2023-07-20 | 2023-10-17 | 常州楠菲微电子有限公司 | Method for preventing flash system firmware attack after system start and flash controller |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6925557B2 (en) | Method and system for a clean system booting process | |
| US8028172B2 (en) | Systems and methods for updating a secure boot process on a computer with a hardware security module | |
| CN110990084B (en) | Chip secure starting method and device, storage medium and terminal | |
| US20090288161A1 (en) | Method for establishing a trusted running environment in the computer | |
| US20150058979A1 (en) | Processing system | |
| CN112445537B (en) | Trusted starting method and device of operating system, mobile terminal and storage medium | |
| TW201500960A (en) | Detection of secure variable alteration in a computing device equipped with unified extensible firmware interface (UEFI)-compliant firmware | |
| US9262631B2 (en) | Embedded device and control method thereof | |
| US10803176B2 (en) | Bios security | |
| CN116611075A (en) | Detection method, os detection firmware and system for preventing attack chip during XIP starting | |
| US20210367781A1 (en) | Method and system for accelerating verification procedure for image file | |
| CN111368299A (en) | Dynamic link library file hijacking detection method, device and storage medium | |
| CN113486360A (en) | RISC-V based safe starting method and system | |
| CN109753788B (en) | Integrity checking method and computer readable storage medium during kernel operation | |
| CN111931192B (en) | rootkit detection method and device and electronic equipment | |
| CN107657170A (en) | The Trusted Loading for supporting intelligently to repair starts control system and method | |
| CN115357908B (en) | Network equipment kernel credibility measurement and automatic restoration method | |
| CN115543694A (en) | Flash device switching method and device, computer equipment and storage medium | |
| CN112988262B (en) | Method and device for starting application program on target platform | |
| CN112114908A (en) | Hardware platform, starting method and device thereof, and electronic equipment | |
| US20060265578A1 (en) | Detection of a sequencing error in the execution of a program | |
| CN111125717A (en) | Method, device, equipment and medium for safely running BIOS (basic input output System) driver | |
| US11256811B2 (en) | Secure boot at shutdown | |
| CN117786666B (en) | Function code starting verification method and device, electronic equipment and storage medium | |
| KR102153048B1 (en) | Method and apparatus for detection alteration of smram |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WW01 | Invention patent application withdrawn after publication |
Application publication date: 20230818 |
|
| WW01 | Invention patent application withdrawn after publication |