CN116567798A - Clock synchronization processing method and device for 5G millimeter wave base station and electronic equipment - Google Patents

Clock synchronization processing method and device for 5G millimeter wave base station and electronic equipment Download PDF

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Publication number
CN116567798A
CN116567798A CN202310611741.2A CN202310611741A CN116567798A CN 116567798 A CN116567798 A CN 116567798A CN 202310611741 A CN202310611741 A CN 202310611741A CN 116567798 A CN116567798 A CN 116567798A
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China
Prior art keywords
base station
clock
clock synchronization
information
synchronization message
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Chinese (zh)
Inventor
冉健飞
吴展理
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Chongqing Zhizhu Daxun Communication Co ltd
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Chongqing Zhizhu Daxun Communication Co ltd
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Priority to CN202310611741.2A priority Critical patent/CN116567798A/en
Publication of CN116567798A publication Critical patent/CN116567798A/en
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W56/00—Synchronisation arrangements
    • H04W56/001—Synchronization between nodes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0602—Systems characterised by the synchronising information used
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0647—Synchronisation among TDM nodes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/22—Parsing or analysis of headers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W56/00—Synchronisation arrangements
    • H04W56/001—Synchronization between nodes
    • H04W56/0015—Synchronization between nodes one node acting as a reference for the others
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W88/00—Devices specially adapted for wireless communication networks, e.g. terminals, base stations or access point devices
    • H04W88/08—Access point devices
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Security & Cryptography (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

The invention discloses a clock synchronization processing method, a device and electronic equipment for a 5G millimeter wave base station, wherein the method is applied to synchronization processing equipment and comprises the steps of receiving a clock signal sent by clock source equipment and converting the clock signal into a clock synchronization message, wherein the clock synchronization message comprises target clock information; the clock synchronization message is sent to a first base station, wherein the first base station is used as clock synchronization master control equipment; under the condition that the first base station sends the clock synchronization message to the second base station, the clock synchronization message sent by the second base station is received, and the second base station is a base station serving as clock synchronization controlled equipment; and analyzing the clock synchronization message to obtain target clock information, and updating the clock information corresponding to the second base station based on the target clock information. By using the embodiment of the invention, the clock synchronization between the base stations can be realized through the synchronization processing equipment, and the base stations do not need to carry out complex processing, so that the resource consumption of a base station processor is reduced, and the processor resource is saved.

Description

Clock synchronization processing method and device for 5G millimeter wave base station and electronic equipment
Technical Field
The present invention relates to the field of communications technologies, and in particular, to a clock synchronization processing method and apparatus for a 5G millimeter wave base station, and an electronic device.
Background
In a communication system, in order to avoid interference between base stations, frequencies and times between a plurality of base stations need to be synchronized, so that certain precision requirements are met. In the prior art, a base station is synchronized by adopting a satellite time service synchronization mode, such as a GPS (Global Positioning System ) synchronization mode, and in the clock synchronization process, operations of analyzing clock synchronization messages, stamping message time, controlling clock alignment and the like are generally performed by a processor of the base station, so that the purpose of clock synchronization is achieved. However, this approach has limitations such as lower clock synchronization accuracy and more processor resources.
Disclosure of Invention
Aiming at the problems in the prior art, the invention discloses a clock synchronization processing method, a device, electronic equipment and a storage medium for a 5G millimeter wave base station, wherein clock synchronization among base stations is realized through the synchronization processing equipment, the base station only needs to forward information without complex processing, so that the resource consumption of a base station processor in the clock synchronization process is reduced, and the processor resource is saved. The technical scheme disclosed by the invention is as follows:
according to an aspect of the disclosed embodiments of the present invention, there is provided a clock synchronization processing method for a 5G millimeter wave base station, wherein the method is applied to a synchronization processing device, and includes:
receiving a clock signal sent by clock source equipment;
converting the clock signal into a clock synchronization message, wherein the clock synchronization message comprises target clock information;
the clock synchronization message is sent to a first base station, wherein the first base station is a base station serving as clock synchronization master control equipment;
receiving the clock synchronization message sent by a second base station under the condition that the first base station sends the clock synchronization message to the second base station, wherein the second base station is a base station serving as clock synchronization controlled equipment;
analyzing the clock synchronization message to obtain the target clock information;
and updating clock information corresponding to the second base station based on the target clock information.
Optionally, the sending the clock synchronization message to the first base station includes:
and sending the clock synchronization message to a first central processing unit in the first base station.
Optionally, the sending the clock synchronization message to the first base station includes:
and sending the clock synchronization message to first switching equipment in the first base station.
Optionally, when the first base station sends the clock synchronization message to the second base station, receiving the clock synchronization message sent by the second base station includes:
and under the condition that the first base station sends the clock synchronization message to a second base station, receiving the clock synchronization message sent by a second central processing unit in the second base station.
Optionally, when the first base station sends the clock synchronization message to the second base station, receiving the clock synchronization message sent by the second base station includes:
and under the condition that the first base station sends the clock synchronization message to a second base station, receiving the clock synchronization message sent by second switching equipment in the second base station.
Optionally, the analyzing the clock synchronization message to obtain the target clock information includes:
analyzing the clock synchronization message to obtain initial clock bias information and initial transmission delay information;
adjusting the initial clock bias information and the initial transmission delay information to obtain target clock bias information and target transmission delay information;
and generating the target clock information based on the target clock bias information and the target transmission delay information.
Optionally, the adjusting the initial clock bias information and the initial transmission delay information to obtain the target clock bias information and the target transmission delay information includes:
adjusting the initial clock bias information and the initial transmission delay information based on a filtering algorithm to obtain updated clock bias information and updated transmission delay information;
and adjusting the updated clock bias information and the updated transmission delay information based on a servo algorithm to obtain the target clock bias information and the target transmission delay information.
According to another aspect of the disclosed embodiments of the present invention, there is provided a clock synchronization processing apparatus for a 5G millimeter wave base station, including:
the first receiving module is used for receiving the clock signal sent by the clock source equipment;
the conversion module is used for converting the clock signal into a clock synchronous message, and the clock synchronous message comprises target clock information;
the sending module is used for sending the clock synchronization message to a first base station, wherein the first base station is a base station serving as clock synchronization master control equipment;
the second receiving module is used for receiving the clock synchronization message sent by the second base station under the condition that the first base station sends the clock synchronization message to the second base station, wherein the second base station is a base station serving as clock synchronization controlled equipment;
the analysis module is used for analyzing the clock synchronization message to obtain the target clock information;
and the updating module is used for updating the clock information corresponding to the second base station based on the target clock information.
According to another aspect of the disclosed embodiments of the present invention, there is provided an electronic apparatus including: a processor; a memory for storing the processor-executable instructions; wherein the processor is configured to execute the instructions to implement the clock synchronization processing method for a 5G millimeter wave base station in the above aspect.
According to another aspect of the disclosed embodiments of the present invention, there is provided a computer-readable storage medium, which when executed by a processor of an electronic device, causes the electronic device to perform the clock synchronization processing method for a 5G millimeter wave base station in the above aspect of the disclosed embodiments of the present invention.
According to another aspect of the disclosed embodiments of the invention, there is provided a computer program product comprising instructions which, when run on a computer, cause the computer to perform the clock synchronization processing method for a 5G millimeter wave base station in the above aspect of the disclosed embodiments of the invention.
The data processing method provided by the invention has the following technical effects:
the invention provides a clock synchronization processing method for a 5G millimeter wave base station, wherein a synchronization processing device receives a clock signal sent by a clock source device and converts the clock signal into a clock synchronization message, wherein the clock synchronization message comprises target clock information; and then the clock synchronization message is sent to the base station serving as the clock synchronization master control equipment, and under the condition that the base station sends the clock synchronization message to the base station serving as the clock synchronization controlled equipment, the synchronization processing equipment receives the clock synchronization message sent by the base station serving as the clock synchronization controlled equipment, analyzes the clock synchronization message to obtain target clock information, and updates the clock information corresponding to the base station serving as the clock synchronization controlled equipment based on the target clock information, so that clock synchronization among the base stations can be realized through the synchronization processing equipment, and the base station only needs to forward information without complex processing, thereby reducing the resource consumption of a base station processor in the clock synchronization process and saving the processor resource.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the disclosure and together with the description, serve to explain the principles of the disclosure and do not constitute an undue limitation on the disclosure.
Fig. 1 is a schematic diagram of a clock synchronization processing system for a 5G millimeter wave base station, shown in accordance with an exemplary embodiment;
fig. 2 is a flow diagram illustrating a method of clock synchronization processing for a 5G millimeter wave base station according to an example embodiment;
FIG. 3 is a schematic diagram illustrating a method of clock synchronous message parsing processing in accordance with an exemplary embodiment;
fig. 4 is a flow chart illustrating a method of clock synchronization processing for a 5G millimeter wave base station according to an exemplary embodiment;
fig. 5 is a block diagram of a clock synchronization processing apparatus for a 5G millimeter wave base station, according to an example embodiment;
fig. 6 is a block diagram of a terminal electronic device for clock synchronization processing for a 5G millimeter wave base station, shown in accordance with an exemplary embodiment;
fig. 7 is a block diagram of a server electronic device for clock synchronization processing for a 5G millimeter wave base station, according to an example embodiment.
Detailed Description
In order that those skilled in the art will better understand the disclosed embodiments of the present invention, a detailed description of the disclosed embodiments of the present invention will be provided with reference to the accompanying drawings. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present disclosure and in the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the disclosed embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or server that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed or inherent to such process, method, article, or apparatus, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
At present, a satellite time service synchronization mode is mostly adopted for clock synchronization of a base station, but there are a plurality of limitations, for example: the radio frequency cable has high wiring difficulty failure rate and certain limitation in actual construction; the low-delay requirement cannot be met, and the time service precision difference exists due to inconsistent cable lengths, so that the cost for meeting the precision within 50ns is high; large active site GNSS (Global Navigation Satellite System ) is susceptible to interference, radio interference, and air control of unmanned aerial vehicles is susceptible to GPS/beidou signal loss; some special application scenes are limited, and it is difficult to install a plurality of mushroom head antennas in places such as mines, tunnels, subways, basements and the like.
In practical application, clock synchronization processing can be performed based on an IEEE1588 (precision time synchronization protocol standard of a network measurement and control system) Clock synchronization mechanism, and the basic principle of the IEEE1588 protocol is that Clock deviation information (Offset) is calculated through time information interaction of a Master Clock (Master Clock) and a Slave Clock (Slave Clock); in the IEEE1588 protocol, the actual transmission time is the time interval from the time when the sender records the timestamp until the receiver records the timestamp, which includes not only the transmission time in the network, but also the processing time from the time when the sender stamps to the time when the signal actually enters the network, and the processing time from the time when the receiver receives the signal to the time when the receiver stamps.
Specifically, the clock synchronization master device (i.e. the master clock) sends a synchronization message (Sync), records a time stamp t1 of the sending time, and after the clock synchronization slave device (i.e. the slave clock) receives the synchronization message (Sync), records a time stamp t2 of the receiving time, and then, the clock synchronization master device sends a following message (follow_up), and brings the t1 time stamp to the clock synchronization slave device. And then, the clock synchronization controlled equipment sends a Delay request message (delay_req), the time stamp t3 of the sending moment is recorded, the clock synchronization master equipment records the time stamp t4 of the receiving moment after receiving the message, then, the clock synchronization master equipment sends a Delay reply message (delay_resp) to bring the t4 time stamp to the slave clock, and the clock synchronization controlled equipment can calculate the message transmission Delay and the time offset of the clock synchronization controlled equipment relative to the clock synchronization master equipment according to the four recorded time stamps so as to perform clock synchronization.
Referring to fig. 1, fig. 1 is a schematic diagram illustrating a clock synchronization processing system for a 5G millimeter wave base station according to an exemplary embodiment, where the clock synchronization processing system may include a base station cluster 100 and a synchronization processing device 200.
Specifically, the base station cluster 100 may include a plurality of base stations 110, and each base station 110 may be configured to provide a communication function; each of the base stations 110 described above may include various forms of base stations, such as: macro base station, micro base station, relay station, access point, etc., specifically may be: an Access Point (AP) in a wireless local area network (wireless local area network, WLAN), a base station (base transceiver station, BTS) in a global system for mobile communications (global system for mobile communications, GSM) or code division multiple access (code division multiple access, CDMA), a base station (NodeB, NB) in wideband code division multiple access (wideband code division multiple access, WCDMA), an Evolved base station (eNB or eNodeB) in LTE, a relay station or access point, a vehicle device, a wearable device, a next generation Node B (the next generation Node B, gNB) in a 5G (5 th Generation Mobile Communication Technology, fifth generation mobile communication technology) system, or a base station in a future Evolved public land mobile network (public land mobile network, PLMN) network, etc. The clock synchronization processing method provided in the embodiment of the application is particularly suitable for the clock synchronization process between 5G millimeter wave base stations.
Specifically, the synchronization processing device 200 may be a device for performing clock synchronization processing between 5G millimeter wave base stations, where the synchronization processing device 200 may include a plurality of synchronization processing modules 210, and each base station 110 corresponds to one synchronization processing module 210; the synchronization processing module 210 may be a module having a clock synchronization integrated chip that can integrate a hardware accurate time stamp, a processor, and a PTP (Precision Timing Protocol, accurate time protocol) clock recovery algorithm, and has a multiple clock output function.
The network architecture and the service scenario described in the embodiments of the present application are for more clearly describing the technical solution of the embodiments of the present application, and do not constitute a limitation on the technical solution provided in the embodiments of the present application, and those skilled in the art can know that, with the evolution of the network architecture and the appearance of the new service scenario, the technical solution provided in the embodiments of the present application is also applicable to similar technical problems.
Fig. 2 is a flow chart illustrating a method of clock synchronization processing for a 5G millimeter wave base station according to an exemplary embodiment, the present disclosure provides the method operational steps as described in the examples or flow charts, but may include more or fewer operational steps based on conventional or non-inventive labor. The order of steps recited in the embodiments is merely one way of performing the order of steps and does not represent a unique order of execution. When implemented in a real system or server product, the methods illustrated in the embodiments or figures may be performed sequentially or in parallel (e.g., in a parallel processor or multithreaded environment). Specifically, as shown in fig. 2, the clock synchronization processing method for the 5G millimeter wave base station includes the following steps.
S201: and the first synchronous processing module corresponding to the first base station receives the clock signal sent by the clock source equipment.
In a specific embodiment, the first base station may be a 5G millimeter wave base station as a clock synchronization Master control device, and after the first base station is powered on, the first base station may perform mode configuration on its corresponding first synchronization processing module through an SPI (Serial Peripheral Interface ), specifically, may configure the mode of the first synchronization processing module to be a clock synchronization Master control (Master) mode, so that the first synchronization processing module performs a subsequent operation; the clock source device may be a satellite device, such as a GNSS clock source, a beidou clock source, etc., and the clock signal may be a 1pps (1 Pulse Per Second) signal or a TOD (Time of data) signal, where the 1pps signal may be used to indicate a Time of day of a whole Second, where the Time is generally indicated by a rising edge of the Second Pulse, and the TOD signal may generally include Time information corresponding to the rising edge of the Second Pulse.
S203: the first synchronous processing module converts the clock signal into a clock synchronous message.
In a specific embodiment, the clock synchronization message may be an IEEE1588 message, and the clock synchronization message may include target clock information, and specifically, the target clock information may be timestamp information generated by the first synchronization processing module according to time information indicated by the clock signal, the target clock information may be used as reference clock information, and clock information to be calibrated may be updated based on the target clock information.
In the above embodiment, the synchronization processing module corresponding to the base station serving as the clock synchronization master control device may automatically generate the clock synchronization message with the timestamp information by acquiring the clock signal of the clock source device, without the need of the base station serving as the clock synchronization master control device to make a timestamp, thereby saving processor resources.
S205: the first synchronization processing module sends the clock synchronization message to the first base station.
In an alternative embodiment, the sending, by the first synchronization processing module, the clock synchronization packet to the first base station may include:
the first synchronization processing module sends the clock synchronization message to a first central processing unit in the first base station.
In a specific embodiment, the first synchronization processing module may send the clock synchronization packet to the first central processor in the first base station through an SGMII (Serial Gigabit Media Independent Interface ); the model of the first central processing unit can be set according to actual application requirements.
In an alternative embodiment, the sending, by the first synchronization processing module, the clock synchronization packet to the first base station may include:
the first synchronization processing module sends the clock synchronization message to a first switching device in the first base station.
In a specific embodiment, the first switching device may be a device having a switching chip, and in particular, the switching chip may be a tera-switching chip; the first switching device can directly receive the clock synchronization message sent by the first synchronization processing module, and then directly combine the clock synchronization message with the forwarding port to send the clock synchronization message to the clock synchronization controlled device, and the clock synchronization message does not need to be processed by a central processing unit in the base station.
S207: the first base station sends a clock synchronization message to the second base station.
In a specific embodiment, the second base station may be a 5G millimeter wave base station serving as a clock synchronization controlled device, and the first base station may send a clock synchronization packet to the second base station through a forwarding port.
S209: and the second base station receives the clock synchronization message and forwards the clock synchronization message to a second synchronization processing module corresponding to the second base station.
In a specific embodiment, the second base station may receive the clock synchronization message through the backhaul port; after the second base station is powered on, the second synchronous processing module corresponding to the second base station can be configured in a mode through the SPI, and specifically, the mode of the second synchronous processing module can be configured into a clock synchronous controlled (Slave) mode, so that the second synchronous processing module executes subsequent operations.
In an optional embodiment, the second base station receives a clock synchronization packet and forwards the clock synchronization packet to a second synchronization processing module corresponding to the second base station may include:
and the second CPU of the second base station receives the clock synchronization message and forwards the clock synchronization message to a second synchronization processing module corresponding to the second base station.
In a specific embodiment, the second central processor of the second base station may forward the clock synchronization packet to the second synchronization processing module through the SGMII; the model of the second central processing unit can be set according to actual application requirements, and specifically, the model of the second central processing unit can be the same as that of the first central processing unit.
In an optional embodiment, the second base station receives a clock synchronization packet and forwards the clock synchronization packet to a second synchronization processing module corresponding to the second base station may include:
and the second switching equipment of the second base station receives the clock synchronization message and forwards the clock synchronization message to a second synchronization processing module corresponding to the second base station.
In a specific embodiment, the second switching device may be a device having a switching chip, and in particular, the switching chip may be a tera-switching chip; the second switching device can directly receive and separate the clock synchronization message from the backhaul port and forward the clock synchronization message to the second synchronization processing module without passing through a central processing unit in the base station.
S211: the second synchronous processing module receives the clock synchronous message.
S213: and the second synchronous processing module analyzes the clock synchronous message to obtain target clock information.
In an alternative embodiment, as shown in fig. 3, fig. 3 is a schematic diagram of a method for parsing a clock synchronization packet according to an exemplary embodiment, where the parsing the clock synchronization packet by the second synchronization processing module may include:
s301: and the second synchronous processing module analyzes the clock synchronous message to obtain initial clock bias information and initial transmission delay information.
In a specific embodiment, the initial clock bias information may be a time difference between clock information corresponding to the second base station and target clock information, and the initial transmission delay information may be transmission delay information generated in a clock synchronization message transmission process; specifically, taking IEEE1588 clock synchronization as an example, the clock offset information may be time difference information (offset) calculated according to the timestamp information (t 1, t2, t3 and t 4) in the transmission process, and the transmission Delay information of the clock synchronization message may include a unidirectional Delay of a synchronization message (Sync) transmitted from the master device to the controlled device and a unidirectional Delay of a Delay request message (delay_req) transmitted from the controlled device to the master device.
S303: and the second synchronous processing module adjusts the initial clock bias information and the initial transmission delay information to obtain target clock bias information and target transmission delay information.
In an optional embodiment, the second synchronization processing module adjusts the initial clock bias information and the initial transmission delay information, and obtaining the target clock bias information and the target transmission delay information may include:
the second synchronous processing module adjusts the initial clock bias information and the initial transmission delay information based on a filtering algorithm to obtain updated clock bias information and updated transmission delay information;
the second synchronous processing module adjusts the updated clock bias information and the updated transmission delay information based on a servo algorithm to obtain target clock bias information and target transmission delay information.
In a specific embodiment, the filtering algorithm can be used for optimally estimating the information such as clock bias, transmission delay, frequency drift and the like obtained by analyzing the clock synchronization message, so as to eliminate the problems such as delay, frequency drift and the like in the clock synchronization process, and further realize that the clock corresponding to the controlled device tracks the clock corresponding to the master control device with high precision through the servo algorithm; specifically, the filtering algorithm may include a kalman filtering algorithm, a particle filtering algorithm, and the like.
S305: the second synchronization processing module generates target clock information based on the target clock bias information and the target transmission delay information.
In the above embodiment, the information such as clock bias, transmission delay, frequency drift and the like obtained by analyzing the clock synchronization message is optimally estimated by the filtering algorithm integrated in the synchronization processing module corresponding to the clock synchronization controlled device, so that the clock corresponding to the controlled device tracks the clock corresponding to the master control device with high precision by the servo algorithm, and the stability of clock deviation is improved, thereby achieving higher clock synchronization precision.
S215: the second synchronous processing module updates clock information corresponding to the second base station based on the target clock information.
In a specific embodiment, the second synchronization processing module may align clock information corresponding to the second base station with the target clock information with reference to achieve clock synchronization between the base stations; specifically, the second synchronization processing module may adjust the phase and the frequency of a clock corresponding to the controlled device based on the target clock information, where the clock corresponding to the controlled device may include an OCXO (Oven-Controlled Crystal Oscillator, constant Temperature controlled crystal oscillator) clock and a TCXO (Temperature-Controlled Crystal Oscillator) clock.
As can be seen from the technical solutions provided in the embodiments of the present disclosure, in the present disclosure, a synchronization processing device receives a clock signal sent by a clock source device, and converts the clock signal into a clock synchronization packet, where the clock synchronization packet includes target clock information; and then the clock synchronization message is sent to the base station serving as the clock synchronization master control equipment, under the condition that the base station sends the clock synchronization message to the base station serving as the clock synchronization controlled equipment, the synchronization processing equipment receives the clock synchronization message sent by the base station serving as the clock synchronization controlled equipment, analyzes the clock synchronization message to obtain target clock information, updates the clock information corresponding to the base station serving as the clock synchronization controlled equipment based on the target clock information, and can perform the processes of message analysis, time stamping, clock adjustment based on a preset algorithm and the like through the synchronization processing equipment, so that the clock synchronization among 5G millimeter wave base stations is realized, the clock synchronization function of the base station is stripped, and the base station only needs to forward the information without complex processing, thereby reducing the resource consumption of a base station processor in the clock synchronization process and saving the system resources. In addition, the information such as clock bias, transmission delay, frequency drift and the like is optimized through a filtering algorithm and a servo algorithm integrated in a synchronous processing module corresponding to the clock synchronous controlled equipment, and then the phase and frequency of a clock corresponding to the controlled equipment are adjusted according to the optimized information, so that higher clock synchronous precision is achieved, meanwhile, the filtering algorithm and the servo algorithm do not need to be additionally developed in a base station processor, the program development difficulty is reduced, and the human resource investment is reduced; and the clock signal of the clock source equipment is acquired through the synchronous processing module, the clock synchronous message with the time stamp information is automatically generated, and the clock synchronous message is analyzed, so that a processor in the base station does not need to perform related operation, and the processor resource is saved.
The following description describes a specific embodiment of a clock synchronization processing method for a 5G millimeter wave base station with a synchronization processing device as an execution body, and fig. 4 is a schematic flow chart of a clock synchronization processing method for a 5G millimeter wave base station according to an exemplary embodiment, and specifically, with reference to fig. 4, the method may include:
s401: and receiving the clock signal sent by the clock source equipment.
S403: and converting the clock signal into a clock synchronous message.
S405: and sending the clock synchronization message to the first base station.
S407: and under the condition that the first base station sends the clock synchronization message to the second base station, receiving the clock synchronization message sent by the second base station.
S409: and analyzing the clock synchronization message to obtain the target clock information.
S411: and updating clock information corresponding to the second base station based on the target clock information.
Optionally, sending the clock synchronization message to the first base station may include:
and sending the clock synchronization message to a first central processing unit in the first base station.
Optionally, sending the clock synchronization message to the first base station may include:
and sending the clock synchronization message to first switching equipment in the first base station.
Optionally, in the case that the first base station sends the clock synchronization message to the second base station, receiving the clock synchronization message sent by the second base station may include:
and under the condition that the first base station sends the clock synchronization message to the second base station, receiving the clock synchronization message sent by the second central processing unit in the second base station.
Optionally, in the case that the first base station sends the clock synchronization message to the second base station, receiving the clock synchronization message sent by the second base station may include:
and under the condition that the first base station sends the clock synchronization message to the second base station, receiving the clock synchronization message sent by the second switching equipment in the second base station.
Optionally, the analyzing the clock synchronization packet to obtain the target clock information may include:
analyzing the clock synchronization message to obtain initial clock bias information and initial transmission delay information;
adjusting the initial clock bias information and the initial transmission delay information to obtain target clock bias information and target transmission delay information;
and generating target clock information based on the target clock bias information and the target transmission delay information.
Optionally, the adjusting the initial clock bias information and the initial transmission delay information to obtain the target clock bias information and the target transmission delay information may include:
adjusting the initial clock bias information and the initial transmission delay information based on a filtering algorithm to obtain updated clock bias information and updated transmission delay information;
and adjusting the updated clock bias information and the updated transmission delay information based on a servo algorithm to obtain target clock bias information and target transmission delay information.
The embodiment of the invention also provides a clock synchronization processing device for the 5G millimeter wave base station, as shown in fig. 5, the device comprises:
a first receiving module 510, configured to receive a clock signal sent by a clock source device;
a conversion module 520, configured to convert the clock signal into a clock synchronization packet, where the clock synchronization packet includes target clock information;
a sending module 530, configured to send the clock synchronization packet to a first base station, where the first base station is a base station serving as a clock synchronization master device;
a second receiving module 540, configured to receive, when the first base station sends the clock synchronization packet to a second base station, the clock synchronization packet sent by the second base station, where the second base station is a base station serving as a clock synchronization controlled device;
the parsing module 550 is configured to parse the clock synchronization packet to obtain the target clock information;
and an updating module 560, configured to update clock information corresponding to the second base station based on the target clock information.
Optionally, the transmitting module 530 may include:
and the first sending unit is used for sending the clock synchronization message to a first central processing unit in the first base station.
Optionally, the transmitting module 530 may include:
and the second sending unit is used for sending the clock synchronization message to the first switching equipment in the first base station.
Optionally, the second receiving module 540 may include:
the first receiving unit is used for receiving the clock synchronization message sent by the second central processing unit in the second base station under the condition that the first base station sends the clock synchronization message to the second base station.
Optionally, the second receiving module 540 may include:
and the second receiving unit is used for receiving the clock synchronization message sent by the second switching equipment in the second base station under the condition that the first base station sends the clock synchronization message to the second base station.
Alternatively, the parsing module 550 may include:
the analysis unit is used for analyzing the clock synchronization message to obtain initial clock bias information and initial transmission delay information;
the clock adjusting unit is used for adjusting the initial clock bias information and the initial transmission delay information to obtain target clock bias information and target transmission delay information;
and the target clock information generating unit is used for generating the target clock information based on the target clock bias information and the target transmission delay information.
Alternatively, the clock adjustment unit may include:
the first adjusting unit is used for adjusting the initial clock bias information and the initial transmission delay information based on a filtering algorithm to obtain updated clock bias information and updated transmission delay information;
and the second adjusting unit is used for adjusting the updated clock bias information and the updated transmission delay information based on a servo algorithm to obtain the target clock bias information and the target transmission delay information.
The specific manner in which the various modules perform the operations in the apparatus of the above embodiments have been described in detail in connection with the embodiments of the method, and will not be described in detail herein.
Fig. 6 is a block diagram of an electronic device, which may be a terminal, for clock synchronization processing for a 5G millimeter wave base station, the internal structure of which may be as shown in fig. 6, according to an exemplary embodiment. The electronic device includes a processor, a memory, a network interface, a display screen, and an input device connected by a system bus. Wherein the processor of the electronic device is configured to provide computing and control capabilities. The memory of the electronic device includes a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The network interface of the electronic device is used for communicating with an external terminal through a network connection. The computer program, when executed by a processor, implements a clock synchronization processing method for a 5G millimeter wave base station. The display screen of the electronic equipment can be a liquid crystal display screen or an electronic ink display screen, and the input device of the electronic equipment can be a touch layer covered on the display screen, can also be keys, a track ball or a touch pad arranged on the shell of the electronic equipment, and can also be an external keyboard, a touch pad or a mouse and the like.
Fig. 7 is a block diagram of an electronic device for clock synchronization processing for a 5G millimeter wave base station, which may be a server, whose internal structure may be as shown in fig. 7, according to an exemplary embodiment. The electronic device includes a processor, a memory, and a network interface connected by a system bus. Wherein the processor of the electronic device is configured to provide computing and control capabilities. The memory of the electronic device includes a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The network interface of the electronic device is used for communicating with an external terminal through a network connection. The computer program, when executed by a processor, implements a clock synchronization processing method for a 5G millimeter wave base station.
It will be appreciated by those skilled in the art that the structures shown in fig. 6 or 7 are merely block diagrams of portions of structures related to the present disclosure and do not constitute a limitation of the electronic device to which the present disclosure is applied, and that a particular electronic device may include more or less components than those shown in the drawings, or may combine some components, or have a different arrangement of components.
In an exemplary embodiment, there is also provided an electronic device including: a processor; a memory for storing the processor-executable instructions; wherein the processor is configured to execute the instructions to implement a clock synchronization processing method for a 5G millimeter wave base station as in the disclosed embodiments of the invention.
In an exemplary embodiment, a computer readable storage medium is also provided, which when instructions in the storage medium are executed by a processor of an electronic device, enable the electronic device to perform the clock synchronization processing method for a 5G millimeter wave base station in the disclosed embodiments of the invention.
In an exemplary embodiment, a computer program product containing instructions that, when run on a computer, cause the computer to perform the clock synchronization processing method for a 5G millimeter wave base station in the disclosed embodiments of the invention is also provided.
Those skilled in the art will appreciate that implementing all or part of the above described methods may be accomplished by way of a computer program stored on a non-transitory computer readable storage medium, which when executed, may comprise the steps of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in embodiments provided herein may include non-volatile and/or volatile memory. The nonvolatile memory can include Read Only Memory (ROM), programmable ROM (PROM), electrically Programmable ROM (EPROM), electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms, such as Static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate
SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous Link (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), among others.
Other embodiments of the disclosed invention will be apparent to those skilled in the art from consideration of the specification and practice of the disclosed invention. This application is intended to cover any variations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.
It is to be understood that the present disclosure is not limited to the precise arrangements and instrumentalities shown in the drawings, and that various modifications and changes may be effected without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims (10)

1. A clock synchronization processing method for a 5G millimeter wave base station, wherein the method is applied to a synchronization processing device, and comprises:
receiving a clock signal sent by clock source equipment;
converting the clock signal into a clock synchronization message, wherein the clock synchronization message comprises target clock information;
the clock synchronization message is sent to a first base station, wherein the first base station is a base station serving as clock synchronization master control equipment;
receiving the clock synchronization message sent by a second base station under the condition that the first base station sends the clock synchronization message to the second base station, wherein the second base station is a base station serving as clock synchronization controlled equipment;
analyzing the clock synchronization message to obtain the target clock information;
and updating clock information corresponding to the second base station based on the target clock information.
2. The method of claim 1, wherein the sending the clock synchronization message to the first base station comprises:
and sending the clock synchronization message to a first central processing unit in the first base station.
3. The method of claim 1, wherein the sending the clock synchronization message to the first base station comprises:
and sending the clock synchronization message to first switching equipment in the first base station.
4. The method of claim 1, wherein, in the case that the first base station transmits the clock synchronization message to a second base station, receiving the clock synchronization message transmitted by the second base station comprises:
and under the condition that the first base station sends the clock synchronization message to a second base station, receiving the clock synchronization message sent by a second central processing unit in the second base station.
5. The method of claim 1, wherein, in the case that the first base station transmits the clock synchronization message to a second base station, receiving the clock synchronization message transmitted by the second base station comprises:
and under the condition that the first base station sends the clock synchronization message to a second base station, receiving the clock synchronization message sent by second switching equipment in the second base station.
6. The method of claim 1, wherein the parsing the clock synchronization message to obtain the target clock information comprises:
analyzing the clock synchronization message to obtain initial clock bias information and initial transmission delay information;
adjusting the initial clock bias information and the initial transmission delay information to obtain target clock bias information and target transmission delay information;
and generating the target clock information based on the target clock bias information and the target transmission delay information.
7. The method of claim 6, wherein adjusting the initial clock bias information and the initial transmission delay information to obtain target clock bias information and target transmission delay information comprises:
adjusting the initial clock bias information and the initial transmission delay information based on a filtering algorithm to obtain updated clock bias information and updated transmission delay information;
and adjusting the updated clock bias information and the updated transmission delay information based on a servo algorithm to obtain the target clock bias information and the target transmission delay information.
8. A clock synchronization processing apparatus for a 5G millimeter wave base station, the apparatus comprising:
the first receiving module is used for receiving the clock signal sent by the clock source equipment;
the conversion module is used for converting the clock signal into a clock synchronous message, and the clock synchronous message comprises target clock information;
the sending module is used for sending the clock synchronization message to a first base station, wherein the first base station is a base station serving as clock synchronization master control equipment;
the second receiving module is used for receiving the clock synchronization message sent by the second base station under the condition that the first base station sends the clock synchronization message to the second base station, wherein the second base station is a base station serving as clock synchronization controlled equipment;
the analysis module is used for analyzing the clock synchronization message to obtain the target clock information;
and the updating module is used for updating the clock information corresponding to the second base station based on the target clock information.
9. An electronic device, comprising:
a processor;
a memory for storing the processor-executable instructions;
wherein the processor is configured to execute the instructions to implement the clock synchronization processing method for a 5G millimeter wave base station according to any one of claims 1 to 7.
10. A computer-readable storage medium, characterized in that instructions in the storage medium, when executed by a processor of an electronic device, enable the electronic device to perform the clock synchronization processing method for a 5G millimeter wave base station according to any one of claims 1 to 7.
CN202310611741.2A 2023-05-26 2023-05-26 Clock synchronization processing method and device for 5G millimeter wave base station and electronic equipment Pending CN116567798A (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015186207A (en) * 2014-03-26 2015-10-22 パナソニックＩｐマネジメント株式会社 Communication system, synchronizer and synchronization program
CN106911414A (en) * 2015-12-22 2017-06-30 中兴通讯股份有限公司 Clock synchronizing method and device
CN110120846A (en) * 2018-02-05 2019-08-13 大唐移动通信设备有限公司 A kind of clock synchronizing method and system
CN111654906A (en) * 2020-06-02 2020-09-11 厦门亿联网络技术股份有限公司 Wireless synchronization method, device and base station

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015186207A (en) * 2014-03-26 2015-10-22 パナソニックＩｐマネジメント株式会社 Communication system, synchronizer and synchronization program
CN106911414A (en) * 2015-12-22 2017-06-30 中兴通讯股份有限公司 Clock synchronizing method and device
CN110120846A (en) * 2018-02-05 2019-08-13 大唐移动通信设备有限公司 A kind of clock synchronizing method and system
CN111654906A (en) * 2020-06-02 2020-09-11 厦门亿联网络技术股份有限公司 Wireless synchronization method, device and base station

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