CN116470388A - Laser chip and laser - Google Patents
Laser chip and laser Download PDFInfo
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- CN116470388A CN116470388A CN202310627411.2A CN202310627411A CN116470388A CN 116470388 A CN116470388 A CN 116470388A CN 202310627411 A CN202310627411 A CN 202310627411A CN 116470388 A CN116470388 A CN 116470388A
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- 239000004065 semiconductor Substances 0.000 claims abstract description 65
- 239000000758 substrate Substances 0.000 claims abstract description 38
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 13
- 150000002500 ions Chemical class 0.000 claims description 6
- 229910052710 silicon Inorganic materials 0.000 claims description 4
- 239000010410 layer Substances 0.000 description 197
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 8
- 238000005253 cladding Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 6
- 229910002704 AlGaN Inorganic materials 0.000 description 5
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- 238000004806 packaging method and process Methods 0.000 description 3
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 2
- BEQNOZDXPONEMR-UHFFFAOYSA-N cadmium;oxotin Chemical compound [Cd].[Sn]=O BEQNOZDXPONEMR-UHFFFAOYSA-N 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- JAONJTDQXUSBGG-UHFFFAOYSA-N dialuminum;dizinc;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Al+3].[Al+3].[Zn+2].[Zn+2] JAONJTDQXUSBGG-UHFFFAOYSA-N 0.000 description 2
- 239000003989 dielectric material Substances 0.000 description 2
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- 229910003437 indium oxide Inorganic materials 0.000 description 2
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 2
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- 239000012811 non-conductive material Substances 0.000 description 2
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- KYKLWYKWCAYAJY-UHFFFAOYSA-N oxotin;zinc Chemical compound [Zn].[Sn]=O KYKLWYKWCAYAJY-UHFFFAOYSA-N 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 2
- 229910001887 tin oxide Inorganic materials 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
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- 239000010937 tungsten Substances 0.000 description 2
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 2
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- JRPBQTZRNDNNOP-UHFFFAOYSA-N barium titanate Chemical compound [Ba+2].[Ba+2].[O-][Ti]([O-])([O-])[O-] JRPBQTZRNDNNOP-UHFFFAOYSA-N 0.000 description 1
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- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
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- ORUIBWPALBXDOA-UHFFFAOYSA-L magnesium fluoride Chemical compound [F-].[F-].[Mg+2] ORUIBWPALBXDOA-UHFFFAOYSA-L 0.000 description 1
- 229910001635 magnesium fluoride Inorganic materials 0.000 description 1
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- 229910000484 niobium oxide Inorganic materials 0.000 description 1
- URLJKFSTXLNXLG-UHFFFAOYSA-N niobium(5+);oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Nb+5].[Nb+5] URLJKFSTXLNXLG-UHFFFAOYSA-N 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- NQBRDZOHGALQCB-UHFFFAOYSA-N oxoindium Chemical compound [O].[In] NQBRDZOHGALQCB-UHFFFAOYSA-N 0.000 description 1
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 description 1
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- 229910001936 tantalum oxide Inorganic materials 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/305—Structure or shape of the active region; Materials used for the active region characterised by the doping materials used in the laser structure
- H01S5/3086—Structure or shape of the active region; Materials used for the active region characterised by the doping materials used in the laser structure doping of the active layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/2004—Confining in the direction perpendicular to the layer structure
- H01S5/2018—Optical confinement, e.g. absorbing-, reflecting- or waveguide-layers
- H01S5/2031—Optical confinement, e.g. absorbing-, reflecting- or waveguide-layers characterized by special waveguide layers, e.g. asymmetric waveguide layers or defined bandgap discontinuities
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/32—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
- H01S5/3211—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures characterised by special cladding layers, e.g. details on band-discontinuities
- H01S5/3216—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures characterised by special cladding layers, e.g. details on band-discontinuities quantum well or superlattice cladding layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/34—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
- Geometry (AREA)
- Semiconductor Lasers (AREA)
Abstract
The invention relates to the technical field of lasers, in particular to a laser chip which comprises an insulating layer, an N-type electrode, a P-type electrode, a substrate, an N-type high-doped layer, an N-type semiconductor layer, an active layer and a P-type semiconductor layer which are sequentially laminated. The active layer comprises a first waveguide layer, a quantum well layer and a second waveguide layer which are sequentially laminated on the N-type semiconductor layer, the insulating layer covers the N-type high-doping layer and the P-type semiconductor layer, the insulating layer is provided with a first opening and a second opening, the N-type electrode is connected with the N-type high-doping layer through the first opening, the P-type electrode is connected with the P-type semiconductor layer through the second opening, and the doping concentration of the N-type high-doping layer is larger than that of the substrate. Therefore, a laser current expansion path is realized, and current can be prevented from flowing through a high-impedance position of the substrate, so that a laser device with high light efficiency is realized.
Description
Technical Field
The present invention relates to the field of laser technologies, and in particular, to a laser chip and a laser.
Background
At present, the domestic laser chip cannot prepare a GaN substrate with high doping concentration and cannot be pulled up to be the same as daily products due to the limitations of process conditions and the like; if the GaN substrate with high doping concentration is forcedly prepared, the problem of high defect density can be caused, and the performance of the laser chip is damaged. The light efficiency of the laser device cannot be effectively improved all the time because the GaN substrate with high doping concentration cannot be prepared. Taking the example of the laser chip at the operating current of 3A, the forward Voltage (VF) is greater than 5V, and the level of the day manufacturer approaching 4V cannot be reached, resulting in the loss of the light efficiency performance benefit.
Therefore, how to solve the problem that the domestic laser chip cannot realize high performance light efficiency has become one of the technical problems to be solved by those skilled in the art.
It should be noted that the information disclosed in this background section is only for the purpose of increasing the understanding of the general background of the invention and should not be taken as an acknowledgement or any form of suggestion that this information forms the prior art already known to a person of ordinary skill in the art.
Disclosure of Invention
An embodiment of the present invention provides a laser chip including a substrate, an N-type high-doped layer, an N-type semiconductor layer, an active layer, a P-type semiconductor layer, an insulating layer, an N-type electrode, and a P-type electrode.
The N-type high doping layer is located on the substrate. The N-type semiconductor layer is positioned on the N-type high doping layer. The active layer is located on the N-type semiconductor layer, and the active layer includes a first waveguide layer, a quantum well layer, and a second waveguide layer sequentially stacked on the N-type semiconductor layer. The P-type semiconductor layer is positioned on the active layer. The insulating layer covers the N-type high-doped layer, the N-type semiconductor layer, the active layer and the P-type semiconductor layer, and is provided with a first opening and a second opening, wherein the first opening exposes the N-type high-doped layer, and the second opening exposes the P-type semiconductor layer. The N-type electrode is connected with the N-type high-doped layer through the first opening. The P-type electrode is connected with the P-type semiconductor layer through the second opening. The doping concentration of the N-type high-doping layer is larger than that of the substrate.
An embodiment of the present invention further provides a laser, which includes the laser chip provided in any one of the above embodiments.
According to the laser chip and the laser provided by the embodiment of the invention, the N-type high-doped layer is arranged on the substrate, so that current directly passes through the N-type high-doped layer with high doping concentration, a laser current expansion path is realized, and the current is prevented from flowing through the high-impedance position of the substrate, so that a laser device with high light efficiency is realized.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, a brief description will be given below of the drawings required for the embodiments or the prior art descriptions, and it is obvious that some of the drawings in the following description are some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a laser chip according to an embodiment of the present invention;
FIG. 2 is a schematic top view of a laser chip according to an embodiment of the present invention;
fig. 3 is a schematic structural view of a conventional laser chip;
fig. 4 to 10 are schematic structural views of the laser chip shown in fig. 1 at various stages in the manufacturing process;
FIG. 11 is a schematic diagram of a laser chip according to another embodiment of the present invention;
fig. 12 is a schematic structural diagram of a laser chip according to another embodiment of the present invention.
Reference numerals:
10-substrate; a 12-N type high doping layer; 121-a mesa; a 14-N type semiconductor layer; 16-an active layer; 161-a first waveguide layer; 162-quantum well layers; 163-a second waveguide layer; an 18-P type semiconductor layer; 181-P type cladding layer; 182-P type ohmic layer; 20-an insulating layer; 201-a first opening; 202-a second opening; 30-N type electrode; a 40-P type electrode; the thickness of the H1-N type high-doped layer; h2-thickness of mesa.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention; the technical features designed in the different embodiments of the invention described below can be combined with each other as long as they do not conflict with each other; all other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
In the description of the present invention, it should be understood that the terms "center," "lateral," "upper," "lower," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like indicate orientations or positional relationships based on the orientation or positional relationships shown in the drawings, merely to facilitate describing the present invention and simplify the description, and do not indicate or imply that the devices or components referred to must have a specific orientation or be configured and operated in a specific orientation, and thus should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present invention, unless otherwise indicated, the meaning of "a plurality" is two or more. In addition, the term "comprising" and any variations thereof are meant to be "at least inclusive".
Referring to fig. 1 and fig. 2, fig. 1 is a schematic structural diagram of a laser chip according to an embodiment of the invention, and fig. 2 is a schematic plan view of the laser chip according to an embodiment of the invention. To achieve at least one of the advantages and other advantages, an embodiment of the present invention provides a laser chip. As shown in the figure, the laser chip includes a substrate 10, an N-type highly doped layer 12, an N-type semiconductor layer 14, an active layer 16, a P-type semiconductor layer 18, an insulating layer 20, an N-type electrode 30, and a P-type electrode 40.
The substrate 10 may be a GaN substrate. The GaN substrate has the excellent characteristics of high forbidden bandwidth, high saturated electron drift speed, high electron mobility, breakdown field strength and the like, and can effectively improve the reliability of the laser chip when being used as the substrate 10 of the laser chip. The GaN substrate is doped with N-type ions, such as Si and Ge. The GaN substrate is a low-doping concentration substrate, and the concentration of doped N-type ions in the GaN substrate is less than or equal to 1E18cm -3 。
An N-type highly doped layer 12 is located over the substrate 10. The N-type highly doped layer 12 has a mesa 121 that is not obscured by the N-type semiconductor layer 14 and the insulating layer 20 so that the N-type electrode 30 can be electrically connected to the mesa 121. The doping concentration of the N-type highly doped layer 12 is greater than the doping concentration of the substrate 10. By disposing the N-type high doped layer 12 on the substrate 10, the N-type electrode 30 is electrically connected with the N-type high doped layer 12, so that current directly passes through the N-type high doped layer 12 with high doping concentration, a laser current expansion path is realized, and current is prevented from flowing through a high impedance position of the substrate 10, thereby realizing a laser device with high light efficiency. That is, the present invention can avoid using a highly doped substrate as the substrate 10, and the cost of one laser chip is about 90% from the highly doped substrate, while the present invention can realize the laser current expansion path by disposing the N-type highly doped layer 12 on the substrate 10, so that the present invention is not limited to the highly doped substrate, and the cost of using the highly doped substrate can be greatly saved.
In some embodiments, the N-type highly doped layer 12 may be Al x Ga 1-x And N layers, wherein x is more than or equal to 0 and less than or equal to 0.5. When x=0, the N-type highly doped layer 12 is a GaN layer. The N-type ions doped in the N-type highly doped layer 12 may be Si, te or Ge.
In some embodiments, the N-type ion doping concentration in the N-type highly doped layer 12 is in the range of 1E18cm -3 ~5E19cm -3 If the doping concentration is higher than 5E19cm -3 A problem of surface defects may occur,influence the quality of the laser chip; if the doping concentration is lower than 1E18cm -3 The formation of high doping is disadvantageous, resulting in a decrease in the light efficiency of the laser device. In some embodiments, the doping concentration of the N-type high doped layer 12 is at least 2 times that of the substrate 10, and optionally, the doping concentration of the N-type high doped layer 12 is 2-15 times that of the substrate 10, so as to allow current to directly pass through the N-type high doped layer 12 with high doping concentration, thereby realizing a laser current expansion path.
In some embodiments, the thickness H1 of the N-type highly doped layer 12 is greater than 0.1 μm. Alternatively, the thickness H1 of the N-type highly doped layer 12 is in the range of 1.5-2.5 μm, and if the thickness H1 of the N-type highly doped layer 12 is too small, for example, less than 0.1 μm, there is a problem that effective current diffusion cannot be performed. In some embodiments, the N-type ion doping concentration in the N-type highly doped layer 12 is in the range of 1E18cm -3 ~5E19cm -3 When the thickness H2 of the mesa 121 is in the range of 1-2 μm, if the mesa 121 is too thick (e.g., greater than 2 μm), internal accumulated stress may be caused, which is not beneficial to light extraction; if the mesa 121 is too thin (e.g., less than 1 μm), there is a problem that effective current diffusion cannot be performed; the mesa 121 has a thickness H2 in the range of 1 to 2 μm, and can easily achieve current spreading and improve the light extraction performance of the laser chip. The thickness H2 of mesa 121 refers to the distance from the lower surface of N-type highly doped layer 12 to mesa 121.
An N-type semiconductor layer 14 is located over the N-type highly doped layer 12. The N-type semiconductor layer 14 may supply electrons to the active layer 16 under the power supply. The N-type semiconductor layer 14 includes an N-type doped nitride layer. The N-type doped impurities may include one of Si, ge, sn, or a combination thereof. The N-type semiconductor layer 14 includes an N-type cladding layer, which may be an AlGaN layer doped with low Si concentration. That is, the doping concentration of the N-type high-doped layer 12 is greater than the doping concentration of the N-type semiconductor layer 14. Optionally, the doping concentration of the N-type highly doped layer 12 is at least 3 times the doping concentration of the N-type semiconductor layer 14. Optionally, the doping concentration of the N-type highly doped layer 12 is in the range of 5E17cm -3 ~5E18cm -3 Too high a doping concentration can result in severe absorption.
The active layer 16 is located over the N-type semiconductor layer 14. The active layer 16 includes a first waveguide layer 161, a quantum well layer 162, and a second waveguide layer 163 sequentially stacked on the N-type semiconductor layer 14. I.e., the first waveguide layer 161 is adjacent to the N-type semiconductor layer 14 and the second waveguide layer 163 is adjacent to the P-type semiconductor layer 18. The first waveguide layer 161 and the second waveguide layer 163 serve to confine light between the two waveguide layers, and laser emission is formed by oscillation. The first waveguide layer 161 and the second waveguide layer 163 may each be InGaN layers. The first and second waveguide layers 161 and 163 have a higher band gap and a lower refractive index than the quantum well layer 162; the first waveguide layer 161 has a lower band gap and a higher refractive index than the N-type cladding layer; the second waveguide layer 163 has a lower band gap and a higher refractive index than the P-type cladding layer 181.
The quantum Well layer 162 may be a multiple quantum Well structure (Multiple Quantum Well, abbreviated as MQW) including a plurality of Well layers (Well) and a plurality of Barrier layers (Barrier) alternately arranged in a repetitive manner, for example, a multiple quantum Well structure which may be GaN/AlGaN, inAlGaN/InAlGaN or InGaN/AlGaN. In addition, in order to improve the light emitting efficiency of the light emitting layer, it is possible to realize the light emitting layer by changing the depth of the quantum well, the number of layers of the paired quantum well and quantum barrier, the thickness, and the like.
A P-type semiconductor layer 18 is located over the active layer 16. The P-type semiconductor layer 18 may provide holes to the active layer 16 under the power supply. The P-type semiconductor layer 18 includes a P-type doped nitride layer. The P-doped nitride layer may include one or more P-type impurities. The P-type impurity may include one of Mg, zn, be, or a combination thereof. The P-type semiconductor layer 18 includes a P-type cap layer 181 and a P-type ohmic layer 182, and the P-type cap layer 181 is located between the P-type ohmic layer 182 and the active layer 16. The P-type cladding layer 181 may be an Mg-doped AlGaN layer. The P-type ohmic layer 182 may be a P-GaN layer.
The insulating layer 20 covers the N-type highly doped layer 12, the N-type semiconductor layer 14, the active layer 16, and the P-type semiconductor layer 18. The insulating layer 20 has a first opening 201 and a second opening 202, the first opening 201 exposes the N-type highly doped layer 12, and the second opening 202 exposes the P-type semiconductor layer 18. The insulating layer 20 may be used to prevent the N-type semiconductor layer 14 and the P-type semiconductor layer 18 from being electrically connected due to leakage of the conductive material, so as to avoid abnormal short circuit, but the embodiment of the disclosure is not limited thereto. The material of the insulating layer 20 comprises a non-conductive material. The non-conductive material is preferably an inorganic material or a dielectric material. The inorganic material may comprise silica gel. The dielectric material comprises an electrically insulating material such as aluminum oxide, silicon nitride, silicon oxide, titanium oxide, or magnesium fluoride. For example, the insulating layer 20 may be silicon dioxide, silicon nitride, titanium oxide, tantalum oxide, niobium oxide, barium titanate, or a combination thereof, which may be, for example, a bragg reflector (DBR) formed by repeatedly stacking two materials having different refractive indexes.
An antireflection film (AR) and a High Reflection film (HR) are provided on the side walls of the laser chip at the upper and lower short sides, respectively, in a plan view, and the laser light is emitted from the side of the antireflection film.
The N-type electrode 30 is connected to the N-type highly doped layer 12 through the first opening 201. The N-type electrode 30 may have a single-layer, double-layer or multi-layer structure, for example: laminated structures such as Ti/Al, ti/Al/Ti/Au, ti/Al/Ni/Au, V/Al/Pt/Au, etc.
The P-type electrode 40 is connected to the P-type semiconductor layer 18 through the second opening 202. The P-type electrode 40 may be made of a transparent conductive material or a metal material, and may be adaptively selected according to the doping condition of the surface layer (e.g., the P-type ohmic layer 182) of the P-type semiconductor layer 18. In some embodiments, the P-type electrode 40 is made of a transparent conductive material, which may include Indium Tin Oxide (ITO), zinc indium oxide (indium zinc oxide, IZO), indium oxide (InO), tin oxide (tin oxide, snO), cadmium tin oxide (cadmium tin oxide, CTO), tin antimony oxide (antimony tin oxide, ATO), aluminum zinc oxide (aluminum zinc oxide, AZO), zinc tin oxide (zinc tin oxide, ZTO), zinc oxide doped gallium (gallium doped zinc oxide, GZO), indium oxide doped tungsten (tungsten doped indium oxide, IWO), or zinc oxide (zinc oxide, znO), but the embodiments of the present disclosure are not limited thereto.
In some embodiments, the laser chip is a horizontal electrode structure. That is, the N-type electrode 30 and the P-type electrode 40 are located on the same side of the substrate 10, and the upper surfaces of the N-type electrode 30 and the P-type electrode 40 are located on the same horizontal plane, so that the subsequent wire bonding packaging difficulty is reduced, the problem of packaging heat treatment is solved, and the available heat treatment packaging mode is enlarged.
Compared with the conventional vertical structure type laser chip (as shown in fig. 3), the conventional laser chip design has the P electrode on top and the N electrode on bottom, which is equivalent to the concept of series resistance. If the doping concentration of the GaN substrate cannot be pulled up, the series resistance becomes large, which in turn leads to a voltage rise, so that the photoelectric conversion efficiency (WPE) becomes poor. For example, in the case of the operation current 3A, the brightness of the laser chip is 5W, the forward voltage is 6V, and the WPE is 5W/3a×6v, which cannot achieve high light efficiency performance. In the invention, the N-type high-doped layer 12 is arranged on the GaN substrate, so that current is prevented from flowing through the GaN substrate with high impedance, and the current directly passes through the N-type high-doped layer 12 with high doping concentration, thereby reducing the impedance and realizing a laser current expansion path, and further realizing a laser device with high light efficiency.
Referring to fig. 4 to 10, fig. 4 to 10 are schematic structural views of the laser chip shown in fig. 1 at various stages in the manufacturing process. A method for fabricating the laser chip shown in fig. 1 is disclosed below.
First, as shown in fig. 4, a substrate 10 is provided, and the substrate 10 may be a GaN substrate. An N-type highly doped layer 12 having a high doping concentration is deposited on the substrate 10 to a thickness of 0.1 to 2.5 μm for subsequent etching to enable the N-type electrode 30 to be connected to the N-type highly doped layer 12.
Next, as shown in fig. 5, an N-type semiconductor layer 14 is formed on the N-type highly doped layer 12. The N-type semiconductor layer 14 includes an N-type cladding layer, which may be an AlGaN layer doped with low Si concentration.
Then, as shown in fig. 6, an active layer 16 is formed on the N-type semiconductor layer 14. The active layer 16 includes a first waveguide layer 161, a quantum well layer 162, and a second waveguide layer 163 sequentially stacked on the N-type semiconductor layer 14. The first waveguide layer 161 and the second waveguide layer 163 serve to confine light between the two waveguide layers, and laser emission is formed by oscillation. The materials of the first waveguide layer 161 and the second waveguide layer 163 may each be InGaN.
Next, as shown in fig. 7, a P-type semiconductor layer 18 is formed on the active layer 16.
Then, as shown in fig. 8, the chip is etched, and portions of the outer walls of the N-type semiconductor layer 14, the active layer 16 and the P-type semiconductor layer 18 need to be etched away to expose the mesa 121 of the N-type highly doped layer 12, so as to facilitate subsequent connection of the N-type electrode 30. Portions of P-type semiconductor layer 18 are then etched away so that insulating layer 14 covers P-type semiconductor layer 18, exposing P-type semiconductor layer 18 for connection to P-type electrode 40.
Subsequently, as shown in fig. 9, an insulating layer 20 is deposited on the N-type highly doped layer 12, and the insulating layer 20 covers the N-type highly doped layer 12, the N-type semiconductor layer 14, the active layer 16, and the P-type semiconductor layer 18. The insulating layer 20 has a first opening 201 and a second opening 202, the first opening 201 exposes the N-type highly doped layer 12, and the second opening 202 exposes the P-type semiconductor layer 18.
Finally, as shown in fig. 10, an N-type electrode 30 and a P-type electrode 40 are deposited on the insulating layer 20. The N-type electrode 30 is connected to the mesa 121 of the N-type highly doped layer 12 through the first opening 201. The P-type electrode 40 is connected to the P-type semiconductor layer 18 through the second opening 202.
The above is merely a method for manufacturing the laser chip shown in fig. 1, and the present disclosure is not limited thereto, but is merely an example of a manufacturing implementation of the laser chip.
Referring to fig. 11, fig. 11 is a schematic structural diagram of a laser chip according to another embodiment of the invention. Compared with the laser chip shown in fig. 1, the laser chip of the present embodiment mainly differs in that: the insulating layer 20 extends upward to cover a portion of the upper surface of the P-type ohmic layer 182, so that the insulating protection effect is better.
Referring to fig. 12, fig. 12 is a schematic structural diagram of a laser chip according to another embodiment of the invention. Compared with the laser chip shown in fig. 11, the laser chip of the present embodiment is mainly different in that: the insulating layer 20 also wraps around the sidewalls of the N-type highly doped layer 12 at the mesa 121 to avoid the possibility of leakage from the sidewalls.
An embodiment of the present invention further provides a laser, which includes the laser chip provided in any one of the embodiments, and the formed laser has higher light efficiency performance. Lasers can be used in industrial production for punching, laser cutting and bonding machine equipment to electronic components. Lasers may also be used in manufacturing technology, defense, and nuclear ammunition system software. Lasers are also of great utility to people in the communications and pharmaceutical industries.
According to the laser chip and the laser provided by the embodiment of the invention, the N-type high-doped layer 12 is arranged on the substrate 10, so that current directly passes through the N-type high-doped layer 12 with high doping concentration, a laser current expansion path is realized, and the current is prevented from flowing through the high-impedance position of the substrate 10, thereby realizing a laser device with high light efficiency.
In addition, it should be understood by those skilled in the art that although many problems exist in the prior art, each embodiment or technical solution of the present invention may be modified in only one or several respects, without having to solve all technical problems listed in the prior art or the background art at the same time. Those skilled in the art will understand that nothing in one claim should be taken as a limitation on that claim.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the invention.
Claims (14)
1. A laser chip, characterized in that: the laser chip includes:
a substrate;
the N-type high-doped layer is positioned on the substrate;
an N-type semiconductor layer positioned on the N-type high doping layer;
an active layer over the N-type semiconductor layer, the active layer including a first waveguide layer, a quantum well layer, and a second waveguide layer sequentially stacked on the N-type semiconductor layer;
the P-type semiconductor layer is positioned above the active layer;
the insulating layer covers the N-type high-doped layer, the N-type semiconductor layer, the active layer and the P-type semiconductor layer, and is provided with a first opening and a second opening, wherein the first opening exposes the N-type high-doped layer, and the second opening exposes the P-type semiconductor layer;
the N-type electrode is connected with the N-type high-doped layer through the first opening;
a P-type electrode connected to the P-type semiconductor layer through the second opening;
the doping concentration of the N-type high-doping layer is larger than that of the substrate.
2. The laser chip of claim 1, wherein: the N-type high-doped layer is Al x Ga 1-x And N layers, wherein x is more than or equal to 0 and less than or equal to 0.5.
3. The laser chip of claim 2, wherein: and the doped N-type ions in the N-type high-doped layer are Si, te or Ge.
4. The laser chip of claim 1, wherein: the doping concentration range in the N-type high-doping layer is 1E18cm -3 ~5E19cm -3 。
5. The laser chip of claim 1, wherein: the thickness of the N-type high-doped layer is larger than 0.1 mu m.
6. The laser chip of claim 5, wherein: the thickness of the N-type high-doped layer ranges from 1.5 mu m to 2.5 mu m.
7. The laser chip of claim 1, wherein: the doping concentration of the N-type high doping layer is at least 2 times that of the substrate.
8. The laser chip of claim 1, wherein: the first waveguide layer and the second waveguide layer are both InGaN layers, and the substrate is a GaN substrate.
9. The laser chip of claim 1, wherein: the upper surfaces of the N-type electrode and the P-type electrode are positioned on the same horizontal plane.
10. The laser chip of claim 1, wherein: the N-type electrode and the P-type electrode are positioned on the same side of the substrate.
11. The laser chip of claim 1, wherein: the doping concentration of the N-type high-doping layer is larger than that of the N-type semiconductor layer.
12. The laser chip of claim 1, wherein: the doping concentration range in the N-type semiconductor layer is 5E17cm -3 ~5E18cm -3 。
13. The laser chip of claim 1, wherein: the doping concentration of the substrate is less than or equal to 1E18cm -3 。
14. A laser, characterized by: the laser comprising a laser chip as claimed in any one of claims 1 to 13.
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