CN116388615B - Direct-current brushless motor broken line speed regulation control circuit and method - Google Patents
Direct-current brushless motor broken line speed regulation control circuit and method Download PDFInfo
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- CN116388615B CN116388615B CN202310653474.5A CN202310653474A CN116388615B CN 116388615 B CN116388615 B CN 116388615B CN 202310653474 A CN202310653474 A CN 202310653474A CN 116388615 B CN116388615 B CN 116388615B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P6/00—Arrangements for controlling synchronous motors or other dynamo-electric motors using electronic commutation dependent on the rotor position; Electronic commutators therefor
- H02P6/08—Arrangements for controlling the speed or torque of a single motor
- H02P6/085—Arrangements for controlling the speed or torque of a single motor in a bridge configuration
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Abstract
The application provides a broken line speed regulation control circuit and method of a direct current brushless motor. The control circuit includes a conversion circuit, a slope variable triangular wave generator, and a comparator. The conversion circuit converts the externally input first pulse width modulation signal into a square wave equivalent signal, wherein the square wave equivalent signal characterizes the duty ratio of the first pulse width modulation signal. The slope variable triangular wave generator is used for generating a triangular wave signal which at least comprises two rising slopes or two falling slopes in one period. The comparator compares the square wave equivalent signal with the triangular wave signal to generate a second pulse width modulation signal, and the second pulse width modulation signal controls the on and off time of the power switch so as to control the rotating speed of the motor. The control circuit enables the motor rotating speed to be in linear relation with the input pulse width modulation signal, so that the change of the motor rotating speed along with the duty ratio of the pulse width modulation signal is more obvious, and the control circuit is beneficial to providing a more matched duty ratio of the pulse width modulation signal to regulate the motor rotating speed.
Description
Technical Field
The application relates to the field of motor driving chips, in particular to a broken line speed regulation control circuit and method of a direct current brushless motor.
Background
Compared with a brush direct current motor, a direct current brushless motor (BLDC) replaces the original brush commutation by an electronic commutation mode, has the characteristics of faster dynamic response, long service life, high rotating speed range, high efficiency, low noise, low electromagnetic interference and good rotating speed-torque characteristic, and has more advantages than an induction motor and a brush direct current motor. Therefore, the BLDC motor has wide application in industry and consumer electronics, and is the preferred scheme of the mainstream motor, and the market share of the BLDC motor has gradually increased in recent years. In general, BLDC drives often employ a pulse width modulation duty cycle modulation strategy to control motor speed. As shown in fig. 1, a special digital operation processor (e.g., a microprocessor MCU, a digital signal processor DSP, etc.) generates a first pulse width modulation signal PWM and sends the first pulse width modulation signal PWM to a motor driving chip, and is used for controlling on and off switching of each switching tube in a driving bridge in the motor driving chip, so as to drive a motor rotor to rotate. For the application of fig. 1, the motor driving chip value is schematically shown to include an H-bridge, and a pair of output pins OUT1 and OUT2 corresponding to the H-bridge, respectively connected to two ends of the coil of the motor. In other applications of BLDC, the motor drive chip may also include multiple H-bridges or bridges with multiple bridge arms, and other output pins OUT1 and OUT2 corresponding to those bridges, for energizing one or more motor coils.
For the open loop speed regulation principle, the output duty ratio of OUT1 and the output duty ratio of OUT2 are both in linear relation with the duty ratio D1 of the input first pulse width modulation signal PWM, as shown in fig. 2. Thereby adjusting the motor speed by configuring the duty ratio D1 of the input first pulse width modulation signal PWM. The output duty cycle of OUT1 and the output duty cycle of OUT2 refer to: the ratio of the time the voltage at OUT1 (or OUT 2) is high to the switching cycle time during one switching cycle.
Since the motor generates back electromotive force when operating, the magnitude of the back electromotive force is positively correlated with the motor rotational speed. Therefore, under the influence of the back emf, the linear duty cycle speed regulation curve will make the final motor speed and the duty cycle of the first pulse width modulation signal PWM no longer have a linear relationship, but rather exhibit a nonlinear relationship.
Disclosure of Invention
The application aims to provide a broken line speed regulation control circuit and a broken line speed regulation control method, which are used for overcoming the nonlinear relation between the rotating speed of a motor and an input pulse width modulation signal caused by the influence of back electromotive force when the motor rotates.
In one aspect, the application provides a broken line speed regulation control circuit of a brushless DC motor, which comprises: the conversion circuit receives the first pulse width modulation signal and converts the first pulse width modulation signal into a square wave equivalent signal, and the square wave equivalent signal is used for representing the duty ratio of the first pulse width modulation signal; a slope variable triangular wave generator for generating a triangular wave signal with a variable slope, wherein the triangular wave signal at least comprises two rising slopes or two falling slopes in one period; the comparator is provided with a first input end, a second input end and an output end, wherein the first input end of the comparator receives a square wave equivalent signal, the second input end of the comparator receives a triangular wave signal, the comparator compares the square wave equivalent signal with the triangular wave signal to generate a second pulse width modulation signal, and the second pulse width modulation signal is used for controlling the on-off time of a power switch in the control circuit so as to control the rotating speed of the motor.
The application further provides a method for controlling the broken line speed regulation of the direct current brushless motor, which comprises the following steps: converting the first pulse width modulation signal into a square wave equivalent signal, wherein the square wave equivalent signal is used for representing the duty ratio of the first pulse width modulation signal; generating a triangular wave signal with a variable slope, wherein the triangular wave signal at least comprises two rising slopes or two falling slopes in one period; and comparing the square wave equivalent signal with the triangular wave signal to generate a second pulse width modulation signal, wherein the second pulse width modulation signal is used for controlling the on and off time of a power switch coupled between motor terminals so as to control the rotating speed of the motor.
The broken line speed regulation control circuit and the broken line speed regulation control method can enable the rotating speed of the motor to still be in linear relation with the duty ratio of the input pulse width modulation signal even under the influence of back electromotive force. Therefore, the change of the motor rotating speed along with the duty ratio of the input pulse width modulation signal is more obvious, and the designer can provide a more matched duty ratio of the pulse width modulation signal to adjust the motor rotating speed.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are needed in the description of the embodiments or the prior art will be briefly described, and it is obvious that the drawings in the description below are some embodiments of the present application, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram of a conventional dc brushless motor driving system.
Fig. 2 is a schematic diagram showing the relationship between the output duty ratio and the input PWM signal PWM of the prior art OUT1 and OUT2.
Fig. 3 is a schematic diagram of a motor driving system according to an embodiment of the present application.
Fig. 4 is a schematic diagram showing the relationship between the output duty ratio of OUT1 and OUT2 and the input PWM signal PWM according to an embodiment of the present application.
Fig. 5 is a circuit schematic of the PWM processing circuit 10 according to one embodiment of the present application.
Fig. 6 is a schematic waveform diagram of a portion of parameters according to an embodiment of the present application.
Fig. 7 is a schematic waveform diagram of a part of parameters according to still another embodiment of the present application.
Fig. 8 is a circuit diagram of the variable slope triangular wave generator 52 according to an embodiment of the present application.
Fig. 9 illustrates a waveform diagram of a portion of parameters of the variable triangular wave generator 52 of fig. 8, according to one embodiment of the present application.
Fig. 10 is a waveform diagram illustrating a part of parameters of the variable triangular wave generator 52 shown in fig. 8 according to still another embodiment of the present application.
Description of the embodiments
The technical solutions of the present application will be clearly and completely described in connection with the embodiments, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
Fig. 3 is a schematic diagram of a motor driving system according to an embodiment of the present application. Next, in the embodiment shown in fig. 3, a single-phase motor will be schematically described by taking one H-bridge 20 and one motor coil as examples, and it should be understood by those skilled in the art that one H-bridge 20 and one motor coil are only illustrative herein, and that in other applications, the motor driving chip may further include a plurality of H-bridges or bridges having a plurality of bridge arms and corresponding output pins of the bridges, for powering one or more motor coils outside the motor driving chip, thereby driving the motor.
In comparison with the prior art shown in fig. 1, the motor driving chip in the embodiment shown in fig. 3 further comprises a PWM processing circuit 10 for processing the externally input first PWM signal PWM and generating a second PWM signal PWM-new. Typically, the first PWM signal PWM is generated by an external digital operation processor, and the first PWM signal PWM is a set of square wave signals with high and low logic levels. The second PWM signal PWM-new is also a set of square wave signals with high and low logic levels. The frequency of the second pulse width modulation signal PWM-new is much greater than the frequency of the first pulse width modulation signal PWM. For example, in one embodiment, the frequency of the second pulse width modulated signal PWM-new is several hundred khz; the frequency of the first pulse width modulation signal PWM is a few khz. In one embodiment, the first pulse width modulated signal PWM is a square wave signal of constant frequency and variable duty cycle. In one embodiment, the second pulse width modulated signal PWM is also a square wave signal of constant frequency and variable duty cycle. The current flowing through the motor coil is changed by controlling the duty ratio of the first pulse width modulation signal PWM, so that the rotating speed of the motor is controlled.
After the value of the duty ratio D1 of the first pulse width modulation signal PWM rises to a preset value, the rotation speed of the motor is increased or reduced by changing the ratio of the output duty ratio of OUT1 or the output duty ratio of OUT2 to the duty ratio D1 of the input first pulse width modulation signal PWM, so that the influence of counter electromotive force of the motor is counteracted, and the output duty ratio of OUT1 and the output duty ratio of OUT2 still have a linear relation with the duty ratio D1 of the first pulse width modulation signal PWM. In one embodiment, the linear relationship refers to the output duty cycle of OUT1 and the output duty cycle of OUT2 still being in direct proportion to the duty cycle D1 of the first pulse width modulated signal PWM. Those skilled in the art will appreciate that: after the value of the duty ratio D1 of the first pulse width modulation signal PWM rises to a preset value, the ratio of the output duty ratio of OUT1 or the output duty ratio of OUT2 to the duty ratio D1 of the input first pulse width modulation signal PWM is selected to be increased or decreased, which is determined by the actual working scenario, so as to reduce the influence of the back electromotive force of the motor in different occasions.
The second PWM signal PWM-new is used to control the on and off time of the power switches in the H-bridge 20, thereby controlling the rotational speed of the motor. In one embodiment, the control circuit further comprises logic circuitry. The logic circuit receives the second pulse width modulation signal PWM-new and performs logic processing on the second pulse width modulation signal PWM-new to generate a control signal, where the control signal is used to control on and off time of each power switch S1-S4 in the H-bridge, and further control current flowing through a coil in the motor.
For example, when the second PWM signal PWM-new is at a high level, the second PWM signal PWM-new will drive the switch S1 on the first bridge arm to perform the pulse switching operation, the lower switch S4 on the second bridge arm is closed, and the lower switch S3 on the first bridge arm and the upper switch S2 on the second bridge arm are opened. The voltage on pin OUT1 is a high voltage (e.g., VCC) and the voltage on pin OUT2 is a low voltage (e.g., referenced to ground), and current will flow from pin OUT1 through the coil of the motor to pin OUT2.
When the second pulse width modulation signal PWM-new is at a low level, the second pulse width modulation signal PWM-new drives the switch S2 on the second bridge arm to perform the pulse switching operation, the lower switch S3 on the first bridge arm is closed, and the lower switch S4 on the second bridge arm and the upper switch S1 on the second bridge arm are opened. The voltage on pin OUT1 is low (e.g., referenced to ground) and the voltage on pin OUT2 is high (e.g., VCC) and current will flow from pin OUT2 through the coil of the motor to pin OUT1.
The motor can be controlled by generating a second pulse width modulation signal PWM-new after the first pulse width modulation signal PWM is processed by the PWM processing circuit 10, so that the broken line speed regulation of the motor can be realized. As shown in fig. 4, the output duty ratio of OUT1 and the output duty ratio of OUT2 are still in a linear relationship (broken line B and broken line C) with the duty ratio D1 of the first pulse width modulation signal PWM, but the ratio changes, so as to counteract the effect of the back electromotive force of the motor.
Fig. 5 is a circuit schematic of the PWM processing circuit 10 according to one embodiment of the present application. As shown in fig. 5, the PWM processing circuit 10 includes a conversion circuit 51, a ramp variable triangle wave generator 52, and a comparator 53.
The conversion circuit 51 receives the first pulse width modulation signal PWM and converts the first pulse width modulation signal PWM in the form of high and low levels into a square wave equivalent signal PWM-DC. The square wave equivalent signal PWM-DC is used to characterize the duty cycle of the first pulse width modulated signal PWM. In one embodiment, the square wave equivalent signal PWM-DC comprises an analog voltage signal. The first pulse width modulated signal PWM will correspond to different values of the square wave equivalent signal PWM-DC at different duty cycles of each period. In one embodiment, the conversion circuit 51 includes a filter circuit, which includes an analog filter circuit composed of a resistor and a capacitor, and may also include a digital filter circuit.
The slope variable triangular wave generator 52 is used to generate a slope variable triangular wave signal Tri-agl. The variable slope means that the rising slope, the falling slope, or both the rising slope and the falling slope of the triangular wave signal Tri-agl are variable. The triangular wave signal Tri-agl includes at least two rising slopes or two falling slopes in one period.
For example, in one embodiment, the triangular wave signal Tri-agl includes a triangular wave signal having a rising slope and a falling slope. The triangle wave signal slope being variable means that the triangle wave signal has two rising slopes and one falling slope, or two falling slopes and one rising slope, or two falling slopes and two rising slopes in a period of one triangle wave signal. When the triangular wave signal has two falling slopes and two rising slopes, see the triangular wave signal Tri-agl1 and triangular wave signal Tri-agl2 in the waveform of fig. 6.
As another example, in one embodiment, the triangular wave signal Tri-agl includes a ramp signal having only a rising slope or only a falling slope. The triangular wave signal slope being variable means that the triangular wave signal has two rising slopes or two falling slopes, as shown by triangular wave signal Tri-agl3 and triangular wave signal Tri-agl4 in the waveform of fig. 7.
The comparator 53 has a first input, a second input and an output. A first input terminal of the comparator 53 receives the square wave equivalent signal PWM-DC; a second input of the comparator 53 receives the triangular wave signal Tri-agl; the comparator 53 compares the square wave equivalent signal PWM-DC with the triangular wave signal Tri-agl to generate the second pulse width modulation signal PWM-new. In one embodiment, the second pulse width modulated signal PWM-new comprises a high low logic level signal. In one embodiment, when the square wave equivalent signal PWM-DC is greater than the triangular wave signal Tri-agl, the second pulse width modulation signal PWM-new is at a logic high level; when the square wave equivalent signal PWM-DC is smaller than the triangular wave signal Tri-agl, the second pulse width modulation signal PWM-new is at a logic low level.
Fig. 6 is a schematic waveform diagram of a portion of parameters according to an embodiment of the present application. The reference waveform, the first pulse width modulation signal PWM waveform, the triangular wave signal Tri-agl1 waveform, the second pulse width modulation signal PWM-new1 waveform, the triangular wave signal Tri-agl2 waveform and the second pulse width modulation signal PWM-new2 waveform of the triangular wave with unchanged slope and the corresponding first pulse width modulation signal PWM are shown from top to bottom. The triangular wave signal Tri-agl1 and the triangular wave signal Tri-agl2 are waveforms of two specific embodiments of the triangular wave signal Tri-agl; the second pulse width modulation signal PWM-new1 and the second pulse width modulation signal PWM-new2 are waveform illustrations of two specific embodiments of the second pulse width modulation signal PWM-new. Specifically, in fig. 6, the triangular wave signal Tri-agl1 and the triangular wave signal Tri-agl2 are triangular wave signals having variable rising slopes and falling slopes.
As shown in the triangular wave signal Tri-agl1, when the triangular wave signal Tri-agl1 rises to the point a1, the rising slope of the triangular wave signal Tri-agl1 is changed from k1 to k2, wherein k2> k1; when the triangular wave signal Tri-agl1 falls to the point a2, the rising slope of the triangular wave signal Tri-agl1 is changed from-k 2 to-k 1. It can also be seen from the waveform of the second PWM signal PWM-new1 that the rising slope and the falling slope of the triangular wave signal Tri-agl1 are divided into two segments, and when k2> k1, the duty ratio D21 of the second PWM signal PWM-new1 is also increased compared to the duty ratio D-ref of the second PWM signal PWM-ref when the triangular wave slope is unchanged.
In the triangular wave signal Tri-agl2, when the triangular wave signal Tri-agl2 rises to the point b1, the rising slope of the triangular wave signal Tri-agl2 is changed from k3 to k4, wherein k4< k3; when the triangular wave signal Tri-agl2 falls to the point b2, the rising slope of the triangular wave signal Tri-agl2 is changed from-k 4 to-k 3. As can be seen from the waveform of the second pulse width modulation signal PWM-new2, the rising slope and the falling slope of the triangular wave signal Tri-agl2 are divided into two segments, and when k4< k3, the duty ratio D22 of the second pulse width modulation signal PWM-new2 becomes smaller than the duty ratio D-ref of the second pulse width modulation signal PWM-ref when the triangular wave slope is unchanged.
Fig. 7 is a schematic waveform diagram of a part of parameters according to still another embodiment of the present application. The implementation shown in fig. 7 illustrates a waveform diagram associated with the triangular signal Tri-agl being a ramp signal. As shown in the triangular wave signal Tri-agl3, when the triangular wave signal Tri-agl3 rises to the point a3, the rising slope of the triangular wave signal Tri-agl1 becomes larger, and the duty ratio D23 of the second pulse width modulation signal PWM-new3 also increases compared to the duty ratio D-ref of the second pulse width modulation signal PWM-ref when the triangular wave slope is unchanged. As shown in the triangular wave signal Tri-agl4, when the triangular wave signal Tri-agl3 rises to the point b3, the rising slope of the triangular wave signal Tri-agl4 becomes smaller, and the duty ratio D24 of the second pulse width modulation signal PWM-new4 becomes smaller than the duty ratio D-ref of the second pulse width modulation signal PWM-ref when the triangular wave slope is unchanged.
Fig. 8 is a circuit diagram of the variable slope triangular wave generator 52 according to an embodiment of the present application. As shown in fig. 8, the slope variable triangular wave generator 52 includes a frequency adjustable oscillator 81, a counter 82, a digital-to-analog converter 83, and a digital comparator 84.
The frequency tunable oscillator 81 receives a frequency modulated signal comp_out for controlling the frequency tunable oscillator 81 to generate the clock signal CLK. As will be appreciated by those skilled in the art, the clock signal CLK is a square wave signal having a high and low logic level. In the disclosed embodiment, the clock signal CLK has two different frequencies, the transition between which is controlled by the frequency modulated signal COMP OUT. In one embodiment, the frequency modulated signal comp_out has a first logic level state (e.g., a logic high level) and a second logic level state (e.g., a logic low level). In one embodiment, the clock signal CLK has a first fixed frequency when the FM signal COMP_OUT is at a first logic level state; when the frequency modulated signal comp_out is in the second logic level state, the clock signal CLK has a second fixed frequency different from the previous first fixed frequency.
The counter 82 receives the clock signal CLK, counts the period of the clock signal CLK, and outputs the count signal DATA. In one embodiment, the count signal DATA comprises a digital signal consisting of a set of binary codes. In one embodiment, the counter 82 includes a one-way counter and a two-way counter 82. The one-way counter means to count up the period of the clock signal CLK from zero to the maximum count value or count down from the maximum count value. The bidirectional count means that after the cycle of the clock signal CLK is counted up from zero to the maximum count value, the cycle of the clock signal CLK is counted down from the maximum count value. For example, the up-down counter may count the periods of the clock signal CLK from 1 to 100, and when the count period value is equal to 100, the up-down counter continues to count the periods of the clock signal CLK from 100 to 1.
The digital-to-analog converter 83 converts the count signal DATA into a triangular wave signal Tri-agl. In one embodiment, the triangular wave signal Tri-agl comprises an analog signal.
The digital comparator 84 has a first input, a second input, and an output. A first input terminal of the digital comparator 84 receives the count signal DATA; a second input of the digital comparator 84 receives a count value reference; the digital comparator 84 compares the count signal DATA with the count value reference DATA-ref to generate a frequency modulated signal comp_out. In one embodiment, the counter reference DATA-ref may be flexibly set according to the needs of different applications.
Fig. 9 illustrates a waveform diagram of a portion of parameters of the variable triangular wave generator 52 of fig. 8, according to one embodiment of the present application. As shown in fig. 9, waveforms of the clock signal CLK, the triangular wave signal Tri-agl1, and the frequency modulated signal comp_out are respectively illustrated from top to bottom. As shown in fig. 9, the clock signal CLK has a first fixed frequency when the fm signal comp_out is logic low; when the frequency modulated signal comp_out is logic high, the clock signal CLK has a second fixed frequency, wherein the first fixed frequency is less than the second fixed frequency. The slope of the triangular wave signal Tri-agl1 also rises from k1 to k2.
Fig. 10 is a waveform diagram illustrating a part of parameters of the variable triangular wave generator 52 shown in fig. 8 according to still another embodiment of the present application. As shown in fig. 10, waveforms of the clock signal CLK, the triangular wave signal Tri-agl2, and the frequency modulated signal comp_out are respectively illustrated from top to bottom. When the frequency modulated signal comp_out is logic low, the clock signal CLK has a third fixed frequency; when the frequency modulated signal comp_out is logic high, the clock signal CLK has a fourth fixed frequency, wherein the third fixed frequency is greater than the fourth fixed frequency. The slope of the triangular wave signal Tri-agl2 also drops from k3 to k4. It can also be seen from the waveforms of fig. 9 and 10 that the frequency of the clock signal CLK is proportional to the absolute value of the slope of the triangular wave. The higher the frequency of the clock signal CLK, the larger the absolute value of the slope of the triangular wave; the lower the frequency of the clock signal CLK, the smaller the absolute value of the slope of the triangular wave.
The application also provides a method for controlling the broken line speed regulation of the direct current brushless motor, which comprises the following steps:
step one: the first pulse width modulation signal PWM is converted into a square wave equivalent signal PWM-DC that characterizes the duty cycle of the first pulse width modulation signal PWM.
Step two: a triangular wave signal Tri-agl with a variable slope is generated, wherein the triangular wave signal Tri-agl at least comprises two rising slopes or two falling slopes in one period.
Step three: and comparing the square wave equivalent signal PWM-DC with the triangular wave signal Tri-agl to generate a second pulse width modulation signal PWM-new, wherein the second pulse width modulation signal PWM-new is used for controlling the on and off time of a power switch coupled between motor terminals so as to control the rotating speed of the motor.
In one embodiment, the second step further comprises: generating a clock signal CLK having a first frequency and a second frequency, wherein the first frequency and the second frequency are not equal; counting the period of the clock signal CLK and outputting a count signal DATA; converting the count signal DATA into a triangular wave signal Tri-agl; and comparing the count signal DATA with the count value reference DATA-ref to generate a frequency modulated signal COMP_OUT, wherein the frequency modulated signal COMP_OUT is used to control the clock signal to switch between the first frequency and the second frequency.
By the broken line speed regulation control circuit and the broken line speed regulation control method disclosed by the embodiment, the influence of counter electromotive force when the motor rotates can be overcome, so that the rotating speed of the motor and the duty ratio of an input pulse width modulation signal still form a linear relation.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present application, and not for limiting the same; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the application.
Claims (8)
1. A kind of direct-flow brushless motor broken line speed governing control circuit, characterized by, comprising:
the conversion circuit receives a first pulse width modulation signal generated by the microprocessor and converts the first pulse width modulation signal into a square wave equivalent signal, and the square wave equivalent signal is used for representing the duty ratio of the first pulse width modulation signal;
a slope variable triangular wave generator for generating a triangular wave signal with a variable slope, wherein the triangular wave signal at least comprises two rising slopes or two falling slopes in one period; and
the comparator is provided with a first input end, a second input end and an output end, wherein the first input end of the comparator receives a square wave equivalent signal, the second input end of the comparator receives a triangular wave signal, and the comparator compares the square wave equivalent signal with the triangular wave signal to generate a second pulse width modulation signal;
the bridge comprises a plurality of power switch tubes and at least two output ends, and a coil of the direct current brushless motor is coupled between the at least two output ends of the bridge, wherein the second pulse width modulation signal is used for controlling the on and off time of the power switch tubes so as to control the rotating speed of a motor, and the rotating speed of the motor is in linear relation with the duty ratio of the first pulse width modulation signal.
2. The control circuit of claim 1, wherein the slope variable triangle wave generator comprises:
a frequency-tunable oscillator that receives the frequency-modulated signal and generates a clock signal according to the frequency-modulated signal, the clock signal having a first frequency and a second frequency, wherein the first frequency and the second frequency are unequal;
a counter which receives the clock signal, counts the period of the clock signal, and outputs a count signal;
a digital-to-analog converter converting the count signal into a triangular wave signal; and
the digital comparator is provided with a first input end, a second input end and an output end, wherein the first input end of the digital comparator receives a counting signal, the second input end of the digital comparator receives a counting value reference, and the digital comparator compares the counting signal with the counting value reference to generate the frequency modulation signal.
3. The control circuit of claim 2, wherein the frequency of the clock signal is proportional to the absolute value of the slope of the triangle wave.
4. The control circuit of claim 2, wherein the frequency modulated signal has a first logic level state and a second logic level state, and wherein the clock signal changes from a first frequency to a second frequency when the frequency modulated signal changes from the first logic level state to the second logic level state.
5. The control circuit of claim 2, wherein the counter comprises a up-down counter.
6. The control circuit of claim 1, wherein the control circuit further comprises:
the electric bridge is composed of the power switches and is coupled with a coil of the motor; and
and the logic circuit is used for receiving the second pulse width modulation signal, carrying out logic processing on the pulse width modulation signal and generating a control signal, wherein the control signal is used for controlling the on and off time of a power switch in the bridge so as to control the current flowing through the coil.
7. A method for controlling the broken line speed regulation of a direct current brushless motor is characterized by comprising the following steps:
converting a first pulse width modulation signal generated by a microprocessor into a square wave equivalent signal, wherein the square wave equivalent signal is used for representing the duty ratio of the first pulse width modulation signal;
generating a triangular wave signal with a variable slope, wherein the triangular wave signal at least comprises two rising slopes or two falling slopes in one period; and
the square wave equivalent signal and the triangular wave signal are compared to generate a second pulse width modulation signal, the second pulse width modulation signal is used for controlling the on and off time of a power switch in a bridge coupled between motor terminals so as to control the rotating speed of a motor, wherein the bridge comprises a plurality of power switch tubes and at least two output ends, the motor terminals are coupled between the at least two output ends of the bridge, and the rotating speed of the motor is in linear relation with the duty ratio of the first pulse width modulation signal.
8. The control method according to claim 7, wherein the step of generating a triangular wave signal with a variable slope includes:
generating a clock signal having a first frequency and a second frequency, wherein the first frequency and the second frequency are not equal;
counting the period of the clock signal and outputting a count signal;
converting the count signal into a triangular wave signal; and
comparing the count signal with a count value reference, a frequency modulated signal is generated, the frequency modulated signal being used to control the conversion of the clock signal between the first frequency and the second frequency.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN202310653474.5A CN116388615B (en) | 2023-06-03 | 2023-06-03 | Direct-current brushless motor broken line speed regulation control circuit and method |
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| CN202310653474.5A CN116388615B (en) | 2023-06-03 | 2023-06-03 | Direct-current brushless motor broken line speed regulation control circuit and method |
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| CN116388615A CN116388615A (en) | 2023-07-04 |
| CN116388615B true CN116388615B (en) | 2023-09-01 |
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