CN116387802A

CN116387802A - Semiconductor packaging device

Info

Publication number: CN116387802A
Application number: CN202111582786.9A
Authority: CN
Inventors: 吴柏毅; 钟明峰
Original assignee: Advanced Semiconductor Engineering Inc
Current assignee: Advanced Semiconductor Engineering Inc
Priority date: 2021-12-22
Filing date: 2021-12-22
Publication date: 2023-07-04

Abstract

The present disclosure relates to semiconductor packaging devices. The semiconductor package apparatus includes: a dielectric element; the radiation excitation source includes a vertical portion extending from an end of the dielectric element to an interior of the dielectric element, the vertical portion and the dielectric element together forming a dielectric resonator antenna. The semiconductor packaging device can reduce the consumption of high dielectric constant materials, further reduce the manufacturing cost of the semiconductor packaging device and is beneficial to improving the economic benefit.

Description

Semiconductor packaging device

Technical Field

The present disclosure relates to the field of semiconductor packaging technology, and in particular, to a semiconductor packaging apparatus.

Background

In the development of millimeter wave circuit technology at high frequencies, there are a number of challenges to be overcome. The antenna of the millimeter wave transceiver applied to high frequency is shortened due to the wavelength, the size and the effective area of the antenna are also reduced, however, the attenuation of millimeter wave and terahertz antenna signals of higher frequency is serious, so that the gain of the antenna is particularly important to increase.

In order to increase the gain of an antenna, a dielectric coating is formed on the surface of the antenna, and a reflecting interface is formed between different media by using the dielectric coating, so that the dielectric coating guides electromagnetic waves to propagate in the dielectric coating through the focusing principle, thereby achieving the characteristics of improving the directivity and gain value and the like. Fig. 1 is a schematic view of one such semiconductor package apparatus. As shown in fig. 1, a dielectric coating 12 is provided on a substrate 10. An antenna 11 is provided between the substrate 10 and the dielectric coating 12. In this semiconductor package apparatus, the dielectric coating 12 needs to cover the antenna 11, and thus the area thereof is large. The dielectric coating 12 is relatively costly because it needs to be made of a high dielectric constant (Dielectric Constant, dk) material. The semiconductor package apparatus shown in fig. 1 has a problem of high manufacturing cost.

Therefore, a new solution is needed to solve at least one of the above technical problems.

Disclosure of Invention

The present disclosure provides a semiconductor package apparatus.

The semiconductor package apparatus provided by the present disclosure includes:

a dielectric element;

a radiation excitation source comprising a vertical portion extending from an end of the dielectric element to an interior of the dielectric element, the vertical portion and the dielectric element together forming a dielectric resonator antenna.

In some alternative embodiments, the semiconductor package apparatus further includes a substrate on which the dielectric element is disposed, and the extending direction of the vertical portion is perpendicular to a surface of the substrate.

In some alternative embodiments, the radiation excitation source further comprises a horizontal portion disposed between the dielectric element and the substrate and connected to an end of the vertical portion.

In some alternative embodiments, the vertical portion is a conductive post, stud, or solder ball.

In some alternative embodiments, the vertical portion is a director antenna or a dipole antenna.

In some alternative embodiments, the substrate includes a ground line, and the horizontal portion is electrically connected to the ground line.

In some alternative embodiments, the semiconductor package apparatus further includes an electronic component disposed on a surface of the substrate.

In some alternative embodiments, the electronic component is a radio frequency chip, a passive component, or a connection component.

In some alternative embodiments, the number of dielectric elements is at least two, each of the dielectric elements having a respective radiation excitation source disposed thereon.

In some alternative embodiments, at least two of the dielectric elements are distributed in an array on the surface of the substrate.

In some alternative embodiments, there is a space between different of the dielectric elements.

In the semiconductor packaging device provided by the disclosure, the radiation excitation source is formed by utilizing the vertical part extending from the end part of the dielectric element to the inside of the dielectric element, so that the consumption of high dielectric constant materials can be reduced, the manufacturing cost of the semiconductor packaging device is further reduced, and the economic benefit is improved.

Drawings

Other features, objects and advantages of the present disclosure will become more apparent upon reading of the detailed description of non-limiting embodiments, made with reference to the following drawings:

FIG. 1 is a schematic diagram of a prior art semiconductor package apparatus;

fig. 2 to 5 are sequentially first to fourth diagrams of a semiconductor package apparatus according to an embodiment of the present disclosure.

Symbol description:

10. a substrate; 11. an antenna; 12. a dielectric coating; 100. a substrate; 110. a ground line; 200. a dielectric element; 300. a radiation excitation source; 310. a vertical portion; 320. a horizontal portion; 400. a radio frequency chip; 410. a molding material; 420. a shielding layer; 500. a passive element; 600. a connecting element.

Detailed Description

The technical problems to be solved by the present disclosure and the technical effects to be produced will be readily apparent to those skilled in the art from the following descriptions of the present disclosure, which are given in connection with the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. In addition, for convenience of description, only a portion related to the related invention is shown in the drawings.

It should be noted that, the structures, proportions, sizes, etc. shown in the drawings are merely used in conjunction with the descriptions of the structures, proportions, sizes, etc. for the understanding and reading of the disclosure, and are not intended to limit the applicable limitations of the disclosure, so that any structural modifications, proportional changes, or adjustments of sizes are not technically essential, and thus, any structural modifications, proportional changes, or adjustments of sizes may fall within the scope of the disclosure without affecting the efficacy or achievement of the present disclosure. Also, the terms "upper", "first", "second", and "a" and the like recited in the present specification are also for descriptive purposes only and are not intended to limit the scope of the disclosure in which the present disclosure may be practiced, but rather the relative relationship of the terms is modified or adapted to be within the scope of the disclosure without substantial modification to the technical content.

It should be further noted that, the longitudinal section corresponding to the embodiment of the present disclosure may be a section corresponding to the front view direction, the transverse section may be a section corresponding to the right view direction, and the horizontal section may be a section corresponding to the upper view direction.

It should be readily understood that the meanings of "on," "over," and "above" in this disclosure should be interpreted in the broadest sense so that "on" means not only "directly on" but also "on" including intermediate components or layers that exist therebetween.

Moreover, spatially relative terms such as "below," "under," "lower," "above," "upper," and the like may be used throughout the present disclosure to describe one element or component's relationship to another element or component illustrated in the figures for ease of description. In addition to the orientations depicted in the drawings, the spatially relative terms are intended to encompass different orientations of the device in use or operation. The device may be otherwise oriented (rotated 90 ° or at other orientations) and the spatially relative descriptors used in the present disclosure may be interpreted accordingly.

In addition, embodiments of the present disclosure and features of embodiments may be combined with each other without conflict. The present disclosure will be described in detail below with reference to the accompanying drawings in conjunction with embodiments.

The embodiment of the disclosure provides a semiconductor packaging device. Fig. 2 to 5 are sequentially first to fourth diagrams of a semiconductor package apparatus according to an embodiment of the present disclosure.

Fig. 2 shows a longitudinal section of the semiconductor package apparatus. As shown in fig. 2, the semiconductor package apparatus includes a dielectric element 200 and a radiation excitation source 300. The radiation excitation source 300 includes a vertical portion 310. The vertical portion 310 extends from the end of the dielectric element 200 to the inside of the dielectric element 200. The vertical portion 310 and the dielectric element 200 together form a dielectric resonator antenna.

In this embodiment, the dielectric element 200 may be made of a high dielectric constant material, and its shape is, for example, a cube or a cylinder.

In some embodiments, the upright 310 may be a lead antenna (Yagi) or a Dipole antenna (Dipole).

As shown in fig. 2, the semiconductor package apparatus further includes a substrate 100. The dielectric element 200 is disposed on the substrate 100, and the extending direction of the vertical portion 310 is perpendicular to the upper surface of the substrate 100.

As shown in fig. 2, the radiation excitation source 300 further includes a horizontal portion 320. The horizontal portion 320 is disposed between the dielectric element 200 and the substrate 100 and is connected with an end of the vertical portion 310.

In one fabrication approach, the horizontal portion 320 may be formed by electroplating on the surface of the substrate 100, then the vertical portion 310 may be formed by providing conductive pillars (pilers) on the surface of the substrate 100, and finally the dielectric element 200 may be disposed around the vertical portion 310 to form the dielectric resonator antenna.

In another manufacturing method, the straight conductor may be bent to form the horizontal portion 320 and the vertical portion 310, then the horizontal portion 320 is connected to the surface of the substrate 100, and finally the dielectric element 200 is disposed around the vertical portion 310 to form the dielectric resonator antenna.

Fig. 3 is another schematic view of the semiconductor package apparatus. As shown in fig. 3, a ground line 110 is provided in the substrate 100. The horizontal portion 320 is electrically connected to the ground line 110 (a specific path of the electrical connection is omitted in fig. 3).

As shown in fig. 3, the lower surface of the substrate 100 is further provided with electronic components, including a radio frequency chip 400, a passive component 500, and a connection component 600. The rf chip 400 is used for processing an rf signal. The rf chip 400 is further provided with a molding material 410 and a shielding layer 420 to protect. The passive element 500 is, for example, a capacitor, a resistor, or an inductor. The connection element 600 is used to realize external connection of the semiconductor package apparatus, for example, a universal serial bus (Universal Serial Bus, USB) interface, a board-to-board connector (board to board connector), or a hot solder paste (hot bar), etc.

Fig. 4 shows a perspective structure of the semiconductor package apparatus of fig. 3. As shown in fig. 4, the semiconductor package apparatus includes a plurality of dielectric elements 200, each dielectric element 200 having a corresponding radiation excitation source 300 disposed thereon. The plurality of dielectric elements 200 are distributed in an array on the surface of the substrate 100. Through the mode, the directivity and the gain value of the antenna structure are improved.

As shown in fig. 4, there is a space between different dielectric elements 200. Alternatively, a plurality of dielectric elements 200 may be formed as a single piece and isolation material may be injected to define different dielectric elements 200. It will be appreciated that the physical isolation between the different dielectric elements 200 of fig. 4 can reduce the amount of dielectric material used, as opposed to being made in one piece, which is advantageous for further reducing manufacturing costs.

Fig. 5 is a modification of the semiconductor package apparatus shown in fig. 3. In fig. 3, the vertical portion 310 is a conductive post (pilar). Whereas in fig. 5, the vertical portion 310 is a Solder ball (Solder). In other embodiments, the upright 310 may also be a Stud (student) or other form.

In the semiconductor package apparatus provided by the present disclosure, the radiation excitation source 300 is formed by using the vertical portion 310 extending from the end of the dielectric element 200 to the inside of the dielectric element 200, so that the amount of high dielectric constant material can be reduced, thereby reducing the manufacturing cost of the semiconductor package apparatus, and being beneficial to improving economic benefit.

While the present disclosure has been described and illustrated with reference to particular embodiments thereof, the description and illustration is not intended to limit the disclosure. It will be apparent to those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof within the embodiments thereof without departing from the true spirit and scope of the disclosure as defined by the appended claims. The illustrations may not be drawn to scale. There may be a distinction between technical reproductions in the present disclosure and actual equipment due to variables in the manufacturing process, etc. There may be other embodiments of the disclosure not specifically illustrated. The specification and drawings are to be regarded in an illustrative rather than a restrictive sense. Modifications may be made to adapt a particular situation, material, composition of matter, method or process to the objective, spirit and scope of the present disclosure. All such modifications are intended to fall within the scope of the claims appended hereto. While the methods disclosed in this disclosure have been described with reference to particular operations performed in a particular order, it should be understood that these operations may be combined, sub-divided, or reordered to form an equivalent method without departing from the teachings of this disclosure. Thus, unless specifically indicated in the disclosure, the order and grouping of operations is not a limitation of the disclosure.

Claims

1. A semiconductor package apparatus comprising:

a dielectric element;

2. The semiconductor package apparatus according to claim 1, wherein the semiconductor package apparatus further comprises a substrate on which the dielectric element is disposed, the extending direction of the vertical portion being perpendicular to a surface of the substrate.

3. The semiconductor package apparatus of claim 2, wherein the radiation excitation source further comprises a horizontal portion disposed between the dielectric element and the substrate and connected with an end of the vertical portion.

4. The semiconductor package apparatus of claim 1, wherein the vertical portion is a conductive post, stud, or solder ball.

5. The semiconductor package apparatus of claim 1, wherein the vertical portion is a director antenna or a dipole antenna.

6. The semiconductor package apparatus according to claim 2, wherein the substrate includes a ground line, and the horizontal portion is electrically connected to the ground line.

7. The semiconductor package apparatus according to claim 2, wherein the semiconductor package apparatus further comprises an electronic component provided on a surface of the substrate.

8. The semiconductor package apparatus of claim 7, wherein the electronic component is a radio frequency chip, a passive component, or a connection component.

9. The semiconductor package apparatus according to claim 2, wherein the number of the dielectric elements is at least two, each of the dielectric elements being provided with a corresponding radiation excitation source, at least two of the dielectric elements being distributed in an array on the surface of the substrate.

10. The semiconductor package apparatus of claim 9, wherein there is a space between different ones of the dielectric elements.