CN116387158B - Preparation method of high-performance GaN MIS-HEMT - Google Patents

Preparation method of high-performance GaN MIS-HEMT Download PDF

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CN116387158B
CN116387158B CN202310437073.6A CN202310437073A CN116387158B CN 116387158 B CN116387158 B CN 116387158B CN 202310437073 A CN202310437073 A CN 202310437073A CN 116387158 B CN116387158 B CN 116387158B
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tio
hemt
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CN116387158A (en
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崔鹏
代嘉铖
崔潆心
钟宇
李汉和
徐明升
李树强
韩吉胜
徐现刚
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Shandong University
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    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
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    • H01—ELECTRIC ELEMENTS
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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    • H—ELECTRICITY
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    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7782—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET
    • H01L29/7783—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET using III-V semiconductor material

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Abstract

The invention relates to a preparation method of a high-performance GaN MIS-HEMT, which comprises the steps of annealing a growth source electrode and a drain electrode and then carrying out N 2 O plasma treatment, N 2 N when O plasma is used for processing p-GaN 2 The nitrogen atoms in O can fill the nitrogen vacancy defect generated during the growth of p-GaN; tiO under the opposite gate electrode 2 The dielectric layer uses N 2 O plasma treatment of the surface reduces the treated TiO 2 Oxygen vacancies in thin films effectively recover low temperature ALD deposited TiO 2 The defect in the film reduces the gate leakage current, thereby improving the gate leakage current phenomenon.

Description

Preparation method of high-performance GaN MIS-HEMT
Technical Field
The invention relates to a preparation method of a high-performance GaN MIS-HEMT, belonging to the technical field of microelectronic research.
Background
In recent years, there is a need in the market for a semiconductor device having high electron mobility and suitable for stable operation at high frequencies, high power, and high temperatures, which is rapidly developed in the fields of aerospace, 5G communication, high-speed rail traffic, and the like. Since an AlGaN/GaN-based High Electron Mobility Transistor (HEMT) can form spontaneous polarization and piezoelectric polarization phenomena due to its unique structure, thereby forming a two-dimensional electron gas (2 DEG), it has very high electron mobility; meanwhile, because GaN belongs to a wide forbidden band semiconductor material, the AlGaN/GaN HEMT has the advantages of high breakdown field strength, high heat conductivity, good radiation resistance and high working temperature, has wide application prospect, has certain application in wireless communication, military radar, aerospace, high-speed railway power control modules and the like, and is hopeful to develop a circuit with high integration level, thereby becoming a foundation for supporting important fields such as energy, information and the like.
However, alGaN/GaN HEMTs have important problems to be solved, such as reduced gate leakage current and reduced threshold voltage drift. In order to solve the problem of gate leakage current of the traditional AlGaN/GaN HEMT, a layer of insulating material is added between gate metal and a semiconductor to form a metal-dielectric-semiconductor (MIS) structure, and the MIS structure can effectively improve the mobility of 2DGE due to the addition of an oxide insulating layer, so that the gate leakage current can be obviously reduced under the condition that the normal operation of a device is not influenced. Therefore, the state of the oxide insulating layer has a great influence on the gate leakage current, and is important for material selection and surface treatment of the oxide insulating layer.
TiO 2 As an emerging high-k gate under-gate dielectric material, a certain potential has been demonstrated. TiO (titanium dioxide) 2 Has higher dielectric constant and excellent electrical performance. But untreated TiO 2 The dielectric under the gate has more defects and the surface is not smooth enough, which increases polar optical phonon scattering and polarized coulomb field scattering, resulting in an increase in gate leakage current. Growth of TiO 2 The gate dielectric layer and surface treatment become limitations to reduce gate leakage current, thereby limiting the performance of AlGaN/GaN MIS-HEMTs.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a preparation method of a high-performance GaN MIS-HEMT.
The invention is based on AlGaN/GaN HEMT, firstly in N 2 Performing plasma treatment in O atmosphere to supplement N vacancy of the GaN cap layer, and then growing TiO on the GaN cap layer 2 The gate dielectric forms an AlGaN/GaN MIS-HEMT structure; growing the obtained TiO 2 The gate medium has more oxygen vacancies and a rougher surface, resulting in TiO 2 The gate dielectric layer has more defects; continuing to TiO 2 Gate dielectric N 2 O plasma treatment, treated TiO 2 The oxygen vacancy is obviously reduced, tiO 2 The gate dielectric layer becomes smooth, defects are reduced, and meanwhile, tiO is enabled to be 2 The crystalline state is not reached; at this time, the scattering of polar optical phonons and polarized coulomb fields is reduced during electron transport, so that the gate leakage current is reduced.
Term interpretation:
MIS-HEMT: abbreviation of Metal-Insulator-Semiconductor High Electron Mobility Transistor, metal-Insulator-semiconductor high electron mobility transistor.
PECVD, acronym Plasma Enhanced Chemical Vapor Deposition, plasma enhanced chemical deposition.
The technical scheme of the invention is as follows:
a preparation method of a high-performance GaN MIS-HEMT comprises the following steps:
1) Sequentially growing an AlN nucleation layer, a GaN buffer layer, an AlN intercalation layer, an AlGaN barrier layer and a GaN cap layer on a SiC substrate;
2) Growing a source electrode and a drain electrode on the GaN cap layer and performing annealing treatment;
3) Annealing treatment is followed by N 2 O plasma treatment, then growing a layer of TiO under the gate electrode on the GaN cap layer between the source electrode and the drain electrode 2 A dielectric layer;
4) TiO under the opposite gate electrode 2 The dielectric layer uses N 2 O plasma treatment of the surface followed by TiO under the treated gate electrode 2 Growing a gate electrode on the dielectric layer to obtain a high-performance GaN MIS-HEMT;
the high performance GaN MIS-HEMT comprisesThe SiC substrate, the AlN nucleation layer, the GaN buffer layer, the AlN intercalation layer, the AlGaN barrier layer and the GaN cap layer are sequentially arranged on the GaN cap layer, the source electrode and the drain electrode are arranged on the GaN cap layer, and the TiO under the treated gate electrode is arranged on the GaN cap layer between the source electrode and the drain electrode 2 Dielectric layer, tiO under gate electrode 2 A gate electrode is disposed on the dielectric layer.
Preferably, according to the present invention, in step 1), the thickness of the AlN nucleation layer is 18-24nm; further preferably, the AlN nucleation layer has a thickness of 20nm.
According to the preferred embodiment of the present invention, in step 1), the GaN buffer layer has a thickness of 2-4 μm; further preferably, the GaN buffer layer has a thickness of 3 μm.
According to the preferred embodiment of the present invention, in step 1), the thickness of the AlN intercalation is 0.8 to 1.2nm; further preferably, the AlN intercalated layer has a thickness of 1nm.
According to the preferred embodiment of the present invention, in the step 1), the thickness of the AlGaN barrier layer is 17-23nm, and the molar ratio of Al in AlGaN is 20-27%; further preferably, the AlGaN barrier layer has a thickness of 20nm and an Al molar ratio in AlGaN of 25%.
According to the present invention, in the step 1), the thickness of the GaN cap layer is preferably 1.5 to 2.5nm, and more preferably, the thickness of the GaN cap layer is 2nm.
According to the preferred embodiment of the present invention, in the step 2), the source electrode is a Ti/Al/Ni/Au metal, and the drain electrode is a Ti/Al/Ni/Au metal.
According to the invention, in step 2), the annealing treatment is performed in N 2 In the range of 750-850 ℃ for 30s, or in H 2 /N 2 And (3) annealing for 30s at 800-900 ℃ in the mixed gas.
According to a preferred embodiment of the invention, in step 3), N 2 The radio frequency power of the O plasma treatment is 30-70W, N 2 The O flow rate is 500-1500 sccm, and the treatment time is 2-20min.
Further preferably, in step 3), N 2 The RF power of the O plasma treatment is 50W, N 2 The O flow rate was 1080sccm and the treatment time was 12 minutes.
According to a preferred embodiment of the present invention, in step 3), under the gate electrodeTiO 2 The thickness of the dielectric layer is 10-20nm, and further preferably, tiO under the gate electrode 2 The thickness of the dielectric layer was 15nm.
According to a preferred embodiment of the invention, in step 4), N 2 The radio frequency power of the O plasma treatment is 30-70W, N 2 The O flow rate is 500-1500 sccm, and the treatment time is 0.1-0.8min.
Further preferably, in step 4), N 2 RF power 50W, N for O plasma treatment 2 The O flow rate was 1080sccm and the treatment time was 0.5min.
In step 4), if N 2 If the O plasma treatment time is too short, the TiO cannot be completely filled 2 Oxygen vacancies in the film, leading to N 2 O plasma treatment of TiO 2 The potential of the under-gate dielectric film cannot be fully exploited; if the treatment time is too long, tiO will occur 2 Crystallization phenomenon, which causes a decrease in insulating properties of the thin film, thus controlling N in step 4) 2 The O plasma treatment time is critical.
According to the preferred embodiment of the present invention, the distance L between the source and drain of AlGaN/GaN MIS-HEMT SD 3-10 μm, gate length L G 1-3 μm.
Further preferably, the distance L between the source and the drain SD 8 μm, gate length L G Is 2 μm.
The invention is to anneal the growth source electrode and the drain electrode and then N 2 O plasma treatment, N 2 N when O plasma is used for processing p-GaN 2 The nitrogen atoms in O can fill the nitrogen vacancy defect generated during the growth of p-GaN; tiO under the opposite gate electrode 2 The dielectric layer uses N 2 O plasma treatment of the surface reduces the treated TiO 2 Oxygen vacancies in thin films effectively recover low temperature ALD deposited TiO 2 Defects in the film.
The beneficial effects of the invention are as follows:
1. the invention arranges TiO under the gate electrode under the AlGaN/GaN MIS-HEMT gate electrode 2 Dielectric layer film and N 2 O plasma treatment, treated TiO 2 Dielectric layer film meter under gate electrodeFlat surface, no crystallization, N 2 O plasma treatment reduces TiO under the treated gate electrode 2 Oxygen vacancies in the dielectric layer film effectively recover low temperature ALD deposited TiO 2 Defects in the film. Two steps N 2 The gate leakage current after O treatment was 4.72X10 -9 A/mm is reduced by 4 orders of magnitude compared with an unprocessed HEMT device, and gate leakage current of the HEMT device is greatly reduced.
2. The invention arranges TiO under the gate electrode under the AlGaN/GaN MIS-HEMT gate electrode 2 Dielectric layer film and N 2 O plasma treatment to make TiO 2 The thin film is flat and defects are reduced, so that the current collapse channel is reduced; treated TiO 2 The oxygen vacancies are greatly reduced, so that the number of induced defects in the device that breakdown occurs is reduced. The off-state breakdown voltage BV of the treated AlGaN/GaN MIS-HEMT is 122.5V, which is 42.9% higher than that of the untreated AlGaN/GaN HEMT.
3. The invention arranges TiO under the gate electrode under the AlGaN/GaN MIS-HEMT gate electrode 2 Dielectric layer film and N 2 O plasma treatment provides oxygen ion ions, neutralizes part of polarized electrons in the GaN cap layer, and reduces polarized coulomb field scattering, thereby reducing on-resistance of AlGaN/GaN MIS-HEMT. The on-resistance of the AlGaN/GaN MIS-HEMT before treatment is 4.25 omega-mm, and the on-resistance of the device after treatment is 3.51 omega-mm, which is reduced by 21.8 percent compared with the on-resistance of the device after treatment.
4. The invention is characterized in that AlGaN/GaN MIS-HEMT TiO 2 TiO under the gate electrode 2 Dielectric layer film and N 2 O plasma treatment by N 2 O plasma treated TiO 2 The surface of the dielectric layer film below the gate electrode is flat, and the TiO is reduced 2 Mid-trap charge density, thereby effectively reducing TiO 2 Interface state density between the gate electrode lower dielectric layer film and the GaN cap layer. Its interface density (D) it ) Average 2.32×10 12 eV -1 cm 2 Lower than 1.43×10 of untreated sample 13 eV -1 cm 2 An order of magnitude, indicating N 2 And the O treatment effectively improves the interface quality of the device.
5. The invention uses N for the GaN cap layer under the AlGaN/GaN MIS-HEMT grid electrode 2 O plasma treatment, N 2 The nitrogen in O effectively fills N vacancies in the GaN cap layer, fills the defects, reduces interface roughness and polarized coulomb field scattering due to weakening of polar optical phonons, increases mobility of 2DEG electrons, and enables the starting current I to be high ON Increasing the device switching current ratio I ON /I OFF 。
Drawings
FIG. 1 is a schematic cross-sectional view of a high performance GaN MIS-HEMT according to the invention, wherein 1, on a SiC substrate, 2, alN nucleation layer, 3, gaN buffer layer, 4, alN intercalation layer, 5, alGaN barrier layer, 6, gaN cap layer, 7, tiO under gate electrode 2 A dielectric layer.
FIG. 2 is the V of the devices of example 1 and comparative examples 1-3 DS Transfer characteristic at=10v.
FIG. 3 is the device of example 1 and comparative example 1 at V GS Comparison of the off-state breakdown characteristic test curves at = -5V.
Fig. 4 is a transmission characteristic curve of the devices of comparative example 1 and comparative example 2.
Fig. 5 is a transmission characteristic curve of the device of comparative example 3, example 1.
FIG. 6 is the C-V characteristic and interface state charge areal density measured at 1MHz and 10kHz of comparative example 1.
FIG. 7 is the C-V characteristic and interface state charge areal density measured at 1MHz and 10kHz for example 1.
Detailed Description
The invention is further illustrated, but not limited, by the following examples and figures of the specification.
Example 1
A high performance GaN MIS-HEMT, the structure of which is shown in figure 1, comprises a SiC substrate,
the AlN nucleating layer is positioned above the SiC substrate, the thickness of the AlN nucleating layer is 20nm, and the AlN nucleating layer is undoped;
the GaN buffer layer is positioned above the AlN nucleation layer, the thickness of the GaN buffer layer is 3nm, and the GaN buffer layer is not doped;
the AlN intercalation is positioned above the GaN buffer layer, the thickness of the AlN intercalation is 1nm, and the AlN intercalation is not doped;
the AlGaN barrier layer is positioned above the AlN intercalation layer, the thickness of the AlGaN barrier layer is 20nm, and the Al molar ratio is 25%;
the GaN cap layer is positioned above the AlGaN barrier layer, and the thickness of the GaN cap layer is 2nm;
a source electrode positioned at one end above the GaN cap layer; the source electrode is an ohmic contact metal electrode, and the ohmic contact metal electrode is an electrode formed by Ti/Al/Ni/Au metal and the GaN cap layer in ohmic contact;
a drain electrode positioned at the other end above the GaN cap layer; the drain electrode is an ohmic contact metal electrode, and the ohmic contact metal electrode is an electrode formed by ohmic contact between Ti/Al/Ni/Au metal and the GaN cap layer;
under-gate TiO between source and drain 2 Dielectric layer, tiO under gate electrode 2 The thickness of the dielectric layer is 15nm,
TiO under the gate electrode 2 A gate electrode on the dielectric layer; the grid electrode is a Schottky contact metal electrode, and the Schottky contact metal electrode is an electrode formed by Ti/Al/Ni/Au metal and an oxide layer in a Schottky contact manner;
source-drain spacing L SD 8 μm;
gate length L G Is 2 μm.
The preparation method of the high-performance GaN MIS-HEMT comprises the following steps:
1) Sequentially growing an AlN nucleation layer, a GaN buffer layer, an AlN intercalation layer, an AlGaN barrier layer and a GaN cap layer on a SiC substrate;
2) Growing source electrode and drain electrode on the GaN cap layer, and annealing to N 2 Annealing at 800 ℃ for 30s;
3) Annealing is followed by N 2 O plasma treatment, N using PECVD 2 O plasma surface treatment for 12min, N 2 The RF power of the O plasma treatment is 50W, N 2 The O flow rate is 1080sccm, and then a layer of TiO under the gate electrode is grown on the GaN cap layer between the source electrode and the drain electrode 2 A dielectric layer;
4) Opposite gate electricityUnder-pole TiO 2 PECVD for N dielectric layer 2 O plasma surface treatment for 0.5min, N 2 RF power 50W, N for O plasma treatment 2 The O flow rate is 1080sccm; then TiO under the treated gate electrode 2 And growing a gate electrode on the dielectric layer to obtain the high-performance AlGaN/GaN MIS-HEMT.
Comparative example 1
The same structure as that described in embodiment 1 is different in that:
a grid electrode is directly arranged between the source electrode and the drain electrode, and TiO under the grid electrode is not arranged 2 The dielectric layer and other structures are the same as in example 1.
The preparation method comprises the following steps:
1) Sequentially growing an AlN nucleation layer, a GaN buffer layer, an AlN intercalation layer, an AlGaN barrier layer and a GaN cap layer on a SiC substrate;
2) Growing source electrode and drain electrode on the GaN cap layer, and annealing to N 2 Annealing at 800 ℃ for 30s;
3) And (5) after annealing, growing a gate electrode on the GaN cap layer between the source electrode and the drain electrode.
Comparative example 2
The structure is the same as in example 1.
The preparation method comprises the following steps:
1) Sequentially growing an AlN nucleation layer, a GaN buffer layer, an AlN intercalation layer, an AlGaN barrier layer and a GaN cap layer on a SiC substrate;
2) Growing source electrode and drain electrode on the GaN cap layer, and annealing to N 2 Annealing at 800 ℃ for 30s;
3) No N is performed after annealing 2 O plasma treatment, namely, directly growing a layer of TiO under the gate electrode on the GaN cap layer between the source electrode and the drain electrode 2 A dielectric layer;
4) TiO under the opposite gate electrode 2 PECVD for N dielectric layer 2 O plasma surface treatment for 0.5min; then TiO under the treated gate electrode 2 And growing a gate electrode on the dielectric layer to obtain the high-performance AlGaN/GaN MIS-HEMT.
Comparative example 3
The structure is the same as in example 1.
The preparation method comprises the following steps:
1) Sequentially growing an AlN nucleation layer, a GaN buffer layer, an AlN intercalation layer, an AlGaN barrier layer and a GaN cap layer on a SiC substrate;
2) Growing source electrode and drain electrode on the GaN cap layer, and annealing to N 2 Annealing at 800 ℃ for 30s;
3) Annealing is followed by N 2 O plasma treatment, N using PECVD 2 O plasma surface treatment for 12min, and growing a layer of TiO under the gate electrode on the GaN cap layer between the source electrode and the drain electrode 2 A dielectric layer;
4) TiO directly under the gate electrode 2 And growing a gate electrode on the dielectric layer to obtain the high-performance AlGaN/GaN MIS-HEMT.
Experimental example
AlGaN/GaN MIS-HEMT electrical performance test:
1. gate leakage current I of AlGaN/GaN MIS-HEMT G
When the AlGaN/GaN MIS-HEMT is conducted after bias voltage is applied between the grid leakage current grid and the source, current is caused to pass through the grid electrode due to certain defects in the device. Because of the insulating dielectric film under the gate electrode, no current is ideally passed through the gate.
By testing the devices of example 1 and comparative examples 1-3, drain current and gate leakage current I G At a fixed source-drain bias voltage V DS In the case of different gate-source bias V GS The bias voltages V of different gates and sources can be obtained by the following I-V transfer characteristic curve GS Lower gate leakage current I G Verification of N after annealing of the source and drain electrodes of the present invention 2 O plasma treatment and counter gate electrode lower TiO 2 The dielectric layer uses N 2 O plasma is used for treating the surface, and the effectiveness of a grid leakage current method is reduced.
FIG. 2 is the V of the devices of example 1 and comparative examples 1-3 DS Drain current I at =10v D With gate leakage current I G At different gate bias voltages V GS Under the I-V double scan transfer characteristic, the applied gate bias voltage V GS In the range of-4 to 2V, gate leakage current I G At V GS Extracted at 2V.
The results show that: comparative example 1 Gate leakage current I G Is 1.1X10 -5 A/m, comparative example 2 Gate leakage current I G 1.03X10 -7 A/m, comparative example 3 Gate leakage current I G Is 1.9X10 -7 A/mm, example 1 Gate leakage current I G 4.72X10 -9 A/mm, gate leakage current I of example 1 compared to comparative example 1 G Reduced by four orders of magnitude, and the result shows that the TiO 2 Gate electrode lower dielectric layer and two-step N 2 The O plasma treatment can greatly reduce the grid leakage current I G The method comprises the steps of carrying out a first treatment on the surface of the Example 1 Gate leakage current I compared to comparative example 2 G Reduced by two orders of magnitude, and the result shows that N is used 2 O plasma treatment of GaN cap layer surface reduces leakage current I G The method comprises the steps of carrying out a first treatment on the surface of the Example 1 Gate leakage current I compared to comparative example 3 G Two orders of magnitude lower, indicating TiO under the gate electrode 2 Dielectric layer N 2 O plasma treatment reduces gate leakage current I G 。
2. Switching current ratio I of AlGaN/GaN MIS-HEMT ON /I OFF
The switching current ratio refers to the current I between the source and the drain when the device is in the on state and the off state D Is a ratio of (2). Wherein, the on state refers to the device applying a gate bias, and the off state refers to the device not applying a gate bias. The switching current ratio of the device is an important electrical parameter that measures the gate's ability to control the current of the device, the conduction channel. By testing the devices of example 1 and comparative examples 1-3, drain current I D With gate-source voltage V GS A variable transfer characteristic curve and for drain current I D Taking logarithmic coordinates, by taking I of on-state and off-state D The ratio of the voltage V at different source and drain can be obtained DS The lower switching current ratio I ON /I OFF . Through the performance test, the TiO of the AlGaN/GaN MIS-HEMT can be verified 2 Gate electrode lower dielectric layer and N 2 O plasma surface treatment increases the on-off current ratio I of the device ON /I OFF 。
FIG. 2 is a device of example 1 and comparative examples 1-3, at V DS Source-drain current I at =10v DS With gate leakage current I G At different gate bias voltages V GS Under logarithmic coordinate I-V double scan transfer characteristic, applied gate bias V GS Ranging between-4 and 2V. V taking GS Source-drain current I at = -5V DS As off-state current I OFF Taking V GS Source-drain current I when=2v DS As on-state current I ON The ratio of them is the switching current ratio of the device.
Switching current ratio I of AlGaN/GaN HEMT of comparative example 1 ON /I OFF 4.38X10 4 The method comprises the steps of carrying out a first treatment on the surface of the Switching current ratio I of AlGaN/GaN MIS-HEMT of comparative example 2 ON /I OFF Is 1.19X10 7 The method comprises the steps of carrying out a first treatment on the surface of the Switching current ratio I of AlGaN/GaN HEMT of comparative example 3 ON /I OFF 5.69×10 6 The method comprises the steps of carrying out a first treatment on the surface of the The switching current ratio I of AlGaN/GaN MIS-HEMT of example 1 ON /I OFF Is 1.45 multiplied by 10 8 。
Example 1 switch current ratio I compared to comparative example 1 ON /I OFF Four orders of magnitude increase, indicating an increase in TiO 2 Gate electrode lower dielectric layer and two-step N 2 O plasma surface treatment enables switching current ratio I of HEMT device ON /I OFF Compared with HEMT, the HEMT is greatly improved; example 1 vs. comparative example 2 switch current ratio I ON /I OFF An order of magnitude is added to indicate N 2 The O treatment GaN cap layer increases the switching current ratio of the device; example 1 vs. comparative example 3 switch current ratio I ON /I OFF Two orders of magnitude are added, illustrating TiO under the gate electrode 2 Dielectric layer N 2 O plasma treatment increases the switching current ratio I of the device ON /I OFF 。
The result shows that TiO under the gate electrode is arranged under the gate electrode 2 Dielectric layer film and N 2 O plasma treatment to make device switch current ratio I ON /I OFF Effectively improves the grid control capability of the deviceForce.
3. Breakdown voltage BV of AlGaN/GaN MIS-HEMT
Breakdown voltage refers to applying a larger source-drain voltage V DS Source-drain voltage V when the device fails to become a conductor DS . Fixed gate source bias voltage V GS In the off state, the voltage V between the source and the drain is continuously increased DS Simultaneously detecting drain current I D Drain current I D With voltage V between source and drain DS Is increased continuously until I D To a current exceeding 10 -3 Source-drain voltage V corresponding to A/mm DS The breakdown voltage BV is the voltage. The breakdown voltage measures the stability of the device in operation at high voltage, high power conditions. By testing the devices of example 1 and comparative example 1, I in the device off state D Along with V DS The change curve can verify TiO 2 Sum N of dielectric layers under gate electrode 2 The O-plasma surface treatment greatly improves the breakdown voltage BV of the device.
FIG. 3 is a comparison of the off-state breakdown characteristics of the devices of example 1 and comparative example 1, in which the distance L between the source and drain SD Gate length l=8 μm G =2μm; applied gate-source bias voltage V GS is-5V, source-drain bias voltage V DS Between 0 and 200V.
Comparative example 1 at V DS Still has a larger drain current I at 0V D While example 1 is at V DS Drain current I at 0V D Smaller, explaining TiO 2 Gate electrode lower dielectric layer and two-step N 2 O plasma treatment reduces V DS The drain current is 0V, so that the leakage performance of the device is optimized; drain current I is taken D Is 10 -3 Source-drain voltage V corresponding to A/mm DS For the breakdown voltage, the breakdown voltage BV in comparative example 1 was 85.7V, the breakdown voltage BV in example 1 was 122.5V, and 42.9% improvement compared to comparative example 1. Description of the results TiO 2 Gate electrode lower dielectric layer and two-step N 2 The O-plasma surface treatment greatly increases the device breakdown voltage.
4. On-resistance R of AlGaN/GaN MIS-HEMT ON
On-resistance is referred to as on-gateBias voltage is applied between the source and the electrode, when AlGaN/GaN MIS-HEMT is connected, current is generated between the source and the drain, and a fixed gate voltage V is generated GS Drain current I D At different source-drain voltages V DS The resistance of the linear curve of the I-V output characteristic under. By testing the devices of example 1 and comparative examples 1-3, drain current I D With source-drain voltage V DS The variable I-V output characteristic curve can obtain the on-resistance R under different grid bias before and after the surface treatment of the device ON Thereby verifying TiO 2 Gate electrode lower dielectric layer and N 2 The O-plasma surface treatment is useful for reducing the effectiveness of AlGaN/GaN MIS-HEMTs.
FIG. 4 shows the drain current I of the devices of comparative examples 1-2 D With source-drain voltage V DS At different gate bias voltages V GS An I-V output characteristic curve, an applied gate bias voltage V GS Ranging from-5 to 2V, the test step DeltaV GS 1V; FIG. 5 shows the drain current I of the device of comparative example 3, example 1 D With source-drain voltage V DS At different gate bias voltages V GS An I-V output characteristic curve, an applied gate bias voltage V GS Ranging from-5 to 2V, the test step DeltaV GS Is 1V.
As can be seen from fig. 4 and 5, the on-resistance of comparative example 1 was 4.25 Ω·mm, the on-resistance of comparative example 2 was 3.35 Ω·mm, the on-resistance of comparative example 3 was 4.34 Ω·mm, and the on-resistance of example 1 was 3.51 Ω·mm; example 1 with TiO 2 Gate electrode lower dielectric layer and two-step N 2 On-resistance R of O-plasma surface-treated AlGaN/GaN MIS-HEMT ON Comparative example 1 and comparative example 3 reduced 17.4% and 19.1%, respectively, indicating TiO 2 Gate electrode lower dielectric layer and two-step N 2 The O plasma surface treatment reduces the on-resistance R of the AlGaN/GaN MIS-HEMT ON 。
5. Interface state density D of AlGaN/GaN MIS-HEMT it
Interface state density refers to GaN cap layer and TiO of AlGaN/GaN MIS-HEMT 2 Interface trap charges and the like of the dielectric layer under the gate electrode constitute the density of the current transmission blocking factor. When the grid electrode is addedWhen bias voltage is applied, the GaN cap layer and the TiO layer are increased along with the continuous increase of the gate bias voltage 2 The capacitance of the dielectric layer below the gate electrode is reduced, and meanwhile, the interface state density is reduced. Calculating interface state density D by using high/low frequency method it Taking V GS Interface Density D at = -3.5V it As a test and comparison.
FIG. 6 shows the gate oxide capacitance C of the AlGaN/GaN HEMT of comparative example 1 at 1MHz and 10kHz ox C-V characteristics and interface Density D measured at different voltages V it -V characteristic diagram. FIG. 7 shows the gate oxide capacitance C at 1MHz and 10kHz for example 1 ox C-V characteristics and interface Density D measured at different voltages V it -V characteristic diagram.
As can be seen from FIGS. 6 and 7, C of comparative example 1 ox 1.66 mu F/cm 2 The corresponding dielectric constant is 25.5; c of example 1 ox Is 2.15 mu F/cm 2 The corresponding dielectric constant is 33.1. In addition, interface state density D of AlGaN/GaN HEMT of comparative example 1 it 1.43×10 13 eV -1 cm -2 The method comprises the steps of carrying out a first treatment on the surface of the Example 1 pass through N 2 O treatment of TiO 2 Interface state density D of AlGaN/GaN MIS-HEMT after dielectric layer film under gate electrode it Is 2.32X10 12 eV -1 cm -2 The same ratio is reduced by one order of magnitude, which illustrates that the TiO 2 Gate electrode lower dielectric layer and N 2 The O plasma surface treatment effectively reduces the interface state density of the device, and indirectly proves that the method can reduce the gate leakage current of the device and improve the control capability of the gate on the device.
Example 2
A high performance GaN MIS-HEMT is constructed as described in example 1.
The preparation method of the high-performance AlGaN/GaN MIS-HEMT is different in that:
step 3), annealing and then N 2 O plasma treatment, N using PECVD 2 O plasma surface treatment for 5min, and growing a layer of TiO under the gate electrode on the GaN cap layer between the source electrode and the drain electrode 2 A dielectric layer; otherwise, the procedure is as in example 1.
Example 3
A high performance GaN MIS-HEMT is constructed as described in example 1.
The preparation method of the high-performance AlGaN/GaN MIS-HEMT is different in that:
step 4), tiO under the gate electrode 2 PECVD for N dielectric layer 2 O plasma surface treatment was performed for 0.3min, otherwise as in example 1.

Claims (10)

1. A preparation method of a high-performance GaN MIS-HEMT comprises the following steps:
1) Sequentially growing an AlN nucleation layer, a GaN buffer layer, an AlN intercalation layer, an AlGaN barrier layer and a GaN cap layer on a SiC substrate;
2) Growing a source electrode and a drain electrode on the GaN cap layer and performing annealing treatment;
3) Annealing treatment is followed by N 2 O plasma treatment, then growing a layer of TiO under the gate electrode on the GaN cap layer between the source electrode and the drain electrode 2 A dielectric layer;
4) TiO under the opposite gate electrode 2 The dielectric layer uses N 2 O plasma treatment of the surface followed by TiO under the treated gate electrode 2 Growing a gate electrode on the dielectric layer to obtain a high-performance AlGaN/GaN MIS-HEMT;
the high-performance GaN MIS-HEMT comprises a SiC substrate, an AlN nucleation layer, a GaN buffer layer, an AlN intercalation layer, an AlGaN barrier layer and a GaN cap layer which are sequentially arranged from bottom to top, wherein an active electrode and a drain electrode are arranged on the GaN cap layer, and TiO under a treated gate electrode is arranged on the GaN cap layer between the source electrode and the drain electrode 2 Dielectric layer, tiO under gate electrode 2 A gate electrode is disposed on the dielectric layer.
2. The method of claim 1, wherein in step 1), the AlN nucleation layer has a thickness of 18-24nm; the thickness of the GaN buffer layer is 2-4 mu m; the thickness of the AlN intercalation is 0.8-1.2nm; the thickness of the AlGaN barrier layer is 17-23nm, and the molar ratio of Al in AlGaN is 20-27%; the thickness of the GaN cap layer is 1.5-2.5nm.
3. The method of claim 1, wherein in step 2), the source electrode is a Ti/Al/Ni/Au metal and the drain electrode is a Ti/Al/Ni/Au metal.
4. The method according to claim 1, wherein in step 2), the annealing treatment is performed under N 2 In the range of 750-850 ℃ for 30s, or in H 2 /N 2 And (3) annealing for 30s at 800-900 ℃ in the mixed gas.
5. The method according to claim 1, wherein in step 3), N 2 The RF power of O plasma treatment is 30-70W, N 2 The O flow rate is 500-1500 sccm, and the treatment time is 2-20min.
6. The method according to claim 1, wherein in step 3), N 2 The RF power of the O plasma treatment is 50W, N 2 The O flow rate was 1080sccm and the treatment time was 12 minutes.
7. The method according to claim 1, wherein in step 3), tiO under the gate electrode 2 The thickness of the dielectric layer is 10-20nm.
8. The method according to claim 1, wherein in step 4), N 2 The RF power of O plasma treatment is 30-70W, N 2 The O flow rate is 500-1500 sccm, and the treatment time is 0.1-0.8min.
9. The method according to claim 1, wherein in step 4), N 2 RF power of 50W, N for O plasma treatment 2 The O flow rate was 1080sccm and the treatment time was 0.5min.
10. The method according to claim 1, wherein the distance L between the source and the drain of the AlGaN/GaN MIS-HEMT SD 3-10 mu m, gate length L G 1-3 mu m.
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