CN116366565A - Speed limiting mode switching method and device, electronic equipment and storage medium - Google Patents

Speed limiting mode switching method and device, electronic equipment and storage medium Download PDF

Info

Publication number
CN116366565A
CN116366565A CN202211624275.3A CN202211624275A CN116366565A CN 116366565 A CN116366565 A CN 116366565A CN 202211624275 A CN202211624275 A CN 202211624275A CN 116366565 A CN116366565 A CN 116366565A
Authority
CN
China
Prior art keywords
speed
limiting mode
messages
message
speed limit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202211624275.3A
Other languages
Chinese (zh)
Inventor
万欢
朱涛
郭晓董
马佳彪
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suzhou Centec Communications Co Ltd
Original Assignee
Suzhou Centec Communications Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suzhou Centec Communications Co Ltd filed Critical Suzhou Centec Communications Co Ltd
Priority to CN202211624275.3A priority Critical patent/CN116366565A/en
Publication of CN116366565A publication Critical patent/CN116366565A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • H04L47/22Traffic shaping
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • H04L47/24Traffic characterised by specific attributes, e.g. priority or QoS
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • H04L47/25Flow control; Congestion control with rate being modified by the source upon detecting a change of network conditions
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00Reducing energy consumption in communication networks
    • Y02D30/50Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Communication Control (AREA)

Abstract

The invention discloses a speed limiting mode switching method, a device, electronic equipment and a storage medium, wherein the method comprises the steps of matching messages which are sent to a CPU in different types of messages, and keeping the corresponding speed of each message sent to the CPU; mapping messages of different types, which are sent to the CPU, to the same message queue; and configuring the flow shaping parameter value of the message queue to switch the speed limiting mode into an independent speed limiting mode or an integral speed limiting mode. The invention can rapidly and stably complete the switching between the independent speed limiting mode and the integral speed limiting mode, shortens the switching time and ensures the stability of the network environment.

Description

Speed limiting mode switching method and device, electronic equipment and storage medium
Technical Field
The present invention relates to the field of network communication technologies, and in particular, to a speed limiting mode switching method for switching between an individual speed limiting mode and an integral speed limiting module, and an apparatus, an electronic device and a storage medium for implementing the method.
Background
Switches are common message forwarding devices in communication networks. Inside the device, a plurality of chips of different types are required to complete the forwarding of the message in a matched mode. As shown in fig. 1, these chips mainly include a CPU chip, a switch forwarding chip, and a physical medium related chip. Messages processed by the switch can be divided into protocol messages and service messages, wherein the protocol messages refer to messages required by protocol operation, and the messages generally need to be sent to a CPU for processing; and a service message refers to a message that a certain service needs to deliver, and is usually directly forwarded by the switch forwarding chip. However, the number of messages that can be processed by the CPU in a unit time is limited, and a large amount of protocol messages are impacted to cause the CPU usage to be too high, so that the system performance is reduced or even crashed, and therefore, the speed-limiting processing needs to be performed on the messages sent to the CPU, so as to ensure that the CPU usage is in a reasonable interval.
At present, a CoPP (Control Plain Protection, control panel protection) speed limiting mode and a CPU Traffic (upper CPU flow control) speed limiting mode are generally adopted when a message sent to a CPU is subjected to speed limiting processing. The CoPP speed limit is the speed limit of the sent CPU message through ACL (Access Control List ) items. Different types of messages can be matched with different ACL entries, if different flow limit action templates are respectively bound, the different types of messages are limited independently, and if the same flow limit action templates are bound, the different types of messages are limited integrally. The messages sent to the CPU are respectively a message 1, a message 2 and a message 3, and the access control list items correspondingly matched with the messages are respectively an ACL item 1, an ACL item 2 and an ACL item 3. As shown in fig. 2, if the flow limit action templates corresponding to the speed limit actions of the 3 ACL entries are the flow limit action template 1, the flow limit action template 2 and the flow limit action template 3, respectively, the individual speed limit of different types of messages is realized; as shown in fig. 3, if the flow limit action templates corresponding to the speed limit actions of the 3 ACL entries are all the flow limit action templates 2, the overall speed limit of the messages of different types is realized.
As shown in fig. 4, in practical application, the manner of switching between the individual speed limit mode and the overall speed limit mode is as follows: unbinding the original flow limit moving template and rebinding the original flow limit moving template. When the single speed limiting mode is switched to the integral speed limiting mode, firstly, each access control list item is unbound with the original flow limit action template, and finally, each access control list item is bound with the same flow limit action template. When the whole speed limiting mode is switched to the single speed limiting mode, firstly, each access control list item is unbound with the original flow limit action template, and finally, each access control list item is bound with the corresponding flow limit action template. However, each stream state switch requires 2 actions to be completed, i.e., rebind a new template after unbinding an existing binding. If the time required for one binding action is T1, the time required for one unbinding action is T2, and in the case of n streams, the time required for completing one single speed limit and one overall speed limit switching is t= (n-1) × (t1+t2). Thus, the more types of streams, the longer the switching time, the longer the intermediate state, the worse the convergence, and the more uncertainty is generated. In addition, in the process of switching from the whole speed limit to the single speed limit, the number of required flow limit dynamic templates is increased, and switching failure is likely to be caused by insufficient template resources.
As shown in fig. 5 and 6, the CPU Traffic limits the speed by shaping the Traffic of the queue through which the message passes. Through some mapping configurations, different types of messages can enter different queues, and also can enter the same queue. Traffic shaping can be configured based on queues, and if the traffic shaping is performed on the same queue, the traffic shaping can be performed on the same type of messages. As shown in fig. 5, the messages sent to the CPU are a header 1, a message 2, and a message 3, respectively. When the independent speed limit is realized, the speed limit is respectively mapped into different message queues, namely the message queue 1, the message queue 2 and the message queue 3. The configuration of the parameters of the output flow shaping of the 3 message queues is respectively a flow shaping parameter 1, a flow shaping parameter 2 and a flow shaping parameter 3, so that the independent speed limit of the flows sent to the CPU in different types can be realized; when the integral speed limit is realized, the messages with three different characteristics are mapped into the same message queue, namely are mapped into the message queue 1, so that only the flow shaping parameter 1 can be effective, and finally the integral speed limit of the flows of different types of upstream CPUs is realized.
As shown in fig. 7, in the actual application, the manner of switching between the individual speed limit mode and the overall speed limit mode is as follows: and readjusting the mapping relation between the message types and the message queues. When the single speed limiting mode is switched to the integral speed limiting mode, firstly, different types of messages are mapped to the same message queue, and finally, the message queue is configured with queue traffic shaping. When the whole speed limiting mode is switched to the single speed limiting mode, firstly, different types of messages are mapped to different message queues, and finally, the queue traffic shaping is respectively configured for each message queue. However, the state switching of each flow requires 1 action to be completed, i.e. the mapping relationship of the message type and the message queue is reconfigured. Assuming that the time required for one mapping action is T, in the case of n streams, the time to complete one single and overall speed limit is t= (n-1) T. Therefore, the more types of streams, the longer the switching time, the longer the intermediate state, the worse the convergence, and the more uncertainty factors are generated.
As is clear from the above, in both the CoPP rate limit and the CPU Traffic rate limit, as the number of types of streams increases, the longer the switching time becomes, the longer the intermediate state becomes, the worse the convergence becomes, and the more an uncertainty factor is generated.
The information disclosed in this background section is only for enhancement of understanding of the general background of the invention and should not be taken as an acknowledgement or any form of suggestion that this information forms the prior art already known to a person of ordinary skill in the art.
Disclosure of Invention
The invention aims to provide a speed limiting mode switching method, a speed limiting mode switching device, electronic equipment and a storage medium, which can rapidly and stably finish switching between an independent speed limiting mode and an integral speed limiting mode, shorten switching time and ensure the stability of a network environment.
To achieve the above object, an embodiment of the present invention provides a speed limit mode switching method, where the speed limit mode includes a separate speed limit mode for maintaining a corresponding speed for each message and an overall speed limit mode for maintaining the same speed for each message, and the speed limit mode switching method includes:
matching messages of different types of uploading CPUs, and enabling the messages of each uploading CPU to keep corresponding speed;
mapping messages of different types, which are sent to the CPU, to the same message queue;
and configuring the flow shaping parameter value of the message queue to switch the speed limiting mode into an independent speed limiting mode or an integral speed limiting mode.
In one or more embodiments of the present invention, the matching out the messages sent to the CPUs in different types, and maintaining the corresponding speed of each message sent to the CPUs includes:
and matching the messages of different types of uploading CPUs through the ACL entries, wherein the messages of different types are matched with corresponding ACL entries, and each ACL entry is used for keeping the corresponding speed of the matched message of the uploading CPU.
In one or more embodiments of the present invention, the speeds of the messages sent to the CPU and matched by the ACL entries are the same or different.
In one or more embodiments of the present invention, configuring the traffic shaping parameter values of the message queue to switch the speed limit mode to either a single speed limit mode or an overall speed limit mode comprises:
when the flow shaping parameter value of the message queue is configured to be the maximum value, switching the speed limiting mode into an independent speed limiting mode;
and when the flow shaping parameter value of the message queue is configured to be an expected value, switching the speed limiting mode into an integral speed limiting mode, wherein the expected value is smaller than the maximum value.
The embodiment of the invention also provides a speed limiting mode switching device, wherein the speed limiting mode comprises a single speed limiting mode for keeping each message at a corresponding speed and an integral speed limiting mode for keeping each message at the same speed, and the speed limiting mode switching device comprises:
the matching module is used for matching messages of different types sent to the CPU and keeping the corresponding speed of each message sent to the CPU;
the mapping module is used for mapping the messages of different types sent to the CPU to the same message queue;
and the configuration module is used for configuring the flow shaping parameter value of the message queue so as to switch the speed limiting mode into an independent speed limiting mode or an integral speed limiting mode.
In one or more embodiments of the present invention, the matching module matches, through ACL entries, different types of messages sent to the CPU, the different types of messages matching corresponding ACL entries, each of the ACL entries being configured to maintain a corresponding speed of the matched messages sent to the CPU.
In one or more embodiments of the present invention, the speeds of the messages sent to the CPU and matched by the ACL entries are the same or different.
In one or more embodiments of the present invention, when the configuration module configures the traffic shaping parameter value of the message queue to be a maximum value, the speed limiting mode is switched to the single speed limiting mode, and when the configuration module configures the traffic shaping parameter value of the message queue to be a desired value, the speed limiting mode is switched to the overall speed limiting mode, wherein the desired value is smaller than the maximum value.
An embodiment of the present invention further provides an electronic device, which is characterized in that the electronic device includes:
at least one processor;
at least one memory coupled to the at least one processor and storing a computer program for execution by the at least one processor, which when executed by the at least one processor, causes the electronic device to perform the method described above.
An embodiment of the invention also provides a computer-readable storage medium, characterized in that it has stored thereon a computer program which, when executed by a machine, implements the method described above.
Compared with the prior art, the invention has the following advantages:
(1) When the independent speed limiting mode and the integral speed limiting mode are switched, the operation can be realized by only configuring the flow shaping parameter value of the message queue, and the operation process is simple. And the independent speed limiting mode and the integral speed limiting mode are not influenced by the flow limiting dynamic template resources when being switched, so that the method is more suitable for the scene.
(2) The switching time of the independent speed limiting mode and the integral speed limiting mode is constant, the switching time is not changed according to the number of message types, and the intermediate state is short, so that the stability of the network environment is facilitated. And the corresponding message enters the same message queue, other message queues are not affected, and the coupling is lower.
(3) In the single speed limiting mode, the single speed limiting values of various messages can be configured independently, and in the integral speed limiting mode, the integral speed limiting values can also be configured independently, so that the configuration is more flexible.
Drawings
FIG. 1 is a schematic diagram of a switching device processing a message;
FIG. 2 is a schematic diagram of a separate speed limit process flow in a CoPP speed limit mode;
FIG. 3 is a schematic diagram of the overall speed limiting process in the CoPP speed limiting mode;
FIG. 4 is a flow chart for switching between individual speed limits and overall speed limits in the CoPP speed limit mode;
FIG. 5 is a schematic diagram of a separate speed limit process flow in a CPU Traffic flow shaping mode;
FIG. 6 is a schematic diagram of the overall speed limit processing flow in the CPU Traffic flow shaping mode;
FIG. 7 is a flow chart for switching between individual speed limit and overall speed limit in the CPU Traffic shaping mode;
FIG. 8 is a flow chart of a speed limit mode switching method in an embodiment of the invention;
FIG. 9 is a schematic diagram of a switch chip architecture;
FIG. 10 is a flow chart of switching the speed limit mode to a single speed limit in one embodiment of the invention;
FIG. 11 is a flow chart of switching the speed limit mode to the overall speed limit in one embodiment of the invention;
FIG. 12 is a block diagram of a speed limit mode switching device according to an embodiment of the present invention;
fig. 13 is a block diagram of an electronic device according to an embodiment of the invention.
Detailed Description
The following detailed description of embodiments of the invention is, therefore, to be taken in conjunction with the accompanying drawings, and it is to be understood that the scope of the invention is not limited to the specific embodiments.
Throughout the specification and claims, unless explicitly stated otherwise, the term "comprise" or variations thereof such as "comprises" or "comprising", etc. will be understood to include the stated element or component without excluding other elements or components.
As shown in fig. 8, according to the speed limiting mode switching method of the preferred embodiment of the present invention, switching between the individual speed limiting mode and the overall speed limiting mode can be rapidly and stably completed, and the switching duration is shortened, so as to ensure the stability of the network environment. The individual speed limit mode is a speed limit mode for keeping each message at a corresponding speed, for example, for message 1, message 2 and message 3, when in the individual speed limit mode, the speed corresponding to message 1 is a speed one, the speed corresponding to message 2 is a speed two, and the speed corresponding to message 3 is a speed three. And in the integral speed limiting mode, the speed corresponding to the message 1, the message 2 and the message 3 is four.
The speed limiting mode switching method is realized by combining the CoPP speed limiting and the CPU Traffic flow shaping, and comprises the following steps:
firstly, messages of different types of uploading CPUs are matched, and each type of message uploading the CPU is enabled to keep corresponding speed.
Specifically, in the network, the types of the messages are various, each message has unique characteristics, and some messages need to be sent to the CPU for processing, such as protocol messages, and some messages do not need to be sent to the CPU for processing, such as service messages. The message sent to the CPU is also diversified due to the diversity of the message.
In order to realize the rapid and stable switching between the independent speed limiting mode and the integral speed limiting mode, the invention firstly carries out CoPP speed limiting, namely, matches the messages which need to be processed by the uploading CPU in the messages of different types, and sets corresponding speed for the matched messages of different types of uploading CPUs, namely, carries out independent speed limiting processing for the messages of different types of uploading CPUs. If the message 1, the message 2 and the message 3 are matched, the CPU is required to be sent for processing, and three speeds can be set for the three messages respectively.
In this embodiment, as shown in fig. 9, the above-mentioned CoPP speed limiting process is performed in the incoming direction analyzing module of the exchange chip, specifically, in the rear stage of the incoming direction analyzing module.
Further, when matching is performed, the message may be matched through the ACL entry, so as to match the message sent to the CPU and set a corresponding speed for the message, for example, the access control list entries corresponding to the matching of the message 1, the message 2 and the message 3 are respectively ACL entry 1, ACL entry 2 and ACL entry 3. Each ACL entry can limit the speed of a matched message sent to the CPU, and the flow limit action corresponding to the speed limit action of the output speed limit action of 3 ACL entries is respectively a flow limit action template 1, a flow limit action template 2 and a flow limit action template 3, namely, the message 1 is limited by the flow limit action template 1, the message 2 is limited by the flow limit action template 2, and the message 3 is limited by the flow limit action template 3.
Secondly, mapping the messages of different types sent to the CPU to the same message queue;
and finally, configuring the flow shaping parameter value of the message queue to switch the speed limiting mode into an independent speed limiting mode or an integral speed limiting mode.
Specifically, after the CoPP speed limiting is performed, the CPU Traffic flow shaping is further performed, that is, after the speed of the messages of different types is limited separately, the CPU Traffic flow shaping is further performed on the messages.
When shaping CPU Traffic flow, mapping different types of messages after speed limit into the same message queue, namely conveying different types of messages after speed limit into the same message queue, and mapping message 1, message 2 and message 3 after speed limit into message queue_x. In practice, any single message queue may set some attributes for a message entering it, such as configuring a high scheduling priority, such as configuring traffic shaping actions.
When different types of messages after speed limiting are mapped into the same message queue, corresponding flow shaping parameter values are configured for the message queue, so that the speed limiting mode is switched to an independent speed limiting mode or an integral speed limiting mode. Namely, the switching between the single speed limiting mode and the integral speed limiting mode is realized by configuring the flow shaping parameter value of the message queue. The flow shaping parameter values are configured for the message queue_x to realize the switching between the individual speed limiting mode and the integral speed limiting mode.
In the present invention, as shown in fig. 10, when the speed limit mode is switched to the individual speed limit mode, the flow shaping parameter value of the message queue is set to the maximum value (the maximum speed limit corresponds to the non-speed limit). That is, in the CoPP speed limiting process, the messages sent to the CPU in different types are subjected to independent speed limiting processing, but the speed limiting processing is not performed in the CPU Traffic flow shaping process, so that the effect of independent speed limiting of the flow sent to the CPU in different types can be achieved, namely, the speed limiting mode is switched to the independent speed limiting mode.
As shown in fig. 11, when the speed limit mode is switched to the overall speed limit mode, the flow shaping parameter value of the message queue is set to a desired value, which is smaller than the maximum value. That is, in the CoPP speed limiting process, the messages sent to the CPU in different types are subjected to separate speed limiting processing, and the speed limiting processing is performed again in the CPU Traffic flow shaping process, so that the effect of overall speed limitation of the flow sent to the CPU in different types can be achieved, namely, the speed limiting mode is switched to the overall speed limiting mode.
In the invention, when the speed limit is carried out by combining the CoPP speed limit and the CPU Traffic flow shaping, the essential difference between the single speed limit and the integral speed limit is whether the mapped message queue is configured as the maximum flow shaping parameter value. If the maximum flow shaping parameter value is configured, the speed is limited independently; if the flow shaping parameter value desired by the user is configured, the speed is limited as a whole. Thus, the way in which both the individual speed limit and the overall speed limit are switched to each other is: readjusting the traffic shaping parameter values of the mapped message queues. If the individual speed limit is to be switched to the integral speed limit, the flow shaping parameter value of the original message queue is required to be configured into a speed limit value expected by a user; if the whole speed limit is to be switched to the single speed limit, the flow shaping parameter value of the original message queue needs to be configured to be the maximum value.
The speed limiting mode switching method can be realized by only configuring the flow shaping parameter value of the message queue when switching between the independent speed limiting mode and the integral speed limiting mode, and has simple operation process. And the independent speed limiting mode and the integral speed limiting mode are not influenced by the flow limiting dynamic template resources when being switched, so that the method is more suitable for the scene.
Furthermore, in the invention, the switching time of the independent speed limiting mode and the integral speed limiting mode is constant, and the switching time is not changed according to the number of message types, so that the intermediate state is short, and the stability of the network environment is facilitated. And the corresponding message enters the same message queue, other message queues are not affected, and the coupling is lower.
Furthermore, in the invention, the individual speed limit values of various messages can be configured independently in the individual speed limit mode, and the overall speed limit value can also be configured independently in the overall speed limit mode, so that the configuration is more flexible.
As shown in fig. 12, according to the speed limit mode switching device of the preferred embodiment of the present invention, the above speed limit mode switching method can be implemented, and switching between the individual speed limit mode and the integral speed limit mode can be quickly and stably completed, and the switching duration can be shortened, so as to ensure the stability of the network environment. Specifically, the speed limiting mode switching device comprises a matching module, a mapping module and a configuration module. The matching module is used for matching messages of different types of uploading CPUs and keeping the corresponding speed of each message of uploading CPUs; the mapping module is used for mapping the messages of different types sent to the CPU to the same message queue; the configuration module is used for the flow shaping parameter value of the message queue so as to switch the speed limiting mode into an independent speed limiting mode or an integral speed limiting mode. The detailed details of how the respective modules implement the respective functions are described above are not described here.
In this embodiment, the matching module is preferably disposed in the incoming direction analyzing module; the mapping module and the configuration module are preferably arranged in the scheduling module.
As shown in fig. 13, an electronic device according to a preferred embodiment of the present invention, which can implement the above-mentioned speed limit mode switching method, may include, but is not limited to: personal computers, server computers, workstations, desktop computers, laptop computers, notebook computers, mobile electronic devices, smart phones, tablet computers, cellular phones, personal Digital Assistants (PDAs), handsets, messaging devices, wearable electronic devices, consumer electronic devices, and the like. The electronic equipment can realize the speed limiting mode switching method, can rapidly and stably finish the switching between the independent speed limiting mode and the integral speed limiting mode, shortens the switching time and ensures the stability of the network environment. In particular, the electronic device comprises at least one memory, at least one processor, and a computer program, the at least one memory being coupled to the at least one processor, wherein the computer program is stored in the memory and is executable in the processor, such as the speed limit mode switching program or the like. When the computer program is executed, the processor can realize the steps in the method, such as realizing the matching of the messages sent to the CPU in the messages of different types, and keeping the corresponding speed of each message sent to the CPU, and the like.
The computer program herein may be divided into one or more units, which are stored in and executed by the memory to accomplish the present invention. Wherein one or more of the units may be a series of computer program instruction segments capable of performing the specified functions, the computer program instruction segments being adapted to describe the execution of a computer program in said electronic device.
It should be noted that the electronic device herein includes, but is not limited to, a memory, a processor, and a computer program as described above, and may include other devices such as an input device (e.g., a keyboard, etc.) for inputting prediction information, a communication interface, etc., which communicate with each other via a bus.
The invention also discloses a computer readable storage medium, wherein the computer readable storage medium stores a computer program, and the computer program can realize the speed limiting mode switching method when being executed by a processor. Wherein the computer program comprises computer program code, which may be in the form of source code, executable files, or in some intermediate form, etc., the computer readable medium may comprise any entity or device capable of carrying the computer program code, a recording medium, a U disk, a removable hard disk, a magnetic disk, an optical disk, a computer Memory, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), etc.
It will be appreciated by those skilled in the art that embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
The foregoing descriptions of specific exemplary embodiments of the present invention are presented for purposes of illustration and description. It is not intended to limit the invention to the precise form disclosed, and obviously many modifications and variations are possible in light of the above teaching. The exemplary embodiments were chosen and described in order to explain the specific principles of the invention and its practical application to thereby enable one skilled in the art to make and utilize the invention in various exemplary embodiments and with various modifications as are suited to the particular use contemplated. It is intended that the scope of the invention be defined by the claims and their equivalents.

Claims (10)

1. A speed limit mode switching method, wherein the speed limit mode includes a separate speed limit mode for maintaining a corresponding speed for each message and an overall speed limit mode for maintaining the same speed for each message, the speed limit mode switching method comprising:
matching messages of different types of uploading CPUs, and enabling the messages of each uploading CPU to keep corresponding speed;
mapping messages of different types, which are sent to the CPU, to the same message queue;
and configuring the flow shaping parameter value of the message queue to switch the speed limiting mode into an independent speed limiting mode or an integral speed limiting mode.
2. The method for switching speed limit modes according to claim 1, wherein said matching out messages sent to CPUs of different types and maintaining a corresponding speed of each message sent to the CPUs comprises:
and matching the messages of different types of uploading CPUs through the ACL entries, wherein the messages of different types are matched with corresponding ACL entries, and each ACL entry is used for keeping the corresponding speed of the matched message of the uploading CPU.
3. The speed limit mode switching method according to claim 2, wherein the speeds of the messages sent to the CPU and matched with the ACL entries are the same or different.
4. The speed limit mode switching method of claim 1, wherein configuring the traffic shaping parameter values of the message queue to switch the speed limit mode to either a single speed limit mode or an overall speed limit mode comprises:
when the flow shaping parameter value of the message queue is configured to be the maximum value, switching the speed limiting mode into an independent speed limiting mode;
and when the flow shaping parameter value of the message queue is configured to be an expected value, switching the speed limiting mode into an integral speed limiting mode, wherein the expected value is smaller than the maximum value.
5. A speed limit mode switching device, wherein the speed limit mode includes a separate speed limit mode for maintaining a corresponding speed for each message and an overall speed limit mode for maintaining the same speed for each message, the speed limit mode switching device comprising:
the matching module is used for matching messages of different types sent to the CPU and keeping the corresponding speed of each message sent to the CPU;
the mapping module is used for mapping the messages of different types sent to the CPU to the same message queue;
and the configuration module is used for configuring the flow shaping parameter value of the message queue so as to switch the speed limiting mode into an independent speed limiting mode or an integral speed limiting mode.
6. The speed limit mode switching device according to claim 5, wherein the matching module matches different types of messages sent to the CPU through ACL entries, the different types of messages match corresponding ACL entries, and each ACL entry is used for keeping the matched messages sent to the CPU at a corresponding speed.
7. The speed limit mode switching device according to claim 6, wherein the speeds of the messages sent to the CPU and matched with the ACL entries are the same or different.
8. The rate-limiting mode switching apparatus of claim 5, wherein the configuration module switches the rate-limiting mode to an individual rate-limiting mode when the traffic shaping parameter value of the message queue is configured to be a maximum value, and switches the rate-limiting mode to an overall rate-limiting mode when the traffic shaping parameter value of the message queue is configured to be a desired value, wherein the desired value is less than the maximum value.
9. An electronic device, the electronic device comprising:
at least one processor;
at least one memory coupled to the at least one processor and storing a computer program for execution by the at least one processor, the computer program, when executed by the at least one processor, causing the electronic device to perform the method of any one of claims 1-4.
10. A computer-readable storage medium, characterized in that it has stored thereon a computer program which, when executed by a machine, implements the method according to any of claims 1 to 4.
CN202211624275.3A 2022-12-16 2022-12-16 Speed limiting mode switching method and device, electronic equipment and storage medium Pending CN116366565A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202211624275.3A CN116366565A (en) 2022-12-16 2022-12-16 Speed limiting mode switching method and device, electronic equipment and storage medium

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202211624275.3A CN116366565A (en) 2022-12-16 2022-12-16 Speed limiting mode switching method and device, electronic equipment and storage medium

Publications (1)

Publication Number Publication Date
CN116366565A true CN116366565A (en) 2023-06-30

Family

ID=86930204

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202211624275.3A Pending CN116366565A (en) 2022-12-16 2022-12-16 Speed limiting mode switching method and device, electronic equipment and storage medium

Country Status (1)

Country Link
CN (1) CN116366565A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116708315A (en) * 2023-07-17 2023-09-05 中移(苏州)软件技术有限公司 Flow rate limiting method and device, electronic equipment and storage medium
CN117527703A (en) * 2023-11-01 2024-02-06 济南慧天云海信息技术有限公司 Method, system, equipment, medium and terminal for limiting speed of electric digital data processing flow

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116708315A (en) * 2023-07-17 2023-09-05 中移(苏州)软件技术有限公司 Flow rate limiting method and device, electronic equipment and storage medium
CN116708315B (en) * 2023-07-17 2023-11-03 中移(苏州)软件技术有限公司 Flow rate limiting method and device, electronic equipment and storage medium
CN117527703A (en) * 2023-11-01 2024-02-06 济南慧天云海信息技术有限公司 Method, system, equipment, medium and terminal for limiting speed of electric digital data processing flow

Similar Documents

Publication Publication Date Title
CN116366565A (en) Speed limiting mode switching method and device, electronic equipment and storage medium
EP3116189B1 (en) Service link selection control method and device
US8250339B2 (en) Apparatus, method, system and executable module for configuration and operation of adaptive integrated circuitry having fixed, application specific computational elements
CN108702325B (en) Communication of enhanced network traffic
CN105721535A (en) Parallel processing of service functions in service function chains
CN104954274A (en) Method for generating forwarding information, controller and service forwarding entity
US11468329B2 (en) Techniques to manage training or trained models for deep learning applications
CN104283643A (en) Message speed limiting method and device
JP5802215B2 (en) Program, computer system and method for processing streams with multiple granularities
CN105282057B (en) Flow table updating method, controller and flow table analysis device
Bhowmik et al. Distributed control plane for software-defined networks: A case study using event-based middleware
CN105635000A (en) Message storing and forwarding method, circuit and device
Luo et al. Optimizing multicast flows in high-bandwidth reconfigurable datacenter networks
CN102333280A (en) Business secret key renewing method and system and business processing server
US10025752B2 (en) Data processing method, processor, and data processing device
CN105915465A (en) Method, device and system for adjusting priority of BGP (Border Gateway Protocol) flow-spec table
CN111431921B (en) Configuration synchronization method
CN103299298A (en) Service processing method and system
CN111782260A (en) Gray scale distribution method and gray scale distribution device
CN105939242B (en) Realize the method and device of virtual system
US10965532B2 (en) Software-defined networking device based on service profile learning
CN102364455B (en) Balanced share control method and device for virtual central processing units (VCPUs) among cascaded multi-core central processing units (CPUs)
CN113742079B (en) Method for realizing K8S seven-layer load balancing strategy and application
CN109862044A (en) A kind of conversion equipment, the network equipment and data transmission method
CN115987906A (en) Flow control method and device based on expansion port, electronic equipment and storage medium

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination