CN116364005A - Display substrate, display panel and display device - Google Patents

Display substrate, display panel and display device Download PDF

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Publication number
CN116364005A
CN116364005A CN202310343337.1A CN202310343337A CN116364005A CN 116364005 A CN116364005 A CN 116364005A CN 202310343337 A CN202310343337 A CN 202310343337A CN 116364005 A CN116364005 A CN 116364005A
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storage capacitor
light
electrode
pixel unit
pixel
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Inventor
徐攀
韩影
张星
罗程远
赵冬辉
吕广爽
许程
王红丽
吴桐
周丹丹
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BOE Technology Group Co Ltd
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G09G2300/0452—Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0242—Compensation of deficiencies in the appearance of colours
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0271—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0626—Adjustment of display parameters for control of overall brightness
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0666—Adjustment of display parameters for control of colour parameters, e.g. colour temperature

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The embodiment of the disclosure provides a display substrate, a display panel and a display device. The display substrate comprises a plurality of pixel units which are arranged in an array, wherein each pixel unit comprises a light-emitting element and a pixel driving circuit for driving the light-emitting element to emit light, each pixel driving circuit at least comprises a driving transistor and a storage capacitor, a first end of each storage capacitor is connected with a control electrode of each driving transistor, and a second end of each storage capacitor is connected with a first electrode of each light-emitting element; the pixel units at least comprise a first pixel unit emitting light of a first color and a second pixel unit emitting light of a second color, wherein the storage capacitor included in the first pixel unit is a first storage capacitor, and the storage capacitor included in the second pixel unit is a second storage capacitor; the capacitance value of the first storage capacitor is different from the capacitance value of the second storage capacitor.

Description

Display substrate, display panel and display device
Technical Field
The disclosure relates to the technical field of display, in particular to a display substrate, a display panel and a display device.
Background
In recent years, thanks to the excellent display effect of Organic Light-Emitting Diode (OLED) displays, the OLED industry has been rapidly developed at home and abroad, and pixel driving circuits of various OLED panels have been developed successively, and the OLED panels can emit Light driven by currents generated by driving transistors in the pixel driving circuits in a saturated state.
Disclosure of Invention
The embodiment of the disclosure provides a display substrate, a display panel and a display device.
In a first aspect, an embodiment of the present disclosure provides a display substrate including a plurality of pixel units arranged in an array, where the pixel units include a light emitting element and a pixel driving circuit for driving the light emitting element to emit light, the pixel driving circuit includes at least a driving transistor and a storage capacitor, a first end of the storage capacitor is connected to a control electrode of the driving transistor, and a second end of the storage capacitor is connected to a first electrode of the light emitting element;
the pixel units at least comprise a first pixel unit emitting light of a first color and a second pixel unit emitting light of a second color, wherein the storage capacitor included in the first pixel unit is a first storage capacitor, and the storage capacitor included in the second pixel unit is a second storage capacitor;
the capacitance value of the first storage capacitor is different from the capacitance value of the second storage capacitor.
In some embodiments, the light emitting element included in the first pixel unit is a first light emitting element, and the light emitting element included in the second pixel unit is a second light emitting element;
the luminous efficiency of the first luminous element is smaller than that of the second luminous element, and the capacitance value of the first storage capacitor is larger than that of the second storage capacitor.
In some embodiments, the pixel cell further comprises a third pixel cell that emits a third color light;
the storage capacitor included in the third pixel unit is a third storage capacitor, and the storage capacitor included in the third pixel unit is a third storage capacitor;
the capacitance value of the third storage capacitor is different from the capacitance value of the first storage capacitor and the capacitance value of the second storage capacitor.
In some embodiments, the light emitting element included in the third pixel unit is a third light emitting element;
the luminous efficiency of the first luminous element is smaller than the luminous efficiency of the second luminous element, and the luminous efficiency of the second luminous element is smaller than the luminous efficiency of the third luminous element;
the capacitance value of the first storage capacitor is larger than that of the second storage capacitor, and the capacitance value of the second storage capacitor is larger than that of the third storage capacitor.
In some embodiments, the first color light is blue light, the second color light is green light, and the third color light is red light.
In some embodiments, at least a portion of the pixel cells are configured with a compensation capacitor, a first end of the compensation capacitor is connected to the first electrode of the light emitting element, and a second end of the compensation capacitor is connected to the first operating voltage end;
for the pixel unit provided with the compensation capacitor, the ratio between the sum of the intrinsic capacitance of the light-emitting element and the capacitance value of the compensation capacitor and the capacitance value of the storage capacitor is 1/5-5;
for the pixel unit not configured with the compensation capacitor, the ratio between the capacitance value of the intrinsic capacitor of the light emitting element and the capacitance value of the storage capacitor is 1/5-5.
In some embodiments, the plurality of pixel cells further includes a third pixel cell that emits a third color light;
the area of the opening area corresponding to the second pixel unit is smaller than that of the opening area corresponding to the third pixel unit, and the area of the opening area corresponding to the second pixel unit is smaller than that of the opening area corresponding to the first pixel unit;
the second pixel unit is configured with the compensation capacitor.
In some embodiments, the area of the corresponding opening region of the pixel unit configured with the compensation capacitor is less than 1500 μm 2 。
In some embodiments, the storage capacitor has a capacitance value of 100fF to 300fF.
In some embodiments, the display substrate further includes a plurality of data lines extending in a first direction and a plurality of gate lines extending in a second direction, and the plurality of data lines and the plurality of gate lines intersect to define a plurality of the pixel units;
the first electrode of the driving transistor is connected with a second working voltage end, the second electrode of the driving transistor is connected with the first electrode of the light-emitting element, and the second electrode of the light-emitting element is connected with a third working voltage end;
the pixel driving circuit further includes: and the control electrode of the data writing transistor is connected with the grid line, the first electrode of the data writing transistor is connected with the data line, and the second electrode of the data writing transistor is connected with the first end of the storage capacitor.
In some embodiments, the capacitance value of the storage capacitor satisfies the following formula:
Figure BDA0004159176220000031
wherein I is off And f is the refresh frequency of the display substrate, and DeltaV is the maximum withstand voltage value of the storage capacitor.
In some embodiments, at least a portion of the pixel cells are configured with a compensation capacitor, a first end of the compensation capacitor is connected to the first electrode of the light emitting element, and a second end of the compensation capacitor is connected to the first operating voltage end;
the first working voltage end and the second working voltage end are the same signal end;
or the first working voltage end and the third working voltage end are the same signal end.
In some embodiments, the pixel driving circuit further includes at least one of a first reset transistor, a second reset transistor, and a light emission control transistor;
the control electrode of the first reset transistor is connected with a first control signal line, the first electrode of the first reset transistor is connected with a first reset voltage end, and the second electrode of the first reset transistor is connected with the first end of the storage capacitor;
the control electrode of the second reset transistor is connected with a second control signal line, the first electrode of the second reset transistor is connected with the second electrode of the driving transistor, and the second electrode of the second reset transistor is connected with a second reset voltage end;
the control electrode of the light-emitting control transistor is connected with a light-emitting control signal line, the first electrode of the light-emitting control transistor is connected with the second working voltage end, and the second electrode of the light-emitting control transistor is connected with the first electrode of the driving transistor.
In a second aspect, embodiments of the present disclosure provide a display panel including: the display substrate provided in the first aspect.
In a third aspect, embodiments of the present disclosure provide a display device, including: the display panel provided in the second aspect.
In some embodiments, the display device further includes a source driver; the source driver is configured to generate a data voltage for supply to each of the pixel cells based on the same gamma voltage.
In the display substrate provided by the embodiment of the disclosure, different storage capacitors are configured for the pixel units corresponding to different light-emitting colors, and the gray scale loss of each pixel unit is accurately controlled by matching the appropriate storage capacitors, so that the gray scale loss is reduced, the consistency of the number of gray scales which can be covered when all the pixel units are subjected to gray scale expansion within the working voltage range is ensured, the same brightness gradient can be presented, and the display adverse phenomena such as uneven brightness, color deviation of color mixture and the like are avoided.
Drawings
The accompanying drawings are included to provide a further understanding of the disclosure, and are incorporated in and constitute a part of this specification, illustrate the disclosure and together with the description serve to explain, but do not limit the disclosure. In the drawings:
fig. 1 is a schematic structural diagram of a pixel driving circuit according to an embodiment of the disclosure.
Fig. 2 is a schematic diagram illustrating an operation timing of the pixel driving circuit in fig. 1.
Fig. 3 is a schematic structural diagram of another pixel driving circuit according to an embodiment of the disclosure.
Reference numerals illustrate:
the Data line Data, the Gate line Gate, the Data voltage Vdata, the first operating voltage terminal V0, the second operating voltage terminal ELVDD, the third operating voltage terminal ELVSS, the first reset voltage terminal Vref, the second reset voltage terminal Vinit, the first control signal line G1, the second control signal line G2, the light emission control signal line EM;
a driving transistor DTFT, a data writing transistor T1, a first reset transistor T2, a second reset transistor T3, a light emission control transistor T4;
storage capacitor Cst: the first storage capacitor Cst1, the second storage capacitor Cst2 and the third storage capacitor Cst3; intrinsic capacitance Coled, compensation capacitance C0.
Detailed Description
Specific embodiments of the present disclosure are described in detail below with reference to the accompanying drawings. It should be understood that the detailed description and specific examples, while indicating and illustrating the disclosure, are not intended to limit the disclosure.
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present disclosure more apparent, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present disclosure. It will be apparent that the described embodiments are some, but not all, of the embodiments of the present disclosure. All other embodiments, which can be made by one of ordinary skill in the art without the need for inventive faculty, are within the scope of the present disclosure, based on the described embodiments of the present disclosure.
Unless defined otherwise, technical or scientific terms used in embodiments of the present disclosure should be given the ordinary meaning as understood by one of ordinary skill in the art to which the present disclosure belongs. The terms "first," "second," and the like, as used in this disclosure, do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. Likewise, the word "comprising" or "comprises", and the like, means that elements or items preceding the word are included in the element or item listed after the word and equivalents thereof, but does not exclude other elements or items. The terms "connected" or "connected," and the like, are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", etc. are used merely to indicate relative positional relationships, which may also be changed when the absolute position of the object to be described is changed.
In recent years, thanks to the excellent display effect of Organic Light-Emitting Diode (OLED) displays, the OLED industry has been rapidly developed at home and abroad, and pixel driving circuits of various OLED panels have been developed successively, and the OLED panels can emit Light driven by currents generated by driving transistors in the pixel driving circuits in a saturated state.
The transistors in the present disclosure may be thin film transistors or field effect transistors or other switching devices of the same characteristics. Transistors generally comprise three poles: the gate, source and drain, the source and drain in the transistor are symmetrical in structure, and the two are interchangeable as desired. In this disclosure, the control electrode refers to the gate of the transistor, one of the first and second electrodes being the source and the other being the drain.
Further, according to transistor characteristics, transistors can be classified into N-type transistors and P-type transistors; when the transistor is an N-type transistor, the on voltage is high level voltage, and the off voltage is low level voltage; when the transistor is a P-type transistor, the on voltage is a low level voltage and the off voltage is a high level voltage. The "effective level" in the present invention refers to a voltage capable of controlling the turn-on of the corresponding transistor, and the "non-effective level" refers to a voltage capable of controlling the turn-off of the corresponding transistor; therefore, when the transistor is an N-type transistor, the active level means a high level, and the inactive level means a low level; when the transistor is a P-type transistor, the active level refers to a low level and the inactive level refers to a high level.
In the following description of the embodiments of the present invention, an example in which each transistor (including the driving transistor) is an N-type transistor is given as an example. At this time, the active level means a high level, and accordingly, the active level state means a high level state, the inactive level means a low level, and accordingly, the inactive level state means a low level state. It should be appreciated by those skilled in the art that each of the transistors in the embodiments of the present invention described below may also be P-type transistors.
In the present disclosure, the case that all transistors in the pixel circuit are simultaneously N-type transistors or simultaneously P-type transistors is only a preferred scheme in the present disclosure, and all transistors in the pixel circuit can be simultaneously prepared based on the same process, which is beneficial to shortening the preparation period.
It should be understood that in preparing OLEDs emitting different colors of light, the light emitting efficiency (Luminous Efficiency) of the OLEDs emitting different colors of light is different due to the light emitting material, film thickness, etc. In general, the light emitting efficiency of the red OLED is greater than that of the green OLED, which is higher than that of the blue OLED; that is, when the same driving current is applied, the light emission luminance of the red OLED is higher than that of the green OLED, which is higher than that of the blue OLED.
Taking an example of gray scale unfolding processing of an RGB type OLED display device, the specific process is as follows:
first, the data voltages to be supplied when the red OLED, the green OLED, and the blue OLED exhibit preset maximum luminance (preset as needed, for example, 150 nit) are respectively determined by testing and respectively denoted as vr_max, vg_max, and vb_max as the maximum operating voltages of the pixel unit including the red OLED (referred to as red pixel unit), the pixel unit including the green OLED (referred to as green pixel unit), and the pixel unit including the blue OLED (referred to as blue pixel unit), that is, the operating voltage range of the red pixel unit: 0-Vr_max, working voltage range of green pixel unit: 0-Vg_max, working voltage range of blue light pixel unit: 0 to vb_max; since the light emitting efficiency of the red OLED is greater than that of the green OLED, and the light emitting efficiency of the green OLED is higher than that of the blue OLED, the measured vr_max < vg_max < vb_max, i.e., the operating voltage range of the blue pixel unit is maximized.
Then, the working voltage range of the blue light pixel unit is: the gradation division is performed based on 0 to vg_max, and taking the case of using 8 bits for gradation representation, 2 can be divided 8 The more the 256 gray levels (L0 to L255), i.e., 256 luminances, the richer the displayable luminance gradient, the finer the picture. Then, based on a preset algorithm, determining that each gray level L0-L255 is in a working voltage range according to gamma voltages: the voltage corresponding to 0 to vg_max is, for example, 0v for L0 and vg_max for L255.
After the gray scale expansion is performed in the working voltage range of the blue pixel unit, the maximum working voltage vr_max of the red pixel unit and the maximum working voltage vg_max of the green pixel unit are smaller than the maximum working voltage vb_max of the blue pixel unit, so that the red pixel unit and the green pixel unit cannot display part of gray scale, namely, gray scale loss exists in the red pixel unit and the green pixel unit. The larger the voltage difference between Vr_max and vb_max is, the more the number of gray scales is lost by the red pixel unit; the larger the voltage difference between vg_max and vb_max, the greater the number of gray levels lost by the green pixel cell. In this case, there is not only a loss of brightness in the case of monochrome display, but also a color shift in the case of color mixing.
In the related art, a data voltage is generated by a source driving chip, and a gray scale voltage of each pixel unit is realized by providing different data voltages to each pixel unit. Taking an 8-bit source electrode driving chip as an example, a gamma reference voltage source provides 8 gamma reference voltages and outputs the 8 gamma reference voltages to the source electrode driving chip through a gamma voltage signal port to generate 256 gray scale voltages. In this case, in order to avoid gray-scale loss between the pixel units, gamma reference voltages need to be respectively configured for the pixel units corresponding to the three colors of light, that is, three groups of gamma reference voltages need to be configured, which is costly and increases driving power consumption.
In order to solve at least one of the above technical problems, an embodiment of the present disclosure provides a display substrate, which reduces gray-scale loss during driving by matching a suitable storage capacitor for each pixel unit.
Fig. 1 is a schematic structural diagram of a pixel driving circuit according to an embodiment of the disclosure.
The display substrate provided by the embodiment of the disclosure includes a plurality of pixel units arranged in an array, the pixel units include a light emitting element and a pixel driving circuit for driving the light emitting element to emit light, as shown in fig. 1, the pixel driving circuit includes at least a driving transistor DTFT and a storage capacitor Cst, a first end of the storage capacitor Cst is connected with a control electrode of the driving transistor DTFT, and a second end of the storage capacitor Cst is connected with a first electrode of the light emitting element.
The plurality of pixel units at least comprise a first pixel unit emitting light of a first color and a second pixel unit emitting light of a second color, wherein a storage capacitor Cst included in the first pixel unit is a first storage capacitor Cst1, and a storage capacitor Cst included in the second pixel unit is a second storage capacitor Cst2; the capacitance value of the first storage capacitor Cst1 is different from the capacitance value of the second storage capacitor Cst 2.
In the display substrate provided by the embodiment of the disclosure, different storage capacitors are configured for the pixel units corresponding to different light-emitting colors, and the gray scale loss of each pixel unit is accurately controlled by matching the appropriate storage capacitors, so that the gray scale loss is reduced, the consistency of the number of gray scales which can be covered when all the pixel units are subjected to gray scale expansion within the working voltage range is ensured, the same brightness gradient can be presented, and the display adverse phenomena such as uneven brightness, color deviation of color mixture and the like are avoided.
In some embodiments, the display substrate further includes a plurality of Data lines Data extending in the first direction and a plurality of Gate lines Gate extending in the second direction, and the plurality of Data lines Data and the plurality of Gate lines Gate cross to define a plurality of pixel units. The Data line Data provides the Data voltage Vdata for the corresponding pixel unit, and the Gate line Gate provides the Gate voltage for the corresponding pixel unit.
As shown in fig. 1, the pixel driving circuit is a 2T1C circuit, a first electrode of the driving transistor DTFT is connected to the second operating voltage terminal ELVDD, a second electrode of the driving transistor DTFT is connected to a first electrode of the light emitting element, and a second electrode of the light emitting element is connected to the third operating voltage terminal ELVSS. The pixel driving circuit further includes: the control electrode of the Data writing transistor T1 is connected with the Gate line Gate, the first electrode of the Data writing transistor T1 is connected with the Data line Data, and the second electrode of the Data writing transistor T1 is connected with the first end of the storage capacitor Cst. The first working voltage terminal V0 provides the first voltage VDD, and the second working voltage terminal ELVDD provides the second voltage VSS.
In one example, as shown in fig. 1, a first terminal of the storage capacitor Cst and a second electrode of the data writing transistor T1 are connected to a node N, and a second terminal of the storage capacitor Cst and a first electrode of the light emitting element are connected to a node S.
Fig. 2 is a schematic diagram of an operation timing sequence of the pixel driving circuit in fig. 1, and as shown in fig. 2, a display period in an operation process of the pixel driving circuit at least includes: a data voltage writing stage, a holding stage and a light emitting stage. In the Data voltage writing stage, the Data writing transistor T1 is controlled to be turned on, and the Data voltage Vdata provided by the Data line Data is written into the control electrode of the driving transistor DTFT; in the holding stage, the drain of the driving transistor DTFT is turned on with the light emitting element so that the driving transistor DTFT can output a driving current to the light emitting element; in the light emitting stage, vdd voltage is written to the node S through the driving transistor DTFT, and at this time, the gate-source voltage of the driving transistor DTFT maintains the previous state due to the storage capacitor Cst, so that the light emitting element maintains a stable voltage and emits light.
In this process, there are three gray-scale losses of the pixel driving circuit, which are specifically as follows:
1. in the Data writing stage, the Data line Data supplies a high level signal to the first electrode of the Data writing transistor T1, the Gate line Gate supplies a high level signal to the control electrode of the Data writing transistor T1, the Data writing transistor T1 is controlled to be turned on, the Data voltage Vdata is written to the control electrode of the driving transistor DTFT, namely, the node N, and the voltage variation amount of the node N in the Data writing stage is Δvn1. Since the light emitting element has the intrinsic capacitance Coled, coupling occurs between the storage capacitance Cst and the intrinsic capacitance Coled of the light emitting element, resulting in a change in the voltage of the node S, the amount of change Δvs1 of the node S can be expressed by equation 1.
Figure BDA0004159176220000091
Wherein cgs_t2 is parasitic capacitance between the gate and the drain of the driving transistor DTFT, and C0 is compensation capacitance C0. Whether to add the compensation capacitor C0, and the setting position and the size of the compensation capacitor C0 are described in detail in other embodiments, which are not described herein.
As can be seen from the formula 1, the voltage variation Δvs1 of the node S is obviously smaller than the voltage variation Δvn1 of the node N, and the smaller Δvs1/. DELTA.Vn1, the closer the voltage at the writing N point is to the data voltage Vdata, the less the gray scale loss.
2. At time T2, the Data line Data provides a high level signal to the first electrode of the Data writing transistor T1, the Gate line Gate provides a low level signal to the control electrode of the Data writing transistor T1, the Data writing transistor T1 is controlled to be turned off, at this time, the first end of the storage capacitor Cst is in a floating state, meanwhile, the driving transistor DTFT is in a conducting state, the driving current output by the driving transistor DTFT charges the second end of the storage capacitor Cst, so that the voltage of the second end of the storage capacitor Cst changes, the node N generates a leakage phenomenon, and the voltage change amount Δvn2 generated by the node N pull-down can be represented by a formula 2.
Figure BDA0004159176220000101
Where cgs_t1 is a parasitic capacitance between the Gate and the drain of the data writing transistor T1, and Δvgate is a voltage difference between a high level signal and a low level signal supplied from the Gate line Gate.
As can be seen from the formula 2, the magnitude of Δvn2 is inversely related to the capacitance value of the storage capacitor Cst, and the smaller Δvn2 is, the smaller the gray-scale loss is.
3. In the hold phase, the second operating voltage terminal ELVDD provides the first voltage VDD, the driving transistor DTFT is in the on state, the first voltage VDD is written into the node S through the driving transistor DTFT, the voltage of the node S rises, the voltage variation of the node S is Δvs2, the voltage at the node N also rises due to the bootstrap effect of the storage capacitor Cst, and the voltage variation Δvn3 of the node S can be expressed by equation 3.
Figure BDA0004159176220000102
Wherein cgd_t2 is a parasitic capacitance between the gate and the source of the data writing transistor T1.
As can be seen from the formula 3, the gate-source voltage (the difference between the voltage at the node N and the voltage at the node S, and the voltage difference between the two ends of the storage capacitor Cst) of the driving transistor DTFT generally shows a decreasing trend, that is, due to the coupling of the storage capacitor Cst, the node N is divided when the driving transistor DTFT outputs the gate-source voltage, resulting in gray scale loss. The voltage variation Δvn3 of the node S is related to the capacitance value of the storage capacitor Cst, and the smaller Δvn3 is, the smaller the gray-scale loss is.
In view of the above, all three gray-scale losses generated during the driving of the light emitting device are related to the capacitance value of the storage capacitor Cst. Although the larger the capacitance value of the storage capacitor Cst is, the smaller the voltage variation Δvs1 of the node S is, the larger the capacitance value of the storage capacitor Cst is, the smaller the total gray-scale loss generated in one display period, that is, the smaller the sum of the three gray-scale losses is, that is, the negative correlation is made between the capacitance value of the storage capacitor Cst and the total gray-scale loss amount, for the whole display period.
In some embodiments, the light emitting element included in the first pixel unit is a first light emitting element, and the light emitting element included in the second pixel unit is a second light emitting element; the light emitting efficiency of the first light emitting element is smaller than that of the second light emitting element, and the capacitance value of the first storage capacitor Cst1 is larger than that of the second storage capacitor Cst 2.
It should be understood that the smaller the light emitting efficiency of the light emitting element, the larger the required driving current/voltage, and in the case where the data voltage Vdata supplied to each light emitting element is the same and the light emitting efficiency of the first light emitting element is smaller than the light emitting efficiency of the second light emitting element, the gray scale loss corresponding to the first light emitting element is smaller than the gray scale loss corresponding to the second light emitting element. Since the capacitance value of the storage capacitor Cst is inversely related to the gray-scale loss amount, the capacitance value of the first storage capacitor Cst1 is larger than the capacitance value of the second storage capacitor Cst 2.
In some embodiments, the pixel cell further comprises a third pixel cell that emits a third color light; the storage capacitor Cst included in the third pixel unit is a third storage capacitor Cst3, and the storage capacitor Cst included in the third pixel unit is a third storage capacitor Cst3; the capacitance value of the third storage capacitor Cst3 is different from the capacitance value of the first storage capacitor Cst1 and the capacitance value of the second storage capacitor Cst 2.
In view of the fact that the light emitting efficiency of the first pixel unit, the second pixel unit and the third pixel unit are different, the saturation region voltages of the driving transistors DTFT corresponding to the first pixel unit, the second pixel unit and the third pixel unit are different from each other, and gray scale loss accuracy of the first pixel unit, the second pixel unit and the third pixel unit can be controlled by matching the corresponding first storage capacitor Cst1, second storage capacitor Cst2 and third storage capacitor Cst3, so that the same data voltage can be used for driving each pixel unit.
In one example, the first color light is blue light, the second color light is green light, and the third color light is red light. The first light emitting element is a blue light emitting element, the second light emitting element is a green light emitting element, and the third light emitting element is a red light emitting element.
The light emitting efficiency of the blue light emitting element is smaller than that of the green light emitting element, and the light emitting efficiency of the green light emitting element is smaller than that of the red light emitting element. In this case, on the premise that the data voltages supplied to the pixel units are the same, the grayscale loss corresponding to the blue light emitting element is required to be smaller than the grayscale loss corresponding to the green light emitting element, and the grayscale loss corresponding to the green light emitting element is required to be smaller than the grayscale loss corresponding to the red light emitting element. Correspondingly, the capacitance value of the first storage capacitor Cst1 is larger than the capacitance value of the second storage capacitor Cst2, and the capacitance value of the second storage capacitor Cst2 is larger than the capacitance value of the third storage capacitor Cst 3.
It should be further noted that, there is a minimum value of the capacitance value of the storage capacitor Cst of each pixel unit, and the minimum value of the capacitance value of the storage capacitor Cst satisfies the following formula 4:
Figure BDA0004159176220000121
wherein I is off The leakage current generated when the data writing transistor T1 is turned off, f is the refresh frequency of the display substrate, and Δv is the maximum withstand voltage value of the storage capacitor Cst.
And, the capacitance value of the storage capacitor Cst is limited by the size of the storage capacitor Cst, and in general, the pixel driving circuit is located in a space region between adjacent pixel units, in the high PPI display substrate, the openings of the pixel units are smaller and denser, the space region is correspondingly reduced, at this time, the placement space of the pixel driving circuit corresponding to each pixel unit is limited, the device size of the corresponding storage capacitor Cst is limited, and the capacitance value of the storage capacitor Cst is affected by the device size.
In some embodiments, the storage capacitor Cst has a capacitance of 100-300fF.
The compensation capacitor C0 will be described in detail with reference to the embodiment.
In some embodiments, as shown in fig. 2, in the data writing stage, when the PPI of the display substrate is high, the opening area of the pixel unit is small, and the intrinsic capacitance Coled of the light emitting element is small. As can be seen from the formula 1, when the intrinsic capacitance Coled of the light emitting element is very small, the voltage variation Δvs1 of the node S is approximately the same as the voltage variation Δvn1 of the node N, which is equivalent to that the voltage difference across the storage capacitor Cst is approximately unchanged, so that the gray-scale loss is large, and the operation of writing data fails. At this time, the compensation capacitor C0 needs to be added to reduce the gray-scale loss at this stage, and to ensure that the data voltage can be written into the gate of the driving transistor DTFT.
However, since the pixel units emitting light of different colors have different opening sizes, the intrinsic capacitances Coled of the light emitting elements are different, that is, the intrinsic capacitances Coled corresponding to the first light emitting element, the second light emitting element, and the third light emitting element are not uniform, and therefore, the compensation capacitor C0 is not disposed in each pixel unit.
In some embodiments, at least a portion of the pixel units are configured with a compensation capacitor C0, a first end of the compensation capacitor C0 is connected to the first electrode of the light emitting element, and a second end of the compensation capacitor C0 is connected to the first operating voltage end V0; for the pixel cell configured with the compensation capacitor C0, the ratio between the sum of the intrinsic capacitance Coled of the light emitting element and the capacitance value of the compensation capacitor C0 and the capacitance value of the storage capacitor Cst is 1/5 to 5. For the pixel cell not provided with the compensation capacitor C0, the ratio between the intrinsic capacitance Coled of the light emitting element and the capacitance value of the storage capacitor Cst is 1/5-5. By adding the compensation capacitor C0 in the pixel unit, the effectiveness of data writing operation is ensured, and the gray scale loss in the data writing stage is reduced.
Since the size of the opening of the pixel unit in the display substrate can limit the size of the light emitting element, the size of the light emitting element can affect the capacitance value of the intrinsic capacitance Coled, and when Coled is smaller, the storage capacitance C0 needs to be set, thereby ensuring the effectiveness of the data writing operation. Therefore, whether or not the compensation capacitor is disposed is related to the area of the opening region of the pixel unit. In some embodiments, the area of the opening area of the pixel unit provided with the compensation capacitor is less than 1500 μm 2 。
The pixel units are provided with corresponding opening areas, and the opening areas are areas where light emitted by the pixel units can be emitted from the display panel.
In one example, when the gray-scale luminance of the display substrate is 255 gray scales, the luminance required for the red pixel unit, the green pixel unit, and the blue pixel unit are different, for example, the luminance ratio required for the red pixel unit, the green pixel unit, and the blue pixel unit is 3:6:1, and even if the luminance requirement for the green pixel unit is the highest, the area of the opening region for the green pixel unit is the smallest because the efficiency of the green light emitting element is high and the lifetime is long.
Based on this, in some embodiments, the second pixel unit, which is a pixel unit emitting green light on the display substrate, is configured with the compensation capacitor C0.
In some embodiments, the first end of the compensation capacitor C0 is connected to the first electrode of the light emitting element, and the second end of the compensation capacitor C0 is connected to the first operating voltage end V0. The first working voltage terminal V0 and the second working voltage terminal ELVDD are the same signal terminal; or the first working voltage terminal V0 and the third working voltage terminal ELVSS are the same signal terminal, so that the preparation cost is saved, and the preparation cost is simplified. Of course, the three working voltage ends may be different, which is not limited in the embodiment of the disclosure.
Fig. 3 is a schematic structural diagram of another pixel driving circuit according to an embodiment of the disclosure, and as shown in fig. 3, the pixel driving circuit further includes a first reset transistor T2, a second reset transistor T3, and a light emission control transistor T4.
The control electrode of the first reset transistor T2 is connected to the first control signal line G1, the first electrode of the first reset transistor T2 is connected to the first reset voltage terminal Vref, and the second electrode of the first reset transistor T2 is connected to the first end of the storage capacitor Cst; the control electrode of the second reset transistor T3 is connected with the second control signal line G2, the first electrode of the second reset transistor T3 is connected with the second electrode of the driving transistor DTFT, and the second electrode of the second reset transistor T3 is connected with the second reset voltage end Vinit; a control electrode of the light emission control transistor T4 is connected to the light emission control signal line EM, a first electrode of the light emission control transistor T4 is connected to the second operating voltage terminal ELVDD, and a second electrode of the light emission control transistor T4 is connected to the first electrode of the driving transistor DTFT. The first reset voltage terminal Vref provides a first reset voltage, which may be equal to the first voltage VDD or slightly less than the first voltage VDD.
In the pixel driving circuit provided by the embodiment of the disclosure, in a reset stage, in response to signal control of the first control signal line G1, the first reset transistor T2 is turned on, and the first reset voltage provided by the first reset voltage terminal Vref is written into the node N to reset the node N. In response to the signal control of the second control signal line G2, the second reset transistor T3 is turned on, and the second reset voltage supplied from the second reset voltage terminal Vinit is written to the first electrode of the light emitting element to reset the first electrode of the light emitting element. And, the signal of the emission control signal line EM controls the turn-off of the emission control transistor T4 to control the on-off between the driving transistor DTFT and the first pole of the light emitting element.
Similarly, according to the relation between the capacitance value of the storage capacitor Cst and the capacitance value of the intrinsic capacitor Coled of the light emitting element, whether the compensation capacitor C0 is additionally arranged is determined, so that the effectiveness of data writing is ensured.
Based on the same inventive concept, the embodiments of the present disclosure further provide a display panel, including a display substrate, where the display substrate includes an array substrate as provided in the previous embodiments, and descriptions of the display substrate may be referred to in the previous embodiments, and are not repeated herein.
The embodiment of the disclosure also provides a display device comprising the display panel.
In some embodiments, the display device further includes a source driver configured to generate a data voltage for supply to each pixel cell based on the same gamma voltage.
The display device provided by the embodiment of the disclosure generates the data voltage for providing to each pixel unit based on the same gamma voltage, that is to say, the data voltage provided to each pixel unit is the same, and the gray scale loss of each pixel unit in the light emitting driving process is reduced by matching the proper storage capacitor for each pixel unit. Further, on the premise that the data voltages of the pixel units are the same, the gray scale loss of the pixel units is accurately controlled, so that the voltage margin after the lost gray scale voltages are removed can meet the saturation region voltage of the driving transistor corresponding to the light-emitting element of the pixel unit, the phenomenon that the gray scale quantity loss is avoided, the display picture color gamut accuracy is affected, and the display effect is improved.
Compared to the related art, in which different data voltages are generated according to different gamma voltages, the gray scale voltages required by each pixel unit are provided based on substantially the same gray scale loss, in the embodiment of the disclosure, the same data voltages are generated based on the same gamma voltage, and the gray scale loss of each pixel unit is adjusted by adjusting the capacitance value of the storage capacitor, so as to provide the gray scale voltages required by each pixel unit. Based on this, the present disclosure generates the data voltages for supply to the respective pixel units based on the same gamma voltage, and can reduce the logic power consumption of the source starter and reduce the driving cost.
It should be noted that, the determination of the data voltage is related to the gray scale number of the display device and the accuracy of the driving chip of the source driver, which is not described herein.
The display device provided in this embodiment may be: wearable equipment, mobile phones, tablet computers, televisions, displays, notebook computers, digital photo frames, navigator and any other products or components with display functions. Other essential components of the display device are those of ordinary skill in the art and will not be described in detail herein, nor should they be considered as limiting the present disclosure.
It is to be understood that the above embodiments are merely exemplary embodiments employed to illustrate the principles of the present disclosure, however, the present disclosure is not limited thereto. Various modifications and improvements may be made by those skilled in the art without departing from the spirit and substance of the disclosure, and are also considered to be within the scope of the disclosure.

Claims (16)

1. The display substrate is characterized by comprising a plurality of pixel units which are arranged in an array, wherein each pixel unit comprises a light-emitting element and a pixel driving circuit for driving the light-emitting element to emit light, each pixel driving circuit at least comprises a driving transistor and a storage capacitor, a first end of each storage capacitor is connected with a control electrode of each driving transistor, and a second end of each storage capacitor is connected with a first electrode of each light-emitting element;
the pixel units at least comprise a first pixel unit emitting light of a first color and a second pixel unit emitting light of a second color, wherein the storage capacitor included in the first pixel unit is a first storage capacitor, and the storage capacitor included in the second pixel unit is a second storage capacitor;
the capacitance value of the first storage capacitor is different from the capacitance value of the second storage capacitor.
2. The display substrate according to claim 1, wherein the light-emitting element included in the first pixel unit is a first light-emitting element, and the light-emitting element included in the second pixel unit is a second light-emitting element;
the luminous efficiency of the first luminous element is smaller than that of the second luminous element, and the capacitance value of the first storage capacitor is larger than that of the second storage capacitor.
3. The display substrate of claim 1, wherein the plurality of pixel cells further comprises a third pixel cell that emits a third color light;
the storage capacitor included in the third pixel unit is a third storage capacitor, and the storage capacitor included in the third pixel unit is a third storage capacitor;
the capacitance value of the third storage capacitor is different from the capacitance value of the first storage capacitor and the capacitance value of the second storage capacitor.
4. A display substrate according to claim 3, wherein the light emitting element included in the third pixel unit is a third light emitting element;
the luminous efficiency of the first luminous element is smaller than the luminous efficiency of the second luminous element, and the luminous efficiency of the second luminous element is smaller than the luminous efficiency of the third luminous element;
the capacitance value of the first storage capacitor is larger than that of the second storage capacitor, and the capacitance value of the second storage capacitor is larger than that of the third storage capacitor.
5. The display substrate of claim 4, wherein the first color light is blue light, the second color light is green light, and the third color light is red light.
6. The display substrate according to claim 1, wherein at least part of the pixel units are provided with a compensation capacitor, a first end of the compensation capacitor is connected with the first electrode of the light emitting element, and a second end of the compensation capacitor is connected with a first working voltage end;
for the pixel unit provided with the compensation capacitor, the ratio between the sum of the intrinsic capacitance of the light-emitting element and the capacitance value of the compensation capacitor and the capacitance value of the storage capacitor is 1/5-5;
for the pixel unit not configured with the compensation capacitor, the ratio between the capacitance value of the intrinsic capacitor of the light emitting element and the capacitance value of the storage capacitor is 1/5-5.
7. The display substrate of claim 6, wherein the plurality of pixel cells further comprises a third pixel cell that emits a third color light;
the area of the opening area corresponding to the second pixel unit is smaller than that of the opening area corresponding to the third pixel unit, and the area of the opening area corresponding to the second pixel unit is smaller than that of the opening area corresponding to the first pixel unit;
the second pixel unit is configured with the compensation capacitor.
8. The display substrate according to claim 6, wherein an area of an opening region corresponding to a pixel cell provided with the compensation capacitor is less than 1500 μm 2 。
9. The display substrate according to claim 1, wherein a capacitance value of the storage capacitor is 100 to 300fF.
10. The display substrate according to any one of claims 1 to 9, further comprising a plurality of data lines extending in a first direction and a plurality of gate lines extending in a second direction, the plurality of data lines and the plurality of gate lines intersecting to define a plurality of the pixel units;
the first electrode of the driving transistor is connected with a second working voltage end, the second electrode of the driving transistor is connected with the first electrode of the light-emitting element, and the second electrode of the light-emitting element is connected with a third working voltage end;
the pixel driving circuit further includes: and the control electrode of the data writing transistor is connected with the grid line, the first electrode of the data writing transistor is connected with the data line, and the second electrode of the data writing transistor is connected with the first end of the storage capacitor.
11. The display substrate according to claim 10, wherein a capacitance value of the storage capacitor satisfies the following formula:
Figure FDA0004159176210000031
wherein I is off And f is the refresh frequency of the display substrate, and DeltaV is the maximum withstand voltage value of the storage capacitor.
12. The display substrate according to claim 10, wherein at least part of the pixel units are provided with a compensation capacitor, a first end of the compensation capacitor is connected with the first electrode of the light emitting element, and a second end of the compensation capacitor is connected with a first working voltage end;
the first working voltage end and the second working voltage end are the same signal end;
or the first working voltage end and the third working voltage end are the same signal end.
13. The display substrate according to claim 10, wherein the pixel driving circuit further comprises at least one of a first reset transistor, a second reset transistor, and a light emission control transistor;
the control electrode of the first reset transistor is connected with a first control signal line, the first electrode of the first reset transistor is connected with a first reset voltage end, and the second electrode of the first reset transistor is connected with the first end of the storage capacitor;
the control electrode of the second reset transistor is connected with a second control signal line, the first electrode of the second reset transistor is connected with the second electrode of the driving transistor, and the second electrode of the second reset transistor is connected with a second reset voltage end;
the control electrode of the light-emitting control transistor is connected with a light-emitting control signal line, the first electrode of the light-emitting control transistor is connected with the second working voltage end, and the second electrode of the light-emitting control transistor is connected with the first electrode of the driving transistor.
14. A display panel, comprising: a display substrate according to any one of claims 1 to 13.
15. A display device, comprising: the display panel as claimed in claim 14.
16. The display device according to claim 15, further comprising a source driver;
the source driver is configured to generate a data voltage for supply to each of the pixel cells based on the same gamma voltage.
CN202310343337.1A 2023-03-31 2023-03-31 Display substrate, display panel and display device Pending CN116364005A (en)

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