CN116338292A

CN116338292A - Current detection circuit and electronic device

Info

Publication number: CN116338292A
Application number: CN202310331266.3A
Authority: CN
Inventors: 刘万启; 刘元财; 张泫舜; 陈浩宇
Original assignee: Ecoflow Technology Ltd
Current assignee: Ecoflow Technology Ltd
Priority date: 2023-03-24
Filing date: 2023-03-24
Publication date: 2023-06-27

Abstract

The application provides a current detection circuit and electronic equipment, current detection circuit are used for carrying out the current detection to target circuit, and target circuit includes first MOS pipe, and first MOS pipe is used for controlling target circuit's break-make. The current detection circuit includes: the first differential input end of the differential sampling module is used for being connected with the first end of the first MOS tube; the second differential input end of the differential sampling module is used for being connected with the second end of the first MOS tube, and the differential sampling module is used for collecting voltage signals at two ends of the first MOS tube and outputting voltage sampling signals. The comparison module is connected with the differential sampling module and is used for receiving the voltage sampling signal, generating an overcurrent protection signal when the voltage value of the voltage sampling signal exceeds a preset threshold range, outputting the overcurrent protection signal to the control end of the first MOS tube, and turning off the first MOS tube. The current detection circuit can reduce the cost of current detection and the occupied area of the PCB.

Description

Current detection circuit and electronic device

Technical Field

The application relates to the technical field of current detection, in particular to a current detection circuit and electronic equipment.

Background

In the related art, in the case of current detection of a target circuit, the current detection is realized by a method of adding a sampling resistor or a chip special for collecting current to the target circuit.

However, adding a sampling resistor or a chip special for collecting current to the target circuit increases the cost of the target circuit, and the occupied area of the target circuit PCB (Printed Circuit Board ) is large, which severely limits the use scene of the target circuit.

Disclosure of Invention

In view of this, the present application provides a current detection circuit and electronic equipment, aims at solving the problem that the current detection circuit is costly and the area occupied on the PCB board is big.

The first aspect of the present application provides a current detection circuit for detecting a current of a target circuit, the target circuit including a first MOS transistor. The first MOS tube is used for controlling the on-off of the target circuit. The current detection circuit includes: and the differential sampling module and the comparison module. The first differential input end of the differential sampling module is used for being connected with the first end of the first MOS tube. The second differential input end of the differential sampling module is used for being connected with the second end of the first MOS tube, and the differential sampling module is used for collecting voltage signals at two ends of the first MOS tube and outputting voltage sampling signals. The comparison module is connected with the differential sampling module and is used for receiving the voltage sampling signal, generating an overcurrent protection signal and outputting the overcurrent protection signal to the control end of the first MOS tube when the voltage value of the voltage sampling signal exceeds the preset threshold range so as to turn off the first MOS tube.

In the above embodiment, the current detection circuit collects voltage sampling signals at the first end and the second end of the first MOS transistor existing in the target circuit by setting the differential sampling circuit, so that current can be sampled on the basis of not adding additional electronic elements, and the voltage value of the voltage sampling signal is compared with a preset threshold range by setting the comparison module, and when the voltage value of the voltage sampling signal exceeds the preset threshold range, the comparison module can generate an overcurrent protection signal and transmit the overcurrent protection signal to the control end of the first MOS transistor, so that the control end turns off the first MOS transistor. In the detection process, the first MOS tube of the target circuit is used as a sampling resistor for collecting voltage sampling signals, and the current detection circuit uses the existing first MOS tube of the target circuit as the sampling resistor, so that no additional sampling resistor or a chip special for collecting current is needed, the cost for detecting the current of the target circuit is reduced, and the occupied area of the PCB is reduced.

In one embodiment, the differential sampling module includes: an operational amplifier. The positive electrode input end of the operational amplifier is connected with the first end of the first MOS tube, the negative electrode input end of the operational amplifier is connected with the second end of the first MOS tube, the positive electrode input end of the operational amplifier is also connected with the bias power supply, and the output end of the operational amplifier is connected with the comparison module.

In one embodiment, the differential sampling module further includes: a first voltage dividing resistor and a second voltage dividing resistor. The first end of the first voltage dividing resistor is connected with the first end of the first MOS tube, and the second end of the first voltage dividing resistor is connected with the positive input end of the operational amplifier. The first end of the second voltage dividing resistor is connected with the second end of the first MOS tube, and the second end of the second voltage dividing resistor is connected with the negative electrode input end of the operational amplifier.

In one embodiment, the differential sampling module further includes: a filter capacitor. The first end of the filter capacitor is connected with the positive input end of the operational amplifier, and the second end of the filter capacitor is connected with the negative input end of the operational amplifier.

In one embodiment, the differential sampling module further includes: TVS diode. The first end of the TVS diode is connected with the positive input end of the operational amplifier, and the second end of the TVS diode is connected with the negative input end of the operational amplifier.

In one embodiment, the current detection circuit further includes: and a control module. The control module is used for being connected with the output end of the differential sampling module so as to receive a voltage sampling signal, determining current flowing through the first MOS tube according to the voltage sampling signal, and generating a current prompt instruction when the current flowing through the first MOS tube exceeds a preset current range, wherein the current prompt instruction is used for indicating to turn off the first MOS tube.

In one embodiment, the comparison module includes: the first comparator, the second comparator and the third resistor. The negative electrode input end of the first comparator and the positive electrode input end of the second comparator are commonly connected with the output end of the differential sampling module, and the positive electrode input end of the first comparator is connected with a first reference power supply. The negative input end of the second comparator is connected with a second reference power supply. The output ends of the first comparator and the second comparator are commonly connected with the first end of the third resistor, and the second end of the third resistor is connected with a third reference power supply.

The second aspect of the application provides an electronic device, which comprises a first MOS tube and a current detection circuit.

In one embodiment, the electronic device further comprises a DC/DC conversion circuit. The DC/DC conversion circuit includes a bridge arm unit. The bridge arm unit comprises a first MOS tube and a second MOS tube. The first end of the second MOS tube is used for being connected with a power supply. The second end of the second MOS tube is connected with the first end of the first MOS tube. The second end of the first MOS tube is grounded.

In one embodiment, the electronic device further includes a motor and a driving circuit. The driving circuit is used for driving the motor to work. The driving circuit comprises a first MOS tube.

Drawings

Fig. 1 is a schematic block diagram of a current detection circuit according to an embodiment of the present application.

Fig. 2 is a schematic block diagram of another current detection circuit according to an embodiment of the present application.

Fig. 3 is a schematic circuit diagram of a current detection circuit according to an embodiment of the present application.

Fig. 4 is a schematic circuit diagram of another current detection circuit according to an embodiment of the present application.

Fig. 5 is a schematic circuit diagram of a first target circuit according to an embodiment of the present application.

Fig. 6 is a schematic circuit diagram of a second target circuit according to an embodiment of the present application.

Fig. 7 is a schematic circuit diagram of a third target circuit according to an embodiment of the present application.

Fig. 8 is a schematic circuit diagram of a fourth target circuit according to an embodiment of the present application.

Fig. 9 is a schematic circuit diagram of a fifth target circuit according to an embodiment of the present application.

Detailed Description

It should be noted that the terms "first" and "second" in the specification, claims and drawings of this application are used for distinguishing between similar objects and not for describing a particular sequential or chronological order.

It should be further noted that the method disclosed in the embodiments of the present application or the method shown in the flowchart, including one or more steps for implementing the method, may be performed in an order that the steps may be interchanged with one another, and some steps may be deleted without departing from the scope of the claims.

Some embodiments will be described below with reference to the accompanying drawings. The following embodiments and features of the embodiments may be combined with each other without conflict.

The current detection is widely applied to various circuits, particularly in a control type target circuit, and the current of the target circuit is acquired and analyzed to obtain the current running state of the target circuit, so that a control end of the target circuit can correspondingly control the target circuit in response to the running state.

In the related art, the current detection function of the target circuit is realized by additionally adding a sampling resistor to the target circuit or adding a chip special for collecting current to the target circuit. However, adding additional sampling resistors or a chip dedicated to current collection to the target circuit increases the manufacturing cost of the target circuit, and also increases the occupied area of the PCB board of the target circuit, thereby limiting the use scenarios of the target circuit.

The embodiment of the application provides a current detection circuit which is used for reducing the cost of a target circuit and the occupied area of a target circuit PCB (printed circuit board) while realizing the current detection of the target circuit.

Fig. 1 is a schematic block diagram of a current detection circuit according to an embodiment of the present application, and specifically, the current detection circuit 100 includes: a differential sampling module 110 and a comparison module 120. The current detection circuit 100 is connected to a target circuit 101, and is used for detecting a current of the target circuit 101, wherein the target circuit 101 includes a first MOS transistor Q1 (MOS, metal-Oxide-Semiconductor Field-Effect Transistor), the first MOS transistor Q1 is used for controlling on/off of the target circuit 101, or the first MOS transistor Q1 is used for controlling on/off of a specific section of circuit in the target circuit 101.

In this embodiment of the present application, the first MOS transistor Q1 includes a first end, a second end, and a control end. The differential sampling module 110 includes a first differential input, a second differential input, and an output. The first differential input end of the differential sampling module 110 is connected to the first end of the first MOS transistor Q1, and the second differential input end of the differential sampling module 110 is connected to the second end of the first MOS transistor Q1. The first MOS tube Q1 can be an N-type MOS tube, the first end of the first MOS tube Q1 corresponds to the drain electrode of the N-type MOS tube, the second end of the first MOS tube Q1 corresponds to the source electrode of the N-type MOS tube, and the control end of the first MOS tube Q1 corresponds to the grid electrode of the N-type MOS tube.

The differential sampling module 110 is used for collecting voltage signals at two ends of the first MOS transistor Q1 and outputting voltage sampling signals. That is, the differential sampling module 110 may collect voltage signals of the first end and the second end of the first MOS transistor Q1 through the first differential input end and the second differential input end, generate a voltage sampling signal according to the voltage signals, and then output the signal from the output end.

In this embodiment, the comparing module 120 includes an input end and an output end, the input end of the comparing module 120 is connected to the output end of the differential sampling module 110, and the comparing module 120 is configured to receive the voltage sampling signal output by the differential sampling module 110. After receiving the voltage sampling signal, the comparison module 120 generates an overcurrent protection signal when the voltage value of the voltage sampling signal exceeds a preset threshold range, and outputs the overcurrent protection signal to the control end of the first MOS transistor Q1 through the output end so as to turn off the first MOS transistor Q1.

As can be seen from the connection manner of the first MOS transistor Q1, the differential sampling module 110 and the comparison module 120, the internal resistance of the first MOS transistor Q1 is used as the sampling resistor in the current detection circuit 100, so that the current of the target circuit 101 can be sampled without adding any additional electronic components. The differential sampling module 110 is used for collecting voltage sampling signals at two ends of the first MOS tube Q1, and the comparison module 120 is used for generating an overcurrent protection signal when the voltage sampling signals exceed a preset threshold range and transmitting the overcurrent protection signal to the control end of the first MOS to control the first MOS to be turned off so as to protect the target circuit 101. The current detection circuit 100 uses the first MOS transistor Q1 as a sampling resistor, so that there is no need to additionally add a sampling resistor or a chip dedicated to current collection on the target circuit 101, thereby reducing the cost of current detection on the target circuit 101 and reducing the occupied area of the PCB board of the target circuit 101.

On the other hand, the accuracy of current sampling can also be influenced by setting a sampling resistor when current sampling is carried out, sampling errors can be reduced by directly sampling at two ends of the first MOS tube Q1, and sampling accuracy can be improved by replacing the sampling resistor with the internal resistance of the first MOS tube Q1.

Referring to fig. 2, fig. 2 is a schematic block diagram of a second current detection circuit according to an embodiment of the present application, and specifically, the current detection circuit 100 shown in fig. 2 includes a differential sampling module 110 and a comparison module 120. The current detection circuit 100 shown in fig. 2 differs from the current detection circuit 100 shown in fig. 1 in that the current detection circuit 100 shown in fig. 2 further includes: a control module 130.

In this embodiment of the present application, the control module 130 includes an input end, the input end of the control module 130 is connected to the output end of the differential sampling module 110, and the control module 130 is configured to receive a voltage sampling signal output by the differential sampling module 110, determine, according to the voltage sampling signal, a current flowing through the first MOS transistor Q1, and generate, when the current flowing through the first MOS transistor Q1 exceeds a preset current range, a current prompt instruction, where the current prompt instruction is configured to instruct to turn off the first MOS transistor Q1. Wherein the control module 130 includes, but is not limited to, a microcontroller.

In some embodiments, the control module 130 further includes an output end, the output end of the control module 130 may be connected to the control end of the first MOS transistor Q1, and the control module 130 is further configured to output a control signal to the first MOS transistor Q1, where the control signal is configured to control the first MOS transistor Q1 to be turned on or off. For example, when the current flowing through the first MOS transistor Q1 exceeds the preset current range, it indicates that the target circuit 101 may have a short circuit or an open circuit, and the control module 130 may output a current prompt instruction, where the current prompt instruction is used to instruct the target circuit 101 to turn off the first MOS transistor Q1. For example, the target circuit 101 may turn off the first MOS transistor Q1 after receiving the current prompt instruction. Or, after receiving the voltage sampling signal, the control module 130 determines that the voltage value of the voltage sampling signal is within the preset current range, and does not output a current prompt instruction, so that the first MOS transistor Q1 is kept on, and outputs the current prompt instruction to the target circuit 101 when the voltage value of the voltage sampling signal is determined to exceed the preset current range, so that the target circuit 101 turns off the first MOS transistor Q1.

In some embodiments, the input end of the control module 130 is further connected to the output end of the comparison module 120, and the control module 130 is further configured to receive an over-current protection signal, and output a corresponding control signal to the control end of the first MOS transistor Q1 after receiving the over-current protection signal, so as to control the first MOS transistor Q1 to be turned off, thereby protecting the target circuit 101 from being damaged due to over-current.

Referring to fig. 3, fig. 3 is a schematic circuit diagram of a current detection circuit according to an embodiment of the present application, and specifically, the current detection circuit 100 includes a differential sampling module 110 and a comparison module 120.

In this embodiment, the differential sampling module 110 includes an operational amplifier OPA1, a first voltage dividing resistor R1, a second voltage dividing resistor R2, a filter capacitor C1, and a TVS diode D1. The comparison module 120 includes a first comparator COM1, a second comparator COM2, and a third resistor R3.

The operational amplifier OPA1 includes a positive input terminal, a negative input terminal, and an output terminal. Wherein the positive input end INA+ of the operational amplifier OPA1 is connected with the first end of the first MOS transistor Q1, and the negative input end INA-of the operational amplifier OPA1 is connected with the first endA second end of the MOS transistor Q1. The positive input terminal INA+ of the operational amplifier OPA1 is also connected with the bias power supply V _Bias And (5) connection. The output OUTA of the operational amplifier OPA1 is connected to the comparison module 120. The bias power supply provides bias voltage V for the positive electrode input end INA+ of the operational amplifier OPA1 _Bias . The operational amplifier OPA1 further comprises a ground GND for grounding and a supply input for connecting to a supply power source for receiving a supply voltage VCC.

The first voltage dividing resistor R1 includes a first end and a second end. The first end of the first voltage dividing resistor R1 is connected with the first end of the first MOS tube Q1, and the second end of the first voltage dividing resistor R1 is connected with the positive electrode input end INA+ of the operational amplifier OPA 1.

The second shunt resistor R2 includes a first end and a second end. The first end of the second voltage dividing resistor R2 is connected with the second end of the first MOS tube Q1, and the second end of the second voltage dividing resistor R2 is connected with the negative electrode input end INA-of the operational amplifier OPA 1.

That is, the positive input terminal ina+ of the operational amplifier OPA1 is connected to the first end of the first MOS transistor Q1 through the first voltage dividing resistor R1, and the negative input terminal INA-of the operational amplifier OPA1 is connected to the second end of the first MOS transistor Q1 through the second voltage dividing resistor R2.

The filter capacitor C1 includes a first terminal and a second terminal. The first end of the filter capacitor C1 is connected with the positive electrode input end INA+ of the operational amplifier OPA1, the second end of the filter capacitor C1 is connected with the negative electrode input end INA-of the operational amplifier OPA1, and the filter capacitor C1 is used for filtering abrupt voltage parts between the first end and the second end when the first MOS tube Q1 is turned on or turned off, so that the collected voltage sampling signals are smoother, and the sampling precision is further improved.

The TVS diode D1 (Transient Voltage Suppressor, transient suppression diode) includes a first terminal and a second terminal. The first end of the TVS diode D1 is connected with the positive electrode input end INA+ of the operational amplifier OPA1, and the second end of the TVS diode D1 is connected with the negative electrode input end INA-of the operational amplifier OPA 1.

In one embodiment, the TVS diode D1 may be unidirectional or bidirectional, and when the TVS diode D1 is unidirectional, then the anode of the TVS diode D1 is connected to the positive input terminal ina+ of the operational amplifier OPA1 and the cathode of the TVS diode D1 is connected to the negative input terminal INA-of the operational amplifier OPA 1.

In one embodiment, the first comparator COM1 includes a positive input terminal ina+, a negative input terminal INA-and an output terminal. The second comparator COM2 comprises a positive input terminal ina+, a negative input terminal INA-and an output terminal. The negative input terminal INA of the first comparator COM1 and the positive input terminal ina+ of the second comparator COM2 are commonly connected to the output terminal OUTA of the differential sampling module 110, i.e. commonly connected to the output terminal OUTA of the operational amplifier OPA1 in the differential sampling module 110. The positive input terminal INA+ of the first comparator COM1 is connected to a first reference power supply, and the negative input terminal INA-of the second comparator COM2 is connected to a second reference power supply. The output terminals of the first comparator COM1 and the second comparator COM2 are commonly connected to the first terminal of the third resistor R3. The second end of the third resistor R3 is connected to a third reference power supply for providing the supply voltage VCC. The first comparator COM1 further includes a ground GND and a power supply input, where the ground GND is configured to be grounded, and the power supply input is configured to be connected to a power supply to receive a power supply voltage VCC. The second comparator COM2 also includes a ground GND for grounding and a supply input for connecting to a supply source for receiving a supply voltage VCC.

Wherein the first reference power supply is used for providing a first reference voltage V _MAX The second reference power supply is used for providing a second reference voltage V _OCP Wherein the first reference voltage V _MAX Is greater than the second reference voltage V _OCP The preset threshold range may be: greater than or equal to the first reference voltage V _OCP Less than or equal to the second reference voltage V _MAX . The third reference power source includes, but is not limited to, a power supply of the target circuit 101, or a power supply for driving the first MOS transistor Q1.

In this embodiment, when the first MOS transistor Q1 is turned on, the current of the target circuit 101 flows through the first end and the second end of the first MOS transistor Q1, so as to satisfy ohm's law: v (V) _DS ＝I _mos ×R _mos In V _DS Is the voltage of the first end and the second end of the first MOS tube Q1，I _mos For the current flowing through the target circuit 101 of the first MOS transistor Q1, R _mos The internal resistance of the first MOS transistor Q1 is a constant value. From this, the voltage sampling signals collected and output by the operational amplifier OPA1 in the differential sampling module 110 to the voltage signals at the first end and the second end of the first MOS transistor Q1 also satisfy the following conditions: current_get=v _Bias +I _mos ×R _mos ×O _pa Wherein current_get is the voltage value of the voltage sampling signal, V _Bias For the above bias voltage, O _pa Is the amplification factor of the operational amplifier OPA 1. Namely, after the current_get value is obtained by collecting the voltage sampling signal, the internal resistance R of the first MOS transistor Q1 is known _mos Bias voltage V _Bias Magnification O _pa The current I of the target circuit 101 can be obtained by calculation _mos 。

The resistance values of the first voltage dividing resistor R1 and the second voltage dividing resistor R2 may be far greater than the internal resistance value of the first MOS transistor Q1, and the voltages of the positive input terminal ina+ and the negative input terminal INA-of the operational amplifier OPA1 may be limited within a preset range through the first voltage dividing resistor R1, the second voltage dividing resistor R2 and the TVS diode D1. For example, the first voltage dividing resistor R1, the second voltage dividing resistor R2, and the TVS diode D1 may be used to limit the voltages of the positive input terminal ina+ and the negative input terminal INA-of the operational amplifier OPA1 to between 0 and 3.3V.

In this embodiment, with continued reference to fig. 3, after the comparison module 120 receives the voltage sampling signal output by the differential sampling module 110, when the first MOS transistor Q1 is turned on, the current and the voltage flowing through the first MOS transistor Q1 are approximately in a linear relationship. When the second MOS transistor is turned on, the voltage sampling signal is almost equal to the full voltage output of the differential sampling module 110, so that it cannot be determined whether the target circuit 101 is over-current or short-circuited according to a preset threshold, and therefore it is necessary to use a window comparator to determine whether the voltage of the voltage sampling signal exceeds a preset threshold range formed by the first reference voltage and the second reference voltage through the first comparator COM1 and the second comparator COM2 connected in parallel, and if the voltage exceeds the preset threshold range, an over-current protection signal is output at the output ends of the first comparator COM1 and the second comparator COM 2. The over-current protection signal may be a level signal. For example, when the voltage sampling signal exceeds the preset threshold range, the output terminals of the first comparator COM1 and the second comparator COM2 output the low-level signal as the over-current protection signal, and when the voltage sampling signal does not exceed the preset threshold range, the output terminals of the first comparator COM1 and the second comparator COM2 output the high-level signal.

In one embodiment, the preset threshold range is: greater than or equal to the first reference voltage V _OCP Less than or equal to the second reference voltage V _MAX . For example, when the voltage value of the voltage sampling signal is smaller than the first reference voltage V _OCP When the output terminals of the first comparator COM1 output a high level signal and the output terminal of the second comparator COM2 outputs a low level signal, the output terminals of the first comparator COM1 and the second comparator COM2 are commonly connected, and then the output terminals of the first comparator COM1 and the second comparator COM2 output a low level signal. When the voltage value of the voltage sampling signal is greater than the second reference voltage V _MAX When the output end of the first comparator COM1 outputs a low level signal and the output end of the second comparator COM2 outputs a high level signal, the output ends of the first comparator COM1 and the second comparator COM2 still output low level signals. Therefore, it can be understood that when the voltage sampling signal exceeds the preset threshold range, a low-level signal is output, wherein the low-level signal can drive the first MOS transistor Q1 to be disconnected, so that overcurrent protection is realized. When the voltage value of the voltage sampling signal is greater than or equal to the first reference voltage V _OCP Less than or equal to the second reference voltage V _MAX When the voltage value of the voltage sampling signal does not exceed the preset threshold range, the output ends of the first comparator COM1 and the second comparator COM2 both output high-level signals at this time, so that the first MOS transistor Q1 continues to be kept on.

Wherein the first reference voltage V _OCP Can be based on the required overcurrent protection threshold I _OCP The internal resistance of the first MOS transistor Q1 and the bias voltage V _Bias And the amplification factor O of the operational amplifier OPA1 _pa To be determined, e.g. V _OCP ＝V _Bias +I _OCP ×R _mos ×O _pa . And a second reference voltage V _MAX The value of (2) may be the power supply voltage value of the first comparator COM1 and the first comparator COM1 minus a preset voltage value.

In this embodiment of the present application, since the internal resistance of the first MOS transistor Q1 is used as the sampling resistor in the current detection circuit 100, there is no need to additionally add a sampling resistor or a chip dedicated to current collection on the target circuit 101, thereby reducing the cost of implementing the current detection function of the target circuit 101 and reducing the occupied area of the PCB board of the target circuit 101.

The current detection circuit 100 is configured to detect a target circuit 101 that controls the first MOS transistor Q1 through PWM signal (PWM, pulse width modulation, pulse width modulation) complementary output, that is, the target circuit 101 further includes a second MOS transistor Q2, a first end of the second MOS transistor Q2 is configured to be connected to a power supply VIN, the power supply VIN is configured to provide a power supply voltage, a second end of the second MOS transistor Q2 is connected to the first end of the first MOS transistor Q1, and a second end of the first MOS transistor Q1 is connected to a ground end GND of the target circuit 101. That is, the target circuit 101 includes, but is not limited to, a BUCK circuit (BUCK conversion circuit), a BOOST circuit (BOOST chopper circuit), a motor drive circuit, an inverter circuit, a rectifier circuit, and the like. The first MOS tube Q1 and the second MOS tube Q2 can be N-type MOS tubes, the first ends of the first MOS tube Q1 and the second MOS tube Q2 correspond to the drain electrodes of the N-type MOS tubes, the second ends of the first MOS tube Q1 and the second MOS tube Q2 correspond to the source electrodes of the N-type MOS tubes, and the control ends of the first MOS tube Q1 and the second MOS tube Q2 correspond to the grid electrodes of the N-type MOS tubes.

Referring to fig. 4, fig. 4 is a schematic circuit diagram of a current detection circuit according to an embodiment of the present application, and specifically, the current detection circuit 100 includes a differential sampling module 110 and a comparison module 120. The difference between the current detection circuit 100 shown in fig. 4 and the current detection circuit 100 shown in fig. 3 is that the comparison module 120 includes a third comparator COM3 and a fourth resistor R4.

In this embodiment, the third comparator COM3 includes a positive input terminal ina+, a negative input terminal INA-and an output terminal OUTA. The positive input terminal ina+ of the third comparator COM3 is connected to the output terminal OUTA of the operational amplifier OPA1 of the differential sampling module 110, and the positive input terminal ina+ of the third comparator COM3 is configured to receive the voltage sampling signal. The negative input terminal INA-of the third comparator COM3 is connected to a fourth reference power supply. The output terminal of the third comparator COM3 is connected to the fifth reference power supply through a fourth resistor R4.

The first MOS transistor Q1 in the target circuit 101 of the present embodiment is driven by receiving an I/O (input/output) level signal, that is, the target circuit 101 includes an input/output switch.

The fourth reference power supply is used for providing a fourth reference voltage V _OCP2 The fifth reference voltage is used for providing a fifth reference voltage VCC, and the third comparator COM3 determines that the voltage value of the voltage sampling signal is greater than the fourth reference voltage V _OCP2 Then, an overcurrent protection signal is output to the control end of the first MOS transistor Q1 to turn off the first MOS transistor Q1. The overcurrent protection threshold value which needs to be set is I _OCP At the time, the fourth reference voltage V _OCP2 ＝V _Bias +I _OCP ×R _mos ×O _pa . The fifth reference power supply may be an I/O interface for driving the first MOS transistor Q1, that is, an input voltage of the I/O interface is used as a pull-up voltage of the third comparator COM 3.

In this embodiment, when the I/O interface outputs a high level to the first MOS transistor Q1, the first MOS transistor Q1 is turned on, and the voltage value of the voltage sampling signal is smaller than the fourth reference voltage V when the target circuit 101 is normal _OCP2 The third comparator COM3 outputs a low level. When the target circuit 101 is over-current, the current flowing through the first MOS transistor Q1 increases, and when the voltage value of the voltage sampling signal is greater than the fourth reference voltage V _OCP2 The third comparator COM3 outputs a high level, i.e. an over-current protection signal.

Because the output end of the third comparator COM3 is an open drain output, a pull-up voltage is needed when outputting a high level, and because the pull-up voltage is a conducting voltage output by the I/O interface of the first MOS transistor Q1, the third comparator COM3 can output a low level or an overcurrent protection signal only when the first MOS transistor Q1 is conducted, and overcurrent detection cannot be performed when the first MOS transistor Q1 is not conducted, thereby further improving the reliability of overcurrent detection and overcurrent protection.

Referring to fig. 5, fig. 5 is a schematic circuit diagram of a first target circuit according to an embodiment of the present application. Wherein the target circuit 101 is a BUCK circuit, comprising: the capacitor C2, the capacitor C3, the inductor L1, the first MOS transistor Q1 and the second MOS transistor Q2.

The first end of the capacitor C2 is configured to receive the supply voltage VIN, and the second end of the capacitor C2 is connected to the input ground gnd_in. The first end of the second MOS tube Q2 is connected with the first end of the capacitor C2, and the second end of the second MOS tube Q2 is connected with the first end of the first MOS tube Q1. The second end of the first MOS tube Q1 is connected with the second end of the capacitor C2. The first end of inductance L1 connects the first end of first MOS pipe Q1, and the output VOUT of BUCK circuit is connected to the second end of inductance L1. The first end of the capacitor C2 is connected with the second end of the inductor L1, the second end of the capacitor C2 is connected with the second end of the first MOS tube Q1, and the second end of the capacitor C2 is also connected with the output grounding end GND_OUT. In this embodiment, the current detection circuit 100 provided in this embodiment of the present application is connected to the first end and the second end of the first MOS transistor Q1 in the target circuit 101, and the internal resistance of the first MOS transistor Q1 is used as the sampling resistor in the current detection circuit 100, so that the current of the target circuit 101 can be sampled without adding additional electronic components. The differential sampling module 110 is used for collecting voltage sampling signals at two ends of the first MOS tube Q1, and the comparison module 120 is used for generating an overcurrent protection signal when the voltage sampling signals exceed a preset threshold range and transmitting the overcurrent protection signal to the control end of the first MOS to control the first MOS to be turned off so as to protect the target circuit 101. The current detection circuit 100 uses the first MOS transistor Q1 as a sampling resistor, so that there is no need to additionally add a sampling resistor or a chip dedicated to current collection on the target circuit 101, thereby reducing the cost of current detection on the target circuit 101 and reducing the occupied area of the PCB board of the target circuit 101.

Referring to fig. 6, fig. 6 is a schematic circuit diagram of a second target circuit according to an embodiment of the present application. Wherein the target circuit 101 is a BOOST circuit, comprising: capacitor C4, capacitor C5, inductance L2, first MOS pipe Q1 and second MOS pipe Q2.

The first end of the capacitor C4 is configured to receive the supply voltage VIN, and the second end of the capacitor C4 is connected to the input ground gnd_in. The first end of inductance L2 connects the first end of electric capacity C4, and the second end of inductance L2 connects the second end of second MOS pipe Q2. The first end of the second MOS transistor Q2 is connected with the output end VOUT of the BOOST circuit. The first end of the first MOS tube Q1 is connected with the second end of the second MOS tube Q2, and the second end of the first MOS tube Q1 is connected with the second end of the capacitor C4. The first end of the capacitor C5 is connected with the first end of the second MOS tube Q2, the second end of the capacitor C5 is connected with the second end of the first MOS tube Q1, and the second end of the capacitor C5 is also connected with the output grounding end GND_OUT.

Referring to fig. 7, fig. 7 is a schematic circuit diagram of a third target circuit according to an embodiment of the present application. The target circuit 101 is a motor driving circuit, and includes a capacitor C6, a first arm unit 1011, a second arm unit 1012, and a third arm unit 1013.

The first end of the capacitor C6 is configured to receive the supply voltage VIN, and the second end of the capacitor C6 is connected to the ground GND. A first end of the first bridge arm unit 1011 is connected to a first end of the capacitor C6, and a second end of the first bridge arm unit 1011 is connected to a second end of the capacitor C6. A first end of second leg unit 1012 is connected to a first end of capacitor C6, and a second end of second leg unit 1012 is connected to a second end of capacitor C6. The first end of the third arm unit 1013 is connected to the first end of the capacitor C6, and the second end of the third arm unit 1013 is connected to the second end of the capacitor C6.

The first bridge arm unit 1011 includes a first MOS transistor Q1 and a second MOS transistor Q2. The first end of the second MOS tube Q2 is connected with the first end of the first bridge arm unit 1011, and the second end of the second MOS tube Q2 is connected with the first end of the first MOS tube Q1. A first end of the first MOS transistor Q1 is connected to the first output end U of the first bridge arm unit 1011, and a second end of the first MOS transistor Q1 is connected to the second end of the first bridge arm unit 1011.

The second bridge arm unit 1012 includes a first MOS transistor Q1 and a second MOS transistor Q2. The first end of the second MOS tube Q2 is connected with the first end of the second bridge arm unit 1012, and the second end of the second MOS tube Q2 is connected with the first end of the first MOS tube Q1. A first end of the first MOS transistor Q1 is connected to the second output end V of the second bridge arm unit 1012, and a second end of the first MOS transistor Q1 is connected to the second end of the second bridge arm unit 1012.

The third bridge arm unit 1013 includes a first MOS transistor Q1 and a second MOS transistor Q2. The first end of the second MOS transistor Q2 is connected to the first end of the third bridge arm unit 1013, and the second end of the second MOS transistor Q2 is connected to the first end of the first MOS transistor Q1. The first end of the first MOS transistor Q1 is connected to the third output end W of the third bridge arm unit 1013, and the second end of the first MOS transistor Q1 is connected to the second end of the third bridge arm unit 1013.

The target circuit 101 shown in fig. 5, 6 and 7 is adapted to the current detection circuit shown in fig. 3, and the current detection scheme of the target circuit 101 shown in fig. 5, 6 and 7 may refer to the current detection circuit shown in fig. 3 and the related description in the specification, which are not repeated herein.

In this embodiment, the current detection circuit 100 provided in this embodiment of the present application is connected to the first end and the second end of the first MOS transistor Q1 of the target circuit 101 shown in fig. 5, 6 and 7, and the internal resistance of the first MOS transistor Q1 is used as the sampling resistor in the current detection circuit 100, so that the current of the target circuit 101 can be sampled without adding any additional electronic component. The differential sampling module 110 is used for collecting voltage sampling signals at two ends of the first MOS tube Q1, and the comparison module 120 is used for generating an overcurrent protection signal when the voltage sampling signals exceed a preset threshold range and transmitting the overcurrent protection signal to the control end of the first MOS to control the first MOS to be turned off so as to protect the target circuit 101. The current detection circuit 100 uses the first MOS transistor Q1 as a sampling resistor, so that there is no need to additionally add a sampling resistor or a chip dedicated to current collection on the target circuit 101, thereby reducing the cost of current detection on the target circuit 101 and reducing the occupied area of the PCB board of the target circuit 101.

Referring to fig. 8, fig. 8 is a schematic circuit diagram of a fourth target circuit according to an embodiment of the present application. The target circuit 101 may be a switching circuit in the battery management system, where the switching circuit includes a first MOS transistor Q1.

The first end of the first MOS transistor Q1 is connected to the ground GND, and the second end of the first MOS transistor Q1 is connected to the ground GND.

Referring to fig. 9, fig. 9 is a schematic circuit diagram of a fifth target circuit according to an embodiment of the present application. The target circuit 101 is a charge-discharge switch control circuit, and includes a first MOS transistor Q1 and a second MOS transistor Q2.

The second end of the first MOS tube Q1 is commonly connected with the second end of the second MOS tube, the first end of the first MOS tube Q1 is connected with the grounding end GND, and the first end of the second MOS tube Q2 is connected with the grounding end GND.

The target circuit 101 shown in fig. 8 and fig. 9 is adapted to the current detection circuit shown in fig. 4, and the current detection scheme of the target circuit 101 shown in fig. 8 and fig. 9 may refer to the current detection circuit shown in fig. 4 and the related description in the specification, which are not repeated here.

The application also discloses an electronic device, which comprises the current detection circuit 100 in the above embodiment. Wherein the electronic device further comprises a DC/DC conversion circuit. The DC/DC conversion circuit comprises a bridge arm unit, wherein the bridge arm unit comprises the first MOS tube and the second MOS tube. The first end of the second MOS tube is used for being connected with a power supply, the second end of the second MOS tube is connected with the first end of the first MOS tube, and the second end of the first MOS tube is grounded.

In this embodiment, the current detection circuit is applied to an electronic device, and by using the internal resistance of the first MOS transistor Q1 as the sampling resistor in the current detection circuit 100, the current of the bridge arm unit can be sampled without adding any additional electronic component. Because the current detection circuit 100 uses the first MOS transistor Q1 as the sampling resistor, there is no need to additionally add a sampling resistor or a chip dedicated to current collection on the bridge arm unit, thereby reducing the cost of current detection on the bridge arm unit and reducing the occupied area of the PCB board of the electronic device.

In this embodiment of the present application, the electronic device further includes a motor and a driving circuit, where the driving circuit is configured to drive the motor to work, and the driving circuit includes the first MOS transistor in the foregoing embodiment.

In this embodiment, when current detection is required for the driving circuit, the current detection circuit is adopted to sample the current of the driving circuit without adding other electronic components. Because the current detection circuit 100 uses the first MOS transistor Q1 of the driving circuit as the sampling resistor, there is no need to additionally add a sampling resistor or a chip dedicated to current collection on the driving circuit, thereby reducing the cost of current detection on the driving circuit and reducing the occupied area of the PCB board of the electronic device.

It can be appreciated that the beneficial effects that can be achieved by the electronic device provided in the embodiments of the present application may refer to the beneficial effects of the corresponding current detection circuit provided above, and are not described herein again.

The embodiments of the present application have been described in detail above with reference to the accompanying drawings, but the present application is not limited to the above embodiments, and various changes can be made within the knowledge of one of ordinary skill in the art without departing from the spirit of the present application.

Claims

1. The current detection circuit is characterized by being used for detecting current of a target circuit, wherein the target circuit comprises a first MOS tube; the first MOS tube is used for controlling the on-off of the target circuit; the current detection circuit includes: the differential sampling module and the comparison module;

the first differential input end of the differential sampling module is used for being connected with the first end of the first MOS tube; the second differential input end of the differential sampling module is used for being connected with the second end of the first MOS tube, and the differential sampling module is used for collecting voltage signals at two ends of the first MOS tube and outputting voltage sampling signals;

the comparison module is connected with the differential sampling module and is used for receiving the voltage sampling signal, generating an overcurrent protection signal when the voltage value of the voltage sampling signal exceeds a preset threshold range, and outputting the overcurrent protection signal to the control end of the first MOS tube so as to turn off the first MOS tube.

2. The current detection circuit of claim 1, wherein the differential sampling module comprises: an operational amplifier;

the positive electrode input end of the operational amplifier is connected with the first end of the first MOS tube, the negative electrode input end of the operational amplifier is connected with the second end of the first MOS tube, the positive electrode input end of the operational amplifier is also connected with a bias power supply, and the output end of the operational amplifier is connected with the comparison module.

3. The current detection circuit of claim 2, wherein the differential sampling module further comprises: the first voltage dividing resistor and the second voltage dividing resistor;

the first end of the first voltage dividing resistor is connected with the first end of the first MOS tube, and the second end of the first voltage dividing resistor is connected with the positive input end of the operational amplifier; the first end of the second voltage dividing resistor is connected with the second end of the first MOS tube, and the second end of the second voltage dividing resistor is connected with the negative input end of the operational amplifier.

4. The current detection circuit of claim 2, wherein the differential sampling module further comprises: a filter capacitor; the first end of the filter capacitor is connected with the positive electrode input end of the operational amplifier, and the second end of the filter capacitor is connected with the negative electrode input end of the operational amplifier.

5. The current detection circuit of claim 2, wherein the differential sampling module further comprises: TVS diode; the first end of the TVS diode is connected with the positive electrode input end of the operational amplifier, and the second end of the TVS diode is connected with the negative electrode input end of the operational amplifier.

6. The current detection circuit of claim 1, wherein the current detection circuit further comprises: a control module;

the control module is used for being connected with the output end of the differential sampling module so as to receive the voltage sampling signal, determining the current flowing through the first MOS tube according to the output voltage sampling signal, and generating a current prompt instruction when the current flowing through the first MOS tube exceeds a preset current range, wherein the current prompt instruction is used for indicating to turn off the first MOS tube.

7. The current detection circuit according to any one of claims 1 to 6, wherein the comparison module includes: a first comparator, a second comparator, and a third resistor; wherein,,

the negative electrode input end of the first comparator and the positive electrode input end of the second comparator are connected with the output end of the differential sampling module, and the positive electrode input end of the first comparator is connected with a first reference power supply;

the negative electrode input end of the second comparator is connected with a second reference power supply;

the output ends of the first comparator and the second comparator are commonly connected with the first end of the third resistor, and the second end of the third resistor is connected with a third reference power supply.

8. An electronic device comprising a first MOS transistor and the current detection circuit according to any one of claims 1 to 7.

9. The electronic device of claim 8, wherein the electronic device further comprises a DC/DC conversion circuit; the DC/DC conversion circuit comprises a bridge arm unit; the bridge arm unit comprises the first MOS tube and the second MOS tube; the first end of the second MOS tube is used for being connected with a power supply; the second end of the second MOS tube is connected with the first end of the first MOS tube; the second end of the first MOS tube is grounded.

10. The electronic device of claim 8, further comprising a motor and a drive circuit; the driving circuit is used for driving the motor to work; the driving circuit comprises the first MOS tube.