CN116321730A

CN116321730A - Circuit board preparation method and circuit board

Info

Publication number: CN116321730A
Application number: CN202310138359.4A
Authority: CN
Inventors: 刘海龙; 韩雪川; 唐昌胜
Original assignee: Shennan Circuit Co Ltd
Current assignee: Shennan Circuit Co Ltd
Priority date: 2023-02-09
Filing date: 2023-02-09
Publication date: 2023-06-23

Abstract

The application discloses a circuit board preparation method and a circuit board, wherein the preparation method comprises the following steps: acquiring a mother board and at least one daughter board; the mother board comprises a mother bearing board and a first conductive circuit layer arranged on one side surface of the mother bearing board, and each daughter board comprises a daughter bearing board and a second conductive circuit layer arranged on one side surface of the daughter bearing board; the first conductive circuit layer comprises a first conductive circuit, and the second circuit layer comprises a second conductive circuit; pressing the mother board, the insulating medium layer and at least one daughter board together, and removing the mother bearing board of the mother board and the daughter bearing board of the at least one daughter board; part of the insulating dielectric layer is filled between part of the first conductive lines and part of the second conductive lines. This application is when directional bodiness copper layer, through reducing the thickness of the insulating medium layer between first conductive line and the second conductive line, can effectively reduce the thickness of whole plate under the circumstances that does not influence the heat dissipation to compromise and reduce the board thickness and improve radiating demand.

Description

Circuit board preparation method and circuit board

Technical Field

The application relates to the technical field of circuit board processing, in particular to a circuit board preparation method and a circuit board.

Background

With the development of 5G technology, the functions of electronic products are more comprehensive and the volumes of the electronic products are smaller, so that the requirements on (Printed Circuit Board, printed circuit boards) are higher and higher, and the PCB industry is driven to develop towards high density, high integration and multilayering.

In the prior art, a tent process and an MSAP (modified semi-additive process) are generally used to prepare a high density line. Wherein, the Tenting process is used for processing high-density circuits with the plate thickness not smaller than 40 mu m, and the copper thickness of the high-density circuits prepared by the MSAP process is controlled within 35 mu m.

However, the conductive lines formed by the two processes are all on the substrate, and in the scene of having plate thickness limitation and needing high heat dissipation, the plate prepared by the MSAP process cannot effectively dissipate heat due to the limitation of copper thickness; however, if the thickness of copper is reduced to meet the thickness of the plate, heat dissipation is affected, and if the thickness of copper is increased to support heat dissipation, the thickness of the plate exceeds the limit, and the requirements of reducing the thickness of the plate and improving the heat dissipation cannot be met.

Disclosure of Invention

The technical problem that this application mainly solves is to provide circuit board preparation method and circuit board, can solve among the prior art can't take into account the problem that reduces the board thickness and improve the heat dissipation.

In order to solve the technical problems, a technical scheme adopted by the application is to provide a circuit board preparation method, which comprises the following steps: acquiring a mother board and at least one daughter board; the mother board comprises a mother bearing board and a first conductive circuit layer arranged on one side surface of the mother bearing board, and each daughter board comprises a daughter bearing board and a second conductive circuit layer arranged on one side surface of the daughter bearing board; the first conductive circuit layer comprises at least one first conductive circuit, and the second circuit layer comprises at least one second conductive circuit; pressing the mother board, the insulating medium layer and at least one daughter board together, and removing the mother bearing board of the mother board and the daughter bearing board of the at least one daughter board; wherein, the part of the insulating medium layer is filled between part of the first conductive lines in the first conductive line layer and between part of the second conductive lines in the second conductive line layer.

Wherein the at least one sub-board comprises a first sub-board; the step of pressing the mother board, the insulating medium layer and at least one daughter board together, and removing the mother carrier board of the mother board and the daughter carrier board of the at least one daughter board comprises the following steps: pressing the mother board, the first insulating medium layer and the first daughter board together; the first insulating medium layer is partially filled between partial first conductive lines in the first conductive line layer and between partial second conductive lines in the second conductive line layer of the first sub-board; and removing the child bearing plate of the first child plate or removing the child bearing plate of the first child plate and the mother bearing plate of the mother plate.

Wherein the at least one daughter board further comprises a second daughter board; after the step of removing the sub-carrier of the first sub-board, pressing the motherboard, the insulating medium layer, and at least one sub-board together, and removing the motherboard and the sub-carrier of the at least one sub-board, further comprising: pressing the pressing substrate, the second insulating medium layer and the second sub-board together; the laminated substrate is a plate formed by laminating a mother plate, a first insulating medium layer and a first daughter board and removing a daughter carrier of the first daughter board; filling part of the second insulating medium layer between part of the second conductive lines in the second conductive line layer remained in the first sub-board and part of the second conductive lines in the second conductive line layer of the second sub-board; and removing the child bearing plate of the second child plate or removing the child bearing plate of the second child plate and the mother bearing plate of the mother plate.

The step of obtaining the mother board and at least one daughter board comprises the following steps: obtaining a base material; the base material comprises a bearing plate and a conductive layer which are connected through a fixing piece; carrying out surface treatment on the preset position of the conductive layer in the base material to form a conductive circuit layer; pressing adhesive materials and a mother bearing plate of a mother board or a child bearing plate of a child board on the conductive circuit layer of the base material to enable the conductive circuit layer of the base material to be connected with the mother bearing plate of the mother board or the child bearing plate of the child board through the adhesive layer; and removing the bearing plate to obtain the mother board or the daughter board.

Wherein, the step of carrying out surface treatment on the preset position of the conductive layer in the substrate to form a conductive circuit layer comprises the following steps: and carrying out surface treatment on the preset position of the conductive layer by one or more modes of laser ablation, laser cutting, ion cutting and water jet to remove metal at the preset position so as to form the conductive circuit layer.

Wherein the step of obtaining the substrate comprises: obtaining the bearing plate and the conductive material with the same size; the edge positions of the bearing plate and the conductive material are provided with a plurality of corresponding positioning holes; laminating the bearing plate and the conductive material, and respectively embedding the fixing pieces into the plurality of positioning holes so that the fixing pieces are matched with the positioning holes to fix the bearing plate and the conductive material.

Wherein, after the step of removing the sub-carrier of the first sub-board, it comprises: forming at least one metallization hole on the second conductive line layer and the first insulating dielectric layer; and a part of the second conductive circuits in the second conductive circuit layer are electrically connected with a part of the first conductive circuits in the first conductive circuit layer through the metallized holes.

Wherein, the step of forming at least one metallization hole on the second conductive line layer and the first insulating medium layer comprises the following steps: drilling a preset position of the second conductive circuit layer, and drilling through the second conductive circuit layer and the first insulating medium layer to form at least one blind hole; and carrying out hole metallization treatment on the blind holes to obtain at least one metallized hole.

Wherein, carry out hole metallization to the blind hole and carry out the step of hole metallization processing, obtain at least one metallization hole, include: and filling conductive substances into the blind holes to form conductive connecting columns.

In order to solve the technical problems, another technical scheme adopted by the application is to provide a circuit board, and the circuit board is manufactured by the manufacturing method of the circuit board.

The beneficial effects of this application are: compared with the prior art, the circuit board manufacturing method and the circuit board are provided, and the motherboard, the insulating medium layer and at least one daughter board are pressed together, so that part of the insulating medium layer can be filled between part of first conductive circuits in the first conductive circuit layer of the motherboard and part of second conductive circuits in the second conductive circuit layer of the daughter board. And then the mother bearing plate of the mother board and the child bearing plate of at least one child board are removed, so that the circuit board with the double-sided buried wires can be obtained. Because the first conductive circuit layer and the second conductive circuit layer are embedded in the insulating medium layer, when the copper layer is thickened in a directional manner, the thickness of the insulating medium layer between part of the first conductive circuit and part of the second conductive circuit is properly reduced, so that the thickness of the whole plate can be effectively reduced under the condition of not affecting heat dissipation, and the requirements of reducing the plate thickness and improving the heat dissipation are met. Further, since the double-sided buried wiring can be realized at the same time, the preparation of an extremely thin wiring board can also be realized.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic flow chart of an embodiment of a method for manufacturing a circuit board according to the present application;

FIG. 2 is a flowchart of an embodiment of a method for obtaining the motherboard and the daughter board in S11;

fig. 3 is a schematic structural diagram of the carrier plate and the conductive material in S111;

fig. 4 is a schematic structural view of the substrate obtained in S111;

fig. 5 is a schematic structural diagram of the motherboard substrate obtained in S112;

fig. 6 is a schematic structural diagram of the daughter board substrate obtained in S112;

fig. 7 is a schematic structural diagram of the motherboard obtained in S114;

fig. 8 is a schematic structural diagram of the sub-board obtained in S114;

FIG. 9 is a schematic view of an embodiment of a board formed with an insulating dielectric layer;

fig. 10 is a schematic structural view of an embodiment of the double-sided buried wire board obtained in S12.

Detailed Description

The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.

The terminology used in the embodiments of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in this application and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise, the "plurality" generally includes at least two, but does not exclude the case of at least one.

It should be understood that the term "and/or" as used herein is merely one relationship describing the association of the associated objects, meaning that there may be three relationships, e.g., a and/or B, may represent: a exists alone, A and B exist together, and B exists alone. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship.

It should be understood that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other like elements in a process, method, article or apparatus that comprises the element.

In the prior art, a tent process and an MSAP (modified semi-additive process) are generally used to prepare a high density line. Wherein, the Tenting process is used for processing high-density circuits with the plate thickness not smaller than 40 mu m, and the copper thickness of the high-density circuits prepared by the MSAP process is controlled within 35 mu m. However, the conductive lines formed by the two processes are all on the substrate, and in the scene of having plate thickness limitation and needing high heat dissipation, the plate prepared by the MSAP process cannot effectively dissipate heat due to the limitation of copper thickness; however, if the thickness of copper is reduced to meet the thickness of the plate, heat dissipation is affected, and if the thickness of copper is increased to support heat dissipation, the thickness of the plate exceeds the limit, and the requirements of reducing the thickness of the plate and improving the heat dissipation cannot be met.

Based on the above situation, the circuit board manufacturing method and the circuit board can solve the problem that the board thickness cannot be reduced and the heat dissipation cannot be improved in the prior art.

The present application will be described in detail with reference to the drawings and embodiments.

Referring to fig. 1, fig. 1 is a schematic flow chart of an embodiment of a circuit board manufacturing method of the present application. As shown in fig. 1, in the present embodiment, the method includes:

s11: acquiring a mother board and at least one daughter board; the mother board comprises a mother bearing board and a first conductive circuit layer arranged on one side surface of the mother bearing board, and each daughter board comprises a daughter bearing board and a second conductive circuit layer arranged on one side surface of the daughter bearing board; the first conductive circuit layer comprises at least one first conductive circuit, and the second circuit layer comprises at least one second conductive circuit.

In this embodiment, the mother board and the daughter board are both manufactured by a copper layer and a separable carrier.

In this embodiment, the mother carrier plate and the child carrier plate may be one or more of a ceramic substrate, a steel plate, and a resin backing plate, which is not limited in this application.

Specifically, referring to fig. 2, fig. 2 is a flowchart illustrating an embodiment of a method for obtaining the motherboard and the daughter board in S11. In this embodiment, the method includes:

s111: obtaining a base material; the base material comprises a bearing plate and a conductive layer which are connected through a fixing piece.

In this embodiment, the same size of carrier plate and conductive material are obtained. The edge positions of the bearing plate and the conductive material are provided with a plurality of corresponding positioning holes. Laminating the bearing plate and the conductive material, and respectively embedding the fixing pieces into the plurality of positioning holes so that the fixing pieces are matched with the positioning holes to fix the bearing plate and the conductive material.

The bearing plate can be one or more of a ceramic substrate, a steel plate and a resin backing plate, and the conductive material can be copper foil.

Wherein the fixing piece can be one or more of PIN nails, PINs or rivets. In a specific implementation scenario, if the fixing member is a PIN or a PIN, the fixing member is sleeved in the plurality of positioning holes respectively so as to fix the bearing plate and the conductive material. In another specific implementation scenario, if the fixing member is a rivet, the fixing member is respectively driven into the plurality of positioning holes to fix the carrier plate and the conductive material, which is not limited in this application.

Specifically, referring to fig. 3 and fig. 4, fig. 3 is a schematic structural diagram of the carrier plate and the conductive material in S111, and fig. 4 is a schematic structural diagram of the substrate obtained in S111. The carrier plate 21 has the same size as the copper foil 11, the edge position of the copper foil 11 is provided with a plurality of first positioning holes 12, and the edge position of the carrier plate 21 is provided with a plurality of corresponding second positioning holes 22. The carrier plate 21 and the copper foil 11 are laminated, and fixing pieces are embedded in the corresponding second positioning holes 22 and the first positioning holes 12, so that the carrier plate 21 and the copper foil 11 can be fixed, and the substrate 100 is obtained. The substrate 100 includes a carrier 21 and a conductive layer 11 connected by a fixing member.

S112: and carrying out surface treatment on the preset position of the conductive layer in the substrate to form a conductive circuit layer.

In this embodiment, the preset position of the conductive layer is surface-treated by one or more of laser ablation, laser cutting, ion cutting and water jet to remove the metal at the preset position, so as to form the conductive circuit layer.

Wherein the laser comprises CO ₂ Laser and/or UV laser.

It will be appreciated that, for the line specification to be processed, the predetermined position of the conductive layer is ablated or cut by a laser or a water jet, and a portion of the copper layer at the predetermined position may be removed, thereby forming the desired conductive line.

In the prior art, the circuit transfer is generally finished on the ultrathin copper foil by using high-order development-etching-stripping and other modes, however, the high-density circuit can be formed by developing and etching by matching with high-precision circuit etching equipment, the preparation process is complex, and the preparation cost is high.

The surface treatment mode adopted by the embodiment does not comprise chemical etching, can not be limited by the thickness of the material, and can also avoid the problem of uneven data in etching, thereby improving the line consistency and reducing the thickness of the whole printed circuit board. Further, unlike the prior art in which a high-precision circuit etching device is required, the surface treatment method adopted in the embodiment requires lower configuration cost, and can reduce the manufacturing cost of high-density circuits.

In this embodiment, different conductive traces may be formed on different substrates, respectively, based on the circuit patterns required for the motherboard and the daughter board.

Specifically, referring to fig. 5 and 6, fig. 5 is a schematic structural diagram of the mother substrate obtained in S112, and fig. 6 is a schematic structural diagram of the daughter board substrate obtained in S112. The motherboard substrate 200 includes a carrier board 21 and a first conductive circuit layer 10 stacked together. Wherein the first conductive trace layer 10 includes a plurality of first conductive traces 101. The sub-board substrate 300 includes a carrier 21 and a second conductive circuit layer 20 stacked together. Wherein the second conductive trace layer 20 includes a plurality of second conductive traces 201.

S113: and pressing adhesive materials and the mother bearing plate of the mother board or the child bearing plate of the child board on the conductive circuit layer of the base material to enable the conductive circuit layer of the base material to be connected with the mother bearing plate of the mother board or the child bearing plate of the child board through the adhesive layer.

In this embodiment, the adhesive material and the mother carrier plate of the motherboard are laminated on the first conductive circuit layer of the motherboard substrate, so that the first conductive circuit layer of the motherboard substrate is connected to the mother carrier plate of the motherboard through the first adhesive layer. And pressing the adhesive material and the sub-bearing plate of the sub-board on the second conductive circuit layer of the sub-board base material so that the second conductive circuit layer of the sub-board base material is connected with the sub-bearing plate of the sub-board through the second adhesive layer.

In this embodiment, the adhesive material comprises a micro-mucosa. The micro-mucous membrane refers to a glue material with differentiated surface energy, and the micro-mucous membrane has slight viscosity after being contacted with other types of materials under a limited condition (preset temperature) and can be bonded. Once the preset temperature changes, such as heating or cooling, the micro-mucosa loses viscosity and separates from other materials.

S114: and removing the bearing plate to obtain the mother board or the daughter board.

In this embodiment, the fixing piece in the positioning hole of the carrier plate and the first conductive circuit layer is removed, so as to separate the carrier plate and the first conductive circuit layer, and obtain the motherboard. And removing the fixing piece in the positioning holes of the bearing plate and the second conductive circuit layer to separate the bearing plate and the second conductive circuit layer, thereby obtaining the daughter board.

Specifically, referring to fig. 7 and 8, fig. 7 is a schematic structural diagram of the motherboard obtained in S114, and fig. 8 is a schematic structural diagram of the daughter board obtained in S114. The motherboard 400 includes a first conductive circuit layer 10, a first adhesive layer 110, and a mother carrier 120 that are stacked in order. Wherein the first conductive trace layer 10 includes a plurality of first conductive traces 101. The sub-board 500 includes a second conductive circuit layer 20, a second adhesive layer 210, and a sub-carrier 220 stacked in order. Wherein the second conductive trace layer 20 includes a plurality of second conductive traces 201.

S12: pressing the mother board, the insulating medium layer and at least one daughter board together, and removing the mother bearing board of the mother board and the daughter bearing board of the at least one daughter board; wherein, the part of the insulating medium layer is filled between part of the first conductive lines in the first conductive line layer and between part of the second conductive lines in the second conductive line layer.

In this embodiment, the first conductive circuit layer of the motherboard and the second conductive circuit layer of the daughter board are placed in parallel in opposite directions, the obtained insulating material is placed between the motherboard and the daughter board and subjected to high-temperature lamination, and the insulating material is melted by the lamination to become semi-solidified fluid, so that the fluid is filled between part of the first conductive circuits in the first conductive circuit layer and part of the second conductive circuits in the second conductive circuit layer, and then an insulating medium layer is formed between the motherboard and the daughter board.

Wherein the insulating material comprises one or more of Prepreg (PP), pure glue or heat-conducting double-sided tape (bond).

The prepreg comprises one or more of epoxy resins, polyimides, BT, ABF and ceramic bases, and mainly comprises resin and reinforcing materials. Wherein the reinforcing material comprises one or more of glass fiber cloth, paper base and composite material, and the application is not limited thereto.

The heat-conducting double-sided adhesive tape comprises a polyimide layer and adhesive layers arranged on two side surfaces of the polyimide layer, and has the characteristics of adhesiveness and filling.

The surface of the insulating material is provided with the release film, so that the insulating material can be prevented from being in direct contact with the high-temperature press. The release film is a film with a distinguishing surface energy, and has no viscosity or slight viscosity after being contacted with a specific material under a limited condition.

Specifically, referring to fig. 9, fig. 9 is a schematic structural diagram of an embodiment of a board with an insulating dielectric layer formed thereon. The board 600 includes a mother carrier 120, a first adhesive layer 110, a first conductive circuit layer 10, an insulating medium layer 30, a second conductive circuit layer 20, a second adhesive layer 210, and a child carrier 220 stacked in order. Wherein the first conductive trace layer 10 includes a plurality of first conductive traces 101, and the second conductive trace layer 20 includes a plurality of second conductive traces 201. Wherein portions of the insulating dielectric layer 30 are filled between portions of the first conductive traces 101 in the first conductive trace layer 10 and between portions of the second conductive traces 201 in the second conductive trace layer 20.

Further, the child bearing plate of the first child plate and the mother bearing plate of the mother plate are removed at the same time, and the plate with the double-sided buried wires is obtained.

In this embodiment, the plate with the insulating medium layer is subjected to temperature change treatment to remove the viscosity of the first adhesive layer in the motherboard and the second adhesive layer in the daughter board, and the mother carrier board and the daughter carrier board are separated, so as to obtain the plate with double-sided buried wires.

The temperature change treatment refers to heating or cooling treatment for a certain period of time on the plate with the insulating medium layer so as to enable the micro-mucous membrane serving as the first bonding layer and the second bonding layer to lose viscosity, and therefore the mother bearing plate and the child bearing plate are separated, and the plate with the double-sided buried wires is obtained.

Specifically, referring to fig. 10, fig. 10 is a schematic structural diagram of an embodiment of the double-sided buried wire board obtained in S12. The plate 700 includes a first conductive circuit layer 10, an insulating dielectric layer 30, and a second conductive circuit layer 20 stacked in order. Wherein the first conductive trace layer 10 includes a plurality of first conductive traces 101, and the second conductive trace layer 20 includes a plurality of second conductive traces 201. Wherein portions of the insulating dielectric layer 30 are filled between portions of the first conductive traces 101 in the first conductive trace layer 10 and between portions of the second conductive traces 201 in the second conductive trace layer 20.

It can be understood that, because the first conductive circuit layer and the second conductive circuit layer are both embedded in the insulating medium layer, when the copper layer is thickened in a directional manner, the thickness of the insulating medium layer between part of the first conductive circuit and part of the second conductive circuit is properly reduced, so that the thickness of the whole plate can be effectively reduced without affecting heat dissipation, and the requirements of reducing the plate thickness and improving the heat dissipation are met.

Further, as the double-sided buried wires can be realized at the same time, the preparation efficiency of the immersed wire can be improved, and the preparation of the ultrathin circuit board can be realized.

Further, since the total thickness of the insulating medium layer filled between the circuit patterns is the sum of the thickness of the copper layer of the first conductive circuit and the thickness of the copper layer of the second conductive circuit and the thickness of the insulating medium layer pressed on the surfaces of the first conductive circuit and the second conductive circuit, the directional increase of the thickness of the copper layer does not lead to the total thickness of the insulating medium layer being lower than the minimum thickness thereof.

The minimum thickness of the insulating dielectric layer refers to a thickness just meeting the voltage-resistant performance, and the higher the thickness of the insulating dielectric layer is, the better the voltage-resistant performance is.

In some embodiments, the at least one daughter board includes a first daughter board.

The step of pressing the mother board, the insulating medium layer and at least one daughter board together and removing the mother bearing board of the mother board and the daughter bearing board of the at least one daughter board comprises the following steps: the motherboard, the first insulating medium layer and the first daughter board are pressed together. And the first insulating medium layer is partially filled between part of the first conductive lines in the first conductive line layer and part of the second conductive lines in the second conductive line layer of the first sub-board. And removing the child bearing plate of the first child plate or removing the child bearing plate of the first child plate and the mother bearing plate of the mother plate.

And simultaneously removing the child bearing plate of the first child plate and the mother bearing plate of the mother plate to obtain the plate with the double-sided buried wires.

And the new insulating medium layer and the new daughter board are continuously pressed on the surface of one side of the pressing substrate far away from the mother bearing board, so that the layering can be realized.

In some embodiments, after the step of removing the sub-carrier of the first sub-board, it is further necessary to form at least one metallized hole in the second conductive trace layer and the first insulating dielectric layer. And a part of the second conductive circuits in the second conductive circuit layer are electrically connected with a part of the first conductive circuits in the first conductive circuit layer through the metallized holes.

Specifically, drilling is carried out at a preset position of the second conductive circuit layer, and the second conductive circuit layer and the first insulating medium layer are drilled through to form at least one blind hole; and carrying out hole metallization treatment on the blind holes to obtain at least one metallized hole.

Wherein, the plate can be drilled by mechanical drilling to drill at least one hole on the preset positions of the second conductive circuit layer and the insulating medium layer. In other embodiments, the plate may also be drilled by laser drilling to drill at least one hole in the plate, which is not limited in this application.

The hole metallization treatment of the blind hole refers to filling conductive substances into the blind hole to form a conductive connecting column. In one particular implementation, the blind via may be copper-plated to form a conductive copper pillar. In another specific implementation scenario, the blind holes may be filled with conductive materials such as copper paste and silver paste, which is not limited in this application.

In some implementations, the at least one daughter board further includes a second daughter board.

After the step of removing the sub-carrier board of the first sub-board, the step of pressing the motherboard, the insulating medium layer, and at least one sub-board together, and removing the motherboard and the sub-carrier board of the at least one sub-board, further includes: and pressing the pressing substrate, the second insulating medium layer and the second sub-board together. The laminated substrate is a plate formed by laminating the mother board, the first insulating medium layer and the first daughter board and removing the daughter carrier of the first daughter board. And part of the second insulating medium layer is filled between part of the second conductive lines in the second conductive line layer remained in the first sub-board and part of the second conductive lines in the second conductive line layer of the second sub-board. And removing the child bearing plate of the second child plate or removing the child bearing plate of the second child plate and the mother bearing plate of the mother plate.

It can be understood that only the sub-carrier plate of the second sub-plate is removed, and the new insulating medium layer and the new sub-plate can be further laminated on the new lamination substrate.

Correspondingly, the circuit board is manufactured by the manufacturing method of the circuit board.

In contrast to the prior art, the method and the device have the advantages that the mother board, the insulating medium layer and at least one daughter board are pressed together, so that part of the insulating medium layer can be filled between part of the first conductive lines in the first conductive line layer of the mother board and part of the second conductive lines in the second conductive line layer of the daughter board. And then the mother bearing plate of the mother board and the child bearing plate of at least one child board are removed, so that the circuit board with the double-sided buried wires can be obtained. Because the first conductive circuit layer and the second conductive circuit layer are embedded in the insulating medium layer, when the copper layer is thickened in a directional manner, the thickness of the insulating medium layer between part of the first conductive circuit and part of the second conductive circuit is properly reduced, so that the thickness of the whole plate can be effectively reduced under the condition of not affecting heat dissipation, and the requirements of reducing the plate thickness and improving the heat dissipation are met. Further, since the double-sided buried wiring can be realized at the same time, the preparation of an extremely thin wiring board can also be realized.

The foregoing description is only of embodiments of the present application, and is not intended to limit the scope of the patent application, and all equivalent structures or equivalent processes using the descriptions and the contents of the present application or other related technical fields are included in the scope of the patent application.

Claims

1. The preparation method of the circuit board is characterized by comprising the following steps:

acquiring a mother board and at least one daughter board; the mother board comprises a mother bearing board and a first conductive circuit layer arranged on one side surface of the mother bearing board, and each daughter board comprises a daughter bearing board and a second conductive circuit layer arranged on one side surface of the daughter bearing board; the first conductive circuit layer comprises at least one first conductive circuit, and the second circuit layer comprises at least one second conductive circuit;

pressing the mother board, the insulating medium layer and the at least one daughter board together, and removing the mother carrier board of the mother board and the daughter carrier board of the at least one daughter board; wherein, the part of the insulating medium layer is filled between part of the first conductive lines in the first conductive line layer and part of the second conductive lines in the second conductive line layer.

2. The method for manufacturing a circuit board according to claim 1, wherein,

the at least one sub-board comprises a first sub-board;

the step of pressing the motherboard, the insulating medium layer, and the at least one daughter board together, and removing the motherboard carrier board of the motherboard and the daughter carrier board of the at least one daughter board includes:

pressing the mother board, the first insulating medium layer and the first daughter board together; wherein a portion of the first insulating dielectric layer is filled between portions of the first conductive traces in the first conductive trace layer and between portions of the second conductive traces in the second conductive trace layer of the first sub-board;

and removing the child bearing plate of the first child plate or removing the child bearing plate of the first child plate and the mother bearing plate of the mother plate.

3. The method for manufacturing a circuit board according to claim 2, wherein,

the at least one daughter board further includes a second daughter board;

after the step of removing the sub-carrier board of the first sub-board, the step of pressing the motherboard, the insulating medium layer, and the at least one sub-board together, and removing the motherboard and the sub-carrier board of the at least one sub-board, further includes:

pressing the pressing substrate, the second insulating medium layer and the second sub-board together; the pressing substrate is a plate formed by removing the sub-bearing plate of the first sub-plate after the mother plate, the first insulating medium layer and the first sub-plate are pressed together; a part of the second insulating medium layer is filled between part of the second conductive lines in the second conductive line layer remained in the first sub-board and part of the second conductive lines in the second conductive line layer of the second sub-board;

and removing the child bearing plate of the second child plate or removing the child bearing plate of the second child plate and the mother bearing plate of the mother plate.

4. The method for manufacturing a circuit board according to claim 1, wherein,

the step of obtaining the mother board and at least one daughter board comprises the following steps:

obtaining a base material; the substrate comprises a bearing plate and a conductive layer which are connected through a fixing piece;

carrying out surface treatment on preset positions of the conductive layers in the base material to form conductive circuit layers;

pressing an adhesive material and the mother carrier plate of the mother board or the child carrier plate of the child board on the conductive circuit layer of the base material to enable the conductive circuit layer of the base material to be connected with the mother carrier plate of the mother board or the child carrier plate of the child board through an adhesive layer;

and removing the bearing plate to obtain the mother plate or the daughter plate.

5. The method for manufacturing a circuit board according to claim 4, wherein,

the step of performing surface treatment on the preset position of the conductive layer in the substrate to form a conductive circuit layer comprises the following steps:

and carrying out surface treatment on the preset position of the conductive layer by one or more modes of laser ablation, laser cutting, ion cutting and water jet so as to remove metal at the preset position and form the conductive circuit layer.

6. The method for manufacturing a circuit board according to claim 4, wherein,

the step of obtaining a substrate comprises the steps of:

obtaining the bearing plate and the conductive material with the same size; the edge positions of the bearing plate and the conductive material are provided with a plurality of corresponding positioning holes;

and stacking the bearing plate and the conductive material, and respectively embedding the fixing pieces into the positioning holes so that the fixing pieces are matched with the positioning holes to fix the bearing plate and the conductive material.

7. The method for manufacturing a circuit board according to claim 2, wherein,

after the step of removing the sub-carrier plate of the first sub-board, it includes:

forming at least one metallization hole on the second conductive line layer and the first insulating dielectric layer; and part of the second conductive circuit in the second conductive circuit layer is electrically connected with part of the first conductive circuit in the first conductive circuit layer through the metallized holes.

8. The method for manufacturing a circuit board according to claim 7, wherein,

the step of forming at least one metallization hole on the second conductive circuit layer and the first insulating medium layer comprises the following steps:

drilling at a preset position of the second conductive circuit layer, and drilling through the second conductive circuit layer and the first insulating medium layer to form at least one blind hole;

and carrying out hole metallization treatment on the blind holes to obtain at least one metallized hole.

9. The method for manufacturing a circuit board according to claim 8, wherein,

the step of performing hole metallization treatment on the blind holes to obtain at least one metallized hole comprises the following steps:

and filling conductive substances into the blind holes to form conductive connecting columns.

10. A wiring board, characterized in that the wiring board is produced by the production method of the wiring board according to any one of claims 1 to 9.