CN116302706A - Detector power-on electrical system - Google Patents
Detector power-on electrical system Download PDFInfo
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- CN116302706A CN116302706A CN202310297793.7A CN202310297793A CN116302706A CN 116302706 A CN116302706 A CN 116302706A CN 202310297793 A CN202310297793 A CN 202310297793A CN 116302706 A CN116302706 A CN 116302706A
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- 238000003384 imaging method Methods 0.000 claims abstract description 33
- 238000000034 method Methods 0.000 claims abstract description 33
- 230000010354 integration Effects 0.000 claims abstract description 23
- 230000005540 biological transmission Effects 0.000 claims abstract description 13
- 238000004891 communication Methods 0.000 claims description 6
- 238000001514 detection method Methods 0.000 claims description 5
- 238000010586 diagram Methods 0.000 description 6
- 241000723347 Cinnamomum Species 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1415—Saving, restoring, recovering or retrying at system level
- G06F11/1441—Resetting or repowering
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/24—Resetting means
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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Abstract
A detector power-on system relates to the technical field of detector power-on, and solves the problem that training results fail in the training process of the existing detector power-on time sequence, and the power-on system comprises an imaging controller and an imaging unit; the imaging unit comprises an instruction analysis and transmission module, a time sequence control module and a training and data integration module; the imaging controller detects the training state after each training operation is completed. Whether the training operation is finished or not is indicated by an indication signal indicating whether the training process is finished or not, wherein a high level indicates that the training process is finished, and a low level indicates that the training process is not finished yet; the retraining operation is initiated when a training failure is detected and is not initiated when a training success is detected. In this way, the influence of the newly started training on the previous training process and the result can be avoided.
Description
Technical Field
The invention relates to the technical field of detector power-on, in particular to a space application-based detector power-on system.
Background
After finishing training, the detector receives a time sequence reset command, and restarts a training operation, wherein the data output by the detector is jittered at the stage to possibly fail training; and after the time sequence is reset, the training state is detected again, when the unsuccessful training is detected, the third training is restarted, and the final training result is likely to fail because the newly started training cannot be completely started from the beginning.
Prior art as shown in fig. 1, the operation sequence of powering up the detector generally comprises three steps: (1) a power-on configuration and subsequent training operation; (2) Time sequence resetting and training operation after receiving the time sequence resetting command; (3) And detecting a training state, and starting training operation if the training is unsuccessful. After the power-on configuration and the subsequent training operation, a time sequence reset command is received, and the training operation is restarted, and the data output by the detector at the stage is jittered and possibly fails in training. If the training after the time sequence reset is not finished and the telemetry of the training failure occurs, the detection of the training state is started, and the third training is restarted when the unsuccessful training is detected, the final training result is likely to fail because the newly started training cannot be completely started from the beginning.
As shown in fig. 2, the training state machine cycle contains three states: training idle state, training start state and training end judgment state. And initializing the state in the training idle state, entering a training starting state after powering on or receiving a training command, and then entering a training ending judging state. And in the training ending judgment state, returning to the training idle state when all channels are trained.
Disclosure of Invention
The invention provides a detector power-on operation system, which aims to solve the problem that training results fail in the training process of the power-on operation time sequence of the existing detector.
An electrical power-on system for a detector, the electrical power-on system comprising an imaging controller and an imaging unit; the imaging unit comprises an instruction analysis and transmission module, a time sequence control module and a training and data integration module;
the imaging controller sends instructions and states to the imaging unit through a 422 bus, and the imaging controller sends a time sequence reset signal to reset the time sequence of the detector;
the command analysis and transmission module receives 422 communication commands sent by the imaging controller, analyzes the communication commands and transmits the communication commands to the time sequence control module and the training and data integration module, and the time sequence control module and the training and data integration module simultaneously return telemetry state information and transmit the telemetry state information to the imaging controller through the command analysis and transmission module;
the instruction analysis and transmission module receives a time sequence reset signal of the imaging controller and transmits the time sequence reset signal to the time sequence control module;
the time sequence control module generates a training control signal, a system reset signal, a time sequence reset signal and a driving control signal which are required by the detector, and simultaneously transmits a power-on completion signal and an output data validity indication signal in the power-on process to the training and data integration module;
the training and data integration module receives serial image data output by the detector, converts the serial image data into parallel image data for data integration and then outputs the parallel image data; meanwhile, in the training process, an indication signal of a training state and a training stage is output to the time sequence control module; and outputs a status return signal 1 to the instruction parsing and transmitting module;
during training, the training state machine cycle includes four states: training idle state, initialization state before training, training start state and training end judgment state;
in the training idle state, the training starting state and the training ending judging state, when the power is on or a training command is received, entering an initialization state before training, and carrying out state initialization; when the initialization before training is finished, entering a training starting state; when the training is started and the power-on is not performed, a training command is received, and a training ending judgment state is entered; and in the training ending judgment state, returning to the training idle state when all channels are trained and are not electrified to receive the training command.
The invention has the beneficial effects that:
1. the imaging controller detects the training state after each training operation is completed. Whether the training operation is finished or not is indicated by an indication signal indicating whether the training process is finished or not, wherein a high level indicates that the training process is finished, and a low level indicates that the training process is not finished yet; the retraining operation is initiated when a training failure is detected and is not initiated when a training success is detected. In this way, the influence of the newly started training on the previous training process and the result can be avoided.
2. In the training process, the number of correction adjustment is required to be 2 times higher than that of adjustment positions, namely each position is required to be detected at least 2 times, so that even if image data shake accidentally in the training process, the training can be successful.
3. And the time sequence reset and the SPI writing operation are canceled in the training process, so that the error in the training process caused by the interference of the two operations to the training process is avoided.
4. The training operation command can interrupt the previous training operation and completely restart, so that the training operation can be completely restarted, and various states after the original training are reset, thereby avoiding the influence of unsuccessful previous training.
Drawings
FIG. 1 is a timing diagram of the power-up operation of a conventional detector;
FIG. 2 is a schematic diagram of a state machine cycle employed in training of FIG. 1;
FIG. 3 is a block diagram of a detector power-on control system according to the present invention;
FIG. 4 is a schematic diagram of n-bit parallel image data;
FIG. 5 is a schematic diagram of channel correction for n-bit parallel image data;
fig. 6 is a schematic diagram of a training state machine cycle.
Detailed Description
The present embodiment will be described with reference to fig. 3 to 6, which illustrate a detector power-on system composed of an imaging controller and an imaging unit; as shown in fig. 3, the imaging unit includes an instruction parsing and transmitting module, a timing control module, a training and data integration module, and a detector;
the imaging controller transmits instructions and status to the imaging unit via 422 bus, and the imaging controller may transmit a timing reset signal to perform timing reset of the detector. The instruction analysis and transmission module receives 422 instructions transmitted by the imaging controller, analyzes the instructions and transmits the instructions to the time sequence control module and the training and data integration module for execution, and simultaneously returns related telemetry state information; the received time sequence reset signal is transmitted to the time sequence control module. The time sequence control module generates training control signals, system reset signals, time sequence reset signals and driving control signals required by the detector, and simultaneously transmits power-on completion signals and output data validity indication signals in the power-on process to the training and data integration module. The training and data integration module receives serial image data output by the detector, converts the serial image data into parallel image data, integrates the data according to a transmission protocol and outputs the integrated data; meanwhile, in the training process, an indication signal of a training state and a training stage is output to the time sequence module; and simultaneously, outputting a state return signal 1 (a telemetry signal of training results and an indication signal of whether the training process is finished or not) to the instruction analysis and transmission module.
In this embodiment, the imaging controller detects the training state after each training operation is completed. Whether the training operation is finished or not is indicated by an indication signal indicating whether the training process is finished or not, wherein a high level indicates that the training process is finished, and a low level indicates that the training process is not finished yet; the retraining operation is initiated when a training failure is detected and is not initiated when a training success is detected.
In this embodiment, the training and data integration module requires word correction and channel correction adjustment 2 times more times than the number of adjustable states during the training process, i.e., requires at least 2 detections per state.
As shown in fig. 4, for the word correction operation, it is required to adjust the number of times of n-bit parallel image data combination, which is greater than or equal to 2n times, n being the number of bits of parallel image data.
As shown in fig. 5, for channel correction, after the training control signal TRAIN is required to send out a pulse signal with a single pixel clock period width, the number of delay position states of the detected parallel training word relative to the positive pulse of the TRAIN signal is 2m, and the number of times of channel correction detection is required to be higher than or equal to 4m times; the delay position of the parallel training word relative to the positive pulse of the TRAIN signal is preset as an mth delay position before the start of each power-on training.
In this embodiment, the timing control module detects a training state signal output by the training and data integration module, and when the training state signal is in a training state, cancels the output of timing reset and sets the output as an invalid high level; and simultaneously, the SPI writing operation is canceled, and the control signal of the SPI writing operation is set to be invalid low level.
In this embodiment, the training operation command can interrupt the previous training operation state machine in the data integration module and completely restart. The improved training state machine cycle shown in fig. 6 includes four states: training idle state, initialization state before training, training start state and training end judgment state. In the training idle state, the training starting state and the training ending judging state, when the power is on or a training command is received, entering an initialization state before training, and carrying out state initialization; when the initialization before training is finished, entering a training starting state; and when the training is started and the power-on is not performed, a training command is received, and a training ending judgment state is entered. And in the training ending judgment state, returning to the training idle state when all channels are trained and are not electrified to receive the training command.
In this embodiment, the imaging controller uses a minimum system board based on a domestic DSP. The instruction analysis and transmission module, the time sequence control module and the training and data integration module adopt FPGA of Shanghai compound denier micro company to realize related functions; the detector is a CMOS detector of Cinnamomum.
Claims (6)
1. An electrical power-on system for a detector, the electrical power-on system comprising an imaging controller and an imaging unit; the method is characterized in that: the imaging unit comprises an instruction analysis and transmission module, a time sequence control module and a training and data integration module;
the imaging controller sends instructions and states to the imaging unit through a 422 bus, and the imaging controller sends a time sequence reset signal to reset the time sequence of the detector;
the command analysis and transmission module receives 422 communication commands sent by the imaging controller, analyzes the communication commands and transmits the communication commands to the time sequence control module and the training and data integration module, and the time sequence control module and the training and data integration module simultaneously return telemetry state information and transmit the telemetry state information to the imaging controller through the command analysis and transmission module;
the instruction analysis and transmission module receives a time sequence reset signal of the imaging controller and transmits the time sequence reset signal to the time sequence control module;
the time sequence control module generates a training control signal, a system reset signal, a time sequence reset signal and a driving control signal which are required by the detector, and simultaneously transmits a power-on completion signal and an output data validity indication signal in the power-on process to the training and data integration module;
the training and data integration module receives serial image data output by the detector, converts the serial image data into parallel image data for data integration and then outputs the parallel image data; meanwhile, in the training process, an indication signal of a training state and a training stage is output to the time sequence control module; and outputs a status return signal 1 to the instruction parsing and transmitting module;
during training, the training state machine cycle includes four states: training idle state, initialization state before training, training start state and training end judgment state;
in the training idle state, the training starting state and the training ending judging state, when the power is on or a training command is received, entering an initialization state before training, and carrying out state initialization; when the initialization before training is finished, entering a training starting state; when the training is started and the training command is not received without power-up, the training end judgment state is entered; and in the training ending judgment state, returning to the training idle state when all channels are trained and the training command is not received after the channels are not electrified.
2. A detector power-on system according to claim 1, wherein: the imaging controller detects the training state after the training process is finished; whether the training process is finished is determined by an indication signal of whether the training process is finished, wherein a high level indicates that the training process is finished, and a low level indicates that the training process is not finished; when the training failure is detected, the retraining operation is started, and when the training success is detected, the retraining operation is not started.
3. A detector power-on system according to claim 1, wherein: the training and data integration module requires word correction and channel correction adjustment more than 2 times the number of adjustable states during the training process, i.e. requires at least 2 detections per state.
4. A detector power-on system according to claim 3, wherein: for the word correction operation, it is required to adjust the number of times of n-bit parallel image data combination, which is 2n times or more, n being the number of bits of parallel image data.
5. A detector power-on system according to claim 3, wherein: for channel correction, after the training control signal TRAIN is required to send out a pulse signal with a single pixel clock period width, the number of delay position states of the detected parallel training word relative to the positive pulse of the TRAIN signal is 2m, and the number of times of channel correction detection is required to be greater than or equal to 4m times; the delay position of the parallel training word relative to the positive pulse of the TRAIN signal is preset as an mth delay position before the start of each power-on training.
6. A detector power-on system according to claim 3, wherein: the time sequence control module detects a training state signal output by the training and data integration module, and when the training state signal is in a training state, the output of time sequence reset is canceled and set to be invalid high level; and simultaneously, the SPI writing operation is canceled, and the control signal of the SPI writing operation is set to be invalid low level.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310297793.7A CN116302706A (en) | 2023-03-24 | 2023-03-24 | Detector power-on electrical system |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202310297793.7A CN116302706A (en) | 2023-03-24 | 2023-03-24 | Detector power-on electrical system |
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| Publication Number | Publication Date |
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| CN116302706A true CN116302706A (en) | 2023-06-23 |
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| CN202310297793.7A Pending CN116302706A (en) | 2023-03-24 | 2023-03-24 | Detector power-on electrical system |
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- 2023-03-24 CN CN202310297793.7A patent/CN116302706A/en active Pending
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