CN116167315A - Quantum chip parameter optimization method, storage medium and computer equipment - Google Patents
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Abstract
The invention provides a method for optimizing quantum chip parameters, a storage medium and computer equipment, when the quantum chip parameters are optimized, the parameters to be optimized are preferably determined, the parameters to be optimized are expressed into N-dimensional vector parameters, then initial vector parameters are determined according to initial values of the parameters to be optimized, N simulation vector parameters are generated based on the initial vector parameters, then simulation tests are respectively carried out on the initial vector parameters and N+1 parameter data of each simulation vector parameter, test values corresponding to each parameter data are obtained, finally optimization processing is carried out on the N+1 parameter data and the N+1 test values based on a Nelder-Mead algorithm, optimal parameter data are obtained, and quantum chip parameters corresponding to the optimal parameter data are used as optimized quantum chip parameters. The invention realizes the optimization of the parameters of the quantum chip based on the Nelder-Mead algorithm, and applies the optimized parameters of the quantum chip to the design and manufacture of the quantum chip, thereby improving the reading fidelity and the working performance of the quantum chip.
Description
Technical Field
The invention belongs to the technical field of quantum chip measurement and control, and particularly relates to a quantum chip parameter optimization method, a storage medium and computer equipment.
Background
The quantum computer is a kind of physical device which performs high-speed mathematical and logical operation, stores and processes quantum information according to the law of quantum mechanics. The quantum computer has the characteristics of higher running speed, stronger information processing capability, wider application range and the like. Compared with a general computer, the more the information processing amount is, the more the quantum computer is beneficial to the operation, and the accuracy of the operation can be ensured.
The quantum chip is equivalent to the CPU of the traditional computer and is the core component of the quantum computer. The quantum chip is provided with a plurality of quantum bits, and can perform high-fidelity quantum logic gate operation and reading on the quantum bits. With the continuous research and advancement of quantum computing related technologies, the number of quantum bits on a quantum chip is gradually increased, however, with the increase of the number of quantum bits, the parameters of the quantum chip are changed under the influence of environment, so that the fidelity of a quantum logic gate acting on the quantum chip is reduced, and the reading accuracy is affected. Therefore, how to optimize the parameters of the quantum chip and ensure the high fidelity of the quantum logic gate is a current urgent problem to be solved.
Disclosure of Invention
The invention aims to provide a method for optimizing parameters of a quantum chip, a storage medium and computer equipment, so as to solve the defects and shortcomings in the prior art.
In order to achieve the above object, in a first aspect, the present invention provides a method for optimizing parameters of a quantum chip, two qubits coupled by an adjustable coupler are disposed on the quantum chip, and parameters of the adjustable coupler are regulated by a regulation signal, the method includes:
determining parameters to be optimized from quantum chip parameters; the quantum chip parameters are parameters of regulation signals of the adjustable coupler, self-capacitance parameters of the adjustable coupler and two quantum bits, coupling capacitance parameters between the adjustable coupler and two quantum bits and coupling parameters between the two quantum bits, and the parameters to be optimized are one or a combination of the parameters; representing the parameters to be optimized into vector parameters of N dimensions; wherein N is the number of the parameters to be optimized;
determining initial vector parameters according to the initial values of the parameters to be optimized;
generating N simulation vector parameters based on the initial vector parameters, wherein the dimension of the simulation vector parameters is also N;
respectively performing simulation test on the initial vector parameters and the total n+1 parameter data of each simulation vector parameter, and obtaining test values corresponding to each parameter data;
and optimizing the N+1 parameter data and the N+1 test values based on a Nelder-Mead algorithm to obtain optimal parameter data, and taking quantum chip parameters corresponding to the optimal parameter data as optimized quantum chip parameters.
Optionally, the parameter data is denoted as an argument xn, where n=0, 1,2, … N, the test value is denoted as f (xn), and the optimizing process is performed on the n+1 parameter data and the n+1 test values based on a Nelder-Mead algorithm, to obtain optimal parameter data, including:
judging whether the minimum value in the N+1 test values is smaller than a preset threshold value or not;
if not, discarding the maximum value of the N+1 test values and the corresponding independent variable thereof, and calculating the average value of the rest N independent variables;
calculating a reflection point independent variable based on the average value to be expressed as xr, wherein xr=xcenter+a (xcenter-xm), xcenter is the average value, xm is the independent variable corresponding to the maximum value in the n+1 test values, a is a preset parameter, and a is more than 0;
performing simulation test on xr to obtain a corresponding test value f (xr);
judging whether f (xr) is smaller than the preset threshold value;
if yes, taking the quantum chip parameter corresponding to xr as the quantum chip parameter.
Optionally, after determining whether f (xr) is less than the preset threshold, the method further includes:
if not, judging whether f (xr) is larger than or equal to the minimum value of the remaining N test values and smaller than the maximum value of the remaining N test values;
if yes, composing xr and the rest N independent variables into N+1 independent variables, composing f (xr) and the rest N test values into N+1 test values, and returning to execute the judgment whether the minimum value in the N+1 test values is smaller than a preset threshold value;
if not, f (xr) is smaller than the minimum value in the remaining N test values, calculating an expansion point independent variable as xe, wherein xe=xcenter+b (xe-xcenter), b is a preset parameter, and b is more than 1;
performing simulation test on xe to obtain a corresponding test value f (xe);
judging whether f (xe) is smaller than the preset threshold value;
if yes, taking the quantum chip parameters corresponding to xe as optimized quantum chip parameters;
if not, f (xr) is greater than or equal to the maximum value of the remaining N test values, calculating a shrinkage point independent variable xc, wherein xc=xcenter+c (xr-xcenter), c is a preset parameter, and 0 < c is less than or equal to 0.5;
performing simulation test on the xc to obtain a corresponding test value f (xc);
judging whether f (xc) is smaller than the preset threshold value;
if so, taking the quantum chip parameters corresponding to the xc as optimized quantum chip parameters.
Optionally, after the determining whether f (xe) is smaller than the preset threshold, the method further includes:
if not, judging whether f (xe) is smaller than f (xr);
if yes, discarding the maximum value of the remaining N test values and the corresponding independent variables, forming xe, xr and the remaining N-1 independent variables into N+1 independent variables, forming f (xe), f (xr) and the remaining N-1 test values into N+1 test values, and returning to execute the judgment on whether the minimum value of the N+1 test values is smaller than a preset threshold value;
if not, composing xr and the rest N independent variables into N+1 independent variables, composing f (xr) and the rest N test values into N+1 test values, and returning to execute the judgment whether the minimum value in the N+1 test values is smaller than a preset threshold value.
Optionally, after the determining whether f (xc) is smaller than the preset threshold, the method further includes:
if not, judging whether f (xc) is smaller than the maximum value of the initial N+1 test values;
if yes, composing xc and the rest N independent variables into N+1 independent variables, composing f (xc) and the rest N test values into N+1 test values, and returning to execute the judgment whether the minimum value in the N+1 test values is smaller than a preset threshold value;
if not, performing shrinkage processing on N independent variables except the initial independent variable x0 in the original N+1 independent variables, wherein a shrinkage processing formula is xn=x0+d (xn-x 0), and N shrunk independent variables are obtained, wherein d is a preset parameter, and d is more than 0 and less than or equal to 0.5;
and respectively performing simulation tests on the N contracted independent variables to obtain corresponding N test values, forming n+1 independent variables by x0 and the N contracted independent variables, forming n+1 test values by f (x 0) and the N test values corresponding to the N contracted independent variables, and returning to execute the judgment on whether the minimum value in the n+1 test values is smaller than a preset threshold value.
Optionally, the preset threshold is set according to a fidelity ideal parameter of two quantum logic gates acting on two quantum bits.
Optionally, performing a simulation test on n+1 parameter data of the initial vector parameter and each simulation vector parameter, and obtaining n+1 test values corresponding to each parameter data, where the method specifically includes:
and setting the quantum chip parameters according to the values of the corresponding parameter data, obtaining fidelity test values of two quantum logic gates acting on two quantum bits, and obtaining the test values based on the fidelity test values, wherein the test values = 1-fidelity test values.
Optionally, the determining one or more parameters of the quantum chip as parameters to be optimized specifically includes:
and determining the self-capacitance parameters of the adjustable coupler, the coupling capacitance parameters between two quantum bits and the adjustable coupler and the working frequency parameters of the adjustable coupler and the two quantum bits as parameters to be optimized, wherein N=7, and the rest parameters are fixed values.
In a second aspect, the present invention provides a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements a method of optimizing quantum chip parameters as described in the first aspect.
In a third aspect, the present invention provides a computer device comprising a memory, a processor and a computer program stored on the memory, which when executed by the processor, implements the method of optimizing quantum chip parameters according to the first aspect.
Compared with the prior art, the quantum chip parameter optimization method, the storage medium and the computer equipment provided by the invention have the following beneficial effects: when the optimization method is used for optimizing the quantum chip parameters, the parameters to be optimized are first determined from the quantum chip parameters, the parameters to be optimized are expressed into N-dimensional vector parameters, initial vector parameters are then determined according to initial values of the parameters to be optimized, N simulation vector parameters are generated based on the initial vector parameters, simulation tests are respectively carried out on the initial vector parameters and N+1 parameter data of each simulation vector parameter, test values corresponding to the parameter data are obtained, optimization processing is carried out on the N+1 parameter data and the N+1 test values based on a Nelder-Mead algorithm, optimal parameter data are obtained, and quantum chip parameters corresponding to the optimal parameter data are used as optimized quantum chip parameters. The invention optimizes one or more parameter data in the quantum chip parameters based on the Nelder-Mead algorithm to obtain the optimized quantum chip parameters, and applies the optimized quantum chip parameters to the design and manufacture of the quantum chip, thereby improving the reading fidelity and the working performance of the quantum chip.
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In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is an equivalent circuit diagram of two qubits coupled by an adjustable coupler according to an embodiment of the present invention;
FIG. 2 is a schematic flow chart of a method for optimizing parameters of a quantum chip according to an embodiment of the present invention;
fig. 3 is a flow chart of a method for optimizing the n+1 parameter data and the n+1 test values based on a Nelder-Mead algorithm according to an embodiment of the present invention.
Detailed Description
The invention provides a quantum chip parameter optimization method, a storage medium and computer equipment, which are further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the drawings are in a very simplified form and are all to a non-precise scale, merely for convenience and clarity in aiding in the description of embodiments of the invention.
In the description of the present invention, the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present invention, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise.
The multi-bit expansion of the quantum chip is a great difficulty in quantum computing, and due to environmental influence and edge crosstalk, a quantum logic gate with high fidelity is difficult to realize in a large-scale quantum chip, and the performance of the quantum chip is seriously affected. In order to improve the performance of the quantum chip, the parameters of the quantum chip must be optimized, so as to ensure that the quantum logic gate acting on the quantum chip has high fidelity. Therefore, the core idea of the invention is to provide a method for optimizing quantum chip parameters, a storage medium and a computer device, wherein the optimized quantum chip parameters are obtained by optimizing one or more parameter data in the quantum chip parameters, and the optimized quantum chip parameters are applied to the design and manufacture of the quantum chip, so that the reading fidelity and the working performance of the quantum chip are improved.
The embodiment provides a method for optimizing parameters of a quantum chip, wherein two quantum bits coupled through an adjustable coupler are arranged on the quantum chip, and the parameters of the adjustable coupler are regulated by a regulating signal. Specifically, referring to fig. 1, a coupling capacitor is also present between two qubits, and in addition, it should be noted that, a plurality of groups of two qubits coupled by an adjustable coupler are disposed on the quantum chip, and in this embodiment, the relevant parameters of one group of two qubits coupled by the adjustable coupler are optimized as an example.
Specifically, referring to fig. 2, the optimization method includes the following steps:
and S1, determining parameters to be optimized from the quantum chip parameters.
The quantum chip parameters are parameters of regulation signals of the adjustable coupler, self-capacitance parameters of the adjustable coupler and the two quantum bits, coupling capacitance parameters between the adjustable coupler and the two quantum bits and coupling parameters between the two quantum bits, and the parameters to be optimized are one or a combination of the parameters.
And particularly, when the parameters to be optimized are determined from the quantum chip parameters, selecting proper parameters as the parameters to be optimized mainly according to the influence degree of the quantum chip parameters on the performance of the quantum chip and the range of the values of the parameters. For example, as shown by a great deal of experiments and theoretical analysis, the larger the self capacitance of the qubit, the coupling strength between the qubit and the tunable coupler and the coupling strength between the two qubits can be reduced, which means that the larger the self capacitance of the qubit, the smaller the probability that information leaks to a high energy state and to the tunable coupler in the evolution process of the quantum computing system. However, considering the actual process, the self-capacitance of the qubit cannot be larger than 88fF and needs to be larger as much as possible, so that the selectable capacitance range is smaller, and the self-capacitance of the qubit is not determined to be a parameter to be optimized and is used as a fixed parameter when being optimized in the range of a few fF. For another example, the self-capacitance of the tunable coupler is theoretically not limited in the range of values, and is also limited in practical technology more widely than the self-capacitance of the qubit, and in addition, the self-capacitance of the tunable coupler has a larger influence on the parameters of the turn-off point of the tunable coupler, so that the working performance of the tunable coupler is affected, and therefore, in this embodiment, the self-capacitance of the tunable coupler is determined as the parameter to be optimized.
Step S2, the parameters to be optimized are expressed into vector parameters of N dimensions; wherein N is the number of the parameters to be optimized.
And step S3, determining initial vector parameters according to the initial values of the parameters to be optimized.
Specifically, first, according to the range of the values of the parameters to be optimized, initial values of the parameters are determined, and then initial vector parameters are determined.
And S4, generating N simulation vector parameters based on the initial vector parameters, wherein the dimension of the simulation vector parameters is also N.
Specifically, firstly, setting a value interval of each component of the vector parameters, and then generating N simulation vector parameters on the basis of the initial vector parameters according to the value interval.
And S5, respectively performing simulation test on the initial vector parameters and the total N+1 parameter data of each simulation vector parameter, and obtaining test values corresponding to each parameter data.
Specifically, the parameters of the quantum chip are set according to the parameters of the quantum chip corresponding to the n+1 parameter data, then the quantum chip is subjected to simulation test, and test values of the parameter data are obtained.
And S6, optimizing the N+1 parameter data and the N+1 test values based on a Nelder-Mead algorithm to obtain optimal parameter data, and taking quantum chip parameters corresponding to the optimal parameter data as optimized quantum chip parameters.
The Nelder-Mead algorithm is also commonly called a "downhill algorithm", and can quickly obtain a multidimensional parameter combination capable of reaching a local extremum or the highest value through a "downhill" method in a multidimensional parameter space with a local effective extremum or a local most effective parameter.
For example, as shown in fig. 3, the parameter data is denoted as an argument xn, where n=0, 1,2, … N, and the test value is denoted as f (xn), where the optimizing process is performed on the n+1 parameter data and the n+1 test values based on the Nelder-Mead algorithm to obtain optimal parameter data, which specifically includes:
and B1, judging whether the minimum value in the N+1 test values is smaller than a preset threshold value.
Specifically, the n+1 test values are ranked according to the magnitude relation, for example, the ranking is performed from small to large, the ranking result can be recorded as F (x 0) F (x 1) F (xN) … F (xN), the corresponding n+1 independent variables can be recorded as (x 0, x1, …, xN, …, xN), and further whether F (x 0) is smaller than a preset threshold value is judged, and the preset threshold value is recorded as F.
If not, i.e. if F (x 0) is greater than or equal to F, executing step B2, discarding the maximum value of the n+1 test values and the corresponding independent variable thereof, and calculating the average value of the remaining N independent variables.
That is, if F (x 0) > F, it is assumed that the performance of F (xN) is the worst, F (xN) and its corresponding argument xN are discarded, and the average value xcenter of (x 0, x1, …, xN, …, x (N-1)) is calculated, xcenter=ave (x 0, x1, …, xN, …, x (N-1)).
It can be understood that if F (x 0) < F, the argument x0 is described as meeting the optimization requirement, and the corresponding quantum chip parameter can be used as the optimized quantum chip parameter.
And B3, calculating a reflection point independent variable according to the average value, wherein xr=xcenter+a (xcenter-xm), xcenter is the average value, xm is the independent variable corresponding to the maximum value in the n+1 test values, a is a preset parameter and a is greater than 0, for example, a=1.
And B4, performing simulation test on the xr to obtain a corresponding test value f (xr).
And B5, judging whether F (xr) is smaller than the preset threshold F.
If F (xr) < F, executing step B6, and taking the quantum chip parameters corresponding to xr as the quantum chip parameters.
Illustratively, after determining whether f (xr) is less than the preset threshold (i.e., step B5), further comprises:
if not, i.e. F (xr) is greater than or equal to F, executing step B7, and judging whether F (xr) is greater than or equal to the minimum value of the remaining N test values and is smaller than the maximum value of the remaining N test values.
And B8, if yes, that is, F (xr) is greater than or equal to the minimum value F (x 0) in the remaining N evaluation parameters and less than the maximum value F (x (N-1)) in the remaining N evaluation parameters, composing the xr and the remaining N independent variables into N+1 independent variables, composing the F (xr) and the remaining N test values into N+1 test values, and returning to the step B1.
If not, i.e. F (xr) is smaller than the minimum value F (x 0) in the remaining N evaluation parameters, and F (xr) is smaller than the maximum value in the remaining N test values, calculating an expansion point argument and marking it as xe, wherein xe=xcenter+b (xe-xcenter), B is a preset parameter and B > 1, for example, b=2, and executing step B9 to perform a simulation test on xe to obtain a corresponding test value F (xe).
And B10, judging whether f (xe) is smaller than the preset threshold value.
If F (xe) is less than F, executing the step B11, and taking the quantum chip parameters corresponding to xe as optimized quantum chip parameters.
If not, i.e. F (xr) is smaller than the minimum value F (x 0) in the remaining N evaluation parameters, and F (xr) is greater than or equal to the maximum value in the remaining N test values, calculating a shrinkage point independent variable xc, wherein xc=xcenter+c (xr-xcenter), c is a preset parameter, and 0 < c is less than or equal to 0.5, for example, c=0.5, and executing step B12 to perform a simulation test on xc to obtain a corresponding test value F (xc).
And B13, judging whether f (xc) is smaller than the preset threshold value.
If F (xc) < F, executing step B14, and taking the quantum chip parameters corresponding to xc as optimized quantum chip parameters.
Illustratively, after the determining whether f (xe) is less than the preset threshold (i.e., step B10), the method further includes:
if not, i.e. F (xe) is greater than or equal to F, then step B15 is performed to determine if F (xe) is less than F (xr).
And B16, if f (xe) < f (xr), discarding the maximum value and the corresponding independent variable in the remaining N test values, forming the xe, xr and the remaining N-1 independent variables into N+1 independent variables, forming the f (xe), f (xr) and the remaining N-1 test values into N+1 test values, and returning to the step B1.
If not, f (xe) is not less than f (xr), composing xr and the rest N independent variables into N+1 independent variables, composing f (xr) and the rest N test values into N+1 test values, and returning to execute the step B1.
Illustratively, after the determining whether f (xc) is less than the preset threshold (i.e. step B13), the method further includes:
if not, i.e., F (xc) is greater than or equal to F, then B17 is performed to determine if F (xc) is less than the maximum of the initial N+1 test values, i.e., if F (xc) is less than F (N).
And B18, if f (xc) is smaller than the maximum value of the initial N+1 test values, composing xc and the rest N independent variables into N+1 independent variables, composing f (xc) and the rest N test values into N+1 test values, and returning to execute the judgment on whether the minimum value in the N+1 test values is smaller than a preset threshold value.
If not, i.e. f (xc) is greater than or equal to the maximum value of the initial n+1 test values, performing a contraction process on N independent variables except the initial independent variable x0 in the original n+1 independent variables, where the contraction process formula is xn=x0+d (xn-x 0), and obtaining N contracted independent variables, where d is a preset parameter, and 0 < d is less than or equal to 0.5, for example, d=0.5.
And B19, respectively performing simulation test on the N contracted independent variables to obtain corresponding N test values, forming n+1 independent variables by x0 and the N contracted independent variables, forming n+1 test values by f (x 0) and the N test values corresponding to the N contracted independent variables, and returning to the step B1.
And (5) repeating the steps in a circulating way until the optimized quantum chip parameters are obtained.
Illustratively, the preset threshold is set according to a fidelity ideal parameter of two quantum logic gates acting on two of the qubits. Preferably, in this embodiment, the fidelity ideal parameter of the two quantum logic gates acting on the two quantum bits is not less than 99%.
For example, performing a simulation test on n+1 parameter data of the initial vector parameter and each simulation vector parameter, and obtaining n+1 test values corresponding to each parameter data, where the simulation test includes:
and setting the quantum chip parameters according to the values of the corresponding parameter data, obtaining fidelity test values of two quantum logic gates acting on two quantum bits, and obtaining the test values based on the fidelity test values, wherein the test values = 1-fidelity test values.
It should be noted that, the larger the value of the fidelity test value of the quantum chip, the better the performance of the quantum chip, and it is easy to understand that the ideal value of the fidelity test value of the quantum chip is 1, at this time, the performance of the quantum chip is the best, and the corresponding test value is 0. However, in this embodiment, the preset threshold value is 0.01 in consideration of actual process loss and systematic error.
Illustratively, the determining one or more of the quantum chip parameters as parameters to be optimized specifically includes:
the quantum chip parameters specifically comprise C 1 、C 2 、C c 、C 1c 、C 2c 、C 12 、ω 1 、ω 2 τ, ω c ，ω c And also includes omega c on And omega c off Wherein C 1 、C 2 And C c Self-capacitance of the tunable coupler, C 1c 、C 2c And C 12 Coupling capacitances, ω, between the first qubit and the tunable coupler, between the second qubit and the tunable coupler, and between the first qubit and the second qubit, respectively 1 And omega 2 The working frequencies of the first quantum bit and the second quantum bit are respectively, τ is the duration time of the regulating signal of the adjustable coupler, ω c on And omega c off The working frequency and the junction stop frequency of the regulating and controlling signal of the adjustable coupler are respectively, and omega c off Is a non-fixed value, the value depends on C 1 、C 2 、C c 、C 1c 、C 2c 、C 12 、ω 1 、ω 2 Is a value of (a). The researchers found that, among the above parameters, C was selected based on the degree of influence on the performance of the quantum chip and the range of its possible values 1 、C c 、C 1c 、C 2c 、C 12 、ω 1 Omega, omega c on These 7 (i.e., n=7) are parameters to be optimized in the present embodiment, and the remaining parameters are fixed values.
In addition, in step S3, when determining the initial vector parameter according to the initial value of the parameter to be optimized, the quantum chip parameter should satisfy the following requirements when determining the initial value of the parameter to be optimized:
C 1 ＝C 2 ；
C 1c ＝C 2c ；
ω 1 ＝η 1 +ω 2 wherein eta 1 For the firstNon-harmonic parameters of qubits;
τ＝30ns。
based on the same inventive concept, the present embodiment also provides a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements the method of optimizing quantum chip parameters as described above.
Based on the same inventive concept, the present embodiment further provides a computer device, which includes a memory, a processor, and a computer program stored on the memory, where the computer program, when executed by the processor, implements the method for optimizing quantum chip parameters as described above.
In summary, the method for optimizing the quantum chip parameters, the computer readable storage medium and the computer device provided by the invention have the following advantages: when the optimization method is used for optimizing the quantum chip parameters, the parameters to be optimized are first determined from the quantum chip parameters, the parameters to be optimized are expressed into N-dimensional vector parameters, initial vector parameters are then determined according to initial values of the parameters to be optimized, N simulation vector parameters are generated based on the initial vector parameters, simulation tests are respectively carried out on the initial vector parameters and N+1 parameter data of each simulation vector parameter, test values corresponding to the parameter data are obtained, optimization processing is carried out on the N+1 parameter data and the N+1 test values based on a Nelder-Mead algorithm, optimal parameter data are obtained, and quantum chip parameters corresponding to the optimal parameter data are used as optimized quantum chip parameters. The invention optimizes one or more parameter data in the quantum chip parameters based on the Nelder-Mead algorithm to obtain the optimized quantum chip parameters, and applies the optimized quantum chip parameters to the design and manufacture of the quantum chip, thereby improving the reading fidelity and the working performance of the quantum chip.
The above description is only illustrative of the preferred embodiments of the present invention and is not intended to limit the scope of the present invention, and any alterations and modifications made by those skilled in the art based on the above disclosure shall fall within the scope of the appended claims.
Claims (10)
1. The method for optimizing the parameters of the quantum chip is characterized in that two quantum bits coupled through an adjustable coupler are arranged on the quantum chip, and the parameters of the adjustable coupler are regulated by a regulating signal, and the method for optimizing the parameters of the quantum chip comprises the following steps:
determining parameters to be optimized from quantum chip parameters; the quantum chip parameters are parameters of regulation signals of the adjustable coupler, self-capacitance parameters of the adjustable coupler and two quantum bits, coupling capacitance parameters between the adjustable coupler and two quantum bits and coupling parameters between the two quantum bits, and the parameters to be optimized are one or a combination of the parameters; representing the parameters to be optimized into vector parameters of N dimensions; wherein N is the number of the parameters to be optimized;
determining initial vector parameters according to the initial values of the parameters to be optimized;
generating N simulation vector parameters based on the initial vector parameters, wherein the dimension of the simulation vector parameters is also N;
respectively performing simulation test on the initial vector parameters and the total n+1 parameter data of each simulation vector parameter, and obtaining test values corresponding to each parameter data;
and optimizing the N+1 parameter data and the N+1 test values based on a Nelder-Mead algorithm to obtain optimal parameter data, and taking quantum chip parameters corresponding to the optimal parameter data as optimized quantum chip parameters.
2. The method for optimizing parameters of a quantum chip according to claim 1, wherein the parameter data is denoted as an argument xn, wherein n=0, 1,2, … N, and the test value is denoted as f (xn), wherein optimizing the n+1 parameter data and the n+1 test values based on a Nelder-Mead algorithm to obtain optimal parameter data comprises:
judging whether the minimum value in the N+1 test values is smaller than a preset threshold value or not;
if not, discarding the maximum value of the N+1 test values and the corresponding independent variable thereof, and calculating the average value of the rest N independent variables;
calculating a reflection point independent variable based on the average value to be expressed as xr, wherein xr=xcenter+a (xcenter-xm), xcenter is the average value, xm is the independent variable corresponding to the maximum value in the n+1 test values, a is a preset parameter, and a is more than 0;
performing simulation test on xr to obtain a corresponding test value f (xr);
judging whether f (xr) is smaller than the preset threshold value;
if yes, taking the quantum chip parameter corresponding to xr as the quantum chip parameter.
3. The method of optimizing quantum chip parameters of claim 2, further comprising, after determining if f (xr) is less than the preset threshold:
if not, judging whether f (xr) is larger than or equal to the minimum value of the remaining N test values and smaller than the maximum value of the remaining N test values;
if yes, composing xr and the rest N independent variables into N+1 independent variables, composing f (xr) and the rest N test values into N+1 test values, and returning to execute the judgment whether the minimum value in the N+1 test values is smaller than a preset threshold value;
if not, f (xr) is smaller than the minimum value in the remaining N test values, calculating an expansion point independent variable as xe, wherein xe=xcenter+b (xe-xcenter), b is a preset parameter, and b is more than 1;
performing simulation test on xe to obtain a corresponding test value f (xe);
judging whether f (xe) is smaller than the preset threshold value;
if yes, taking the quantum chip parameters corresponding to xe as optimized quantum chip parameters;
if not, f (xr) is greater than or equal to the maximum value of the remaining N test values, calculating a shrinkage point independent variable xc, wherein xc=xcenter+c (xr-xcenter), c is a preset parameter, and 0 < c is less than or equal to 0.5;
performing simulation test on the xc to obtain a corresponding test value f (xc);
judging whether f (xc) is smaller than the preset threshold value;
if so, taking the quantum chip parameters corresponding to the xc as optimized quantum chip parameters.
4. The method for optimizing quantum chip parameters according to claim 3, wherein after the determining whether f (xe) is smaller than the preset threshold value, further comprising:
if not, judging whether f (xe) is smaller than f (xr);
if yes, discarding the maximum value of the remaining N test values and the corresponding independent variables, forming xe, xr and the remaining N-1 independent variables into N+1 independent variables, forming f (xe), f (xr) and the remaining N-1 test values into N+1 test values, and returning to execute the judgment on whether the minimum value of the N+1 test values is smaller than a preset threshold value;
if not, composing xr and the rest N independent variables into N+1 independent variables, composing f (xr) and the rest N test values into N+1 test values, and returning to execute the judgment whether the minimum value in the N+1 test values is smaller than a preset threshold value.
5. The method of claim 4, wherein after determining whether f (xc) is less than the predetermined threshold, further comprising:
if not, judging whether f (xc) is smaller than the maximum value of the initial N+1 test values;
if yes, composing xc and the rest N independent variables into N+1 independent variables, composing f (xc) and the rest N test values into N+1 test values, and returning to execute the judgment whether the minimum value in the N+1 test values is smaller than a preset threshold value;
if not, performing shrinkage processing on N independent variables except the initial independent variable x0 in the original N+1 independent variables, wherein a shrinkage processing formula is xn=x0+d (xn-x 0), and N shrunk independent variables are obtained, wherein d is a preset parameter, and d is more than 0 and less than or equal to 0.5;
and respectively performing simulation tests on the N contracted independent variables to obtain corresponding N test values, forming n+1 independent variables by x0 and the N contracted independent variables, forming n+1 test values by f (x 0) and the N test values corresponding to the N contracted independent variables, and returning to execute the judgment on whether the minimum value in the n+1 test values is smaller than a preset threshold value.
6. The method of optimizing parameters of a quantum chip according to any one of claims 2 to 5, wherein the preset threshold is set according to a fidelity ideal parameter of two quantum logic gates acting on two of the qubits.
7. The method for optimizing quantum chip parameters according to claim 1, wherein n+1 parameter data of the initial vector parameter and each of the simulation vector parameters are respectively subjected to simulation test, and n+1 test values respectively corresponding to each parameter data are obtained, and specifically comprising:
and setting the quantum chip parameters according to the values of the corresponding parameter data, obtaining fidelity test values of two quantum logic gates acting on two quantum bits, and obtaining the test values based on the fidelity test values, wherein the test values = 1-fidelity test values.
8. The method for optimizing quantum chip parameters according to claim 7, wherein the determining one or more of the quantum chip parameters is a parameter to be optimized, specifically comprising:
and determining the self-capacitance parameters of the adjustable coupler, the coupling capacitance parameters between two quantum bits and the adjustable coupler and the working frequency parameters of the adjustable coupler and the two quantum bits as parameters to be optimized, wherein N=7, and the rest parameters are fixed values.
9. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements a method for optimizing quantum chip parameters according to any of claims 1-8.
10. A computer device comprising a memory, a processor and a computer program stored on the memory, which when executed by the processor, implements a method for optimizing quantum chip parameters according to any of claims 1-8.
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Address after: 230088 6th floor, E2 building, phase II, innovation industrial park, 2800 innovation Avenue, Hefei high tech Zone, Hefei City, Anhui Province Applicant after: Benyuan Quantum Computing Technology (Hefei) Co.,Ltd. Address before: 230088 6th floor, E2 building, phase II, innovation industrial park, 2800 innovation Avenue, Hefei high tech Zone, Hefei City, Anhui Province Applicant before: ORIGIN QUANTUM COMPUTING COMPANY, LIMITED, HEFEI |