CN116149423A - Operation method and device on finite field based on cache technology - Google Patents

Operation method and device on finite field based on cache technology Download PDF

Info

Publication number
CN116149423A
CN116149423A CN202111385724.9A CN202111385724A CN116149423A CN 116149423 A CN116149423 A CN 116149423A CN 202111385724 A CN202111385724 A CN 202111385724A CN 116149423 A CN116149423 A CN 116149423A
Authority
CN
China
Prior art keywords
representation
domain
numerical value
target data
generator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202111385724.9A
Other languages
Chinese (zh)
Inventor
苏子浩
陈超
曾思棋
杨永魁
喻之斌
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen Institute of Advanced Technology of CAS
Original Assignee
Shenzhen Institute of Advanced Technology of CAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen Institute of Advanced Technology of CAS filed Critical Shenzhen Institute of Advanced Technology of CAS
Priority to CN202111385724.9A priority Critical patent/CN116149423A/en
Publication of CN116149423A publication Critical patent/CN116149423A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/02—Digital function generators
    • G06F1/03—Digital function generators working, at least partly, by table look-up
    • G06F1/0307—Logarithmic or exponential functions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/552—Powers or roots, e.g. Pythagorean sums
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G06F7/724—Finite field arithmetic
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Optimization (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

The invention provides an operation method, a device, electronic equipment and a storage medium on a finite field based on a cache technology, wherein the method comprises the following steps: acquiring first target data and second target data; according to the first target data and the second target data, respectively searching a first numerical value and a second numerical value corresponding to the first target data and the second target data in a cache fast table, and respectively searching a generating element representation of a first domain and a generating element representation of a second domain corresponding to the first numerical value and the second numerical value in the cache fast table; according to the generator representation of the first domain and the generator representation of the second domain, carrying out operation on the finite domain to obtain an operation value; and according to the operation value, searching a numerical value corresponding to the operation value in the cache fast table, wherein the numerical value is used as an operation result of the first target data and the second target data. The scheme can improve the operation efficiency on the finite field and shorten the operation time.

Description

Operation method and device on finite field based on cache technology
Technical Field
The invention belongs to the technical field of optimization, and particularly relates to an operation method and device on a finite field based on a cache technology.
Background
With the continuous development of the information age, the basic computing power of China rapidly develops in recent years, and especially the number of weak clients rapidly rises. Zero-knowledge proof (ZKP) is an encryption protocol used to calculate integrity and privacy. It can be used in many privacy preserving applications including, but not limited to, verifiable cloud outsources and blockchains. In short, it is a set of cryptographic protocols that allow one party (called prover) to persuade other parties (called verifier) that a computational statement is correct without revealing any information. For example, if the program P outputs the result y on the common input x and the secret input w, using ZKP protocol, the prover can guarantee to the verifier that it knows the secret w satisfying P (x, w) =y without revealing the value of w. As an essential primitive for modern cryptography, ZKP is widely used in many privacy-critical applications to enable secure and verifiable data processing, including electronic voting, online auctions, anonymous vouchers, verifiable database outsourcing, verifiable machine learning, privacy-preserving cryptocurrency, and various intelligent contracts on blockchains. More specifically, the verifiable outsourcing is a promising use case for ZKP, allowing weak clients to outsource computation to powerful clouds and effectively verify the correctness of the returned results. The key technique for using ZKP in practice is its step of generating a proof, which includes computation over a finite field, in particular mainly large polynomial computation and multi-scalar multiplication over elliptic curves.
The existing method is basically the optimization of CPU core scheduling or hardware level, and is embodied on IO and network. The resource allocation algorithm and the resource scheduling algorithm are optimized or innovated, but the algorithms are generally too complex, and the utilization rate of CPU and network bandwidth is only improved. The main obstacle to the use of ZKP in practice is its time-consuming process of generating proof, which is embodied in operations on finite fields, including in particular large polynomial calculations and multi-scalar multiplications on elliptic curves. In current production implementations, the computation over a finite field is time consuming and inefficient to use.
Disclosure of Invention
An objective of the embodiments of the present disclosure is to provide a method, an apparatus, an electronic device, and a storage medium for computing on a finite field based on a cache technology.
In order to solve the technical problems, the embodiments of the present application are implemented in the following manner:
in a first aspect, the present application provides a method for performing an operation on a finite field based on a cache technology, where the method includes:
acquiring first target data and second target data;
according to the first target data and the second target data, respectively searching a first numerical value and a second numerical value corresponding to the first target data and the second target data in a cache fast table, and respectively searching a generating element representation of a first domain and a generating element representation of a second domain corresponding to the first numerical value and the second numerical value in the cache fast table; the cache fast table comprises a numerical value column and a domain generation element representation column, the numerical value column comprises a plurality of numerical values, the domain generation element representation column comprises a plurality of domain generation element representations, and the cache fast table represents the mapping relation between the numerical values and the domain generation element representations;
according to the generator representation of the first domain and the generator representation of the second domain, carrying out operation on the finite domain to obtain an operation value;
and according to the operation value, searching a numerical value corresponding to the operation value in the cache fast table, wherein the numerical value is used as an operation result of the first target data and the second target data.
In one embodiment, the cache fast table further comprises a polynomial expression column, wherein the polynomial expression column comprises a plurality of polynomial expressions, and the polynomial expressions are in mapping relation with the numerical value and the generator expression of the domain.
In one embodiment, the cache fast table further comprises a binary representation column, wherein the binary representation column comprises a plurality of binary representations, and the binary representations are in mapping relation with the numerical value and the generation element representation of the domain.
In one embodiment, the generator of the domain of the finite field is a prime number.
In one embodiment, the number of rows of the cache table is determined from the generator and the power of the domain.
In one embodiment, the cache fast table is constructed by:
acquiring primitive polynomials corresponding to the finite fields;
determining the generator representation of all domains in the generator representation column of the domain of the cache fast table according to the generator and the power of the domain;
determining a polynomial representation corresponding to the generator representation of each domain according to the generator representation of each domain and the primitive polynomial;
determining a binary representation corresponding to each polynomial representation according to each polynomial representation;
determining a corresponding numerical value of each binary representation according to each binary representation;
and obtaining the cache fast table according to the corresponding relation among the domain generator representation, the polynomial representation, the binary representation and the numerical value.
In one embodiment, a generator representation, a polynomial representation, a binary representation, and a value of one of the rows of the cache fast table are set to 0, respectively, where the length of the binary representation is determined by the generator and the power of the field of the finite field.
In a second aspect, the present application provides an arithmetic device on a finite field based on a cache technology, the device comprising:
the acquisition module is used for acquiring the first target data and the second target data;
the first searching module is used for searching a first numerical value and a second numerical value corresponding to the first target data and the second target data in the cache fast table respectively according to the first target data and the second target data, and searching a generating element representation of a first domain and a generating element representation of a second domain corresponding to the first numerical value and the second numerical value in the cache fast table respectively; the cache fast table comprises a numerical value column and a domain generation element representation column, the numerical value column comprises a plurality of numerical values, the domain generation element representation column comprises a plurality of domain generation element representations, and the cache fast table represents the mapping relation between the numerical values and the domain generation element representations;
the processing module is used for carrying out operation on the finite field according to the generator representation of the first field and the generator representation of the second field to obtain an operation value;
and the second searching module is used for searching a numerical value corresponding to the operation value in the cache fast table according to the operation value, wherein the numerical value is used as an operation result of the first target data and the second target data.
In a third aspect, the present application provides an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor, the processor implementing the method of operation on a cache technology-based finite field as in the first aspect when the program is executed by the processor.
In a fourth aspect, the present application provides a readable storage medium having stored thereon a computer program which when executed by a processor implements the method of operation on a finite field based on cache technology as in the first aspect.
The technical scheme provided by the embodiment of the present specification can be seen from the following scheme: the efficiency of the operation on the finite field can be improved, and the operation time can be shortened.
Drawings
In order to more clearly illustrate the embodiments of the present description or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are only some of the embodiments described in the present description, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a flow chart of an operation method on a finite field based on a cache technology provided in the present application;
FIG. 2 is a comparison of computational time consumption using the methods of the present application and the direct method;
fig. 3 is a schematic structural diagram of an arithmetic device on a finite field based on a cache technology provided in the present application;
fig. 4 is a schematic structural diagram of an electronic device provided in the present application.
Detailed Description
In order to make the technical solutions in the present specification better understood by those skilled in the art, the technical solutions in the embodiments of the present specification will be clearly and completely described below with reference to the drawings in the embodiments of the present specification, and it is obvious that the described embodiments are only some embodiments of the present specification, not all embodiments. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are intended to be within the scope of the present disclosure.
In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system configurations, techniques, etc. in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.
It will be apparent to those skilled in the art that various modifications and variations can be made in the specific embodiments of the present disclosure without departing from the scope or spirit of the disclosure. Other embodiments will be apparent to the skilled person from the description of the present application. The specification and examples are exemplary only.
As used herein, the terms "comprising," "including," "having," "containing," and the like are intended to be inclusive and mean an inclusion, but not limited to.
The "parts" in the present application are all parts by mass unless otherwise specified.
The invention is described in further detail below with reference to the drawings and examples.
Referring to fig. 1, a flow chart of an operation method on a finite field based on a cache technology according to an embodiment of the present application is shown.
As shown in fig. 1, the operation method on the finite field based on the cache technology may include:
s110, acquiring first target data and second target data.
Specifically, the first target data and the second target data are data to be operated, and different data can be obtained according to different application scenes.
S120, according to the first target data and the second target data, respectively searching a first numerical value and a second numerical value corresponding to the first target data and the second target data in a cache fast table, and respectively searching a generating element representation of a first domain and a generating element representation of a second domain corresponding to the first numerical value and the second numerical value in the cache fast table; the cache fast table comprises a numerical value column and a domain generation element representation column, the numerical value column comprises a plurality of numerical values, the domain generation element representation column comprises a plurality of domain generation element representations, and the cache fast table characterizes the mapping relation between the numerical values and the domain generation element representations.
Specifically, the cache list is used for storing the mapping relation between the numerical value columns and the generation element representation columns of the domains. The cache list may be stored in a separate storage medium, may be stored in a memory of a device performing the method, or may be stored in another storage device, which is not limited herein, and only needs to be readable by the device performing the method.
In order to facilitate the operation, the cache fast table also comprises a polynomial expression column, wherein the polynomial expression column comprises a plurality of polynomial expressions, and the polynomial expressions are in mapping relation with the numerical value and the generator expression of the domain. The cache fast table also comprises a binary representation column, wherein the binary representation column comprises a plurality of binary representations, and the binary representations are in mapping relation with the numerical value and the generation element representation of the domain.
Wherein the generator of the domain of the finite field is a prime number. The number of lines of the cache fast table is determined according to the generation element and the power of the domain.
Specifically, the header information of the cache express table is shown in table 1.
Table 1 cache header information for fast tables
Generating meta-representations of domains Polynomial representation Binary representation Numerical value
The generator is a special class of elements on the domain, and the power of the generator can traverse all elements on the finite domain. For example: let g be the finite field GF (g w ) On the generator, then the set
Figure BDA0003367061380000051
Includes the field GF (g) w ) All non-zero elements above. Then we apply the generator to the polynomial, GF (g w ) All polynomials in (2) can be solved by the polynomial generator g by powers. I.e. any element a in the domain, can be expressed as a=g k 。GF(g w ) Is a finite field, i.e. the number of elements is finite, but the index k can be infinite, so there is a loop, the loop period being (2 when g=2 w -1). I.e. when k is greater than or equal to (2) w -1) at the time of->
Figure BDA0003367061380000052
Depending on the direction of the look-up table, both the forward and reverse processes may be specified. For example g k =a. The positive process is that k is known to be a, that is, a corresponding "numerical column" is found "in the fast table according to the" generating element representation column of the domain ". The reverse process is to find the corresponding "generator representation column of the domain" from the "value column" in the fast table, knowing a to find k.
In one embodiment, the cache fast table may be constructed by:
acquiring primitive polynomials corresponding to the finite fields;
determining the generator representation of all domains in the generator representation column of the domain of the cache fast table according to the generator and the power of the domain;
determining a polynomial representation corresponding to the generator representation of each domain according to the generator representation of each domain and the primitive polynomial;
determining a binary representation corresponding to each polynomial representation according to each polynomial representation;
determining a corresponding numerical value of each binary representation according to each binary representation;
and obtaining the cache fast table according to the corresponding relation among the domain generator representation, the polynomial representation, the binary representation and the numerical value.
Optionally, setting a generator representation, a polynomial representation, a binary representation and a numerical value of a row of domains in the cache fast table to be 0, 0.
Specifically, after the generator and the power of the finite field are determined, the primitive polynomial corresponding to the finite field can be found. The finite field is GF (2 4 ) An example is described. The generator is 2 and the power is 4, i.e. the cache fast table comprises 16 rows, and the primitive polynomial corresponding to the finite field is P (x) =x 4 +x+1。
The generation element expression columns of the domains in the cache fast table are respectively 0 and x 0 、x 1 、...、x 14 And performing polynomial modulo on the generator representation of each domain and the primitive polynomial respectively to obtain a polynomial representation corresponding to the generator representation of each domain. Extracting coefficients of each item from the polynomial expression respectively to obtain binary expression corresponding to each polynomial expression, obtaining numerical values corresponding to each binary expression by binary conversion, and sequentially filling all the generator expression, the polynomial expression, the binary expression and the numerical values of all domains into the generator expression columns, the polynomial expression columns and the binary expression columns of the domainsAnd obtaining the cache fast table in the representation column and the numerical value column.
Finite field GF (2 4 ) The corresponding cache fast table is shown in table 2.
Table 2 cache fast table
Generating meta-representations of domains Polynomial representation Binary representation Numerical value
0 0 0000 0
x 0 x 0 0001 1
x 1 x 1 0010 2
x 2 x 2 0100 4
x 3 x 3 1000 8
x 4 x+1 0011 3
x 5 x 2 +x 0110 6
x 6 x 3 +x 2 1100 12
x 7 x 3 +x+1 1011 11
x 8 x 2 +1 0101 5
x 9 x 3 +x 1010 10
x 10 x 2 +x+1 0111 7
x 11 x 3 +x 2 +x 1110 14
x 12 x 3 +x 2 +x+1 1111 15
x 13 x 3 +x 2 +1 1101 13
x 14 x 3 +1 1001 9
As can be appreciated, the finite field GF (2 4 ) There are 16 elements in total, then the number of all possible multiplicative combinations is 16 x 16, i.e. 256 possibilities.
S130, carrying out operation on the finite field according to the generator representation of the first field and the generator representation of the second field to obtain an operation value.
And S140, according to the operation value, searching a numerical value corresponding to the operation value in the cache fast table, wherein the numerical value is used as an operation result of the first target data and the second target data.
Specifically, according to the operation performed by the first target data and the second target data, the respectively taken generator representation of the first domain and the exponent of the generator representation of the second domain are operated. That is, assuming that the first target data and the second target data are multiplied, the corresponding indexes of the first domain generator representation and the second domain generator representation should be added, and modulo-calculating the added result (gw-1), the obtained value is the index corresponding to the domain generator representation column.
Assuming that the first target data is 7 and the second target data is 9, calculating the product of the first target data and the second target data, calculating 7*9, looking up the cache table, and generating the element of the 7 corresponding domain to represent x in the column 10 The generator of the corresponding field with index 10,9 represents x in the column 14 The index is 14, 10 and 14 are added to obtain 24, and g w -1=15, then 24% 15=9, i.e. the generator of the corresponding field represents x in the column 9 . Look-up cache fast table x 9 The corresponding value is 10, i.e. 7*9 =10.
Experiment verification
As shown in fig. 2, the calculation method (using the cache fast table) on the finite field based on the cache technology provided by the application and the direct calculation (indicating that the cache technology is not started, that is, the cache fast table is not used) are adopted to perform comparison, the same server is used, a data set containing millions of data samples generated randomly is processed, the data set contains repeated data samples, the time spent by the direct calculation is 204.52 seconds, and the time spent by the method of the application is 41.82 seconds. The time spent computing the data set after using the caching technique is 20.44% of the time when the caching technique is not used, reducing the computation delay by a factor of four. It is conceivable that the optimization effect of the method will be more pronounced with an increasing number of data samples in the data set.
Experimental results show that the calculation method realizes calculation delay optimization on a finite field. Compared with the method without optimization, the method has obvious optimization effect, and the same data set is operated on the same server, and the operation time after optimization is 20.44% of the operation time before optimization.
It should be noted that, the operation method on the finite field based on the cache technology can be applied to the calculation of the finite field, and can also be used in other similar calculation intensive systems, such as deep learning distributed training.
Referring to fig. 3, a schematic structural diagram of an arithmetic device on a finite field based on a cache technology according to an embodiment of the present application is shown.
As shown in fig. 3, the computing device 200 on the finite field based on the cache technology may include:
an acquiring module 210, configured to acquire first target data and second target data;
the first lookup module 220 is configured to lookup, according to the first target data and the second target data, a first value and a second value corresponding to the first target data and the second target data in the cache fast table, and lookup, in the cache fast table, a generator representation of a first domain and a generator representation of a second domain corresponding to the first value and the second value, respectively; the cache fast table comprises a numerical value column and a domain generation element representation column, the numerical value column comprises a plurality of numerical values, the domain generation element representation column comprises a plurality of domain generation element representations, and the cache fast table represents the mapping relation between the numerical values and the domain generation element representations;
the processing module 230 is configured to perform an operation on the finite field according to the generator representation of the first field and the generator representation of the second field to obtain an operation value;
the second searching module 240 is configured to search a value corresponding to the operation value in the cache fast table according to the operation value, where the value is used as an operation result of the first target data and the second target data.
Optionally, the cache fast table further comprises a polynomial expression column, wherein the polynomial expression column comprises a plurality of polynomial expressions, and the polynomial expressions are in mapping relation with the numerical value and the generator expression of the domain.
Optionally, the cache fast table further comprises a binary representation column, the binary representation column comprises a plurality of binary representations, and the binary representations are in mapping relation with the numerical value and the generation element representation of the domain.
Optionally, the generator of the domain of the finite field is a prime number.
Optionally, the number of lines of the cache fast table is determined according to the generator and the power of the domain.
Optionally, the cache fast table is constructed by:
acquiring primitive polynomials corresponding to the finite fields;
determining the generator representation of all domains in the generator representation column of the domain of the cache fast table according to the generator and the power of the domain;
determining a polynomial representation corresponding to the generator representation of each domain according to the generator representation of each domain and the primitive polynomial;
determining a binary representation corresponding to each polynomial representation according to each polynomial representation;
determining a corresponding numerical value of each binary representation according to each binary representation;
and obtaining the cache fast table according to the corresponding relation among the domain generator representation, the polynomial representation, the binary representation and the numerical value.
Optionally, setting a generator representation, a polynomial representation, a binary representation and a numerical value of a row of domains in the cache fast table to be 0, 0.
The embodiment of the method can be executed by the computing device on the finite field based on the cache technology, and the implementation principle and the technical effect are similar and are not repeated here.
Fig. 4 is a schematic structural diagram of an electronic device according to an embodiment of the present invention. As shown in fig. 4, a schematic structural diagram of an electronic device 300 suitable for use in implementing embodiments of the present application is shown.
As shown in fig. 4, the electronic device 300 includes a Central Processing Unit (CPU) 301 that can perform various appropriate actions and processes according to a program stored in a Read Only Memory (ROM) 302 or a program loaded from a storage section 308 into a Random Access Memory (RAM) 303. In the RAM 303, various programs and data required for the operation of the device 300 are also stored. The CPU 301, ROM 302, and RAM 303 are connected to each other through a bus 304. An input/output (I/O) interface 305 is also connected to bus 304.
The following components are connected to the I/O interface 305: an input section 306 including a keyboard, a mouse, and the like; an output portion 307 including a Cathode Ray Tube (CRT), a Liquid Crystal Display (LCD), and the like, a speaker, and the like; a storage section 308 including a hard disk or the like; and a communication section 309 including a network interface card such as a LAN card, a modem, or the like. The communication section 309 performs communication processing via a network such as the internet. The driver 310 is also connected to the I/O interface 306 as needed. A removable medium 311 such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, or the like is installed on the drive 310 as needed, so that a computer program read therefrom is installed into the storage section 308 as needed.
In particular, according to embodiments of the present disclosure, the process described above with reference to fig. 1 may be implemented as a computer software program. For example, embodiments of the present disclosure include a computer program product comprising a computer program tangibly embodied on a machine-readable medium, the computer program containing program code for performing the above-described methods of operation on a cache technology-based finite field. In such an embodiment, the computer program may be downloaded and installed from a network via the communication portion 309, and/or installed from the removable medium 311.
The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
The units or modules described in the embodiments of the present application may be implemented by software, or may be implemented by hardware. The described units or modules may also be provided in a processor. The names of these units or modules do not in some way constitute a limitation of the unit or module itself.
The system, apparatus, module or unit set forth in the above embodiments may be implemented in particular by a computer chip or entity, or by a product having a certain function. One typical implementation is a computer. In particular, the computer may be, for example, a personal computer, a notebook computer, a mobile phone, a smart phone, a personal digital assistant, a media player, a navigation device, an email device, a game console, a tablet computer, a wearable device, or a combination of any of these devices.
As another aspect, the present application also provides a storage medium, which may be a storage medium contained in the foregoing apparatus in the foregoing embodiment; or may be a storage medium that exists alone and is not incorporated into the device. The storage medium stores one or more programs for use by one or more processors in performing the methods of operations described herein on the cache technology-based finite field.
Storage media, including both permanent and non-permanent, removable and non-removable media, may be implemented in any method or technology for storage of information. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of storage media for a computer include, but are not limited to, phase change memory (PRAM), static Random Access Memory (SRAM), dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), read Only Memory (ROM), electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices, or any other non-transmission medium, which can be used to store information that can be accessed by a computing device. Computer-readable media, as defined herein, does not include transitory computer-readable media (transmission media), such as modulated data signals and carrier waves.
It should be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises an element.
In this specification, each embodiment is described in a progressive manner, and identical and similar parts of each embodiment are all referred to each other, and each embodiment mainly describes differences from other embodiments. In particular, for system embodiments, since they are substantially similar to method embodiments, the description is relatively simple, as relevant to see a section of the description of method embodiments.

Claims (10)

1. An operation method on a finite field based on a cache technology, which is characterized by comprising the following steps:
acquiring first target data and second target data;
according to the first target data and the second target data, respectively searching a first numerical value and a second numerical value corresponding to the first target data and the second target data in a cache fast table, and respectively searching a generating element representation of a first domain and a generating element representation of a second domain corresponding to the first numerical value and the second numerical value in the cache fast table; the cache fast table comprises a numerical value column and a domain generation element representation column, wherein the numerical value column comprises a plurality of numerical values, the domain generation element representation column comprises a plurality of domain generation element representations, and the cache fast table characterizes the mapping relation between the numerical values and the domain generation element representations;
according to the generator representation of the first domain and the generator representation of the second domain, carrying out operation on a finite domain to obtain an operation value;
and according to the operation value, searching a numerical value corresponding to the operation value in the cache fast table, wherein the numerical value is used as an operation result of the first target data and the second target data.
2. The method of claim 1, wherein the cache fast table further comprises a polynomial representation column comprising a plurality of polynomial representations, the polynomial representations being in a mapping relationship with the numerical, generator representation of the domain.
3. The method of claim 2, wherein the cache table further comprises a binary representation column comprising a number of binary representations that are mapped to the values, the generator representations of the domains.
4. A method according to claim 3, wherein the generator of the domain of finite fields is a prime number.
5. The method of claim 4, wherein the number of rows of the cache table is determined based on the generator and the power of the field.
6. The method of claim 5, wherein the cache fast table is constructed by:
acquiring a primitive polynomial corresponding to the finite field;
determining the generator representation of all the domains in the generator representation column of the domain of the cache fast table according to the generator of the domain and the power;
determining a polynomial representation corresponding to the generator representation of each domain according to the generator representation of each domain and the primitive polynomial;
determining a binary representation corresponding to each polynomial representation according to each polynomial representation;
determining a corresponding numerical value of each binary representation according to each binary representation;
and obtaining the cache fast table according to the corresponding relation among the generator representation of the domain, the polynomial representation, the binary representation and the numerical value.
7. The method of claim 6, wherein the generator representation, the polynomial representation, the binary representation, and the numerical value of one of the rows of the domain in the cache table are set to 0, respectively, wherein the length of the binary representation is determined by the generator of the domain of the finite field and the power.
8. An arithmetic device on a finite field based on a caching technique, the device comprising:
the acquisition module is used for acquiring the first target data and the second target data;
the first searching module is used for searching a first numerical value and a second numerical value corresponding to the first target data and the second target data in a cache fast table respectively according to the first target data and the second target data, and searching a generating element representation of a first domain and a generating element representation of a second domain corresponding to the first numerical value and the second numerical value in the cache fast table respectively; the cache fast table comprises a numerical value column and a domain generation element representation column, wherein the numerical value column comprises a plurality of numerical values, the domain generation element representation column comprises a plurality of domain generation element representations, and the cache fast table characterizes the mapping relation between the numerical values and the domain generation element representations;
the processing module is used for carrying out operation on a finite field according to the generator representation of the first field and the generator representation of the second field to obtain an operation value;
and the second searching module is used for searching a numerical value corresponding to the operation value in the cache fast table according to the operation value, wherein the numerical value is used as an operation result of the first target data and the second target data.
9. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor implements the method of operation on a cache technology based finite field as claimed in any one of claims 1-7 when executing the program.
10. A readable storage medium having stored thereon a computer program, which when executed by a processor implements the method of operation on a cache technology based finite field as claimed in any of claims 1 to 7.
CN202111385724.9A 2021-11-22 2021-11-22 Operation method and device on finite field based on cache technology Pending CN116149423A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202111385724.9A CN116149423A (en) 2021-11-22 2021-11-22 Operation method and device on finite field based on cache technology

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111385724.9A CN116149423A (en) 2021-11-22 2021-11-22 Operation method and device on finite field based on cache technology

Publications (1)

Publication Number Publication Date
CN116149423A true CN116149423A (en) 2023-05-23

Family

ID=86354861

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202111385724.9A Pending CN116149423A (en) 2021-11-22 2021-11-22 Operation method and device on finite field based on cache technology

Country Status (1)

Country Link
CN (1) CN116149423A (en)

Similar Documents

Publication Publication Date Title
US10778410B2 (en) Homomorphic data encryption method and apparatus for implementing privacy protection
CN110348231B (en) Data homomorphic encryption and decryption method and device for realizing privacy protection
US10075289B2 (en) Homomorphic encryption with optimized parameter selection
US10153894B2 (en) Homomorphic encryption with optimized encoding
CN111832050B (en) Paillier encryption scheme based on FPGA chip implementation for federal learning
CN113221183B (en) Method, device and system for realizing privacy protection of multi-party collaborative update model
KR20080084500A (en) Apparatus for batch verification and method using the same
CN111539027B (en) Information verification method and system based on privacy protection of two parties
EP2385491B1 (en) System and method for comparing private data
CN115605895A (en) Securing access to information using secure multi-party computation and probabilistic data structures
WO2022150428A1 (en) Using secure mpc and vector computations to protect access to information in content distribution
CN116432040B (en) Model training method, device and medium based on federal learning and electronic equipment
CN116010678B (en) Method, device and equipment for inquiring trace
CN116149423A (en) Operation method and device on finite field based on cache technology
US11456862B2 (en) Secure computation system, secure computation apparatus, secure computation method, and recording medium
US20240005022A1 (en) Privacy-preserving dataset sketches that can be joined non-interactively
JP2015135452A (en) Pairing computation device, multi-pairing computation device and program
AU2018320433A1 (en) Share generating device, share converting device, secure computation system, share generation method, share conversion method, program, and recording medium
CN118114774B (en) Large model inference method, large model inference device, electronic device, storage medium, and program product
CN117118637B (en) Data processing method, device, equipment and computer readable storage medium
AU2020425196B2 (en) Secure computation apparatus, secure computation method, and program
CN116074008A (en) Data processing method, device, electronic equipment and computer readable medium
CN117880100A (en) Resource determination method, device, computer equipment, medium and product
JP5366758B2 (en) Parameter setting device, parameter setting method, program
US20220321555A1 (en) Systems, apparatus, and methods for verifying a password utilizing commitments

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication