CN116137373A - Power divider and electronic device - Google Patents

Power divider and electronic device Download PDF

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Publication number
CN116137373A
CN116137373A CN202210158323.8A CN202210158323A CN116137373A CN 116137373 A CN116137373 A CN 116137373A CN 202210158323 A CN202210158323 A CN 202210158323A CN 116137373 A CN116137373 A CN 116137373A
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China
Prior art keywords
admittance
odd
tunable
power divider
reactor
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CN202210158323.8A
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Chinese (zh)
Inventor
余敏
罗昕
陈一
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Priority to EP22206865.2A priority Critical patent/EP4184708A1/en
Priority to US17/988,566 priority patent/US20230155271A1/en
Publication of CN116137373A publication Critical patent/CN116137373A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P5/00Coupling devices of the waveguide type
    • H01P5/12Coupling devices having more than two ports
    • H01P5/16Conjugate devices, i.e. devices having at least one port decoupled from one other port
    • H01P5/18Conjugate devices, i.e. devices having at least one port decoupled from one other port consisting of two coupled guides, e.g. directional couplers
    • H01P5/184Conjugate devices, i.e. devices having at least one port decoupled from one other port consisting of two coupled guides, e.g. directional couplers the guides being strip lines or microstrips
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00Details of, or arrangements associated with, antennas
    • H01Q1/50Structural association of antennas with earthing switches, lead-in devices or lightning protectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q15/00Devices for reflection, refraction, diffraction or polarisation of waves radiated from an antenna, e.g. quasi-optical devices
    • H01Q15/24Polarising devices; Polarisation filters 
    • H01Q15/242Polarisation converters
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q3/00Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system
    • H01Q3/26Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the relative phase or relative amplitude of energisation between two or more active radiating elements; varying the distribution of energy across a radiating aperture
    • H01Q3/28Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the relative phase or relative amplitude of energisation between two or more active radiating elements; varying the distribution of energy across a radiating aperture varying the amplitude
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q3/00Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system
    • H01Q3/26Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the relative phase or relative amplitude of energisation between two or more active radiating elements; varying the distribution of energy across a radiating aperture
    • H01Q3/30Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the relative phase or relative amplitude of energisation between two or more active radiating elements; varying the distribution of energy across a radiating aperture varying the relative phase between the radiating elements of an array
    • H01Q3/34Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the relative phase or relative amplitude of energisation between two or more active radiating elements; varying the distribution of energy across a radiating aperture varying the relative phase between the radiating elements of an array by electrical means

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Abstract

A power divider and an electronic device are provided. The power splitter includes a total port having an input characteristic admittance; a first output port having a first characteristic admittance; a second output port having a second characteristic admittance, the second characteristic admittance and the first characteristic admittance being in a predetermined proportional relationship; a first regulation branch coupled between the total port and the first output port; and a second tuning branch coupled between the total port and the second output port, the input characteristic admittance being a sum of admittances exhibited by the first tuning branch and the second tuning branch at the total port, the admittances exhibited by the first tuning branch and the second tuning branch at the total port being adjustable and such that the input characteristic admittance is equal to the sum of the first characteristic admittance and the second characteristic admittance. By providing first and second regulation branches, an impedance matching and power divider is provided that enables both amplitude and phase of the output current to be adjusted, thereby enabling variable output of both common mode differential mode modes.

Description

Power divider and electronic device
Technical Field
The present application relates generally to the field of power splitters. More particularly, the present application relates to a power splitter and an electronic device including the same.
Background
The power divider is a device for dividing one input signal energy into two or more paths of equal or unequal energy, and can also reversely combine multiple paths of signal energy into one path of output, and at the moment, the power divider can also be called a combiner. Certain isolation should be ensured between the output ports of one power divider. The power divider is generally divided into one-by-two (one input and two output), one-by-three (one input and three output) and the like by output. The main technical parameters of the power divider include power loss (including insertion loss, distribution loss and reflection loss), voltage standing wave ratio of each port, isolation degree, amplitude balance degree, phase balance degree, power capacity, frequency bandwidth and the like among the power distribution ports.
The power divider is widely applied to microwave and millimeter wave circuits, and in a feed network of an array antenna, the power divider can divide one signal into multiple signals; the method is applied to the microwave solid-state amplifier, and can synthesize a plurality of signals into a higher-power output signal. The power divider is a key microwave component of the solid-state transmitter, and the design quality of the power divider is directly related to the performance quality of the solid-state transmitter such as efficiency, amplitude-frequency characteristics and the like.
Disclosure of Invention
The present application provides a compact power divider and associated electronic device capable of adjusting the amplitude and phase of an output current.
In a first aspect of the present application, a power divider is provided. The power divider includes a total port, a first output port, a second output port, a first regulation branch, and a second regulation branch. The total port has an input characteristic admittance. The first output port has a first characteristic admittance. The second output port has a second characteristic admittance, the second characteristic admittance being in a predetermined proportional relationship with the first characteristic admittance. A first regulation branch is coupled between the total port and the first output port. A second regulation branch is coupled between the total port and the second output port. The input characteristic admittance is a sum of admittances presented by the first and second conditioning branches at the total port. The admittances presented by the first and second conditioning branches at the total port are adjustable and such that the input characteristic admittance is equal to the sum of the first and second characteristic admittances.
Through setting up first regulation branch road and second regulation branch road, this application provides an impedance match and can realize output current's amplitude and the adjustable power distributor of phase place to realize the variable output of two kinds of modes of common mode differential mode.
In one implementation, the first tuning branch includes a first odd-even mode circuit and a first tunable reactor, and the first odd-even mode circuit has a first odd-even mode admittance and a first even-even mode admittance; and the second tuning branch comprises a second odd-even mode circuit and a second tunable reactor, and the second odd-even mode circuit has a second odd-even mode admittance and a second even-even mode admittance, and wherein the admittances of the first and second tunable reactors are tunable and differ by a fixed value.
In one implementation, a first odd-even mode circuit and the first tunable reactor are coupled in parallel to a location between the total port and the first output port, and the second odd-even mode circuit and the second tunable reactor are coupled in parallel to a location between the total port and the second output port.
In one implementation, the admittances of the first odd-even mode circuit, the second odd-even mode circuit, the first tunable reactor, and the second tunable reactor may satisfy the following relationship:
Figure BDA0003513617470000021
wherein the method comprises the steps of
Figure BDA0003513617470000022
For said first odd mode admittance, < >>
Figure BDA0003513617470000023
For said second even mode admittance, < >>
Figure BDA0003513617470000024
For said first even mode admittance, < >>
Figure BDA0003513617470000025
For the second odd mode admittance, Y 1 For the first characteristic admittance, Y 2 For the second characteristic admittance +.>
Figure BDA0003513617470000026
And->
Figure BDA0003513617470000027
Admittances of the first tunable reactor and the second tunable reactor, respectively. In this way, impedance matching of the power divider input and output can be achieved. Meanwhile, admittances of the first adjustable reactor and the second adjustable reactor can be adjusted between positive infinity and negative infinity respectively, so that the ratio of current amplitude output by the power divider can be adjusted at will between 0:1 and 1:1 and/or between 1:1 and 1:0, and the phase difference of output currents can be adjusted at will between 0 and 180 degrees.
In one implementation, a power splitter includes a total port, a first output port, a second output port, a first regulation leg, and a second regulation leg. The total port has an input characteristic admittance. The first output port has a first characteristic admittance. The second output port has a second characteristic admittance, the second characteristic admittance being in a predetermined proportional relationship with the first characteristic admittance. A first regulation branch is coupled between the total port and the first output port. A second regulation branch is coupled between the total port and the second output port. The input characteristic admittance is a sum of admittances presented by the first and second conditioning branches at the total port. The admittances presented by the first and second conditioning branches at the total port are adjustable. The first tuning branch comprises a first odd-even mode circuit and a first tunable reactor, and the first odd-even mode circuit has a first odd-even mode admittance and a first even-even mode admittance; and the second tuning branch includes a second odd-even mode circuit and a second tunable reactor, and the second odd-even mode circuit has a second odd-even mode admittance and a second even-even mode admittance. The admittances of the first odd-even mode circuit, the second odd-even mode circuit, the first tunable reactor, and the second tunable reactor may satisfy the following relationship:
Figure BDA0003513617470000028
Wherein the method comprises the steps of
Figure BDA0003513617470000029
For said first odd mode admittance, < >>
Figure BDA00035136174700000210
For said second even mode admittance, < >>
Figure BDA00035136174700000211
For said first even mode admittance, < >>
Figure BDA00035136174700000212
For the second odd mode admittance, Y 1 For the first characteristic admittance, Y 2 For the second characteristic admittance +.>
Figure BDA00035136174700000213
And->
Figure BDA00035136174700000214
Admittances of the first tunable reactor and the second tunable reactor, respectively. In this way, impedance matching of the power divider input and output can be achieved, and by adjusting the admittances of the first and second tunable reactors, the ratio of the current amplitudes of the power divider output can be made arbitrarily adjustable between 0:1 to 1:1 and/or 1:1 to 1:0, and the phase difference of the output currents can be made arbitrarily adjustable between 0 to 180 °.
In one implementation, the first and second odd-even mode circuits each include pairs of microstrip lines arranged in parallel. The use of microstrip lines to implement odd-even mode circuits can further promote miniaturization and low cost of the power splitter.
In one implementation, the microstrip line of a first odd-even mode circuit is grounded, and/or the microstrip line of the second odd-even mode circuit is grounded.
In one implementation, the microstrip line pairs of the first odd-even mode circuit are shorted via shorting lines, and/or the microstrip line pairs of the second odd-even mode circuit are shorted via shorting lines.
In one implementation, the microstrip line pairs of the first odd-even mode circuit are symmetrical with respect to a midline therebetween and have a local widening/local narrowing, and/or the microstrip line pairs of the second odd-even mode circuit are symmetrical with respect to a midline therebetween and have a local widening/local narrowing.
In one implementation, a capacitance and/or an inductance is provided between the microstrip line pairs of the first odd-even mode circuit, and/or a capacitance and/or an inductance is provided between the microstrip line pairs of the second odd-even mode circuit. The adjustment of admittances of the first parity modulo circuit and the second parity modulo circuit can be realized in all the above modes, so that the realization mode of the parity modulo circuit is more flexible.
In one implementation, the first tunable reactor includes a varactor; and/or the second tunable reactor comprises a varactor. The use of the varactor as the tunable reactor can simplify the design and manufacture of the power splitter and promote miniaturization of the power splitter.
In one implementation, the power divider may further include an adjustment component including an adjustment port coupled to the first and second tunable reactors to adjust admittances of the first and second tunable reactors by adjusting voltage values applied to the first and second tunable reactors. This arrangement enables the adjustment of the admittances of the first and second tunable reactors in a simple and efficient manner. In one implementation, the adjustment component may also be another component independent of the power divider.
In one implementation, at least one of the first and second tunable reactors includes a variable length transmission line assembly. The power divider may be implemented in a cost-effective manner without affecting existing circuitry.
In one implementation, a variable length transmission line assembly includes: a multi-segment transmission line; and a plurality of switches connected in parallel and/or in series between the plurality of segments of transmission lines. This implementation enables the varactor to be implemented in a simple and efficient structure.
In one implementation, the power divider may further include an adjustment component including an adjustment port coupled to the first and second tunable reactors to adjust admittances of the first and second tunable reactors by adjusting states of the plurality of switches.
In one implementation, the transmission line includes a microstrip line. This arrangement enables the varactors, and thus the entire power divider, to be manufactured more easily.
A second aspect of the present application provides an electronic device. The electronic device comprising a power splitter as described in the first aspect hereinbefore; and an antenna, a first radiating element and a second radiating element of a pair of radiating elements of the antenna being coupled to a first output port and a second output port of the power divider, respectively. The amplitude and phase adjustable excitation current is respectively provided for the antenna pair of the wireless access point, so that the radiation pattern, polarization and beam angle and width of the antenna pair are adjusted.
Drawings
The above and other features, advantages and aspects of embodiments of the present application will become more apparent by reference to the following detailed description when taken in conjunction with the accompanying drawings. In the drawings, wherein like or similar reference numerals designate like or similar elements, and wherein:
FIG. 1 illustrates a schematic diagram of a power divider according to an embodiment of the present application;
FIG. 2 illustrates a schematic diagram of a parity mode circuit according to an embodiment of the present application;
FIG. 3 illustrates a pi-shaped equivalent network schematic diagram of a parity mode circuit in accordance with an embodiment of the present application;
FIG. 4 illustrates a generalized output impedance schematic of a tunable reactor according to an embodiment of the present application;
fig. 5 shows a schematic diagram of a tunable reactor implemented with a variable length transmission line assembly according to an embodiment of the present application;
FIG. 6 illustrates a schematic of radiation and phase of an output current of a power divider according to an embodiment of the present application;
FIG. 7 shows a simplified schematic diagram of a power splitter according to an embodiment of the application;
FIG. 8 illustrates a simplified schematic diagram of a first parity mode circuit of a power splitter according to an embodiment of the present application;
FIG. 9 shows a simplified schematic diagram of a second parity mode circuit of a power splitter according to an embodiment of the present application; and
Fig. 10 shows a radiation pattern of an antenna when the power splitter feeds the antenna according to an embodiment of the present application.
Detailed Description
Embodiments of the present application will be described in more detail below with reference to the accompanying drawings. While certain embodiments of the present application are shown in the drawings, it is to be understood that the present application may be embodied in various forms and should not be construed as limited to the embodiments set forth herein, but rather are provided to provide a more thorough and complete understanding of the present application. It should be understood that the drawings and examples of the present application are for illustrative purposes only and are not intended to limit the scope of the present application.
In the description of embodiments of the present application, the terms "first," "second," and the like may refer to different or the same objects.
It should be understood that in this application, "coupled" may be understood as directly coupled and/or indirectly coupled. Direct coupling may also be referred to as "electrical connection," meaning that the components are in physical contact and electrically conductive; the circuit structure can also be understood as a form of connecting different components through solid circuits such as copper foils or wires of a printed circuit board (printed circuit board, PCB) and the like which can transmit electric signals; an "indirect coupling" is understood to mean that the two conductors are electrically conductive by means of a space/no contact. In one embodiment, the indirect coupling may also be referred to as capacitive coupling, such as by coupling between a gap between two conductive elements to form an equivalent capacitance to effect signal transmission.
Hereinafter, terms that may appear in the embodiments of the present application are explained.
Switching on: the above electrical connection or indirect coupling means may be used to conduct or connect two or more components to perform signal/energy transmission, which may be called on.
Antenna pattern: also called radiation pattern. Refers to a pattern of the relative field strength (normalized modulus) of the antenna radiation field as a function of direction at a distance from the antenna, typically represented by two mutually perpendicular planar patterns passing through the antenna's maximum radiation direction.
The antenna pattern typically has a plurality of radiation beams. The radiation beam with the greatest radiation intensity is called a main lobe, and the remaining radiation beams are called side lobes. Among the side lobes, the side lobe in the opposite direction to the main lobe is also called the back lobe.
Beam width: the beam width is divided into a horizontal beam width and a vertical beam width. The horizontal beam width refers to the included angle between two directions of reducing the radiation power by 3dB at the two sides of the maximum radiation direction in the horizontal direction; the vertical beam width refers to the angle between the two directions in which the radiation power is reduced by 3dB on both sides of the maximum radiation direction in the vertical direction.
Ground/floor: may refer broadly to at least a portion of any ground layer, or grounded metal layer, etc., within an electronic device, or at least a portion of any combination of any of the above ground layers, or ground plates, or ground components, etc., and "ground/floor" may be used to ground components within an electronic device. In one embodiment, the "ground/floor" may be a ground layer of a circuit board of the electronic device, or may be a ground plate formed by a middle frame of the electronic device or a ground metal layer formed by a metal film under a screen. In one embodiment, the circuit board may be a printed circuit board (printed circuit board, PCB). In one embodiment, the circuit board includes a dielectric substrate, a ground layer, and a trace layer, the trace layer and the ground layer being electrically connectable through the via. In one embodiment, components such as a display, touch screen, input buttons, transmitter, processor, memory, battery, charging circuit, system on chip (SoC) structure, etc., may be mounted on or connected to a circuit board; or electrically connected to trace layers and/or ground layers in the circuit board. For example, the radio frequency module is disposed on the trace layer.
Any of the above ground layers, or ground plates, or ground metal layers are made of conductive materials. In one embodiment, the conductive material may be any of the following materials: copper, aluminum, stainless steel, brass, and alloys thereof, copper foil on an insulating substrate, aluminum foil on an insulating substrate, gold foil on an insulating substrate, silver plated copper foil on an insulating substrate, silver foil and tin plated copper on an insulating substrate, cloth impregnated with graphite powder, graphite coated substrate, copper plated substrate, brass plated substrate, and aluminized substrate. Those skilled in the art will appreciate that the ground layer/plate/metal layer may be made of other conductive materials.
Transmission line, which refers to the connection line between the transceiver and the radiating element. The system connecting the radiating elements of the antenna and the transceiver is called a feed system. The feeder line is further divided into a wire transmission line, a coaxial line transmission line, a waveguide, a microstrip line, or the like. At the transmitting end, the modulated high-frequency oscillation current (energy) generated by the transmitter is input into the transmitting antenna (the feeder can directly transmit current waves or electromagnetic waves according to different frequencies and forms) through a feeder, and the transmitting antenna converts the high-frequency current or guided waves (energy) into radio waves-free electromagnetic waves (energy) to radiate to the surrounding space. During reception, radio waves (energy) are converted into high-frequency currents or guided waves (energy) by a receiving antenna and transmitted to a receiver via a feeder. From the above, it can be seen that the antenna is not only a means for radiating and receiving radio waves, but also an energy converter, which is an interface device between a circuit and a space. The feed end or feed point refers to the end or vicinity of the end of the radiating element that is connected to the feed line.
Impedance and impedance matching: the impedance of an antenna generally refers to the ratio of the voltage to the current at the input of the antenna. Antenna impedance is a measure of the resistance of an electrical signal in an antenna. In general, the input impedance of an antenna is complex, the real part is called the input resistance, denoted by R; the imaginary part is called the input reactance and is denoted Xi. Antennas having an electrical length much less than the operating wavelength have a large input reactance, e.g., short dipole antennas have a large capacitive reactance; the electrically small loop antenna has a large inductive reactance. The very thin diameter half wave vibrator input impedance is about 73.1+ i42.5 ohms. In practical applications, for ease of matching, it is generally desirable that the input reactance of the dipoles be zero, and the length of the dipoles at this time is referred to as the resonant length. The length of the resonant half-wave oscillator is slightly shorter than half the wavelength in free space, which is generally estimated to be 5% shorter in engineering. The input impedance of an antenna is related to factors such as the geometry, size, feed point location, operating wavelength, and surrounding environment of the antenna. When the diameter of the line antenna is thicker, the input impedance changes smoothly with the frequency, and the impedance bandwidth of the antenna is wider.
The main purpose of studying the antenna impedance is to achieve matching between the antenna and the feed line. To match the transmitting antenna to the feed line, the input impedance of the antenna should be equal to the characteristic impedance of the feed line. To match the receiving antenna to the receiver, the input impedance of the antenna should be equal to the complex conjugate of the load impedance. Typically the receiver has a real impedance. When the impedance of the antenna is plural, it is necessary to remove the reactance portions of the antenna and equalize them with a matching network.
When the antenna is matched with the feeder, the power transmitted from the transmitter to the antenna or from the antenna to the receiver is maximized, no reflected wave appears on the feeder, the reflection coefficient is equal to zero, and the standing wave coefficient is equal to 1. The quality of the matching of the antenna and the feeder is measured by the reflection coefficient of the input end of the antenna or the standing wave ratio. For a transmitting antenna, if the matching is not good, the radiation power of the antenna is reduced, the loss on a feed line is increased, the power capacity of the feed line is also reduced, and the phenomenon of transmitter frequency traction, namely the change of oscillation frequency, is also caused when the power capacity of the feed line is severe.
Characteristic impedance: also called "characteristic impedance", which is not a direct current resistor, belongs to the concept of long line transmission and represents an impedance determined by the characteristics of the line itself. In the high frequency range, in the process of signal transmission, an instantaneous current is generated between the signal line and the reference plane (power supply or ground plane) due to the establishment of an electric field, if the transmission line is isotropic, a current I always exists as long as the signal is transmitted, and if the output level of the signal is V, the transmission line is equivalent to a resistor with the size of V/I in the process of signal transmission, and the equivalent resistor is called the characteristic impedance Z of the transmission line. During transmission of the signal, if the characteristic impedance of the transmission path changes, the signal will reflect at the junction where the impedance is discontinuous. The characteristic impedance is measured in ohms. The line impedance will be determined by several factors: line width, copper thickness, dielectric layer thickness. Once the PCB is designed, the impedance of each line is theoretically determined, since several of the above elements have been determined. As the high-band frequency increases, the characteristic impedance becomes asymptotically smaller than a fixed value. For example, the coaxial line would be 50 or 75 ohms; whereas twisted pair wires (for telephone and network communications) would be 100 ohms (above 1 MHz).
Admittance, which is a collective term for conductance and susceptance, is defined in power electronics as the inverse of impedance, denoted by Y, in siemens, abbreviated to siemens (S). As with impedance, admittance is also a complex number, consisting of a real part (conductance G) and an imaginary part (susceptance B): y=g+ib. Admittance is a vector, consisting of two scalar quantities: electrical conductance and susceptance. The sign of the conductance is G to describe how fluent the load charge passes through the conductor. The easier the charge passes through, the higher the conductance value. The conductance value may be used for both alternating current and direct current. Susceptance is denoted B to describe the ready state of an electronic component, an electronic circuit, or the amount of energy released by the system when the voltage changes. The total admittance of the parallel circuit is equal to the sum of the admittances. The total admittance of the series circuit is equal to the inverse of the sum of the inverse of the admittances.
The odd-even mode structure, also called odd-even mode circuit or coupling microstrip line, is composed of two parallel microstrip lines which are close to each other. The coupling microstrip line has two structures of asymmetry and symmetry. The two microstrip lines are identical in size and are symmetrically coupled microstrip lines, and the two microstrip lines are not identical in size and are asymmetrically coupled microstrip lines.
Odd mode coupling: the coupling with opposite propagation directions in the two strip lines is called odd mode coupling, and the corresponding characteristic impedance is odd mode impedance; coupling of even mode: the coupling in which the propagation directions of the two strip lines are the same is called even mode coupling, and the corresponding characteristic impedance is even mode impedance. The values of the two characteristic impedances are influenced by the geometric dimension W/h of the coupled microstrip line, wherein W is the line width of the microstrip line, and h is the thickness of the dielectric substrate where the microstrip line is located.
When a reactor is energized by a conductor, a magnetic field is induced in a certain space occupied by the reactor, so that all current-carrying electric conductors have a general induction performance.
Varactors, also known as varactors, are low power diodes used for automatic frequency control and tuning. By applying a reverse voltage, the capacitance of the PN junction is changed. Therefore, it is used for automatic frequency control, sweep oscillation, frequency modulation, tuning, and the like. In general, although a silicon diffusion diode is used, a diode specially fabricated by an alloy diffusion type, an epitaxial bonding type, a double diffusion type, or the like may be used, and the rate of change of electrostatic capacity of these diodes with respect to voltage is particularly large. The junction capacitance changes along with the reverse voltage VR, replaces the variable capacitance, is used as a tuning loop, an oscillating circuit and a phase-locked loop, is commonly used for channel switching and tuning circuits of a television tuner, and is mostly made of silicon materials. The varactor diode for frequency multiplication has the same operation principle as the varactor diode for automatic frequency control, but is constructed to withstand high power.
The open ends, closed ends mentioned in the above embodiments are for example relative to ground, closed ends are grounded, open ends are not grounded, or for example closed ends are electrically connected to other electrical conductors, open ends are not electrically connected to other electrical conductors.
In addition, the definitions of position, distance, etc. in the above description of the present application, such as intermediate or intermediate positions, are all defined with respect to the current state of the art, and are not strictly defined in a mathematical sense. For example, the middle position of the conductor refers to the middle point of the conductor, and in practical application, the connection part of other components (such as a feeder line and a grounding branch) and the conductor covers the middle point. The middle position of the slot or the middle position of one side of the slot refers to the midpoint of one side of the slot, and in practical application, refers to the fact that the connection part of other components (such as a feeder) and the side covers the midpoint. The provision of a slit in the middle of one side of the slot means that the slit in practice covers the midpoint of that side where it is located.
The feeding point mentioned in the above of the present application may refer to any point in the connection area (which may also be referred to as connection) of the feeding line and the conductor, such as a center point. The distance from the point (e.g., feed point, connection point, ground point) to the slot or the slot to the point may be the distance from the point pointing to the midpoint of the slot or the distance from the point pointing to the ends of the slot.
The technical scheme provided by the application is suitable for the electronic equipment adopting one or more of the following communication technologies: bluetooth (BT) communication technology, global positioning system (Global Positioning System, GPS) communication technology, wireless Local Area Network (WLAN) communication technology, cellular network communication technology, and the like. The electronic device in the embodiment of the present application may include a device that the user front end directly interfaces with the operator network, including but not limited to: base station equipment, wireless access points, telephones, wireless routers, firewalls, computers, light cats, 4G to WiFi wireless routers, and the like. The electronic device in the embodiment of the application can also comprise a mobile phone, a tablet personal computer, a notebook computer, an intelligent home, an intelligent bracelet, an intelligent watch, an intelligent helmet, intelligent glasses and the like. The electronic device may also be a handheld device, computing device or other processing device connected to a wireless modem, an in-vehicle device, etc. with wireless communication capabilities.
The power divider can also be used as a power synthesizer, is commonly applied to various microwave radio frequency systems such as mixers, power amplifying circuits, large-scale Multi-input Multi-output (MIMO) array antennas, phased array radar antennas and the like, and mainly realizes the functions of redistribution and recombination of signal power. With the rapid development of modern communication systems and the ever-increasing trend of integrated circuit fabrication processes, future power splitters will necessarily be developed toward smaller circuit sizes, more functionality, higher reliability, and lower cost.
Currently, antennas are evolving from simple antennas with unchanged indicators towards reconfigurable antennas. The general antenna structure is fixed, and the beam pattern index is fixed. With the improvement of capacity requirements of wireless communication and the addition of requirements of anti-interference, sensing measurement and the like, the original invariable antenna is difficult to meet scene requirements. There is therefore a need for a reconfigurable antenna with variable antenna index (e.g., beam pattern).
One main technical solution of a beam reconfigurable antenna is a dual-port antenna based on two modes of operation. The antenna structure has a first mode (also called a common mode) and a second mode (also called a differential mode), and has different beam directions and beam widths. The two ports of the antenna are respectively operated in a first mode and a second mode when the same-amplitude in-phase current and the same-amplitude opposite-phase current are fed. In the first mode, the direction of the induced current on the radiating element of the antenna is the same, and in the second mode, the direction of the induced current on the radiating element of the antenna is opposite. Thereby providing antennas with high isolation and different beam directions and widths.
In the feed network of a conventional antenna, there is an amplitude-modulated variable power divider for providing two or more outputs of excitation current to radiating elements, respectively. The principle of the amplitude-modulated variable power divider is that the variable capacitive reactance and the variable inductive reactance are respectively connected in parallel on the output paths of the power divider, and finally the impedance of two output branches is changed. The amplitude of the output current on the output branch varies based on the principle of impedance division. However, such a variable power divider can only provide an output current (excitation current) of variable amplitude, and cannot achieve phase adjustment of the output current.
To solve or at least partially solve the above-mentioned or other potential problems existing in the power divider 100, the embodiments of the present application provide a power divider 100, which can not only enable the amplitude of the current output on the output port to be adjustable, but also enable the phase of the output current to be adjustable, so as to enable at least any switching and adjustment between the first mode and the second mode in the antenna to be satisfied, and finally enable the radiation pattern of the antenna and the adjustment of the beam angle and the width.
Fig. 1 shows a schematic diagram of a power divider 100 according to an embodiment of the present application. As shown in fig. 1, a power splitter 100 according to an embodiment of the present application generally includes a total port 101 as an input port, two output ports, and a regulating circuit coupled between the input port and the output ports. The total port 101 has a characteristic admittance. For ease of description, this feature admittance is referred to as the input feature admittance, as distinguished from other feature admittances. The two output ports are a first output port 102 and a second output port 103, respectively. The first output port 102 has a first characteristic admittance. The second output port 103 has a second characteristic admittance. The first characteristic admittance and the second characteristic admittance may have a predetermined proportional relationship. The input characteristic admittance is equal to the sum of the first characteristic admittance and the second characteristic admittance so that the total port of the power divider is impedance matched. For example, in some embodiments, the first characteristic admittance and the second characteristic admittance may be made equal by selecting appropriate transmission lines, i.e., the ratio of the two is 1:1. Hereinafter, the inventive concept according to the present application will be mainly described by taking an example that two characteristic admittances are equal. It should be understood that the other proportional relationships are similar, and will not be described in detail later.
The regulating circuit comprises a first regulating branch 1041 coupled between the total port 101 and the first output port 102 and a second regulating branch 1042 coupled between the total port 101 and the second output port 103. The admittances presented at the total port 101 by the first and second conditioning branches 1041, 1042 in the power divider 100 according to embodiments of the present application are both adjustable and the sum of both equals the input characteristic admittances. The admittance of the conditioning branches as presented at the total port 101 refers to the admittance of the overall structure as seen at the total port with each conditioning branch as a whole and the output port. The adjustable means that both can be adjusted within a certain range. By making the input characteristic admittance equal to the first characteristic admittance and the second characteristic admittance, the total port 101 of the power divider 100 can be impedance matched.
In this way, while impedance matching is achieved, by adjusting the admittances of the first and second adjustable branches, the adjustment of the amplitude and phase of the current at the first and second output ports 102, 103 can be achieved. In this manner, the power divider 100 may be applied to any suitable application to achieve the desired function. For example, in some embodiments, the power splitter 100 may be used to provide a feed for a radiating element pair of an antenna of a wireless access point. By coupling the first output port 102 and the second output port 103 of the power splitter 100 to the pair of radiating elements, respectively, to provide the pair of radiating elements with an excitation current with adjustable amplitude and phase, real-time adjustment of the radiation pattern and beam angle and width of the pair of antennas can be achieved.
The principles according to the present application will be described below in connection with different embodiments. In some embodiments, as shown in fig. 1, the first tuning branch 1041 may include a first parity modulo circuit 1043 and a first tunable reactor 1044. The first odd-even mode circuit 1043 and the first tunable reactor 1044 are coupled in parallel between the total port 101 and the first output port 102. The first odd-even mode circuit 1043 has a first odd mode admittance and a first even mode admittance. Similarly, the second tuning leg 1042 may include a second odd-even mode circuit 1045 and a second tunable reactor 1046. A second odd-even mode circuit 1045 and a second tunable reactor 1046 are coupled in parallel between the total port 101 and the second output port 103. The second odd-even mode circuit 1045 has a second odd mode admittance and a second even mode admittance. Fig. 2 shows a schematic diagram of a odd-even mode circuit, wherein the circuit is in an odd mode when the currents of the two ports of the odd-even mode circuit flow in opposite directions, the odd-even mode circuit having a first odd mode admittance. When the currents of the two ports are in the same direction, the circuit is in an even mode, and the even mode circuit has a first even mode admittance. Fig. 3 shows a pi-shaped equivalent network schematic of a parity-mode circuit. From fig. 3 and according to the definition of the parity mode circuit, it can be determined that the odd mode admittance and the even mode admittance of the parity mode mechanism shown in fig. 3 are respectively:
Figure BDA0003513617470000081
Wherein the method comprises the steps of
Figure BDA0003513617470000082
Even mode admittance for the parity mode circuit shown in fig. 3,/for the parity mode circuit>
Figure BDA0003513617470000083
Odd mode admittance for the odd-even mode circuit shown in fig. 3.
Fig. 4 shows a generalized output impedance schematic of a tunable reactor according to an embodiment of the present application. As shown in fig. 4, it can be determined from the definition of the parity modulo circuit that the first even modulo admittance of the first parity modulo circuit 1043 and the second even modulo admittance of the second parity modulo circuit 1045 are equal to:
Figure BDA0003513617470000084
wherein the method comprises the steps of
Figure BDA0003513617470000091
For said first even mode admittance, < >>
Figure BDA0003513617470000092
For the second even mode admittance.
The first odd mode admittance of the first odd-even mode circuit 1043 may also be determined as follows from FIG. 4 in conjunction with equation (1)
Figure BDA0003513617470000093
And the second odd mode admittance of the second odd-even mode circuit 1045 is +.>
Figure BDA0003513617470000094
It can thus be determined in connection with fig. 4 that the admittances presented at the total ports by the first and second conditioning branches 1041 and 1042 are respectively:
Figure BDA0003513617470000095
wherein the method comprises the steps of
Figure BDA0003513617470000096
For said first odd mode admittance, < >>
Figure BDA0003513617470000097
For said second even mode admittance, < >>
Figure BDA0003513617470000098
For said first even mode admittance, < >>
Figure BDA0003513617470000099
For the second odd mode admittance, Y 1 For the first characteristic admittance, Y 2 For the second characteristic admittance +.>
Figure BDA00035136174700000910
And->
Figure BDA00035136174700000911
Admittance of the first tunable reactor 1044 and admittance of the second tunable reactor 1046, Y, respectively A And Y B The admittances presented at the total ports by the first and second tuning legs 1041 and 1042, respectively.
At this time, the total admittance Y of the first and second conditioning branches 1041 and 1042 at the total port total Is Y total =Y A +Y B
To match the power divider to impedance at all times, the condition needs to be satisfied:
Y total =Y A +Y B =Y 1 +Y 2 (4)
that is, the input characteristic admittance is required to be equal to the sum of the first characteristic admittance and the second characteristic admittance, and to be equal to the sum of the admittances presented at the total ports by the first and second conditioning branches 1041, 1042. The admittances of the first and second tunable reactors 1044, 1046 in the first and second tuning legs 1041, 1042 are both tunable and differ by a fixed value (which may be 0 or any other suitable value). Substituting equation (3) into equation (4) may determine that impedance matching of the power divider is to be achieved, the admittance of the first tunable reactor 1044 and the admittance of the second tunable reactor 1046 need to satisfy the following equation (5):
Figure BDA00035136174700000912
wherein the method comprises the steps of
Figure BDA00035136174700000913
For said first odd mode admittance, < >>
Figure BDA00035136174700000914
For said second even mode admittance, < >>
Figure BDA00035136174700000915
For the first even mode admittance,/>
Figure BDA00035136174700000916
For the second odd mode admittance, Y 1 For the first characteristic admittance, Y 2 For the second characteristic admittance +.>
Figure BDA00035136174700000917
And->
Figure BDA00035136174700000918
The admittance of the first tunable reactor 1044 and the admittance of the second tunable reactor 1046, respectively.
That is, in the case where the admittance of the first tunable reactor 1044 and the admittance of the second tunable reactor 1046 satisfy the above equation (5), Y total =Y A +Y B =Y 1 +Y 2 The power divider is always impedance matched. At this time, admittances of the first odd-even mode circuit 1043, the second odd-even mode circuit 1045, the first tunable reactor 1044, and the second tunable reactor 1046 satisfy the following relationship:
Figure BDA00035136174700000919
wherein the method comprises the steps of
Figure BDA0003513617470000101
For said first odd mode admittance, < >>
Figure BDA0003513617470000102
For said second even mode admittance, < >>
Figure BDA0003513617470000103
For said first even mode admittance, < >>
Figure BDA0003513617470000104
For the second odd mode admittance, Y 1 For the first characteristic admittance, Y 2 For the second characteristic admittance +.>
Figure BDA0003513617470000105
And->
Figure BDA00035136174700001014
The admittance of the first tunable reactor 1044 and the admittance of the second tunable reactor 1046, respectively.
That is, in the case where the admittances of the first parity modulo circuit 1043, the second parity modulo circuit 1045, the first tunable reactor 1044, and the second tunable reactor 1046 satisfy the above equation (6), impedance matching of the power divider input and output can be achieved.
Meanwhile, the admittances of the first tunable reactor 1044 and the second tunable reactor 1046 can be adjusted between positive infinity and negative infinity, respectively, so that the ratio of the current amplitudes output by the power divider can be arbitrarily adjusted between 0:1 and 1:1 and/or between 1:1 and 1:0, and the phase difference of the output currents can be arbitrarily adjusted between 0 and 180 degrees, for the specific reasons which will be further explained below.
In some embodiments, the first characteristic admittance and the second characteristic admittance may be equal. At this time, the admittances presented at the total ports by the first and second conditioning branches 1041 and 1042 can be determined by equation (3):
Figure BDA0003513617470000106
in this case, equation (6) can be converted into:
Figure BDA0003513617470000107
wherein the method comprises the steps of
Figure BDA0003513617470000108
For the first odd mode admittance, +.>
Figure BDA0003513617470000109
For the second even mode admittance, +.>
Figure BDA00035136174700001010
For the first even mode admittance, +.>
Figure BDA00035136174700001011
For the second odd mode admittance, Y 0 Characteristic admittance (in the case where the first output port 102 and the second output port 103 are equal), is +.>
Figure BDA00035136174700001012
And->
Figure BDA00035136174700001013
Admittances of the first tunable reactor 1044 and the second tunable reactor 1046, respectively.
That is, in some embodiments, the first even mode admittance may be equal to the product of the first characteristic admittance and the negative unit imaginary number and the second even mode admittance is equal to the product of the second characteristic admittance and the positive unit imaginary number, and the difference between the first odd mode admittance and the second odd mode admittance plus the difference between the admittance of the first tunable reactor 1044 and the admittance of the second tunable reactor 1046 is equal to the product of the sum of the first characteristic admittance and the second characteristic admittance and the positive unit imaginary number. In this case, the total admittance Y at the total port total =Y A +Y B =2Y 0 . At this time, the power divider is also always impedance matched. That is, the power divider is always impedance-matched as long as the admittances of the first parity modulo circuit 1043, the second parity modulo circuit 1045, the first tunable reactor 1044, and the second tunable reactor 1046 satisfy equation (8).
For the tunable reactors, in some embodiments, the first tunable reactor 1044 and/or the second tunable reactor 1046 may comprise a varactor. The use of a varactor as a tunable reactor can simplify the design and manufacture of the power splitter 100 and promote miniaturization of the power splitter 100. In some embodiments, the admittances of the first tunable reactor 1044 and the second tunable reactor 1046 may be adjusted by an adjustment component. For example, the first tunable reactor 1044 and the second tunable reactor 1046 may be coupled to an adjustment port to adjust the components. The adjustment component may apply a voltage to the first tunable reactor 1044 and the second tunable reactor 1046 via the adjustment port to adjust admittances of the first tunable reactor 1044 and the second tunable reactor 1046. For example, when the specifications of the varactors used in the first tunable reactor 1044 and the second tunable reactor 1046 are the same, the same voltage is applied to realize equal admittances of the first tunable reactor 1044 and the second tunable reactor 1046.
In some embodiments, alternatively or additionally, the first tunable reactor 1044 and/or the second tunable reactor 1046 may also be implemented with a variable length transmission line assembly, as shown in fig. 5. For example, in some embodiments, a variable length transmission line assembly is shorted at the ends and may include a multi-segment transmission line 1050 formed from microstrip lines. The transmission line 1050 of the first tunable reactor 1044 and the transmission line of the second tunable reactor 1046 may be the same or different in length. In some embodiments, multi-segment transmission line 1050 may be implemented by a microstrip line. Multiple switches 1051 may be connected in parallel and/or in series between the multi-segment transmission line 1050. In the case where the transmission line 1050 of the first tunable reactor 1044 and the transmission line of the second tunable reactor 1046 are different in length, the admittance of the first tunable reactor 1044 and the admittance of the second tunable reactor 1046 are also different. In the following, how the adjustment of the admittance of the first tunable reactor 1044 and the admittance of the second tunable reactor 1046 is achieved will be mainly described in the case where the lengths of the transmission line 1050 of the first tunable reactor 1044 and the transmission line of the second tunable reactor 1046 are the same.
Fig. 5 (a) shows a plurality of switches 1051 connected in parallel between the plurality of segment transmission lines 1050, and fig. 5 (B) shows a plurality of switches 1051 connected in series between the plurality of segment transmission lines 1050. By controlling the opening and closing of different numbers of switches 1051 with the adjustment member, the length change of the transmission line can be achieved by means of the multi-section transmission line 1050, thereby achieving the adjustment of the admittance of the tunable reactor. In such an embodiment, the accuracy of the admittance adjustment of the tunable reactor is related to the admittance of each segment of the transmission line 1050. In this way, the power divider 100 may be implemented in a cost-effective manner without affecting existing circuitry. It should be understood that the multiple switches 1051 are shown in parallel and in series between the multi-segment transmission line 1050 in fig. 5 (a) and 5 (B), respectively, and that this is to be understood as illustrative only and is not intended to limit the scope of the present application. A plurality of switches 1051 may also be provided in a combination of parallel and series between the multi-segment transmission lines 1050. Further, for the switch 1051, it may be implemented using a diode or any suitable component or structure. In some embodiments, the inventive concept according to the present application will be described taking as an example that the admittances of the first tunable reactor 1044 and the second tunable reactor 1046 are adjusted to be equal (i.e., to differ by a fixed value of 0) in the manner mentioned above. It should be appreciated that, in addition to being adjustable as described above, a predetermined size reactor (capacitance or inductance, etc.) may be provided in the corresponding adjustment circuit to provide a difference in the fixed values for the case where the admittances of the first and second tunable reactors 1044 and 1046 differ by other fixed values. This case is similar to the case where the admittances are equal in nature, and will not be described in detail later.
In an embodiment in which the admittances of the first tunable reactor 1044 and the second tunable reactor 1046 are equal, according to equations (6) and (8) above, to match the impedances of the power splitters, the admittances of the first parity mode circuit 1043, the second parity mode circuit 1045, the first tunable reactor 1044, and the second tunable reactor 1046 need to satisfy the following relationship:
Figure BDA0003513617470000111
wherein the method comprises the steps of
Figure BDA0003513617470000112
For the first odd mode admittance, +.>
Figure BDA0003513617470000113
For the second even mode admittance, +.>
Figure BDA0003513617470000114
For the first even mode admittance, +.>
Figure BDA0003513617470000115
For the second odd mode admittance, Y 0 For the characteristic admittances of the first output port 102 and the second output port 103 (in the case where the two are equal), the admittances of the first tunable reactor 1044 and the second tunable reactor 1046 are equal, and Y is c
That is, in some embodiments, the first and second characteristic admittances are equal, and the first odd mode admittance is equal to the second even mode admittance and equal to the product of the first characteristic admittance and the positive unit imaginary number, and the first even mode admittance is equal to the second odd mode admittance and equal to the product of the second characteristic admittance and the negative unit imaginary number. In the case where the admittances of the first parity modulo circuit 1043, the second parity modulo circuit 1045, the first tunable reactor 1044 and the second tunable reactor 1046 satisfy the relationship of the above equation (9), the input characteristic admittances Y of the total ports 101 of the power divider 100 total Equal to the first characteristic admittance Y A And the second characteristic admittance Y B And, according to y1=y2=y0,
Figure BDA0003513617470000121
and equations (3) and (9), it is possible to obtain:
Figure BDA0003513617470000122
therefore, as long as the admittances of the first and second odd-even mode circuits 1043, 1045 satisfy equation (9), the total ports of the power divider 100 are always impedance-matched.
In this case, the currents of the two output ports are:
Figure BDA0003513617470000123
wherein I is 2 Is the output of the first output port 102Current value, I 3 An output current value of the second output port 103, Y 0 Y is the characteristic admittance of the first output port 102 and the second output port 103 c U, which is the admittances of the first tunable reactor 1044 and the second tunable reactor 1046 0 Is the voltage of the first output port 102 and the second output port 103.
As can be seen from equation (11), by adjusting the admittance value Y of the first tunable reactor 1044 and the second tunable reactor 1046 c So that when they vary in the (- ≡i, ≡i) range, the output current ratio relationship between the first output port 102 and the second output port 103 of the power divider 100 is:
Figure BDA0003513617470000124
wherein I is 2 For the output current value of the first output port 102, I 3 Is the output current value of the second output port 103.
At this time, a schematic diagram of the amplitude and phase of the first and second output currents as a function of the admittance values of the first and second tunable reactors 1044 and 1046 is shown in fig. 6. In fig. 6, for convenience of drawing, admittances Y of the first tunable reactor 1044 and the second tunable reactor 1046 are made c =iY 0 tan θ. When theta is E (-90 degrees, 90 degrees), Y is c E (- ≡i, ≡i). At this time, Y c The range of values corresponds to what was assumed above. As can be seen from fig. 6, when the admittance value of the adjustable reactance varies within the interval (- ≡i, ≡i), the amplitude and phase of the two output currents of the power divider 100 vary simultaneously. The two paths of current amplitude are alternately changed, and the phases of the two paths of current are alternately changed in the in-phase and anti-phase states, so that the common-differential mode variable feed requirement is met.
It can be seen that in some embodiments, the admittances of the first tunable reactor 1044 and the second tunable reactor 1046 can be also adjustable between positive infinity and negative infinity, respectively, whereby it can be achieved that the ratio of the current magnitudes output by the power divider can be arbitrarily adjustable between 0:1 to 1:1 and/or 1:1 to 1:0, and the phase difference of the output currents can be arbitrarily adjustable between 0 to 180 °. While the ratio of the current magnitudes of the power divider outputs may be arbitrarily adjustable between 0:1 to 1:1 and/or 1:1 to 1:0 and the phase difference of the output currents may be arbitrarily adjustable between 0 to 180 ° in connection with the embodiment in which the first characteristic admittance and the second characteristic admittance are equal and the admittances of the first tunable reactor 1044 and the second tunable reactor 1046 are equal, it should be understood that this is only schematically shown for simplicity of calculation and convenience of discussion. For the embodiment in which the first characteristic admittance and the second characteristic admittance are not equal and/or the admittances of the first tunable reactor 1044 and the second tunable reactor 1046 are equal, as long as the condition shown in equation (6) is satisfied, the ratio of the current amplitudes output by the power divider can be arbitrarily adjustable between 0:1 to 1:1 and/or between 1:1 to 1:0 while the impedances are matched, and the phase difference of the output currents can be arbitrarily adjustable between 0 ° and 180 °, and the specific calculation process is not further described herein.
Fig. 7 shows an exemplary structure of the power divider 100 capable of satisfying the above equation relation. Specifically, in some embodiments, the power divider 100 employs a microstrip line arrangement. The microstrip line is disposed on a circuit board, which may take a multi-layer structure, on one of which the microstrip line structure constituting the power divider 100 is disposed, and the circuit board provides a ground on one layer. In such an embodiment, the first and second odd-even mode circuits 1043, 1045 each comprise a pair of microstrip lines arranged at least partially in parallel. Hereinafter, the concept of the present application will be described mainly by taking the power divider 100 as an example of the microstrip line implementation. It should be appreciated that any other suitable circuit configuration is possible as long as the admittances of the first parity modulo circuit 1043, the second parity modulo circuit 1045, the first tunable reactor 1044, and the second tunable reactor 1046 are capable of satisfying the relationship of equations (6), (8), or (9) above.
The odd and even mode admittances of the first and second odd-even mode circuits 1043, 1045 may be adjusted by suitable structures on the microstrip line, which may include, but are not limited to, the microstrip line being grounded at a particular location (ground point 1047), the microstrip line pair being shorted at a predetermined location by shorting lines 1048, a local widening, a local narrowing, providing capacitance and/or inductance between the microstrip line pair, etc. Fig. 8 shows an exemplary structure of the first parity modulo circuit 1043, and fig. 9 shows an exemplary structure of the second parity modulo circuit 1045. As can be seen from fig. 8 and 9, in some embodiments, the microstrip line pairs forming the first odd-even mode circuit 1043 may be symmetrical about a midline, and have a local widening and a local narrowing. The partial widening refers to a case where the width of the microstrip line is partially widened in the extending direction. Similarly, the partial narrowing portion refers to a case where the width of the microstrip line is partially narrowed in the extending direction. For example, assuming that the width of the microstrip line which is not locally widened and not locally narrowed is a width corresponding to 50ohm impedance, the width of the locally widened portion corresponds to a width of 35ohm impedance, and the width of the locally narrowed portion corresponds to a width corresponding to 70ohm impedance. A gradual transition may be provided between the locally widened portion and the locally narrowed portion to smooth the transition. The first odd-even mode circuit 1043 may also be grounded at ground point 1047. Grounding may be achieved by coupling the microstrip line pair to a ground plane via a metal via at ground point 1047. Further, fig. 8 also shows that the first odd-even mode circuit 1043 is shorted by the shorting line 1048 at a predetermined position (e.g., an end of each microstrip line in the microstrip line pair). The shorting line 1048 and the pair of microstrip lines forming the first odd-even mode circuit 1043 may be integrally formed. In addition, fig. 8 also shows that a capacitance is provided between the microstrip line pair constituting the first odd-even mode circuit 1043.
For the second odd-even mode circuit 1045, as shown in fig. 9, the microstrip line pair of the second odd-even mode circuit 1045 may be shorted at the ends by a shorting line 1048. Similar to the first odd-even mode circuit 1043, the shorting line 1048 and the microstrip line pair forming the second odd-even mode circuit 1045 may also be integrally formed. Of course, it should be understood that the structures of the first and second parity modulo circuits 1043, 1045 shown in fig. 8 and 9 described above are merely illustrative, as long as the admittances of the parity modulo circuits satisfy equations (6), (8) or (9) described above, as well as any other suitable structure is possible. The various parameters of the microstrip line pair may be any suitable combination, such as the microstrip line being grounded at the grounding point 1047, the microstrip line pair being shorted by the shorting stub 1048 at a predetermined position, a locally widened portion, a locally narrowed portion, and a capacitance and/or inductance being provided between the microstrip line pairs. For example, in some embodiments, the microstrip line pairs of at least one of the first and second odd-even mode circuits 1043, 1045 may not be shorted or shorted elsewhere. For example, in some embodiments, pairs of microstrip lines may also be shorted by shorting lines 1048 in the middle of each microstrip line. In this case, it is only necessary to adjust other parameters so that the admittances of the first parity modulo circuit 1043 and the second parity modulo circuit 1045 satisfy equations (6), (8) or (9). For another example, in some embodiments, both the first and second parity modulo circuits 1043, 1045 may be grounded at any suitable ground point 1047 or neither may be grounded.
According to another aspect of the present application, there is also provided an electronic device. The electronic device may be part of a feed network for the antenna. The electronic device may comprise the power splitter 100 described hereinbefore and an antenna. The antenna includes a pair of radiating elements. The first radiating element and the second radiating element of the pair of radiating elements are coupled to a first output port 102 and a second output port 103 of the power divider 100, respectively. The power splitter 100 may be used to provide a feed for an antenna pair of a wireless access point. Fig. 10 shows the radiation pattern of an antenna when the power divider 100 is used to feed the antenna. As can be seen from fig. 10, the adjustment of the radiation pattern and the beam angle and width of the antenna pair is achieved by providing the antenna pair of the wireless access point with an excitation current with adjustable amplitude and phase, respectively.
Although the application has been described in language specific to structural features and/or methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are merely examples of implementing the claims.

Claims (14)

1. A power divider, comprising:
a total port (101) having an input characteristic admittance;
a first output port (102) having a first characteristic admittance;
a second output port (103) having a second characteristic admittance, the second characteristic admittance and the first characteristic admittance being in a predetermined proportional relationship;
a first regulation branch (1041) coupled between the total port (101) and the first output port (102); and
-a second regulation branch (1042) coupled between the total port (101) and the second output port (103), the input characteristic admittance being the sum of admittances presented by the first regulation branch (1041) and the second regulation branch (1042) at the total port (101), the admittances presented by the first regulation branch (1041) and the second regulation branch (1042) at the total port (101) being adjustable and such that the input characteristic admittance is equal to the sum of the first characteristic admittance and the second characteristic admittance.
2. The power divider of claim 1, wherein
The first tuning branch (1041) comprises a first odd-even mode circuit (1043) and a first tunable reactor (1044), and the first odd-even mode circuit (1043) has a first odd-even mode admittance; and
The second tuning leg (1042) comprises a second odd-even mode circuit (1045) and a second tunable reactor (1046), and the second odd-even mode circuit (1045) has a second odd-even mode admittance and a second even-even mode admittance, and
wherein admittances of the first tunable reactor (1044) and the second tunable reactor (1046) are tunable and differ by a fixed value.
3. The power divider of claim 2, wherein the first odd-even mode circuit (1043) and the first tunable reactor (1044) are coupled in parallel to a location between the total port (101) and the first output port (102), and
the second odd-even mode circuit (1045) and the second tunable reactor (1046) are coupled in parallel to a location between the total port (101) and the second output port (103).
4. A power divider according to claim 2 or 3, wherein the admittances of the first (1043), second (1045), first (1044) and second (1046) tunable reactors may satisfy the following relation:
Figure FDA0003513617460000011
wherein the method comprises the steps of
Figure FDA0003513617460000012
For said first odd mode admittance, < >>
Figure FDA0003513617460000013
For said second even mode admittance, < >>
Figure FDA0003513617460000014
For said first even mode admittance, < > >
Figure FDA0003513617460000015
For the second odd mode admittance, Y 1 For the first characteristic admittance, Y 2 For the second characteristic admittance +.>
Figure FDA0003513617460000016
And->
Figure FDA0003513617460000017
Admittances of the first tunable reactor (1044) and the second tunable reactor (1046), respectively.
5. The power divider of any of claims 1-4, wherein the first and second odd-even mode circuits (1043, 1045) each comprise a pair of microstrip lines arranged in parallel.
6. The power divider of claim 5, wherein the microstrip line of the first odd-even mode circuit (1043) is grounded, and/or
The microstrip line of the second odd-even mode circuit (1045) is grounded.
7. The power divider of claim 5 or 6, wherein the microstrip pair of the first odd-even mode circuit (1043) is shorted via a shorting line (1048), and/or
The microstrip line pair of the second odd-even mode circuit (1045) is shorted via a shorting line (1048).
8. The power divider of any of claims 2-9, wherein
The first tunable reactor (1044) comprises a varactor; and/or
The second tunable reactor (1046) includes a varactor.
9. The power divider of claim 10, further comprising:
An adjustment component comprising an adjustment port coupled to the first tunable reactor (1044) and the second tunable reactor (1046) to adjust admittances of the first tunable reactor (1044) and the second tunable reactor (1046) by adjusting voltage values applied to the first tunable reactor (1044) and the second tunable reactor (1046).
10. The power divider of any of claims 2-9, wherein at least one of the first tunable reactor (1044) and the second tunable reactor (1046) comprises a variable length transmission line assembly.
11. The power divider of claim 12, wherein the variable length transmission line assembly comprises:
a multi-segment transmission line (1050); and
a plurality of switches (1051) are connected in parallel and/or in series between the multi-segment transmission lines (1050).
12. The power divider of claim 11, further comprising:
an adjustment component, including an adjustment port, coupled to the first tunable reactor (1044) and the second tunable reactor (1046) to adjust admittances of the first tunable reactor (1044) and the second tunable reactor (1046) by adjusting states of the plurality of switches (1051).
13. The power divider of claim 11 or 12, wherein the transmission line (1050) comprises a microstrip line.
14. An electronic device, comprising:
the power divider of any of claims 1-13; and
an antenna, a first radiating element and a second radiating element of a pair of radiating elements of the antenna are coupled to a first output port (102) and a second output port (103) of the power divider, respectively.
CN202210158323.8A 2021-11-18 2022-02-21 Power divider and electronic device Pending CN116137373A (en)

Priority Applications (2)

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EP22206865.2A EP4184708A1 (en) 2021-11-18 2022-11-11 Power divider and electronic device
US17/988,566 US20230155271A1 (en) 2021-11-18 2022-11-16 Power Divider and Electronic Device

Applications Claiming Priority (2)

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CN2021113718208 2021-11-18
CN202111371820 2021-11-18

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