CN116133502A - GaN/SiC common-source common-gate switching device with high-temperature protection - Google Patents

GaN/SiC common-source common-gate switching device with high-temperature protection Download PDF

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CN116133502A
CN116133502A CN202310066043.9A CN202310066043A CN116133502A CN 116133502 A CN116133502 A CN 116133502A CN 202310066043 A CN202310066043 A CN 202310066043A CN 116133502 A CN116133502 A CN 116133502A
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electrode
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pyroelectric
gan hemt
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余晨辉
王鑫
祖源泽
成田恬
王奕锦
罗曼
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Nantong University
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Nantong University
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Abstract

The invention discloses a high-temperature-protection GaN/SiC co-source co-gate switching device, which comprises a high-voltage low-frequency depletion type SiC JFET device, a low-voltage high-frequency enhancement type GaN HEMT device and a pyroelectric device, wherein the pyroelectric device is connected with the SiC JFET device and the GaN HEMT device and is integrally packaged on the same substrate; wherein the pyroelectric device comprises a spontaneously polarized pyroelectric composite material layer. According to the invention, the heat generated by the pyroelectric effect of the pyroelectric device sensitive to temperature change and the heat generated by the operation of the cascode switching device in the high-frequency, high-voltage and high-current environment is utilized, so that the SiC JFET device in the cascode device is prevented from being out of control or the GaN HEMT device is prevented from being broken down when the GaN/SiC cascode switching device is in short circuit, and the SiC JFET device and the GaN HEMT device in the cascode switch in the protection circuit are protected.

Description

GaN/SiC common-source common-gate switching device with high-temperature protection
Technical Field
The invention relates to the technical field of power switching devices, in particular to a GaN/SiC cascode switching device with high-temperature protection.
Background
The rapid development of modern new energy technologies, as well as wireless power transmission systems and plasma generators, place higher demands on high frequency electronic power converters, thus prompting power electronic engineers to explore new topologies using new semiconductor devices and packaging technologies to increase power density. By increasing the frequency of the switch, the energy storage in the passive element can be reduced, so that a smaller size can be achieved. High frequency and high power converters require faster switching devices with low conduction losses, which are difficult to achieve using Si MOSFETs. Wide Band Gap (WBG) power devices, which are third generation semiconductors, have low on-resistance, a wide operating temperature range, and can operate at high frequencies (HF, 3-30 MHz) and very high frequencies (VHF, 30-300 MHz), gallium nitride high electron mobility transistors (GaN HEMTs) and silicon carbide junction field effect transistors (SiC JFETs) as two commonly used WBG power devices, their different characteristics leading to different target applications.
The GaN HEMT device has small grid charge and is easy to drive under high frequency, and because the GaN layer is epitaxially grown on other substrates (Si, siC or sapphire), a peak electric field appears on the surface of the transverse GaN device, and the maximum electric field limit of the transverse structure leads to relatively low rated voltage (< 650V) in the GaN HEMT device, so the GaN HEMT device is suitable for relatively low-voltage and high-frequency application.
Unlike GaN HEMT devices, siC JFET devices are vertical devices with higher rated voltages (varying from hundreds of volts to thousands of volts) than GaN HEMT devices, but they have large gate charges and require high power gate drivers, and these gate drive circuits are typically bulky and difficult to design. SiC JFET devices are therefore suitable for relatively high voltage and low frequency applications.
Recent studies have shown that GaN HEMT devices have high output capacitance in the HF and VHF ranges (C, even under Zero Voltage Switching (ZVS) conditions oss ) Losses, and these losses increase with increasing dv/dt, while SiC JFET devices have a larger gate charge, but C per cycle of SiC JFET devices oss The energy loss is not greatly related to the frequency, so that the GaN HEMT deviceThe element and the SiC JFET device are integrated in a common-source and common-gate mode, and the fast switching capacity of the GaN HEMT device, the high-voltage blocking capacity of the SiC JFET device under high frequency and the low C are combined oss Loss advantage. Although GaN/SiC cascode devices combine the advantages of GaN HEMT devices and SiC JFET devices, low Voltage (LV) GaN HEMT devices are used for normally-off gate control, and normally-on SiC JFET devices provide High Voltage (HV) blocking capability, gaN/SiC cascode devices exhibit avalanche capability, negligible dynamic on-resistance (R) by exhibiting high drain bias stress on ) Degradation and dynamic threshold voltage (V th ) Drift compensates for the disadvantages of GaN HEMTs, but reliability and robustness are very important for power semiconductor devices used in industrial and automotive applications, especially under severe operating conditions such as high temperature, short Circuit (SC), and pincerless inductive switching. Wherein a short circuit event may occur due to unexpected situations, such as SC on load and a faulty gate control signal in a half-bridge configuration. In the event of a short circuit, the device operates in the saturation region while there is a turn-on state gate voltage, a high drain-source voltage (V DS ) And high drain current (I D ). In general, the short circuit event applies extreme local thermal stress to the device, when the GaN HEMT device and the SiC JFET device are combined to enable the switch to work in the field of high temperature and high pressure, the frequency of occurrence of the short circuit event is increased, under the short circuit condition, most of power loss and heat are generated in the high-pressure SiC JFET device, and thermal runaway occurs in the SiC JFET device, so that the GaN HEMT device is broken down by a drain source. Thermal runaway is caused by positive feedback between drain leakage current and junction temperature at the corners of regions of the SiC JFET device where there is no top Al layer (source pad), and once the GaN HEMT/SiC JFET cascode device has a short circuit behavior, the GaN HEMT/SiC JFET cascode device has I D The waveform shows a turning point in the on state, shows a tail current in the off state, and the SiC JFET device (V th,SiC ) The threshold voltage of the GaN HEMT device is sharply reduced, so that high transient V appears after the GaN HEMT device is turned off DS Thereby causing damage to the GaN devices in the cascode devices.
Disclosure of Invention
The invention aims to: the invention aims to provide a GaN/SiC co-source co-gate switching device with high-temperature protection, which utilizes the pyroelectric effect of a pyroelectric material to better absorb heat generated during the working of the co-source co-gate GaN/SiC switching device and solves the problem of breakdown of a GaN device in the co-source co-gate switching device.
The technical scheme is as follows: the invention relates to a high-temperature-protection GaN/SiC co-source co-gate switching device, which comprises a high-voltage low-frequency depletion type SiC JFET device, a low-voltage high-frequency enhancement type GaN HEMT device and a pyroelectric device, wherein the pyroelectric device is connected with the SiC JFET device and the GaN HEMT device and is integrally packaged on the same substrate; wherein the pyroelectric device comprises a spontaneously polarized pyroelectric composite material layer.
Preferably, the pyroelectric device further comprises a first graphene electrode, a second graphene electrode, a first aluminum electrode and a second aluminum electrode, wherein the first graphene electrode and the second graphene electrode are respectively arranged on the upper side of the pyroelectric composite material layer, the first aluminum electrode and the second aluminum electrode are arranged on the lower side of the pyroelectric composite material layer, and the first graphene electrode, the second graphene electrode, the first aluminum electrode and the second aluminum electrode are electrically isolated by a silicon dioxide insulating layer.
Preferably, the pyroelectric composite material layer is a polyvinylidene fluoride-trifluoroethylene copolymer composite material layer.
Preferably, the polyvinylidene fluoride-trifluoroethylene copolymer composite is a [ P (VDF/TrFE) (80/20) ] polymer composite having a Curie temperature of 135 ℃.
Preferably, the SiC JFET device includes a SiC JFET device drain, a SiC JFET device gate, and a SiC JFET device source disposed on the first surface; the GaN HEMT device comprises a GaN HEMT device drain electrode, a GaN HEMT device grid electrode and a GaN HEMT device source electrode which are arranged on the first surface; the drain electrode of the SiC JFET device is connected with an external circuit of the GaN/SiC cascode switching device, the grid electrode of the SiC JFET device is electrically connected with the source electrode of the GaN HEMT device, and the source electrode of the SiC JFET device is electrically connected with the drain electrode of the GaN HEMT device; the grid electrode of the SiC JFET device is electrically connected with the first graphene electrode, and the source electrode of the SiC JFET device is electrically connected with the first aluminum electrode; the grid electrode of the GaN HEMT device is electrically connected with the second graphene electrode and is electrically connected with an externally-applied grid voltage control circuit; and the source electrode of the GaN HEMT device is electrically connected with the second aluminum electrode and is connected with an external circuit of the GaN/SiC cascode switching device.
Preferably, a closed sub-loop is formed among the second graphene electrode, the second aluminum electrode, the grid electrode of the GaN HEMT device and the source electrode of the GaN HEMT device; when the temperature change rate dT/dt=0.5 ℃/s of the pyroelectric device is larger than zero, two voltage sources with opposite polarities are formed between the pyroelectric open-circuit voltage and the grid electrode of the GaN HEMT device and between the pyroelectric open-circuit voltage and the source electrode of the GaN HEMT device, and the grid source voltage V of the GaN HEMT device is enabled to be obtained after superposition GS,GaN <V th,GaN The GaN HEMT device is in an off state, and the SiC JFET device is in an on state.
Preferably, a closed sub-loop is formed among the first graphene electrode, the first aluminum electrode, the grid electrode of the SiC JFET device and the source electrode of the SiC JFET device; when the temperature change rate dT/dt=0.8 ℃/s of the pyroelectric device is larger than zero, two voltage sources with opposite polarities are formed between the pyroelectric open circuit voltage and the grid electrode of the SiC JFET device and the source electrode of the SiC JFET device, and the grid source voltage V of the SiC JFET device is enabled to be obtained after superposition GS,SiC <V th,SiC The SiC JFET device is in an off state, and the GaN HEMT device is in an off state.
A circuit comprising a GaN/SiC cascode switching device.
The working principle of the GaN/SiC cascode switching device of the invention is that:
pyroelectric materials, which are an important subclass of piezoelectric materials, have attracted more and more attention due to the unique pyroelectric effect caused by spontaneous polarization, and show a wide application prospect due to various electric responses caused by temperature changes over time. Pyroelectric effects refer to changes in spontaneous polarization caused by temperature fluctuations in some polar materials. It is well known that pyroelectric materials can convert thermal energy into electrical energy by a change in internal spontaneous polarization, whereas the electrical response of pyroelectric is caused by oscillations of electric dipoles in the pyroelectric material caused by temperature fluctuations over time. Many electric dipoles overlap to form spontaneous polarization (Ps) perpendicular to the plane of the pyroelectric material, and stable spontaneous polarization within the pyroelectric material will attract nearby free particles with positive or negative charges. When the surface of the pyroelectric material is covered with two conductive electrodes, the spontaneous electric field within the pyroelectric substance will induce equal charges with opposite polarities on the two electrodes through an external circuit due to electrostatic induction. When the temperature change rate of the pyroelectric material is increased (dT/dT > 0), the oscillation degree of the electric dipole is enhanced, which weakens spontaneous polarization, and then electrons released by the electrode on the surface of the pyroelectric material are driven to migrate in an external circuit to reach a new static equilibrium state; also, when dT/dT <0, it will enhance spontaneous polarization and again break the electrostatic balance, then cause electrons to migrate back in the external circuit. In the invention, a high-voltage depletion type SiC JFET device bare chip is innovatively packaged on the same substrate according to a common-source common-gate structure, a low-voltage enhancement type GaN HEMT device bare chip and a pyroelectric device made of a specific pyroelectric material, and the pyroelectric device, the enhancement type GaN HEMT device and the depletion type SiC JFET device are tightly adhered together by using an adhesive in the packaging of the switching device, so that the pyroelectric device can absorb heat generated when the common-source common-gate GaN/SiC switching device works, and the problem of breakdown of the GaN HEMT device in the common-source common-gate device is solved by using the pyroelectric effect of the pyroelectric material.
The beneficial effects are that: compared with the prior art, the invention has the following outstanding advantages:
1. according to the GaN/SiC co-source co-gate high-frequency power switch device, the heat generated by the heat release effect of the heat release device sensitive to temperature change and the heat generated by the co-source co-gate switch working in a high-frequency, high-voltage and high-current environment is utilized, so that the SiC JFET device in the co-source co-gate device is prevented from being broken down when thermal runaway occurs or the GaN/SiC co-source co-gate switch device is short-circuited, and the SiC JFET device and the GaN HEMT device in the co-source co-gate switch in the protection circuit are prevented;
2. according to the GaN/SiC cascade high-frequency power switching device, the pyroelectric material and the semiconductor power device are combined to form the power switching device sensitive to temperature, and when the temperature change of the power switching device suddenly and rapidly increases, the power switching device is equivalent to the increase of the threshold voltage of the device, so that the power switching device is disconnected with an external circuit of a switch to realize the protection of the switching device.
Drawings
Fig. 1 is a schematic diagram of an equivalent circuit structure of a switching device of the present invention;
fig. 2 shows spontaneous polarization (P) of pyroelectric material in the cascode switching device of fig. 1 when dT/dt=0 s ) A schematic diagram;
FIG. 3 is a schematic diagram of the disconnection of a GaN HEMT device in the electric dipole oscillation degree enhanced cascode switch in the pyroelectric material when dT/dT >0 in FIG. 1;
FIG. 4 is a schematic diagram showing the open circuit voltage generated by the pyroelectric device of the present invention over time;
FIG. 5 is a schematic diagram of the pyroelectric effect of the pyroelectric composite material layer of the present invention (a is a schematic diagram of the pyroelectric effect; b is a current pattern when dT/dT > 0; c is a charge pattern when dT/dt=0; d is a current pattern when dT/dT < 0);
fig. 6 is an equivalent circuit schematic diagram of the cascode switch when the GaN HEMT device is turned off when dT/dT > 0;
FIG. 7 is a schematic diagram of simultaneous disconnection of a SiC JFET device and a GaN HEMT device in a cascode switching device with further enhancement of the oscillation degree of the electric dipole of a pyroelectric material when dT/dT > 0;
FIG. 8 is a schematic diagram of an equivalent circuit at the switch when both the SiC JFET device and the GaN HEMT device are open when dT/dT > > 0;
fig. 9 is a schematic flow chart of an embodiment of the cascode switching device of the present invention.
Reference numerals:
1. a SiC JFET device; 11. a SiC JFET device drain; 12. a SiC JFET device gate; 13. a SiC JFET device source;
2. a pyroelectric device; 21. a pyroelectric composite material layer; 22. a first graphene electrode; 23. a second graphene electrode; 24. a first aluminum electrode; 25. a second aluminum electrode; 26. a silicon dioxide insulating layer;
3. a GaN HEMT device; 31. a GaN HEMT device drain electrode; 32. a GaN HEMT device grid electrode; 33. a GaN HEMT device source;
4. and a grid voltage control circuit is additionally arranged.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to fig. 1 to 9 of the embodiments of the present invention. It will be apparent that the described embodiments are some, but not all, embodiments of the invention. All other embodiments, which are obtained by a person skilled in the art based on the described embodiments of the invention, fall within the scope of protection of the invention.
As shown in fig. 1, the high-temperature-protection GaN/SiC cascode switching device of the present invention includes a high-voltage low-frequency depletion type SiC JFET device 1, a low-voltage high-frequency enhancement type GaN HEMT device 3, and a pyroelectric device 2 connected to the SiC JFET device 1 and the GaN HEMT device 3 and integrally packaged on the same substrate; wherein the pyroelectric device 2 comprises a pyroelectric composite material layer 21 with spontaneous polarization; specifically, the pyroelectric composite layer 21 is a polyvinylidene fluoride-trifluoroethylene copolymer composite layer, and more specifically, the polyvinylidene fluoride-trifluoroethylene copolymer is [ P (VDF/TrFE) (80/20) having a Curie temperature of 135 ℃]Polymer [ P (VDF/TrFE) (80/20)]The polymer composite may be purchased from a related company, such as from Kunshan electronic Co., ltd. The pyroelectric device 2 further comprises a first graphene electrode 22 and a second graphene electrode 23 which are respectively arranged on the upper side of the pyroelectric composite material layer 21, and a first aluminum electrode 24 and a second aluminum electrode 25 which are arranged on the lower side, wherein the middle parts of the first graphene electrode 22 and the second graphene electrode 23 and the first aluminum electrode 24 and the second aluminum electrode 25 are electrically isolated by a silicon dioxide insulating layer 26; the first and second graphene electrodes 22, 23 were screen printed using an ATMA at-25pa (U.S.) apparatus at a doctor blade speed of 220 mm/s (doctor blade material: shore 70A 0605) at [ P (VDF/TrFE) (80/20)]The pyroelectric composite material layer 22 is prepared by screen printing graphene ink on a flat plate, and the first graphene electrode 22 and the second graphene electrode 23 which are subjected to screen printing have uniform thickness, wherein the thickness is 9 mu m; in order to make graphene electrodeThe membrane remained active, [ P (VDF/TrFE) (80/20)]The ratio of the material layer to the thickness of the graphene electrode was set to 5.8 (52/9), i.e., the pyroelectric material [ P (VDF/TrFE) (80/20)]The thickness of the graphene electrode is 52 μm, the thickness of the graphene electrode is 9 μm, and the surface area is 2×2mm 2 . The first aluminum electrode 24 and the second aluminum electrode 25 are obtained by adopting electron beam vapor deposition (Edwards FL-400) with the thickness of 200 nm; on the basis that the first graphene electrode 22 and the second graphene electrode 23 of the pyroelectric device 2 and the first aluminum electrode 24 and the second aluminum electrode 25 are prepared, etching areas of 0.2 multiplied by 2mm are respectively etched at the central positions among the first graphene electrode and the second graphene electrode and the first aluminum electrode and the second aluminum electrode towards the pyroelectric composite material layer 21 by an ion beam etching method 2 Rectangular grooves of 18 μm thickness were then deposited at 120℃and deposition rate by controlling the deposition temperature
Figure BDA0004062295550000061
In the environment of/min, the deposition area of the rectangular groove etched by the graphene electrode towards the pyroelectric material direction is 0.2 multiplied by 2mm by using a low-temperature Plasma Enhanced Chemical Vapor Deposition (PECVD) method 2 SiO with thickness of 18 μm 2 The deposition area of the film in the rectangular groove etched by the aluminum electrode towards the pyroelectric material is 0.2 multiplied by 2mm 2 SiO with thickness of 18 μm 2 Film, deposition of the SiO obtained 2 The thin film serves as a silicon dioxide insulating layer 26 for the conductive insulating layers of the first and second graphene electrodes, the first and second aluminum electrodes, respectively.
The principle of adding the silicon dioxide insulating layer 26 between the first graphene electrode and the second graphene electrode of the pyroelectric device 2 and the first aluminum electrode and the second aluminum electrode is as follows: if there is no silicon dioxide insulating layer between the first graphene electrode, the second graphene electrode, the first aluminum electrode and the second aluminum electrode, the depletion type SiC JFET device gate 12 and the enhancement type GaN HEMT device gate 32 are connected together through the graphene electrodes, the depletion type SiC JFET device source 13 and the enhancement type GaN HEMT device source 33 are connected together through the aluminum electrodes, and the depletion type SiC JFET device source 13 and the enhancement type GaN HEMT device drain 31 are connected, then the connection mode is equivalent to direct shorting of the enhancement type SiC JFET device drain and the enhancement type GaN HEMT device source, both the connection modes are not preferable for the co-source co-gate GaN HEMT device and the SiC JFET device, so the silicon dioxide insulating layer mainly plays a role in preventing shorting of the depletion type SiC JFET device gate and the enhancement type GaN HEMT device gate, preventing shorting between the enhancement type GaN drain and the enhancement type GaN HEMT device source, and ensuring normal operation of an equivalent circuit in the GaN/SiC co-gate switch device. And the silicon dioxide insulating layer is added in the middle of the first graphene electrode, the second graphene electrode, the first aluminum electrode and the second aluminum electrode, so that one half of the pyroelectric composite material layer of the pyroelectric device is connected with the depletion type SiC JFET device through the first graphene electrode and the first aluminum electrode, the other half of the pyroelectric composite material layer of the pyroelectric device is connected with the enhancement type GaN HEMT device through the second graphene electrode and the second aluminum electrode, and the temperature changes of the two devices are the same, and the temperature changes of the pyroelectric composite material layer of the pyroelectric device are equivalent to the separation of the pyroelectric device 2 into two small pyroelectric devices, and the turn-off of the SiC JFET device and the GaN HEMT device is controlled at the same time.
The SiC JFET device 1 includes a SiC JFET device drain 11, a SiC JFET device gate 12, and a SiC JFET device source 13 disposed at the first surface; the GaN HEMT device 3 is arranged on the GaN HEMT device drain electrode 31, the GaN HEMT device grid electrode 32 and the GaN HEMT device source electrode 33 of the first surface; the drain electrode 11 of the SiC JFET device is connected with an external circuit of the GaN/SiC cascode switching device, the grid electrode 12 of the SiC JFET device is electrically connected with the source electrode 33 of the GaN HEMT device, and the source electrode 13 of the SiC JFET device is electrically connected with the drain electrode 31 of the GaN HEMT device; the SiC JFET device gate 12 is electrically connected with the first graphene electrode 22, and the SiC JFET device source 13 is electrically connected with the first aluminum electrode 24; the grid electrode 32 of the GaN HEMT device is electrically connected with the second graphene electrode 23 and is electrically connected with the externally-applied grid voltage control circuit 4; the GaN HEMT device source electrode 33 is electrically connected with the second aluminum electrode 25 and is connected with an external circuit of the GaN/SiC cascode switching device.
The implementation mode of the high-temperature-protection GaN/SiC cascode switch device is as follows in the working flow shown in FIG. 9:
as shown in fig. 1, manufacturing and packaging of a GaN/SiC cascode switching device are completed according to process requirements, and a drain electrode 11 of a SiC JFET device and a source electrode 33 of a GaN HEMT device in the GaN/SiC cascode switching device are respectively and electrically connected with an external circuit to complete connection of the circuits; the externally-applied grid voltage control circuit 4 applies uniformly-changed driving signals to the grid electrode 32 of the GaN HEMT device; when the gate-source voltage applied to the GaN HEMT device 3 reaches 2V, the gate-source voltage of the depletion type SiC JFET device 1 reaches-7V in a very short time is turned on;
as shown in fig. 2: when the GaN/SiC cascode switching device starts to operate in the circuit, a plurality of electric dipoles present in the pyroelectric device 2 are superimposed to form spontaneous polarization (P s ) Spontaneous polarization (P s ) The directions are from the first aluminum electrode 24 and the second aluminum electrode 25 to the first graphene electrode 22 and the second graphene electrode 23; at this time, the inside of the pyroelectric composite material layer 21 stabilizes spontaneous polarization to attract free particles having positive or negative charges in the vicinity; when the surface of the pyroelectric composite material layer 21 is covered with two conductive electrodes, the spontaneous electric field inside the pyroelectric composite material layer 21 induces equal charges with opposite polarities on the two electrodes through an external circuit based on electrostatic induction;
along with the high-frequency and high-voltage working environment of the GaN/SiC cascode switching device, large leakage current I flows in the switching device D According to the heat generation formula Q in the physical electricity t =UIt=I 2 Rt, the cascode switch device will generate a certain amount of heat Q along with the change of the circuit operation time t t Wherein I is leakage current flowing through the cascode switching device, and R is on-resistance of the cascode switching device;
as shown in fig. 3, the heat generated by the cascode switching device is absorbed by the pyroelectric device 2 tightly attached to the same, because the pyroelectric composite layer 21 has a spontaneous polarization effect, when the SiC JFET device 1 in the cascode switching device is in thermal runaway or the switch is shorted with time, the temperature absorbed by the pyroelectric device 2 is not changed slowly with time any more, but is accelerated rapidly with time change, the pyroelectric composite layer 21 in the pyroelectric device 2 absorbs more heat generated by the cascode switching device within the same time, so that dT/dT is increased greatly, at this time, the oscillation degree of the electric dipole of the pyroelectric composite layer 21 is further enhanced, the spontaneous polarization of the pyroelectric composite layer 21 is weakened, and thus electrons are driven to flow in a loop formed by the first graphene electrode 22, the SiC JFET device gate 12, the JFET source 13 and the first aluminum electrode 24, and in a new loop formed by the second graphene electrode 23, the GaN device gate 32, the HEMT 33 and the second aluminum electrode 25, and the current in a new loop formed by the GaN electrode 3 reaches the current balance direction i.
As shown in FIG. 4, according to the relation i between the pyroelectric current intensity and the temperature change rate p =dq/dt=ps (dT/dT), the range of the current can be determined, and then, from v= (p/er) hdT, the open circuit voltage range of the pyroelectric device 2 with temperature change can be obtained to be 0 to 24V. When dT/dt=0.5 ℃/s of the pyroelectric device 2 is greater than zero, the pyroelectric composite material layer 21 has a pyroelectric effect, the principle of which is shown in fig. 5, the pyroelectric device 2 generates an open circuit voltage of 2V, and when dT/dt=1.0 ℃/s of the pyroelectric device 2, the pyroelectric device 2 generates an open circuit voltage of 20V; in the formula, p is the pyroelectric coefficient value of-31 mu C/(m) 2 K) Q is pyroelectric charge, S is electrode surface area, εr is PVDF relative dielectric constant value of 7.
As shown in fig. 3, the second graphene electrode 23 on the right side of the silicon dioxide insulating layer 26 on the pyroelectric composite material layer 21 is connected with the gate electrode 32 of the GaN HEMT device, the second aluminum electrode 25 on the right side of the silicon dioxide insulating layer 26 is connected with the source electrode 33 of the GaN HEMT device, once the SiC JFET device 1 in the cascode switching device in the circuit is out of control or short-circuited, the switching device generates great heat to enable the dT/dT of the pyroelectric device to reach 0.5 ℃/s>When 0, the pyroelectric device 2 generates an open circuit voltage of 2V, and at this time, the open circuit voltage of the pyroelectric device 2 and the gate-source voltage of the GaN HEMT device 3 are equivalent to two voltage sources with opposite polarities formed between the GaN HEMT device gate 32 and the GaN HEMT device source 33, and the gate-source voltage of the SiC JFET device 1 is equivalent to that of the GaN HEMT deviceTwo voltage sources with opposite polarities are formed between the grid electrode 12 of the SiC JFET device and the source electrode 13 of the SiC JFET device; if it is assumed that the drive voltage with the amplitude of 3V is provided in the external gate voltage control circuit 4 in FIG. 1, V is calculated according to kirchhoff's voltage law KVL G,GaN -V S,GaN =V GS,GaN =3V-2V=1V<V th,GaN The gan HEMT device 3 is immediately turned off in the off state, the SiC JFET device 1 is not turned off in the on state yet the total cascode switching device has been turned off because the open circuit voltage is now small so that the gate-source voltage of the SiC JFET device 1 is not less than its threshold voltage; at this time, to turn on the GaN HEMT device 3, the external gate voltage control circuit 4 provides at least a pulse signal with an amplitude of 4V, as shown in fig. 6, which is an equivalent circuit diagram of the cascode switching device when the GaN HEMT device 3 is turned off.
As shown in fig. 7, the first graphene electrode 22 of the pyroelectric composite material layer 21 on the left side of the silicon dioxide insulating layer 26 is connected with the SiC JFET device gate 12, the first aluminum electrode 24 on the left side of the silicon dioxide insulating layer 26 is connected with the SiC JFET device source 13, the SiC JFET device gate 12 is connected with the GaN HEMT device source 33, and the SiC JFET device source 13 is connected with the GaN HEMT device drain 31. When thermal runaway occurs in SiC JFET device 1 or a short circuit occurs in the switch in the cascode switching device in the circuit, a large amount of heat is generated so that dT/dt=1.0 ℃/s of pyroelectric device 2>At 0, the pyroelectric device 2 generates an open circuit voltage of 20V; if it is assumed that the drive voltage with the amplitude of 3V is provided in the external gate voltage control circuit 4 in FIG. 1, V is calculated according to the kirchhoff voltage law KVL G,GaN -V S,GaN =V GS,GaN =3V-20V=-17V<V th,GaN =2v, the gan HEMT device 3 is immediately turned off in the off state, and V will be caused due to the larger open circuit voltage G,SiC -V S,SiC =V GS,SiC -20V<V th,SiC The SiC JFET device 1 is also turned off in the off state. Fig. 8 is an equivalent circuit diagram of the cascode switching device when both the GaN HEMT device 3 and the SiC JFET device 1 are turned off.
In summary, when the cascode switching device operates in a high-frequency, high-voltage and high-current environment, the situation that the SiC JFET device in the cascode switching device is out of control thermally or the GaN HEMT device is broken down when the GaN/SiC cascode switching device is short-circuited is avoided by using heat generated by the operation of the cascode switching device and the pyroelectric effect of the pyroelectric device, so that the SiC JFET device and the GaN HEMT device in the cascode switching device in the circuit are protected.
The foregoing is a preferred embodiment of the present invention and it should be noted that modifications and adaptations to those skilled in the art may be made without departing from the principles of the present invention and are intended to be comprehended within the scope of the present invention.

Claims (8)

1. The GaN/SiC co-source co-gate switching device is characterized by comprising a high-voltage low-frequency depletion type SiC JFET device (1), a low-voltage high-frequency enhancement type GaN HEMT device (3) and a pyroelectric device (2) which is connected with the SiC JFET device (1) and the GaN HEMT device (3) and is integrally packaged on the same substrate; wherein the pyroelectric device (2) comprises a spontaneously polarised pyroelectric composite layer (21).
2. The high-temperature-protection GaN/SiC co-gate switching device according to claim 1, wherein the pyroelectric device (2) further comprises a first graphene electrode (22), a second graphene electrode (23) and a first aluminum electrode (24) and a second aluminum electrode (25) which are respectively arranged on the upper side of the pyroelectric composite material layer (21), and the first graphene electrode (22) and the second graphene electrode (23) and the first aluminum electrode (24) and the second aluminum electrode (25) are electrically isolated by a silicon dioxide insulating layer (26).
3. The high temperature protected GaN/SiC co-gated switching device of claim 2 wherein said pyroelectric composite layer (21) is a polyvinylidene fluoride-trifluoroethylene copolymer composite layer.
4. A high temperature protected GaN/SiC cascode switch device according to claim 3, characterized in that said polyvinylidene fluoride-trifluoroethylene copolymer composite is a [ P (VDF/TrFE) (80/20) ] polymer composite with curie temperature of 135 ℃.
5. The high temperature protected GaN/SiC cascode switching device of claim 2, characterized in that the SiC JFET device (1) comprises a SiC JFET device drain (11), a SiC JFET device gate (12) and a SiC JFET device source (13) disposed at the first surface; the GaN HEMT device (3) comprises a GaN HEMT device drain electrode (31), a GaN HEMT device grid electrode (32) and a GaN HEMT device source electrode (33) which are arranged on the first surface; the SiC JFET device drain electrode (11) is connected with an external circuit of the GaN/SiC cascode switch device, the SiC JFET device gate electrode (12) is electrically connected with the GaN HEMT device source electrode (33), and the SiC JFET device source electrode (13) is electrically connected with the GaN HEMT device drain electrode (31); the grid electrode (12) of the SiC JFET device is electrically connected with the first graphene electrode (22), and the source electrode (13) of the SiC JFET device is electrically connected with the first aluminum electrode (24); the grid electrode (32) of the GaN HEMT device is electrically connected with the second graphene electrode (23) and is electrically connected with the externally-applied grid voltage control circuit (4); the GaN HEMT device source electrode (33) is electrically connected with the second aluminum electrode (25) and is connected with an external circuit of the GaN/SiC cascode switching device.
6. The high temperature protected GaN/SiC cascode switching device of claim 5 wherein a closed sub-loop is formed between said second graphene electrode (23), second aluminum electrode (25), gaN HEMT device gate (32), and GaN HEMT device source (33); when the temperature change rate dT/dt=0.5 ℃/s of the pyroelectric device (2) is larger than zero, two voltage sources with opposite polarities are formed between the pyroelectric open-circuit voltage and the grid electrode (32) of the GaN HEMT device and the source electrode (33) of the GaN HEMT device, and the grid source voltage V of the GaN HEMT device (3) is enabled after superposition GS,GaN <V th,GaN The GaN HEMT device (3) is in an off state, and the SiC JFET device (1) is in an on state.
7. The high temperature protected GaN/SiC cascode switching device of claim 5 wherein said firstA closed sub-loop is formed among the graphene electrode (22), the first aluminum electrode (24), the grid electrode (12) of the SiC JFET device and the source electrode (13) of the SiC JFET device; when the temperature transformation rate dT/dt=0.8 ℃/s of the pyroelectric device (2) is larger than zero, two voltage sources with opposite polarities are formed between the pyroelectric open circuit voltage and the grid electrode (12) of the SiC JFET device and the source electrode (13) of the SiC JFET device, and the grid source voltage V of the SiC JFET device (1) is formed after superposition GS,SiC <V th,SiC The SiC JFET device (1) is in an off state, and the GaN HEMT device (3) is in an off state.
8. A circuit comprising a GaN/SiC cascode switching device according to any one of claims 1 to 7.
CN202310066043.9A 2023-01-16 2023-01-16 GaN/SiC common-source common-gate switching device with high-temperature protection Pending CN116133502A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117155359A (en) * 2023-10-26 2023-12-01 深圳智芯微电子科技有限公司 Pretreatment method of GaN HEMT device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117155359A (en) * 2023-10-26 2023-12-01 深圳智芯微电子科技有限公司 Pretreatment method of GaN HEMT device
CN117155359B (en) * 2023-10-26 2024-02-09 深圳智芯微电子科技有限公司 Pretreatment method of GaN HEMT device

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