CN116130569A - High-efficiency light-emitting diode and preparation method thereof - Google Patents
High-efficiency light-emitting diode and preparation method thereof Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title abstract description 9
- 239000000758 substrate Substances 0.000 claims abstract description 48
- 239000002131 composite material Substances 0.000 claims abstract description 41
- 230000000903 blocking effect Effects 0.000 claims abstract description 14
- 238000000151 deposition Methods 0.000 claims description 52
- 230000008021 deposition Effects 0.000 claims description 44
- 238000000034 method Methods 0.000 claims description 19
- 238000004519 manufacturing process Methods 0.000 claims description 13
- 230000008569 process Effects 0.000 claims description 13
- 230000007547 defect Effects 0.000 abstract description 19
- 239000010410 layer Substances 0.000 description 464
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 213
- 229910002601 GaN Inorganic materials 0.000 description 212
- 239000013078 crystal Substances 0.000 description 21
- 239000000203 mixture Substances 0.000 description 19
- 229910052594 sapphire Inorganic materials 0.000 description 14
- 239000010980 sapphire Substances 0.000 description 14
- 239000000463 material Substances 0.000 description 10
- 230000035882 stress Effects 0.000 description 10
- 230000006798 recombination Effects 0.000 description 8
- 238000005215 recombination Methods 0.000 description 8
- 229910002704 AlGaN Inorganic materials 0.000 description 6
- 230000004888 barrier function Effects 0.000 description 6
- 239000007789 gas Substances 0.000 description 6
- 239000011777 magnesium Substances 0.000 description 5
- 230000005855 radiation Effects 0.000 description 5
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 4
- 230000008901 benefit Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- RGGPNXQUMRMPRA-UHFFFAOYSA-N triethylgallium Chemical compound CC[Ga](CC)CC RGGPNXQUMRMPRA-UHFFFAOYSA-N 0.000 description 4
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 4
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 3
- 230000006911 nucleation Effects 0.000 description 3
- 230000000149 penetrating effect Effects 0.000 description 3
- 238000005240 physical vapour deposition Methods 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- 238000005286 illumination Methods 0.000 description 2
- 238000010348 incorporation Methods 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 238000005121 nitriding Methods 0.000 description 2
- 238000010899 nucleation Methods 0.000 description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 2
- 229910010271 silicon carbide Inorganic materials 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 2
- IBEFSUTVZWZJEL-UHFFFAOYSA-N trimethylindium Chemical compound C[In](C)C IBEFSUTVZWZJEL-UHFFFAOYSA-N 0.000 description 2
- 239000011787 zinc oxide Substances 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000013256 coordination polymer Substances 0.000 description 1
- UOSXPFXWANTMIZ-UHFFFAOYSA-N cyclopenta-1,3-diene;magnesium Chemical compound [Mg].C1C=CC=C1.C1C=CC=C1 UOSXPFXWANTMIZ-UHFFFAOYSA-N 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000005622 photoelectricity Effects 0.000 description 1
- 238000007781 pre-processing Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000003892 spreading Methods 0.000 description 1
- 230000007480 spreading Effects 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- 230000005428 wave function Effects 0.000 description 1
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
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- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
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Abstract
The invention provides a high-efficiency light-emitting diode and a preparation method thereof, wherein the high-efficiency light-emitting diode comprises a substrate, and a buffer layer, an undoped GaN layer, a composite N-type GaN layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer which are sequentially deposited on the substrate; the composite N-type GaN layer comprises a first Si doped GaN layer, a SiN layer and a superlattice layer which are sequentially deposited on the undoped GaN layer, wherein the superlattice layer comprises an Si doped AlN layer, an InN layer and a second Si doped GaN layer which are sequentially and alternately deposited according to a preset period, and the concentration of Si doped in the first Si doped GaN layer is greater than that of Si doped in the second Si doped GaN layer. According to the invention, the composite N-type GaN layer is inserted between the undoped GaN layer multiple quantum well layers, so that the stress between the substrate and the epitaxial layer is reduced, the line defect and stacking fault occur at the interface of the multiple quantum well layers, and the luminous efficiency of the light-emitting diode is improved.
Description
Technical Field
The invention relates to the technical field of photoelectricity, in particular to a high-efficiency light-emitting diode and a preparation method thereof.
Background
In recent years, gallium nitride (GaN) materials have found wide application in industry as third generation direct bandgap semiconductor materials. In particular in the field of LED illumination, the GaN-based blue LED has the characteristics of high brightness, high energy efficiency and long service life, and shows the potential of replacing the existing illumination equipment.
The conductivity of the intrinsic GaN crystal is lower, so that the conductivity of GaN can be improved through effective doping, and electrons can be continuously generated to participate in radiation recombination in the active region during current injection. The doping element is generally required to be close to the GaN atomic radius and still maintain a certain stability at the growth temperature. In epitaxial growth of GaN, the most used n-type doping element is Si, and the doping source is SiH 4 The doping concentration can be adjusted by adjusting SiH 4 Is realized by the flow rate of the flow rate control system.
However, due to the large lattice mismatch and thermal expansion coefficient difference between the substrate material and the GaN crystal, a large compressive stress exists in the epitaxial layer of the light-emitting diode, and the stress release can generate line defects and stacking faults on the active region, so that the reliability and the light-emitting characteristic of the device are affected.
Disclosure of Invention
Based on the above, the present invention aims to provide a high-efficiency light emitting diode and a preparation method thereof, so as to solve the problems existing in the prior art.
The first aspect of the invention provides a high-efficiency light-emitting diode, which comprises a substrate, and a buffer layer, an undoped GaN layer, a composite N-type GaN layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer which are sequentially deposited on the substrate; the composite N-type GaN layer comprises a first Si doped GaN layer, a SiN layer and a superlattice layer which are sequentially deposited on the undoped GaN layer, wherein the superlattice layer comprises an Si doped AlN layer, an InN layer and a second Si doped GaN layer which are sequentially and alternately deposited according to a preset period, and the concentration of Si doped in the first Si doped GaN layer is larger than that of Si doped in the second Si doped GaN layer.
The beneficial effects of the invention are as follows: the invention provides a high-efficiency light-emitting diode, a layer of composite N-type GaN layer is inserted between an undoped GaN layer and a multiple quantum well layer, wherein the composite N-type GaN layer comprises a first Si doped GaN layer, a SiN layer and a superlattice layer which are sequentially deposited on the undoped GaN layer, the superlattice layer comprises a Si doped AlN layer, an InN layer and a second Si doped GaN layer which are sequentially and alternately deposited according to a preset period, the concentration of Si doped in the first Si doped GaN layer is larger than that of Si doped in the second Si doped GaN layer, because the resistivity of the composite N-type GaN layer is higher than that of the P-type GaN layer, the first Si doped GaN layer with higher concentration is deposited on the undoped GaN layer, a large amount of electrons can be generated to be supplied to the multiple quantum well layer to carry out radiation recombination with holes in the multiple quantum well layer, the integral resistivity of the composite N-type GaN layer is reduced, the light-emitting effect of the diode is improved, further, the deposited SiN layer can form a compact SiN film on the first Si doped GaN layer, dislocation defects penetrating the first Si doped GaN layer are further reduced, the dislocation defects are reduced to extend into the multi-quantum well layer so as to influence luminous efficiency, the superlattice layer can effectively release stress between the composite N-type GaN layer and the multi-quantum well active layer, line defects and stacking faults of the multi-quantum well layer interface are reduced, crystal quality is improved, further, the concentration of Si doped in the second Si doped GaN layer in the superlattice layer is smaller than that of Si doped in the first Si doped GaN layer, a movement channel can be provided for electrons generated by the first Si doped GaN layer, so that the electrons can effectively move to the multi-quantum well layer, and in addition, the interface voltage between the second Si doped GaN layer and the multi-quantum well layer can be reduced, and crystal quality is further improved.
Preferably, the thickness of the first Si GaN-doped layer is 1um-5um, the thickness of the SiN layer is 1nm-100nm, and the thickness of the superlattice layer is 50nm-500nm.
Preferably, the thickness ratio of the Si-doped AlN layer to the InN layer to the second Si-doped GaN layer is 1:1:10-10:1:50.
Preferably, the preset period is 1-20.
Preferably, the firstThe concentration of Si doped in a Si doped GaN layer is 1×10 18 atoms/cm 3 -1×10 20 atoms/cm 3 The Si-doped AlN layer and the second Si-doped GaN layer have a Si-doped concentration of 1×10 17 atoms/cm 3 -1×10 19 atoms/cm 3 。
The invention also provides a preparation method for preparing the high-efficiency light-emitting diode, which comprises the following steps:
providing a substrate;
sequentially depositing a buffer layer, an undoped GaN layer, a composite N-type GaN layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer on the substrate;
the composite N-type GaN layer comprises a first Si doped GaN layer, a SiN layer and a superlattice layer which are sequentially deposited on the undoped GaN layer, wherein the superlattice layer comprises an Si doped AlN layer, an InN layer and a second Si doped GaN layer which are sequentially and alternately deposited on the SiN layer according to a preset period, and the concentration of Si doped in the first Si doped GaN layer is larger than that of Si doped in the second Si doped GaN layer.
Preferably, the growth atmosphere in the deposition and growth process of the first Si-doped GaN layer is N 2 /H 2 /NH 3 The component ratio of the mixed gas is 1:1:10-1:5:10.
Preferably, the growth atmosphere in the deposition and growth process of the superlattice layer is N 2 / NH 3 The component ratio of the mixed gas is 1:5-5:1.
Preferably, the deposition growth temperature of the first Si GaN-doped layer is 1000-1200 ℃, the deposition growth temperature of the SiN layer is 900-1100 ℃, and the deposition growth temperature of the superlattice layer is 800-1000 ℃.
Preferably, the growth pressure in the growth process of the composite N-type GaN layer is 50-300 torr.
Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
Drawings
FIG. 1 is a schematic diagram of a high efficiency LED according to the present invention;
fig. 2 is a flowchart of a method for manufacturing a high-efficiency light emitting diode according to the present invention.
Description of main reference numerals:
the invention will be further described in the following detailed description in conjunction with the above-described figures.
Detailed Description
In order that the invention may be readily understood, a more complete description of the invention will be rendered by reference to the appended drawings. Several embodiments of the invention are presented in the figures. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "mounted" on another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like are used herein for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
The invention provides a high-efficiency light-emitting diode and a preparation method thereof, wherein a layer of composite N-type GaN layer is inserted between an undoped GaN layer and a multiple quantum well layer, wherein the composite N-type GaN layer comprises a first Si doped GaN layer, a SiN layer and a superlattice layer which are sequentially deposited on the undoped GaN layer, the superlattice layer comprises a Si doped AlN layer, an InN layer and a second Si doped GaN layer which are sequentially and alternately deposited according to a preset period, the concentration of Si doped in the first Si doped GaN layer is larger than that of Si doped in the second Si doped GaN layer, the line defect and stacking fault of the interface of the multiple quantum well layer are reduced through the composite N-type GaN layer, the interface voltage between the second Si doped GaN layer and the multiple quantum well layer is reduced, and the crystal quality is improved.
Specifically, referring to fig. 1, the high-efficiency light emitting diode provided by the embodiment of the invention comprises a substrate 10, and a buffer layer 20, an undoped GaN layer 30, a composite N-type GaN layer 40, a multiple quantum well layer 50, an electron blocking layer 60 and a P-type GaN layer 70 which are sequentially deposited on the substrate 10; the composite N-type GaN layer 40 includes a first Si-doped GaN layer 41, a SiN layer 42, and a superlattice layer 43 sequentially deposited on the undoped GaN layer 30, the superlattice layer 43 including a Si-doped AlN layer 431, an InN layer 432, and a second Si-doped GaN layer 433 sequentially alternately deposited on the SiN layer 42 at a preset period, wherein the concentration of Si doped in the first Si-doped GaN layer 41 is greater than the concentration of Si doped in the second Si-doped GaN layer 433. Preferably, the concentration of Si doped in the first Si-doped GaN layer is 1×10 18 atoms/cm 3 -1×10 20 atoms/cm 3 The Si-doped AlN layer and the second Si-doped GaN layer have a Si-doped concentration of 1X 10 17 atoms/cm 3 -1×10 19 atoms/cm 3 。
Specifically, the substrate 10 may be a sapphire substrate or an SiO substrate 2 One of a sapphire composite substrate, a silicon carbide substrate, a gallium nitride substrate and a zinc oxide substrate; the sapphire substrate has the advantages of mature preparation process, high cost performance, easy cleaning and processing, good stability at high temperature and wide application range. Therefore, a sapphire substrate is selected, however, the surface of the sapphire substrate has very large defects, the defects of the epitaxial layer deposited directly on the substrate are easy to extend to multiple quantum well layers, the multiple quantum well layers are active layers of light emitting diodes, the defects extending to the multiple quantum well layers directly affect the light emitting effect, therefore, before the epitaxial layer is deposited on the substrate, the buffer layer 20 needs to be deposited on the substrate 10 to reduce the defects on the surface of the sapphire substrate to a certain extent, and in particular, the buffer layer 20 can be an AlN buffer layer with the thickness of 10nm-15nm.
The undoped GaN layer 30 is deposited on the buffer layer 20, the thickness of the undoped GaN layer 30 is 1um-5um, and the undoped GaN layer 30 with a thicker thickness can reduce the effective release of the compressive stress between the light emitting diodes, improve the crystal quality and reduce the reverse leakage. However, at the same time, the increase of the GaN layer thickness consumes a large amount of Ga source material, which greatly increases the epitaxial cost of a Light Emitting Diode (LED), so further, in order to achieve both the quality and the production cost of the LED, it is preferable that the undoped GaN layer 30 is 2um-3um.
The main function of the composite N-type GaN layer 40 in the LED is to further reduce defects between crystals and provide sufficient electrons for the LED to emit light and to allow the electrons to smoothly move to the multiple quantum well layer for radiative recombination with holes in the multiple quantum well layer; the defect of the crystal is further reduced, the quality of the crystal can be improved, enough electrons and holes in the multiple quantum well layer are provided to be compounded, the overall luminous efficiency of the LED can be effectively improved, specifically, the compound N-type GaN layer 40 comprises a first Si GaN-doped layer 41, a SiN layer 42 and a superlattice layer 43 which are sequentially deposited on the undoped GaN layer 30, the thickness of the first Si GaN-doped layer is 1um-5um, the thickness of the SiN layer is 1nm-100nm, and the thickness of the superlattice layer is 50nm-500nm. Since the resistivity of the composite N-type GaN layer 40 is higher than that of the transparent electrode on the P-type GaN layer 70, it is a major factor affecting the current spreading of the device and increasing the series resistance. Therefore, in the light emitting diode provided by the invention, the first Si doped GaN layer 41 with higher concentration is deposited on the undoped GaN layer 30, so that a large amount of electrons can be generated to be supplied to the multiple quantum well layer 50, and the electrons are subjected to radiation recombination with holes in the multiple quantum well layer 50, thereby reducing the overall resistivity of the composite N-type GaN layer 40 and improving the light emitting effect of the diode. In addition, the thickness of the first Si doped GaN layer 41 is deposited to 1um-5um, and the higher thickness can not only increase current expansion and reduce the series resistance of the composite N-type GaN layer 40 and the working voltage of the light-emitting diode, but also release the compressive stress in the composite N-type GaN layer through stacking faults, reduce line defects, improve crystal quality and reduce reverse leakage current.
Further, depositing the SiN layer 42 on the first Si doped GaN layer 41 may form a dense SiN film on the first Si doped GaN layer 41, to block dislocation defects penetrating through the first Si doped GaN layer 41, further reduce dislocation defects extending to the multiple quantum well layer 50, and affect the light emitting efficiency of the multiple quantum well layer 50. In addition, the superlattice layer 43 includes a Si AlN-doped layer 431, an InN layer 432 and a second Si GaN-doped layer 433 sequentially and alternately deposited on the SiN layer 42 according to a preset period, preferably, the thickness ratio of the Si AlN-doped layer, the InN layer and the second Si GaN-doped layer is 1:1:10-10:1:50, the alternately deposited period is 1-20, and the superlattice layer 43 can effectively release the mismatch stress between the composite N-type GaN layer 40 and the multiple quantum well layer 50, improve the incorporation efficiency of electrons and holes in the multiple quantum well layer 50, improve the crystal quality, and reduce the non-radiative recombination efficiency of the multiple quantum well layer 50. Further, the concentration of doped Si of the second Si doped GaN layer in the superlattice layer is smaller than that of doped Si of the first Si doped GaN layer, and the lower Si doped GaN layer can provide a movement channel for electrons generated by the first Si doped GaN layer, so that the electrons can effectively move to the multiple quantum well layer, and the interface voltage between the second Si doped GaN layer and the multiple quantum well layer can be reduced, so that the crystal quality is further improved.
The multi-quantum well layer 50 comprises an InGaN quantum well layer and an AlGaN quantum barrier layer which are alternately deposited, wherein the deposition cycle number is 6-12, the thickness of the single-layer InGaN quantum well layer is 2-5 nm, the thickness of the single-layer AlGaN quantum barrier layer is 5-15 nm, and the Al component is 0.01-0.1. Electron blocking layer 60Al a In b The GaN layer has a thickness of 10-40 nm, wherein the value of a is Fan Wei 0.005.005-0.1, and the value of b is Fan Wei 0.01.01-0.2; the thickness of the P-type GaN layer 70 is 10 nm-50 nm, and Mg can be adopted for doping, and the doping concentration of the Mg is 1 multiplied by 10 19 atoms/cm 3 -1×10 21 atoms/cm 3 。
Referring to fig. 2, a method for manufacturing a high-efficiency light emitting diode according to an embodiment of the present invention is used for manufacturing the light emitting diode, and specifically, the method for manufacturing a high-efficiency light emitting diode according to the present invention includes steps S10 to S70.
Step S10, providing a substrate;
specifically, the substrate can be sapphire substrate or SiO 2 One of a sapphire composite substrate, a silicon carbide substrate, a gallium nitride substrate and a zinc oxide substrate. Sapphire is currently the most commonly used GaN-basedThe LED substrate material and the sapphire substrate have the greatest advantages of mature technology, good stability and low production cost. Therefore, in this embodiment mode, sapphire is used as a substrate.
Step S20, depositing a buffer layer on a substrate;
specifically, physical vapor deposition (Physical Vapor Deposition, PVD) can be used to deposit a buffer layer on the substrate, the thickness of the buffer layer is 15nm-20nm, in this embodiment, an AlN buffer layer is used, the AlN buffer layer provides a nucleation center with the same orientation as the substrate, stress generated by lattice mismatch between the epitaxial GaN material and the substrate and thermal stress generated by thermal expansion coefficient mismatch are released, a flat nucleation surface is provided for epitaxial growth, and the contact angle of nucleation growth is reduced to enable island-shaped GaN grains to be connected into a plane in a smaller thickness, so that the island-shaped GaN grains are converted into two-dimensional epitaxial growth.
Step S30, preprocessing the substrate on which the buffer layer is deposited.
Specifically, the sapphire substrate on which the buffer layer has been deposited is transferred to a medium-micro A7 Metal organic vapor deposition (MOCVD for Metal-organic Chemical Vapor Deposition) equipment, in which high purity H can be used 2 (Hydrogen), high purity N 2 (Nitrogen) high purity H 2 And high purity N 2 Is used as carrier gas, high-purity NH 3 As N source, trimethylgallium (TMGa) and triethylgallium (TEGa) as gallium source, trimethylindium (TMIn) as indium source, trimethylaluminum (TMAL) as aluminum source, silane (SiH) 4 ) As an N-type dopant, magnesium dicyclopentadiene (CP 2 Mg) as P-type dopant.
Specifically, the substrate on which the buffer layer has been deposited is subjected to a process of H 2 The atmosphere is treated for 1min-10 min, the treatment temperature is 1000 ℃ to 1200 ℃, and then nitriding treatment is carried out on the GaN epitaxial layer, so that the crystal quality of the buffer layer is improved, and the crystal quality of the GaN epitaxial layer deposited subsequently can be effectively improved.
In step S40, an undoped GaN layer is deposited on the buffer layer.
After nitriding the substrate on which the buffer layer is deposited, depositing non-silicon in MOCVD equipmentDoping GaN layer with high purity NH 3 As an N source, trimethylgallium (TMGa) and triethylgallium (TEGa) as a gallium source; the growth temperature of the undoped GaN layer is 1050-1200 ℃, the pressure is 50-500 torr, and the thickness is 1-5 um; preferably, the growth temperature of the undoped GaN layer is 1100 ℃, the growth pressure is 150torr, the growth temperature of the undoped GaN layer is higher, the pressure is lower, the prepared GaN crystal quality is better, along with the increase of the GaN thickness, the compressive stress in the undoped GaN layer can be released through stacking faults, the line defect is reduced, the crystal quality is improved, the reverse leakage current is reduced, but the consumption of Ga source materials is larger by improving the thickness of the GaN layer, the epitaxial cost of an LED is greatly improved, and the optimal growth thickness of the undoped GaN layer is 2um-3um, so that the production cost is saved, and the GaN material has higher crystal quality.
And S50, depositing a composite N-type GaN layer on the undoped GaN layer.
Specifically, after the undoped GaN layer is deposited, a composite N-type GaN layer is continuously deposited in MOCVD equipment, wherein the composite N-type GaN layer comprises a first Si doped GaN layer, a SiN layer and a superlattice layer which are sequentially deposited on the undoped GaN layer, and the superlattice layer comprises a Si doped AlN layer, an InN layer and a second Si doped GaN layer which are sequentially and alternately deposited according to a preset period, wherein the concentration of Si doped in the first Si doped GaN layer is greater than that of Si doped in the second Si doped GaN layer.
Specifically, the deposition thickness of the first Si doped GaN layer is 1um-5um, the deposition thickness of the SiN layer is 1nm-100nm, the deposition thickness of the superlattice layer is 50nm-500nm, the deposition thickness ratio of the Si doped AlN layer, the InN layer and the second Si doped GaN layer is 1:1:10-10:1:50, preferably, the deposition thickness of the first Si doped GaN layer is 2.5um, the deposition thickness of the SiN layer is 65nm, the deposition thickness of the superlattice layer is 200nm, and the deposition thickness ratio of the Si doped AlN layer, the InN layer and the second Si doped GaN layer is 5:1:40. The period of alternate deposition of the Si-doped AlN layer, the InN layer and the second Si-doped GaN layer is 1-20, and preferably the period of alternate deposition of the Si-doped AlN layer, the InN layer and the second Si-doped GaN layer is 6. The concentration of Si doped in the first Si doped GaN layer is 1×10 18 atoms/cm 3 -1×10 20 atoms/cm 3 The Si-doped AlN layer and the second Si-doped GaN layer have a Si-doped concentration of 1X 10 17 atoms/cm 3 -1×10 19 atoms/cm 3 The method comprises the steps of carrying out a first treatment on the surface of the Preferably, the concentration of Si doped in the first Si-doped GaN layer is 2×10 19 atoms/cm 3 The Si-doped AlN layer and the second Si-doped GaN layer have a Si-doped concentration of 6X 10 17 atoms/cm 3 。
Further, the deposition growth temperature of the first Si GaN-doped layer is 1000-1200 ℃, the deposition growth temperature of the SiN layer is 900-1100 ℃, and the deposition growth temperature of the superlattice layer is 800-1000 ℃; preferably, the deposition growth temperature of the first Si GaN-doped layer is 1100 ℃, the deposition growth temperature of the SiN layer is 1000 ℃, and the deposition growth temperature of the superlattice layer is 900 ℃. The growth atmosphere in the deposition growth process of the first Si doped GaN layer is N 2 /H 2 /NH 3 A mixed gas with the component ratio of 1:1:10-1:5:10; the growth atmosphere in the deposition and growth process of the superlattice layer is N 2 / NH 3 A mixed gas with the component ratio of 1:5-5:1; preferably, the growth atmosphere in the deposition growth process of the first Si-doped GaN layer is N 2 /H 2 /NH 3 A mixed gas with the component ratio of 1:2:6; the growth atmosphere in the deposition and growth process of the superlattice layer is N 2 / NH 3 A mixed gas with the component ratio of 1:3. The growth pressure in the growth process of the composite N-type GaN layer is 50-300 torr; preferably, the growth pressure in the growth process of the composite N-type GaN layer is 150torr.
For the LED structure grown by taking sapphire as a substrate, the resistivity of the N-type GaN layer is higher than that of the transparent electrode on the P-type GaN, so that the resistivity is a main factor affecting the current expansion of the device and increasing the series resistance. According to the preparation method of the light-emitting diode, the first Si doped GaN layer with higher concentration is deposited on the undoped GaN layer, a large amount of electrons can be generated to be supplied to the multi-quantum well layer, radiation recombination is carried out on the electrons and holes in the multi-quantum well layer, the overall resistivity of the composite N-type GaN layer is reduced, and the light-emitting effect of the diode is improved. In addition, the thickness of the first Si doped GaN layer is deposited to 1um-5um, the higher thickness can not only increase current expansion and reduce the series resistance of the composite N-type GaN layer and the working voltage of the light-emitting diode, but also release the compressive stress in the composite N-type GaN layer through stacking faults, reduce line defects, improve crystal quality and reduce reverse leakage current.
Further, a SiN layer is deposited on the first Si doped GaN layer, a compact SiN film can be formed on the first Si doped GaN layer, dislocation defects penetrating through the first Si doped GaN layer are prevented, dislocation defects are further reduced from extending to the multiple quantum well layers, and the luminous efficiency of the multiple quantum well layers is affected. In addition, the superlattice layer comprises an Si-doped AlN layer, an InN layer and a second Si-doped GaN layer which are sequentially and alternately deposited on the SiN layer according to a preset period, preferably, the thickness ratio of the Si-doped AlN layer to the InN layer to the second Si-doped GaN layer is 1:1:10-10:1:50, the alternately deposited period is 1-20, the superlattice layer can effectively release mismatch stress between the composite N-type GaN layer 40 and the multiple quantum well layer, the incorporation efficiency of electrons and holes in the multiple quantum well layer is improved, the crystal quality is improved, and the non-radiative recombination efficiency of the multiple quantum well layer is reduced. Further, the concentration of doped Si of the second Si doped GaN layer in the superlattice layer is smaller than that of doped Si of the first Si doped GaN layer, so that a movement channel can be provided for electrons generated by the first Si doped GaN layer, the electrons can effectively move to the multi-quantum well layer, the interface voltage between the second Si doped GaN layer and the multi-quantum well layer can be reduced, and the crystal quality is further improved.
And step S60, depositing a multi-quantum well layer on the composite N-type GaN layer.
Specifically, the multiple quantum well layers are InGaN quantum well layers and AlGaN quantum barrier layers which are alternately deposited, the deposition cycle number is 6-12, and the deposition cycle is preferably 10. The growth temperature of the InGaN quantum well layer is 790-810 ℃, the thickness is 2-5 nm, the growth pressure is 50-300 torr, and the in component is 0.15-0.3; preferably, the growth temperature of the InGaN quantum well layer is 795 ℃, the thickness is 3.5nm, the growth pressure is 200torr, and the in component is 0.22. The growth temperature of the AlGaN quantum barrier layer is 800-900 ℃, the thickness of the AlGaN quantum barrier layer is 5-15 nm, the growth pressure is 50-300 torr, and the Al component is 0.01-0.1; preferably, the AlGaN quantum barrier layer has a growth temperature of 855 ℃, a thickness of 9.8nm, a growth pressure of 200torr and an Al composition of 0.05. The multi-quantum well layer is an area where electrons and holes are combined by radiation, and the overlapping degree of wave functions of the electrons and the holes can be remarkably increased by reasonable structural design, so that the luminous efficiency of the LED device is improved.
Step S70, depositing an electron blocking layer on the multiple quantum well layer.
Specifically, the electron blocking layer is Al a In b GaN layer, electron blocking layer thickness of 10 nm-40 nm, growth deposition temperature of 900-1000 deg.C, pressure of 100-300 torr, al component of 0.005<a<0.1, in content of 0.01<b<0.2. Preferably, the thickness of the electron blocking layer is 15nm, the growth deposition temperature is 965 ℃, the pressure is 200torr, the Al component concentration is gradually changed from 0.01 to 0.05 along the growth direction of the epitaxial layer, and the in component concentration is 0.01. The electron blocking layer can not only effectively limit electron overflow, but also reduce blocking of holes, improve injection efficiency of holes to the quantum well, reduce carrier auger recombination, and improve luminous efficiency of the light emitting diode.
In step S80, a P-type GaN layer is deposited on the electron blocking layer.
Specifically, the P-type GaN layer mainly functions to provide holes to the multiple quantum well layer, so that electrons and holes are radiative-recombined in the multiple quantum well layer to emit light. The growth temperature of the P-type GaN layer is 900-1050 ℃, the thickness is 10-50 nm, the growth pressure is 100-600 torr, mg is adopted for doping, and the doping concentration is 1X 10 19 atoms/cm 3 ~1×10 21 atoms/cm 3 Too high a Mg doping concentration can damage crystal quality, while too low a doping concentration can affect hole concentration. Preferably, the growth temperature of the P-type GaN layer is 985 ℃, the thickness is 15nm, the growth pressure is 200torr, and the doping concentration of Mg is 2 multiplied by 10 20 atoms/cm 3 . Meanwhile, for the LED structure with the V-shaped pits, the higher growth temperature of the P-type GaN layer is favorable for combining the V-shaped pits, so that the LED epitaxial wafer with a smooth surface is obtained.
Example 1
In this embodiment, a sapphire substrate is used. The thicknesses of the first Si doped GaN layer, the SiN layer and the superlattice layer are respectively 2.5um/1nm/200nm, the thickness ratio of the Si doped AlN layer, the InN layer and the second Si doped GaN layer is 1:1:4, the alternate deposition period of the Si doped AlN layer, the InN layer and the second Si doped GaN layer is 6, and the concentration of doped Si in the first Si doped GaN layer is 1 multiplied by 10 19 atoms/cm 3 The Si-doped AlN layer and the second Si-doped GaN layer have a Si-doped concentration of 1X 10 17 atoms/cm 3 Growth of first Si GaN-doped layer 2 /H 2 /NH 3 The composition ratio is 1:1:10, and the superlattice layer grows N 2 / NH 3 The composition ratio is 1:5.
Example 2
The high-efficiency light emitting diode in this embodiment is different from the light emitting diode in embodiment 1 in that the thicknesses of the first Si doped GaN layer, the SiN layer and the superlattice layer are 5um/80nm/50nm, the thickness ratio of the Si doped AlN layer, the InN layer and the second Si doped GaN layer is 5:1:40, the period of alternate deposition of the Si doped AlN layer, the InN layer and the second Si doped GaN layer is 1, and the concentration of Si doped in the first Si doped GaN layer is 5×10 19 atoms/cm 3 The Si-doped AlN layer and the second Si-doped GaN layer have a Si-doped concentration of 6X 10 17 atoms/cm 3 Growth of first Si GaN-doped layer 2 /H 2 /NH 3 The composition ratio is 1:3:10, and the superlattice layer grows N 2 / NH 3 The composition ratio is 1:2.
Example 3
The high-efficiency light emitting diode in this embodiment is different from the light emitting diode in embodiment 1 in that the thicknesses of the first Si-doped GaN layer, the SiN layer, and the superlattice layer are 2um/50nm/200nm, the thickness ratio of the Si-doped AlN layer, the InN layer, and the second Si-doped GaN layer is 1:1:10, the period of alternate deposition of the Si-doped AlN layer, the InN layer, and the second Si-doped GaN layer is 6, and the concentration of Si doped in the first Si-doped GaN layer is 2×10 19 atoms/cm 3 The Si-doped AlN layer and the second Si-doped GaN layer have a Si-doped concentration of 3X 10 17 atoms/cm 3 Growth of first Si GaN-doped layer 2 /H 2 /NH 3 The composition ratio is 1:1:8, and the superlattice layer grows N 2 / NH 3 The composition ratio is 1:5.
Example 4
The high-efficiency light emitting diode in this embodiment is different from the light emitting diode in embodiment 1 in that the thicknesses of the first Si doped GaN layer, the SiN layer and the superlattice layer are 3um/65nm/300nm, the thickness ratio of the Si doped AlN layer, the InN layer and the second Si doped GaN layer is 10:1:30, the period of alternate deposition of the Si doped AlN layer, the InN layer and the second Si doped GaN layer is 8, and the concentration of Si doped in the first Si doped GaN layer is 2×10 19 atoms/cm 3 The Si-doped AlN layer and the second Si-doped GaN layer have a Si-doped concentration of 6X 10 17 atoms/cm 3 Growth of first Si GaN-doped layer 2 /H 2 /NH 3 The composition ratio is 1:2:10, and the superlattice layer grows N 2 / NH 3 The composition ratio is 1:1.
Example 5
The high-efficiency light emitting diode in this embodiment is different from the light emitting diode in embodiment 1 in that the thicknesses of the first Si-doped GaN layer, the SiN layer, and the superlattice layer are 2.5um/45nm/200nm, the thickness ratio of the Si-doped AlN layer, the InN layer, and the second Si-doped GaN layer is 1:1:40, the period of alternate deposition of the Si-doped AlN layer, the InN layer, and the second Si-doped GaN layer is 6, and the concentration of Si doped in the first Si-doped GaN layer is 2×10 19 atoms/cm 3 The Si-doped AlN layer and the second Si-doped GaN layer have a Si-doped concentration of 1X 10 18 atoms/cm 3 Growth of first Si GaN-doped layer 2 /H 2 /NH 3 The composition ratio is 1:3:8, and the superlattice layer grows N 2 / NH 3 The composition ratio is 1:4.
Example 6
The high-efficiency light emitting diode in this embodiment is different from the light emitting diode in embodiment 1 in that the thicknesses of the first Si doped GaN layer, the SiN layer and the superlattice layer are 3um/100nm/80nm, the thickness ratio of the Si doped AlN layer, the InN layer and the second Si doped GaN layer is 1:1:6, the period of alternate deposition of the Si doped AlN layer, the InN layer and the second Si doped GaN layer is 3, and the concentration of Si doped in the first Si doped GaN layer is 1×10 20 atoms/cm 3 The Si-doped AlN layer and the second Si-doped GaN layer have a Si-doped concentration of 1X 10 19 atoms/cm 3 Growth of first Si GaN-doped layer 2 /H 2 /NH 3 The composition ratio is 1:2:6, and the superlattice layer grows N 2 / NH 3 The composition ratio is 4:1.
Example 7
The high-efficiency light emitting diode in this embodiment is different from the light emitting diode in embodiment 1 in that the thicknesses of the first Si-doped GaN layer, the SiN layer, and the superlattice layer are 3.5um/85nm/500nm, respectively, the thickness ratio of the Si-doped AlN layer, the InN layer, and the second Si-doped GaN layer is 10:1:50, the Si-doped AlN layer, the InN layer, and the second SThe period of alternate deposition of the i-doped GaN layers is 10, and the concentration of Si doped in the first Si-doped GaN layer is 2×10 19 atoms/cm 3 The Si-doped AlN layer and the second Si-doped GaN layer have a Si-doped concentration of 8×10 17 atoms/cm 3 Growth of first Si GaN-doped layer 2 /H 2 /NH 3 The composition ratio is 1:5:10, and the superlattice layer grows N 2 / NH 3 The composition ratio is 3:1.
Example 8
The high-efficiency light emitting diode in this embodiment is different from the light emitting diode in embodiment 1 in that the thicknesses of the first Si doped GaN layer, the SiN layer and the superlattice layer are 2um/65nm/200nm, the thickness ratio of the Si doped AlN layer, the InN layer and the second Si doped GaN layer is 10:1:30, the period of alternate deposition of the Si doped AlN layer, the InN layer and the second Si doped GaN layer is 20, and the concentration of Si doped in the first Si doped GaN layer is 8×10 18 atoms/cm 3 The Si-doped AlN layer and the second Si-doped GaN layer have a Si-doped concentration of 3X 10 17 atoms/cm 3 Growth of first Si GaN-doped layer 2 /H 2 /NH 3 The composition ratio is 1:4:10, and the superlattice layer grows N 2 / NH 3 The composition ratio is 5:1.
Example 9
The high-efficiency light emitting diode in this embodiment is different from the light emitting diode in embodiment 1 in that the thicknesses of the first Si doped GaN layer, the SiN layer and the superlattice layer are 1um/65nm/300nm, the thickness ratio of the Si doped AlN layer, the InN layer and the second Si doped GaN layer is 1:1:5, the period of alternate deposition of the Si doped AlN layer, the InN layer and the second Si doped GaN layer is 9, and the concentration of Si doped in the first Si doped GaN layer is 1×10 18 atoms/cm 3 The concentration of Si doped in the Si-doped AlN layer and the second Si-doped GaN layer was 2X 10 17 atoms/cm 3 Growth of first Si GaN-doped layer 2 /H 2 /NH 3 The composition ratio is 1:1:6, and the superlattice layer grows N 2 / NH 3 The composition ratio is 2:1.
Comparative example
The light emitting diode in this embodiment is different from the high-efficiency light emitting diode in embodiment 1 in that an N-type GaN layer is interposed between the undoped GaN layer and the multiple quantum well layer, and the N-type GaN layer is thickThe degree is 3um, si is adopted for doping, and the doping concentration is 2 multiplied by 10 19 atoms/cm 3 。
Referring to table 1, the results of comparing the parameters and the corresponding light transmittance of the above examples and comparative examples are shown.
TABLE 1
As can be seen from Table 1, compared with the existing light-emitting diode epitaxial wafer prepared in mass production, the high-efficiency light-emitting diode epitaxial wafer provided by the invention has the advantage that the photoelectric efficiency is improved by 1.5% -5%.
It should be noted that the foregoing implementation procedure is only for illustrating the feasibility of the present application, but this does not represent the efficient led of the present application, and may be included in the feasible embodiments of the present application, as long as the efficient led of the present application can be implemented. In addition, in the embodiment of the present invention, the structural part of the high-efficiency light emitting diode corresponds to the part of the method for preparing the high-efficiency light emitting diode according to the present invention, and the specific implementation details are the same, which is not described herein.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The foregoing examples illustrate only a few embodiments of the invention, which are described in detail and are not to be construed as limiting the scope of the invention. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.
Claims (10)
1. The high-efficiency light-emitting diode is characterized by comprising a substrate, and a buffer layer, an undoped GaN layer, a composite N-type GaN layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer which are sequentially deposited on the substrate;
the composite N-type GaN layer comprises a first Si doped GaN layer, a SiN layer and a superlattice layer which are sequentially deposited on the undoped GaN layer, wherein the superlattice layer comprises an Si doped AlN layer, an InN layer and a second Si doped GaN layer which are sequentially and alternately deposited according to a preset period, and the concentration of Si doped in the first Si doped GaN layer is larger than that of Si doped in the second Si doped GaN layer.
2. The led of claim 1, wherein the first Si doped GaN layer has a thickness of 1um-5um, the SiN layer has a thickness of 1nm-100nm, and the superlattice layer has a thickness of 50nm-500nm.
3. The led of claim 1, wherein the thickness ratio of the AlN Si-doped layer, the InN layer, and the second GaN Si-doped layer is 1:1:10-10:1:50.
4. The led of claim 1, wherein the predetermined period is 1-20.
5. The led of claim 1, wherein the first Si-doped GaN layer has a Si-doped concentration of 1 x 10 18 atoms/cm 3 -1×10 20 atoms/cm 3 The Si-doped AlN layer and the second Si-doped GaN layer have a Si-doped concentration of 1×10 17 atoms/cm 3 -1×10 19 atoms/cm 3 。
6. A method of manufacturing the high efficiency light emitting diode of any one of claims 1 to 5, comprising the steps of:
providing a substrate;
sequentially depositing a buffer layer, an undoped GaN layer, a composite N-type GaN layer, a multiple quantum well layer, an electron blocking layer and a P-type GaN layer on the substrate;
the composite N-type GaN layer comprises a first Si doped GaN layer, a SiN layer and a superlattice layer which are sequentially deposited on the undoped GaN layer, wherein the superlattice layer comprises an Si doped AlN layer, an InN layer and a second Si doped GaN layer which are sequentially and alternately deposited on the SiN layer according to a preset period, and the concentration of Si doped in the first Si doped GaN layer is larger than that of Si doped in the second Si doped GaN layer.
7. The method of manufacturing according to claim 6, wherein: the growth atmosphere in the deposition growth process of the first Si GaN-doped layer is N 2 /H 2 /NH 3 The component ratio of the mixed gas is 1:1:10-1:5:10.
8. The method of manufacturing according to claim 6, wherein: the growth atmosphere in the deposition and growth process of the superlattice layer is N 2 / NH 3 The component ratio of the mixed gas is 1:5-5:1.
9. The method of manufacturing according to claim 6, wherein: the deposition growth temperature of the first Si GaN-doped layer is 1000-1200 ℃, the deposition growth temperature of the SiN layer is 900-1100 ℃, and the deposition growth temperature of the superlattice layer is 800-1000 ℃.
10. The method of manufacturing according to claim 6, wherein: the growth pressure in the growth process of the composite N-type GaN layer is 50-300 torr.
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