CN116127912A

CN116127912A - Method for acquiring temperature rise region and method for manufacturing printed circuit board

Info

Publication number: CN116127912A
Application number: CN202211710642.1A
Authority: CN
Inventors: 孙广元; 管云龙; 陈超
Original assignee: Xunmu Information Technology Shanghai Co Ltd
Current assignee: Xunmu Information Technology Shanghai Co Ltd
Priority date: 2022-12-29
Filing date: 2022-12-29
Publication date: 2023-05-16

Abstract

A method for obtaining temperature rise region and a method for manufacturing printed circuit board are disclosed. And obtaining the simulation temperature of each point to be tested on the printed circuit board layout through simulation, obtaining a temperature rise point with the simulation temperature greater than or equal to the temperature threshold value in the points to be tested according to the preset temperature threshold value, and determining a temperature rise region according to the temperature rise point. Therefore, the temperature rise region with larger temperature change can be obtained in advance, time delay matching is further carried out on the temperature rise region, and the reliability of signal transmission of the printed circuit board is improved.

Description

Method for acquiring temperature rise region and method for manufacturing printed circuit board

Technical Field

The invention relates to the technical field of circuits, in particular to a method for acquiring a temperature rise region and a method for manufacturing a printed circuit board.

Background

PCB (Printed Circuit Board ) is a signal carrier in most devices used in the electronics industry today. In order to reduce the time delay and data packet loss of signal propagation and ensure timely transmission of signals from a signal source to a load, the PCB design needs time delay matching.

In the prior art, the time delay matching generally comprises two modes of line length matching and isochronous matching. However, neither equal length nor equal time matching takes into account the effect of temperature on signal transmission. And temperature causes diffraction attenuation of electromagnetic waves. In actual operation, the dielectric constant of the commonly used PCB dielectric material is changed along with the temperature, the change of the dielectric constant can lead to line delay, and the higher the temperature is, the larger the delay is, so that the situation of delay or packet loss of signals in the transmission process can be caused.

Disclosure of Invention

Accordingly, an object of the embodiments of the present invention is to provide a method for acquiring a temperature rise region and a method for manufacturing a printed circuit board, which can improve the reliability of signal transmission of the printed circuit board.

In a first aspect, an embodiment of the present invention provides a method for acquiring a temperature rising area, where the method includes:

obtaining the simulation temperature of each point to be tested on the printed circuit board layout through simulation;

acquiring a preset temperature threshold;

acquiring a temperature rise point in the to-be-tested points according to the temperature threshold, wherein the temperature rise point is the to-be-tested point with the simulated temperature being greater than or equal to the temperature threshold; and

and determining a temperature rise region according to the temperature rise point, wherein the temperature rise region is a region needing to be matched with the time delay.

In some embodiments, the obtaining, through simulation, the simulated temperature of each point to be tested on the printed circuit board layout includes:

obtaining a printed circuit board layout;

determining a point to be tested;

acquiring setting parameters, wherein the setting parameters comprise one or more of parameters of each point to be tested, network attributes of each point to be tested, parameters of an electricity utilization end, setting modes of a voltage regulation module, heat dissipation parameters and setting constraints; and

and outputting the simulation temperature of each point to be tested through simulation.

In some embodiments, the obtaining the printed circuit board layout includes:

acquiring a pre-designed printed circuit board layout of a first format; and

and converting the printed circuit board layout of the first format into the printed circuit board layout of the second format.

In some embodiments, the point to be tested is a high frequency signal transmission point.

In some embodiments, the determining the temperature rise region according to the temperature rise point is specifically:

and determining the temperature rise region according to a preset shape and the temperature rise point, wherein the temperature rise point is in the Wen Shengou domain or at the boundary of the temperature rise region.

In a second aspect, an embodiment of the present invention provides a method for manufacturing a printed circuit board, where the method includes:

providing a circuit layer through a first material in a general area; and

and arranging a circuit layer in the temperature rise region through a second material, wherein the second material is a material with low influence on the conductivity due to temperature.

In some embodiments, the disposing the circuit layer through the second material in the temperature rise region is specifically:

the high frequency circuitry within the Wen Shengou domain is provided with a circuit layer through the second material.

In some embodiments, the method further comprises:

the low frequency circuitry within the Wen Shengou domain is provided with a circuit layer through the first material.

In some embodiments, the method further comprises: the high-frequency circuit is a circuit for transmitting a high-frequency signal to a temperature rise point, and the temperature rise point is a connection point with the simulation temperature being greater than or equal to a temperature threshold.

In some embodiments, the first material is copper and the second material is gold or silver.

According to the technical scheme, simulation temperatures of all points to be tested on the printed circuit board layout are obtained through simulation, temperature rising points with the simulation temperatures being greater than or equal to the temperature threshold are obtained in the points to be tested according to the preset temperature threshold, and a temperature rising area is determined according to the temperature rising points. Therefore, the temperature rise region with larger temperature change can be obtained in advance, time delay matching is further carried out on the temperature rise region, and the reliability of signal transmission of the printed circuit board is improved.

Drawings

The above and other objects, features and advantages of the present invention will become more apparent from the following description of embodiments of the present invention with reference to the accompanying drawings, in which:

FIG. 1 is a flow chart of a method for acquiring a temperature rise region according to an embodiment of the present invention;

FIG. 2 is a flow chart of acquiring simulated temperatures according to an embodiment of the present invention;

FIG. 3 is a schematic diagram of a PCB layout of an embodiment of the present invention;

FIG. 4 is a schematic diagram of simulated temperatures for an embodiment of the present invention;

FIG. 5 is a schematic diagram of a temperature rise region according to one embodiment of the invention;

FIG. 6 is a schematic diagram of a temperature rise region according to another embodiment of the present invention;

FIG. 7 is a schematic view of a temperature rise region according to yet another embodiment of the present invention;

FIG. 8 is a flow chart of a method of fabricating a printed circuit board according to one embodiment of the present invention;

fig. 9 is a flowchart of a method for manufacturing a printed circuit board according to another embodiment of the present invention;

FIG. 10 is a schematic diagram of a printed circuit board according to one embodiment of the invention;

FIG. 11 is a schematic view of a printed circuit board according to another embodiment of the present invention;

FIG. 12 is a schematic diagram of a signal transmission system according to an embodiment of the present invention;

FIG. 13 is a schematic view of an acquisition device of a temperature rise region according to an embodiment of the present invention;

fig. 14 is a schematic diagram of an electronic device according to an embodiment of the invention.

Detailed Description

The present invention is described below based on examples, but the present invention is not limited to only these examples. In the following detailed description of the present invention, certain specific details are set forth in detail. The present invention will be fully understood by those skilled in the art without the details described herein. Well-known methods, procedures, flows, components and circuits have not been described in detail so as not to obscure the nature of the invention.

Moreover, those of ordinary skill in the art will appreciate that the drawings are provided herein for illustrative purposes and that the drawings are not necessarily drawn to scale.

Meanwhile, it should be understood that in the following description, "circuit" refers to a conductive loop constituted by at least one element or sub-circuit through electrical connection or electromagnetic connection. When an element or circuit is referred to as being "connected to" another element or being "connected between" two nodes, it can be directly coupled or connected to the other element or intervening elements may be present and the connection between the elements may be physical, logical, or a combination thereof. In contrast, when an element is referred to as being "directly coupled to" or "directly connected to" another element, it means that there are no intervening elements present between the two.

Unless the context clearly requires otherwise, the words "comprise," "comprising," and the like in the description are to be construed in an inclusive sense as opposed to an exclusive or exhaustive sense; that is, it is the meaning of "including but not limited to".

In the description of the present invention, it should be understood that the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. Furthermore, in the description of the present invention, unless otherwise indicated, the meaning of "a plurality" is two or more.

In order to reduce the time delay and data packet loss of signal propagation and ensure timely transmission of signals from a signal source to a load, the PCB design needs time delay matching. Latency matching generally includes both line length matching and isochronous matching. Since the line length matching of signals is to ensure the delay of signals, the equal length matching is to be equal, and neither the equal length matching nor the equal length matching is considered to influence the temperature on the high-speed signals. And temperature causes diffraction attenuation of electromagnetic waves.

In practical operation, the dielectric constant of the conventional PCB dielectric FR4 material relative to air is 4.2-4.7, the dielectric constant can change along with temperature, and the maximum change range can reach 20% in the temperature range of 0-70 ℃. The change in dielectric constant results in a 10% change in line delay, with higher temperatures and greater delays. Therefore, if time delay matching is carried out on the area with the temperature exceeding 70 ℃ on the PCB, the performance of the PCB can be greatly improved. Therefore, the embodiment of the invention provides a method for acquiring a temperature rise region to acquire the temperature rise region, wherein the temperature rise region is a region with larger temperature change.

Fig. 1 is a flowchart of a method for acquiring a temperature rise region according to an embodiment of the present invention. In the embodiment shown in fig. 1, the method for acquiring the temperature rise region includes the following steps:

and step S110, obtaining the simulation temperature of each point to be tested on the printed circuit board layout through simulation.

In this embodiment, in order to obtain the temperature rise region, it is required to obtain the temperature of each position on the PCB board when the device is running, if an actual measurement mode is adopted, on one hand, it is required to make complete equipment, which results in long time and low efficiency, and on the other hand, the accuracy of temperature measurement is lower and the difficulty is greater. Therefore, the simulation temperature of each point to be tested on the printed circuit board layout is obtained through simulation, the efficiency and the accuracy of temperature testing of the point to be tested can be improved, and the difficulty of temperature measurement is reduced.

Furthermore, the time delay matching in the temperature rise area is realized by adopting materials with good conductivity such as gold and silver and low influence on the temperature conductivity, and the cost is high. Therefore, in order to reduce the cost, the embodiment of the invention only carries out time delay matching on the transmission line of the high-frequency signal, and therefore, the point to be tested is the high-frequency signal transmission point.

The points to be tested are pads and/or through holes for high-frequency signal transmission on the PCB.

Specifically, FIG. 2 is a flow chart of acquiring a simulated temperature according to an embodiment of the present invention. In the embodiment shown in fig. 2, the acquisition of the simulated temperature includes the steps of:

and S111, obtaining a printed circuit board layout.

In this embodiment, a first format printed circuit board layout is obtained, and the first format printed circuit board layout is converted into a second format printed circuit board layout.

Further, the simulation temperature obtained by Power DC will be described as an example. When Cadence is installed Cadence sigrity suite manager is found, then Power DC is turned on. The Power DC can realize functions such as IR Drop simulation, thermal simulation, electrothermal coordination simulation and the like.

Further, a PCB layout of a first format is obtained in advance through PCB drawing software, wherein the first format is a brd format (PCB file), and the PCB file of the first format is imported into PowerDC.

The second format is a spd format (Signature file). Specifically, after a file in the format of. brd (PCB file) is imported into Power DC, the format of. brd (PCB file) is converted into the format of.spd (Sigity file) using SPDLIinks-CAD transmitters under the plug-in Cadence Signaling. Then, using the Power DC component in Cadence Signaling, engineering Workspace is newly built and the file in.spd format just obtained by conversion is opened.

Step S112, determining the point to be tested.

In this embodiment, the point to be tested is a high-frequency signal transmission point, where the point to be tested is a pad and/or a via hole for high-frequency signal transmission on a PCB.

Fig. 3 is a schematic diagram of a PCB layout of an embodiment of the present invention. In the embodiment shown in fig. 3, the solid line box is a part of the structure of the PCB layout, including the chip M, the connection points and the wirings. The chip M may be a black box in the figure, and the connection points may be circles P1-P13 in the figure, and the black lines represent wirings.

In this embodiment, the connection points P1-P13 are pads and/or vias on the PCB, and in the embodiment shown in fig. 3, the connection points include a transmission point of a low-frequency signal and a transmission point of a high-frequency signal, and for convenience of explanation, the embodiment of the present invention uses P6, P8, and P10 as the transmission points of the low-frequency signal, and the other connection points are all illustrated as the transmission points of the high-frequency signal. That is, for the PCB layout shown in FIG. 3, P1-P5, P7, P9, P11-P13 are points to be tested in the embodiment of the invention.

Step S113, acquiring setting parameters.

In this embodiment, the setting parameters include one or more of parameters of each point to be tested, network properties of each point to be tested, parameters of a power end, a setting mode of a voltage regulation module, a heat dissipation parameter, and a setting constraint.

Further, the obtaining of the setting parameters includes the steps of:

step S1131, setting parameters of each point to be tested.

Parameters of the points to be tested include parameters of the pads and/or vias (Pad & Via platingthickness), corresponding Pad thickness (typically surface copper thickness) and copper plating thickness of the vias, which are set to simulate a network. Specific parameter values may be set according to actual requirements, and ipc_2 (IPC secondary standard) specifications are taken as an example for illustration, the Pad (Pad) thickness may be set to 1.4mil, and the via thickness may be set to 1mil. Among them, IPC (Association ConnectingElectronicslndustries, american society of connection electronics industry) is an industry inspection standard basis.

Specifically, an optional: setup Plating Thickness set pad parameter is selected in the Initial Setup, and an optional: setup Plating Thickness set via parameter is selected in the Initial Setup.

Step S1132, enabling the simulation network.

In this embodiment, the simulation network state is checked, and the network attribute and the inductance related parameter of each point to be tested are set, where the network attribute includes a power network and a return network. The power network to be emulated is put into PowerNet, the corresponding return ground network is put into GroundNet, and Setup P/G net-Skip Setup P/G is selected from the Initial Setup. Because most power supply modules (BUCK, BOOST, etc.) are output through inductors, networks at the inductor side are also added to PowerNets, and the right hand key is to the corresponding networks classification into PowerNets.

Step S1133, setting the parameters of the power utilization terminal.

In this embodiment, parameters related to Sink (power consumption) are set. The Sink represents the current flowing into the port from the external circuit, commonly called a load end or a power utilization end, and one load or a plurality of loads may be actually provided according to actual situations.

In a specific implementation, among the parameters of the Sink side, the Model (mode) is set to Equal current. The Current is the Current magnitude of the terminal use, and is set according to the actual situation. Tolerance is set to 5% and includes dc voltage drop and power supply noise.

Step S1134, setting the mode of the voltage regulation module

In this embodiment, a VRM (Voltage Redulator Module, voltage regulator module) is provided to provide output, commonly referred to as the source, for the power supply to be emulated.

Specifically, set up VRMs are selected at Voltage Drop Analysis Setup to Set VRMs. The VRM includes two setting modes, and the automatic setting sets the thena element chip end as the VRM, and the manual mode is generally to select the inductance output end.

Step S1135, setting heat dissipation parameters.

In this embodiment, the setting of the heat dissipation parameter may be set according to the actual situation.

Step S1136, setting a constraint.

In the present embodiment, the via current density, the plane current density, the track current density, the tolerance of the voltage drop, and the like are set by setting the constraint.

It should be understood that the above listed parameter setting is only an example provided by the embodiment of the present invention, and the embodiment of the present invention does not limit the set parameter values and types of parameters, and may specifically be modified accordingly according to the actual situation of the PCB layout. For example, stacking arrangement of files can be set, and related information is filled in according to stacking of actual PCB boards; setting discrete means that discrete devices are enabled, wherein a power module possibly existing in a PCB outputs through inductance, or the same network outputs through magnetic beads or common mode inductance, so that the discrete devices are required to be enabled, otherwise, the situation is not identified in the property, the network to be simulated is open-circuited, and the simulation cannot run out; setting the actual environment of the PCB; setting the state of the environment where the PCB is actually located; setting a heating device, wherein a power Chip, a DDR (Double Data Rate), an SOC (System on Chip) and the like on a PCB (printed Circuit Board) are all possible heating devices, and the heating devices are selected according to an actual simulation network and the actual board; setting the power consumption of the heating device; the simulation rule is set as the line width and line distance in the PCB.

And step S114, outputting the simulation temperature of each point to be tested through simulation.

In this embodiment, after the parameter setting is completed, the set file is saved, simulation is performed, and the simulation temperature of each point to be tested is output.

FIG. 4 is a schematic diagram of simulated temperatures for an embodiment of the present invention. Fig. 4 shows simulated temperatures of the points to be tested P1-P5, P7, P9, P11-P13.

Step S120, acquiring a preset temperature threshold.

In this embodiment, the preset temperature threshold is 70 ℃. The dielectric constant of the conventional PCB medium FR4 material relative to air is 4.2-4.7, the dielectric constant can change along with temperature, and the maximum change range can reach 20% in the temperature range of 0-70 ℃. The change in dielectric constant results in a 10% change in line delay, with higher temperatures and greater delays. Therefore, if time delay matching is carried out on the area with the temperature exceeding 70 ℃ on the PCB, the performance of the PCB can be greatly improved.

It should be noted that, the value of the temperature threshold is not limited in the embodiment of the present invention, and may be set according to actual requirements, for example, it may also be 65 ℃ or 75 ℃. It will be appreciated that the higher the temperature threshold, the fewer the temperature rise points that are ultimately obtained, and correspondingly the smaller the temperature rise region that is ultimately determined, and therefore the temperature threshold may also be set in accordance with the budget cost.

And step S130, acquiring a temperature rise point from the points to be tested according to the temperature threshold.

In this embodiment, the temperature rise point is a point to be tested whose simulated temperature is greater than or equal to the temperature threshold.

Further, taking the simulated temperature shown in fig. 4 as an example, assuming that the preset temperature is 70 ℃, the temperature rise points include P2, P4, P7, and P9.

And step S140, determining a temperature rise region according to the temperature rise point.

In this embodiment, the temperature rise region is determined according to the temperature rise point, where the temperature rise region is a region where the time delay needs to be matched.

In an alternative implementation, the temperature rise region is determined according to a predetermined shape and the temperature rise point, wherein the temperature rise point is within the Wen Shengou domain or at a boundary of the temperature rise region. Wherein the predetermined shape may be rectangular, circular, elliptical, regular polygon or other irregular pattern.

Taking a predetermined shape as an example for illustration, the temperature rise region may be as shown in fig. 5. In the embodiment shown in fig. 5, a rectangular dotted frame A1 is a certain temperature rise region.

It should be appreciated that for ease of illustration and presentation and to reduce the difficulty of subsequent PCB fabrication, fig. 5 illustrates an example of rectangular boundaries of rectangular temperature rise regions and boundaries of PCBs.

In addition, in order to further reduce the manufacturing cost of the PCB, the temperature rise region can be in a minimum shape for covering the temperature rise point. Also, by taking a predetermined shape as a rectangular shape for illustration, the temperature rise region may be as shown in fig. 6. In the embodiment shown in fig. 6, a rectangular dotted frame A2 is a certain temperature rise region.

Taking a predetermined shape as a circle for illustration, the temperature rise region may be as shown in fig. 7. In the embodiment shown in fig. 7, the circular dotted line A3 is a temperature rise region.

It should be understood that the temperature rise regions shown in fig. 5 to 7 are only examples provided by the embodiments of the present invention, and the embodiments of the present invention do not limit the shape and the division manner of the temperature rise regions, and may be implemented based on various existing manners.

According to the embodiment of the invention, the simulation temperature of each point to be tested on the printed circuit board layout is obtained through simulation, the temperature rise point with the simulation temperature being greater than or equal to the temperature threshold value is obtained in the points to be tested according to the preset temperature threshold value, and the temperature rise region is determined according to the temperature rise point. Therefore, the temperature rise region with larger temperature change can be obtained in advance, time delay matching is further carried out on the temperature rise region, and the reliability of signal transmission of the printed circuit board is improved.

Fig. 8 is a flowchart of a method of manufacturing a printed circuit board according to an embodiment of the present invention. In the embodiment shown in fig. 8, the method for manufacturing the printed circuit board includes the following steps:

step S210, disposing a circuit layer through a first material in a normal region.

In this embodiment, the first material is a conductive material with low cost.

Further, the first material is copper.

And step S220, setting a circuit layer through the second material in the temperature rise area.

In this embodiment, the second material is a material having a low influence of temperature on the conductivity.

Further, the second material is gold or silver.

In some embodiments, to further reduce cost, high frequency circuitry within the Wen Shengou domain is routed through the second material placement circuit layer and low frequency circuitry within the Wen Shengou domain is routed through the first material placement circuit layer. The high-frequency circuit is a circuit for transmitting a high-frequency signal to a temperature rise point, and the temperature rise point is a connection point with the simulation temperature being greater than or equal to a temperature threshold. The low frequency circuit is other than the high frequency circuit in the Wen Shengou domain.

According to the embodiment of the invention, the circuit layer is arranged in the common area through the first material, and the circuit layer is arranged in the temperature rise area through the second material of the conductive material with good conductivity at high temperature. Therefore, time delay matching can be performed on the temperature rise region, and the reliability of signal transmission of the printed circuit board is improved.

Further, for ease of understanding, fig. 9 shows a specific implementation of a method for manufacturing a printed circuit board, which specifically includes the following steps:

step S310, printing a circuit board.

In this embodiment, the drawn circuit board is printed out with transfer paper.

Further, since the embodiment of the invention divides the PCB into the normal area and the temperature rise area, the circuit boards of the normal area and the temperature rise area are printed respectively.

Step S320, cutting the first material plate and the second material plate.

In this embodiment, the first material plate is cut to fit the shape and size of the normal region of the PCB, and the second material plate is cut to fit the shape and size of the temperature rise region of the PCB.

The first material plate is a copper-clad plate, and the second material plate is a silver-clad plate or a gold-clad plate.

Step S330, preprocessing the material plate.

In this embodiment, the oxide layers on the surfaces of the first material plate and the second material plate need to be polished with fine sand paper, so that carbon powder on the thermal transfer paper can be firmly printed on the first material plate and the second material plate during transfer printing of the circuit board.

Step S340, transferring the circuit board.

In this embodiment, the printed circuit board is cut to a suitable size, one side printed with the circuit board is attached to the first material plate, and the printed circuit board is placed into the thermal transfer printer after being aligned. The circuit board can be firmly transferred onto the first material plate by transferring for 2-3 times. And in the same way, the surface printed with the circuit board is stuck on the second material plate, and the circuit board is placed into a thermal transfer printer after being aligned, so that the circuit board is transferred onto the first material plate.

Step S350, corroding the circuit board and the reflow soldering machine.

In this embodiment, it is checked whether the circuit board is completely transferred, and if a small number of places with or without transferred places are found, the places can be repaired by using a black oily pen, and then corrosion is performed. When the exposed material film (copper film, silver film, gold film) on the circuit board is completely corroded, the circuit board is taken out from the corrosive liquid and cleaned, and thus the circuit board is corroded.

And step S360, drilling holes on the circuit board.

In this embodiment, the electronic components are required to be inserted into the circuit board, and thus the circuit board is required to be drilled. The choice of drill point is determined by the thickness of the electronic component pins.

And step S370, preprocessing the circuit board.

In this embodiment, after the drilling is completed, the circuit board is pretreated, the toner coated on the board is ground off with fine sand paper, and then the circuit board is cleaned with clean water. After the water on the circuit board is dried, the rosin water is coated on the surface with the circuit, the circuit board can be heated by a hot air blower to accelerate the solidification of the rosin, and the rosin can be solidified only by 2-3 minutes.

Step S380, welding the electronic component.

In this embodiment, the electronic components are all soldered to the circuit board. Thus, the PCB manufacturing process is completed.

Fig. 10 is a schematic diagram of a printed circuit board according to one embodiment of the invention. In the embodiment shown in fig. 10, the printed circuit board includes a normal area B1 and a temperature rise area A4.

In this embodiment, the common area B1 includes a circuit layer formed of a first material, which is a low-cost conductive material.

Further, the first material is copper.

In this embodiment, the temperature rise region A4 includes a circuit layer provided by a second material, where the second material is a material having a low influence on the conductive performance due to temperature.

Further, the second material is gold or silver.

In this embodiment, the circuit layers in the temperature rise region A4 are all made of the second material.

It should be understood that in the embodiment shown in fig. 10, the shape of the temperature raising region is taken as a center of circle for illustration, but the embodiment of the present invention does not limit the shape of the temperature raising region, and the temperature raising region is rectangular, circular, elliptical, regular polygon or other irregular shape.

Note that, in the Wen Shengou domain of fig. 10, the circuit layer is represented by a dashed line, where the dashed line is only used to indicate that the material of the circuit layer is the second material, and does not represent the actual width of the circuit layer in the PCB board.

Fig. 11 is a schematic view of a printed circuit board according to another embodiment of the present invention. In the embodiment shown in fig. 11, the printed circuit board includes a normal area B2 and a temperature rise area A5.

In this embodiment, the common area B2 includes a circuit layer formed of a first material, which is a low-cost conductive material.

Further, the first material is copper.

In this embodiment, the temperature rise region A5 includes a circuit layer formed of a first material and a second material, where the second material is a material having a low influence on the conductive performance due to temperature.

Further, the circuit layer of the high-frequency circuit in the temperature rise region A5 is the second material, and the low-frequency circuit layer in the Wen Shengou region is the first material.

Further, the second material is gold or silver.

Specifically, the connection points P1 to P5, P7, P9, and P11 to P13 are high-frequency signal connection points, and the circuit for transmitting a high-frequency signal to the high-frequency signal connection points is a high-frequency circuit.

It should be understood that in the embodiment shown in fig. 11, the shape of the temperature raising region is taken as a center of circle for illustration, but the embodiment of the present invention does not limit the shape of the temperature raising region, and the temperature raising region is rectangular, circular, elliptical, regular polygon or other irregular shape.

It should be noted that, in the temperature rise region of fig. 11, the circuit layer is represented by a dotted line, where the dotted line is only used to indicate that the material of the circuit layer is the second material, and does not represent the actual width of the circuit layer in the PCB board.

Fig. 12 is a schematic diagram of a signal transmission system according to an embodiment of the present invention. In the embodiment shown in fig. 12, the signal transmission system comprises a printed circuit board 1, a connector 2 and a terminal 3. Wherein the printed circuit board 1 and the terminals 3 are connected by connectors.

In this embodiment, the printed circuit board 1 is a printed circuit board shown in fig. 10 or 11, and the embodiments of the present invention are not described herein again.

In the present embodiment, the connector 2 is connected to the printed circuit board 1 for carrying out signals DA2205824I

And (5) transmission.

In some embodiments, the connector 2 includes at least a high frequency signal transmission interface.

In an alternative implementation, the printed circuit board 1 and the connector 2 are integrated on the same device. Specifically, the printed circuit board 1 is provided with a connection point for signal transmission, and the connector 2 is directly welded on the connection point, or is connected with the connection point through a wire, so as to realize information transmission between the printed circuit board 1 and the connector 2.

In another alternative implementation, the printed circuit board 1 and the connector 2 are on different devices. Specifically, an interface adapted to the connector 2 is provided on the device carrying the printed circuit board 1, and the connector 2 connects the printed circuit board 1 with the terminal 3, so as to realize information transmission between the printed circuit board 1 and the terminal 3.

In this embodiment, the terminal 3 may be implemented by a mobile phone, a notebook computer, a tablet computer, a desktop computer or other special data processing devices.

Fig. 13 is a schematic view of an acquisition device of a temperature rise region according to an embodiment of the present invention. In the embodiment shown in fig. 13, the temperature rise region acquisition means includes a simulated temperature acquisition unit 131, a temperature threshold acquisition unit 132, a temperature rise point acquisition unit 133, and a temperature rise region acquisition unit 134. The simulation temperature obtaining unit 131 is configured to obtain, through simulation, a simulation temperature of each point to be tested on the PCB layout. The temperature threshold value acquisition unit 132 is configured to acquire a temperature threshold value set in advance. The temperature rise point obtaining unit 133 is configured to obtain a temperature rise point from the points to be tested according to the temperature threshold, where the temperature rise point is a point to be tested where the simulated temperature is greater than or equal to the temperature threshold. The temperature rise region acquiring unit 134 is configured to determine a temperature rise region according to the temperature rise point, where the temperature rise region is a region where a matching delay is required.

In some embodiments, the simulated temperature acquisition unit comprises:

the layout acquisition subunit is used for acquiring the layout of the printed circuit board;

the to-be-tested point acquisition subunit is used for determining the to-be-tested point;

the parameter acquisition subunit is used for acquiring setting parameters, wherein the setting parameters comprise one or more of parameters of each point to be tested, network attributes of each point to be tested, parameters of an electricity utilization end, a setting mode of a voltage regulation module, heat dissipation parameters and setting constraints; and

and the simulation subunit is used for outputting the simulation temperature of each point to be tested through simulation.

In some embodiments, the layout acquisition subunit includes:

the first acquisition module is used for acquiring a pre-designed printed circuit board layout in a first format; and

and the second acquisition module is used for converting the printed circuit board layout in the first format into a printed circuit board layout in the second format.

In some embodiments, the temperature rise region acquiring unit is specifically configured to:

Fig. 14 is a schematic diagram of an electronic device according to an embodiment of the invention. The electronic device shown in fig. 14 is a general-purpose data processing apparatus including a general-purpose computer hardware structure including at least a processor 141 and a memory 142. Processor 141 and memory 142 are connected by bus 143. The memory 142 is adapted to store instructions or programs executable by the processor 141. Processor 141 may be a stand-alone microprocessor or may be a collection of one or more microprocessors. Thus, processor 141, by executing instructions stored in memory 142, performs the method flows of embodiments of the invention described above to effect processing of data and control of other devices. Bus 143 connects the above components together, as well as to display controller 144 and display devices and input/output (I/O) devices 145. Input/output (I/O) devices 145 may be a mouse, keyboard, modem, network interface, touch input device, somatosensory input device, printer, and other devices known in the art. Typically, the input/output devices 145 are connected to the system through input/output (I/O) controllers 146.

It will be apparent to those skilled in the art that embodiments of the present invention may be provided as a method, apparatus (device) or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may employ a computer program product embodied on one or more computer-readable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein.

The present invention is described with reference to flowchart illustrations of methods, apparatus (devices) and computer program products according to embodiments of the application. It will be understood that each of the flows in the flowchart may be implemented by computer program instructions.

These computer program instructions may be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows.

These computer program instructions may also be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows.

The above description is only of the preferred embodiments of the present invention and is not intended to limit the present invention, and various modifications and variations may be made to the present invention by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. The method for acquiring the temperature rise region is characterized by comprising the following steps:

acquiring a preset temperature threshold;

2. The method according to claim 1, wherein the obtaining, by simulation, the simulated temperature of each point to be tested on the printed circuit board layout comprises:

obtaining a printed circuit board layout;

determining a point to be tested;

3. The method of claim 2, wherein the acquiring a printed circuit board layout comprises:

acquiring a pre-designed printed circuit board layout of a first format; and

4. The method according to claim 1, wherein the point to be tested is a high frequency signal transmission point.

5. The method according to claim 1, wherein the determining the temperature rise region according to the temperature rise point is specifically:

6. A method of manufacturing a printed circuit board, the method comprising:

providing a circuit layer through a first material in a general area; and

7. The method of claim 6, wherein disposing the circuit layer through the second material in the temperature rise region is specifically:

8. The method of claim 7, wherein the method further comprises:

9. The method of claim 7, wherein the method further comprises: the high-frequency circuit is a circuit for transmitting a high-frequency signal to a temperature rise point, and the temperature rise point is a connection point with the simulation temperature being greater than or equal to a temperature threshold.

10. The method of claim 6, wherein the first material is copper and the second material is gold or silver.